JPH05145360A - Optical reception circuit and optical transformation circuit - Google Patents
Optical reception circuit and optical transformation circuitInfo
- Publication number
- JPH05145360A JPH05145360A JP30353691A JP30353691A JPH05145360A JP H05145360 A JPH05145360 A JP H05145360A JP 30353691 A JP30353691 A JP 30353691A JP 30353691 A JP30353691 A JP 30353691A JP H05145360 A JPH05145360 A JP H05145360A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- output
- optical
- detection circuit
- agc
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control Of Amplification And Gain Control (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、出力レベルを一定にす
るAGC(Automatic Gain Control)回路を備えた光受信
回路および光送信回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical receiver circuit and an optical transmitter circuit provided with an AGC (Automatic Gain Control) circuit for keeping an output level constant.
【0002】[0002]
【従来の技術】一般に、光通信システムは、電波利用に
よる無線通信システムに比べ波長が非常に短く、広帯
域、高速の信号を伝送できる利点を持つ。電波利用、光
利用を問わずこのような通信システムの受信回路におい
ては、信号出力レベルを一定に保つ回路が少なくとも具
備されており、その一例がAGC回路である。2. Description of the Related Art In general, an optical communication system has an advantage that it can transmit a wide band and high speed signal as compared with a wireless communication system using radio waves. The receiving circuit of such a communication system regardless of the use of radio waves or the use of light includes at least a circuit for keeping the signal output level constant, and an example thereof is an AGC circuit.
【0003】図8はAGC回路を備えた光受信回路の従
来例を示すブロック図、図9は出力レベル検出回路4と
検波回路6の回路図である。この光受信回路は、光−電
気変換素子、たとえばホトダイオード1と、前置増幅器
2と、AGC増幅器3と、出力レベル検出回路4と、検
波回路6と、直流増幅回路7と、出力端9の電力を設定
する基準電圧と直流増幅器7の出力電圧とを比較する電
圧比較回路8で構成されている。FIG. 8 is a block diagram showing a conventional example of an optical receiver circuit having an AGC circuit, and FIG. 9 is a circuit diagram of an output level detection circuit 4 and a detection circuit 6. This optical receiving circuit includes an opto-electric conversion element such as a photodiode 1, a preamplifier 2, an AGC amplifier 3, an output level detection circuit 4, a detection circuit 6, a DC amplification circuit 7, and an output terminal 9. It is composed of a voltage comparison circuit 8 for comparing a reference voltage for setting electric power with the output voltage of the DC amplifier 7.
【0004】ここで、AGC増幅器3、出力レベル検出
回路4、検波回路6、直流増幅器7、電圧比較回路8は
AGC回路を構成している。Here, the AGC amplifier 3, the output level detection circuit 4, the detection circuit 6, the DC amplifier 7 and the voltage comparison circuit 8 constitute an AGC circuit.
【0005】強度変調された光入力信号はホトダイオー
ド1により光−電気変換され、前置増幅器2において増
幅され、更にAGC増幅器3により増幅されて出力端9
に出力される。AGC回路は、AGC増幅器3の出力信
号の一部を出力レベル検出回路4で取り出し、検波回路
6でその信号レベルに相当する直流電圧に変換し、さら
に直流増幅回路7で後段の電圧比較回路8に適したレベ
ルに増幅した後、あらかじめ設定された出力が得られる
よう調整された基準電圧との誤差電圧を電圧比較回路8
により検出し、AGC増幅器3を制御することによって
出力レベルを一定に保つ。The intensity-modulated optical input signal is photo-electrically converted by the photodiode 1, amplified by the preamplifier 2, and further amplified by the AGC amplifier 3 to output the output terminal 9.
Is output to. In the AGC circuit, a part of the output signal of the AGC amplifier 3 is taken out by the output level detection circuit 4, converted into a DC voltage corresponding to the signal level by the detection circuit 6, and further, the DC amplification circuit 7 is provided to the voltage comparison circuit 8 at the subsequent stage. After being amplified to a level suitable for the output voltage, the error voltage with respect to the reference voltage adjusted so as to obtain a preset output is compared with the voltage comparison circuit 8
And the output level is kept constant by controlling the AGC amplifier 3.
【0006】出力レベル検出回路4は、通常の狭帯域系
の通信システムでは信号出力への影響を考慮し、図9に
示すように、小容量のコンデンサ31により取り出す手
段がとられる。検波回路6は出力レベル検出回路4より
得られた信号よりその検出電力に相当する直流電圧を得
るもので、ダイオード33により整流し、平滑回路(抵
抗34とコンデンサ35)により直流電圧が得られる。
ここで、図9中の抵抗32は出力レベル検出回路4の負
荷抵抗である。In the usual narrow band communication system, the output level detection circuit 4 takes into consideration the influence on the signal output, and as shown in FIG. The detection circuit 6 obtains a DC voltage corresponding to the detected power from the signal obtained from the output level detection circuit 4, rectifies it by the diode 33, and obtains the DC voltage by the smoothing circuit (the resistor 34 and the capacitor 35).
Here, the resistor 32 in FIG. 9 is a load resistor of the output level detection circuit 4.
【0007】光送信回路内にも光受信回路と同様に、信
号振幅を一定にするためのAGC回路が存在する。この
場合のAGC回路は主に光信号出力を得るレーザーダイ
オード等の変調度を一定にする目的で備えられる。ただ
し、出力レベル検出回路は光受信回路のものと同じであ
る。As in the optical receiver circuit, an AGC circuit for keeping the signal amplitude constant is also present in the optical transmitter circuit. The AGC circuit in this case is provided mainly for the purpose of making the modulation degree of a laser diode or the like for obtaining an optical signal output constant. However, the output level detecting circuit is the same as that of the optical receiving circuit.
【0008】[0008]
【発明が解決しようとする課題】上述した従来の光受信
回路は、小容量のコンデンサによる出力レベル検出回路
では、コンデンサのリアクタンス特性のために広帯域に
わたって一定レベルでの信号検出ができないという欠点
があり、また、リアクタンスの周波数依存を減少すべく
コンデンサの値を大きくすると、後段の検波回路のダイ
オードがオン/オフすることによって出力から見たイン
ピーダンスが大きく変動し、安定な出力振幅が得られな
いという欠点がある。これは従来の光送信回路でも同様
である。The above-described conventional optical receiving circuit has a drawback that an output level detecting circuit using a small-capacity capacitor cannot detect a signal at a constant level over a wide band due to the reactance characteristic of the capacitor. Also, if the value of the capacitor is increased to reduce the frequency dependence of the reactance, the impedance seen from the output fluctuates significantly due to the diode of the detection circuit in the subsequent stage turning on and off, and a stable output amplitude cannot be obtained. There are drawbacks. This also applies to the conventional optical transmission circuit.
【0009】本発明の目的は、広帯域な信号に対しても
一定レベルの信号を検出ができ、また安定な出力振幅が
得られる光受信回路および光送信回路を提供することに
ある。An object of the present invention is to provide an optical receiving circuit and an optical transmitting circuit which can detect a signal of a constant level even in a wide band signal and can obtain a stable output amplitude.
【0010】[0010]
【課題を解決するための手段】上記目的を達成するため
に、本発明の光受信回路は、AGC回路に抵抗器によっ
て構成された結合回路を有する。また、本発明の光送信
回路は、AGC回路に抵抗器によって構成された結合回
路を有する。In order to achieve the above object, the optical receiving circuit of the present invention has a coupling circuit formed by a resistor in an AGC circuit. Further, the optical transmission circuit of the present invention has a coupling circuit composed of a resistor in the AGC circuit.
【0011】[0011]
【作用】このように、AGC増幅器の出力信号検出用素
子に周波数によるインピーダンスの変化の無い抵抗器に
よって構成された結合回路を有することによって、広帯
域AGC用信号検出回路を得ることができ、出力から見
たインピーダンスも安定化され、出力信号振幅も一定と
なる。As described above, by providing the output signal detecting element of the AGC amplifier with the coupling circuit constituted by the resistor whose impedance does not change with frequency, a wide band AGC signal detecting circuit can be obtained and The impedance seen is also stabilized and the output signal amplitude is also constant.
【0012】[0012]
【実施例】次に、本発明の実施例について図面を参照し
て説明する。Embodiments of the present invention will now be described with reference to the drawings.
【0013】図1は本発明の第1の実施例の光受信回路
のブロック図、図2は図1の出力レベル検出回路4、緩
衝増幅器5および検波回路6の回路図である。FIG. 1 is a block diagram of an optical receiving circuit according to a first embodiment of the present invention, and FIG. 2 is a circuit diagram of an output level detecting circuit 4, a buffer amplifier 5 and a detecting circuit 6 of FIG.
【0014】本実施例は、従来の光受信回路(図9)の
出力レベル検出回路4と検波回路6の間に緩衝増幅器5
を備えた構成となっている。In this embodiment, a buffer amplifier 5 is provided between the output level detecting circuit 4 and the detecting circuit 6 of the conventional optical receiving circuit (FIG. 9).
It is configured with.
【0015】AGC増幅器3から出力端9および出力レ
ベル検出回路4に供給される電力をPin、緩衝増幅器5
の入力インピーダンスをZin、出力レベル検出回路4の
抵抗11の抵抗値をR1 とする。コンデンサ12を使用
するすべての周波数においてコンデンサ12のリアクタ
ンスがR1 、Zinに対して無視できるとし、出力端9が
インピーダンスZ0 で終端され、Z0 に対してR1のイ
ンピーダンスは十分高いとする。Power supplied from the AGC amplifier 3 to the output terminal 9 and the output level detection circuit 4 is Pin , and the buffer amplifier 5
The input impedance Z in, the resistance value of the resistor 11 of the output level detection circuit 4 is as R 1. Assume that the reactance of the capacitor 12 is negligible with respect to R 1 and Z in at all frequencies using the capacitor 12, and the output terminal 9 is terminated with the impedance Z 0 , and the impedance of R 1 is sufficiently high with respect to Z 0 . To do.
【0016】すると、出力端9に現れる電圧、つまり出
力レベル検出回路4に入力される電圧Vinは Vin=〔{Pin・{Z0 *(R1 +Zin)}〕1/2 ここで、Z0 *(R1 +Zin)の「*」は並列接続のイ
ンピーダンス計算で、 Z0 *(R1 +Zin)=Z0 *(R1 +Zin)/{(Z0 +(R1 +Zin)} Z0 <<R1 であるから Vin≒(Pin・Z0 )1/2 となる。さらに、緩衝増幅器5の入力抵抗Zinの両端に
現われる電圧VA は VA ={Zin/(R1 +Zin)}・Vin となり、緩衝増幅器5に入力される電力P1 は P1 =VA 2 /Zin =Pin・Z0 ・Zin/(R1 +Zin)2 となる。ただし、Z0 ・Zinは純抵抗である。Then, the voltage appearing at the output terminal 9, that is, the voltage V in input to the output level detection circuit 4 is V in = [{P in {Z 0 * (R 1 + Z in )}] 1/2 Then, “*” of Z 0 * (R 1 + Z in ) is impedance calculation of parallel connection, and Z 0 * (R 1 + Z in ) = Z 0 * (R 1 + Z in ) / {(Z 0 + (R 1 + Z in )} Z 0 << R 1 so that V in ≈ (P in · Z 0 ) 1/2 . Further, the voltage V A appearing across the input resistance Z in of the buffer amplifier 5 is V A. = {Z in / (R 1 + Z in )} · V in , and the power P 1 input to the buffer amplifier 5 is P 1 = VA 2 / Z in = P in · Z 0 · Z in / (R 1 + Z in ) 2 where Z 0 · Z in is a pure resistance.
【0017】緩衝増幅器5に入力された電力P1 はA倍
されて、A・P1 の電力が検波回路6の抵抗17に印加
される。抵抗17の両端にはV0 =(A・P1 ・Z0 )
1/2の高周波信号が現われ、ダイオード16で単波整流
され、抵抗17とコンデンサ18からなる平滑回路で直
流電圧に変換される。The electric power P 1 input to the buffer amplifier 5 is multiplied by A, and the electric power A · P 1 is applied to the resistor 17 of the detection circuit 6. V 0 = (A · P 1 · Z 0 ) across both ends of the resistor 17.
A 1/2 high-frequency signal appears, is single-wave rectified by the diode 16, and is converted into a DC voltage by the smoothing circuit including the resistor 17 and the capacitor 18.
【0018】本実施例では周波数特性を持つリアクタン
ス素子を含まないので、AGC回路の振幅周波数特性が
平坦となる。出力レベル検出回路4にリアクタンス素子
(コンデンサ12)は含むが、これは緩衝増幅器5との
直流阻止用コンデンサであって、コンデン入出力端のイ
ンピーダンスに対し十分無視できるリアクタンス分しか
持たない。ただし、この場合R1 +Zinは出力端9の特
性インピーダンスZ0に対して十分大きい必要がある。
その理由は、AGC増幅器3から出力端9を見たインピ
ーダンスZ1は Z1 =1/[{1/(R1 +Zin)}+(1/Z0 )] で、R1 +Zin>>Z0 であるからZ1≒Z0 となり、電力整合が得られるからである。Since the reactance element having the frequency characteristic is not included in this embodiment, the amplitude frequency characteristic of the AGC circuit becomes flat. Although the output level detection circuit 4 includes a reactance element (capacitor 12), this is a DC blocking capacitor with the buffer amplifier 5 and has a reactance component that can be sufficiently ignored with respect to the impedance of the condenser input / output terminal. However, in this case, R 1 + Z in needs to be sufficiently larger than the characteristic impedance Z 0 of the output terminal 9.
The reason is that the impedance Z 1 seen from the output terminal 9 from the AGC amplifier 3 is Z 1 = 1 / [{1 / (R 1 + Z in )} + (1 / Z 0 )], and R 1 + Z in >> Because Z 0 , Z 1 ≈Z 0 , and power matching is obtained.
【0019】図3は本発明の第2の実施例の光受信回路
のブロック図、図4は図3中の抵抗減衰器10、緩衝増
幅器5、検波回路6の回路例を示す図である。FIG. 3 is a block diagram of an optical receiving circuit according to a second embodiment of the present invention, and FIG. 4 is a diagram showing a circuit example of the resistance attenuator 10, the buffer amplifier 5, and the detection circuit 6 in FIG.
【0020】本実施例は、第1の実施例中の出力レベル
検出回路4を削除し、AGC増幅器3と出力端9の間
に、出力側のリターンロスを改善する目的で抵抗21、
22、23、24(抵抗値はそれぞれR1 、R2 、R
3 、R4 )と緩衝増幅器5の入力インピーダンスZinか
らなるπ型減衰器の抵抗減衰器10を配置し、ここで消
費される電力の一部を検出することによってAGC電圧
を出力端20に得ている。In this embodiment, the output level detection circuit 4 in the first embodiment is deleted, and a resistor 21, between the AGC amplifier 3 and the output terminal 9 is provided for the purpose of improving the return loss on the output side.
22, 23, 24 (resistance values are R 1 , R 2 , R respectively
3 , R 4 ) and the input impedance Z in of the buffer amplifier 5 are arranged as a resistance attenuator 10 of a π-type attenuator, and the AGC voltage is output to the output terminal 20 by detecting a part of the power consumed here. It has gained.
【0021】ここで、AGC増幅器3の出力インピーダ
ンス、緩衝増幅器5の入力インピーダンス、および出力
端9の終端インピーダンスをいずれもZ0とした場合、
それぞれインピーダンス整合が得られる条件は、 (R2 +R4 *Z0 )*(R1 +R3 *Z0 )=Z0 R2 +R4 *Z0 =R3 R4 *{R2 +Z0 *(R1 +R3 *Z0)}=Z0 となる。ここで、第一式はAGC増幅器3の出力側イン
ピーダンスがZ0となる条件、第二式は抵抗減衰器10
が特性インピーダンスZ0 となる条件の一部、第三式は
緩衝増幅器5の入力から見たインピーダンスがZ0 とな
る条件である。When the output impedance of the AGC amplifier 3, the input impedance of the buffer amplifier 5, and the terminating impedance of the output terminal 9 are all set to Z 0 ,
The conditions under which impedance matching is obtained are (R 2 + R 4 * Z 0 ) * (R 1 + R 3 * Z 0 ) = Z 0 R 2 + R 4 * Z 0 = R 3 R 4 * {R 2 + Z 0 * ( R 1 + R 3 * Z0)} = Z 0 . Here, the first expression is a condition that the output side impedance of the AGC amplifier 3 is Z 0, and the second expression is the resistance attenuator 10.
Is a characteristic impedance Z 0, and the third equation is a condition that the impedance viewed from the input of the buffer amplifier 5 is Z 0 .
【0022】また、抵抗減衰器10の減衰量をBdBと
すると、 R1 =(k2 −1)・Z0 /2k R3 =(k+1)・Z0 /(k−1) ただし、k=log-1(B/20) となる。When the attenuation amount of the resistance attenuator 10 is BdB, R 1 = (k 2 −1) · Z 0 / 2k R 3 = (k + 1) · Z 0 / (k−1) where k = It becomes log -1 (B / 20).
【0023】また、この時のAGC増幅器3の出力電力
Pa と緩衝増幅器5の入力電力Pbの電力比Pa /Pb
は、図5のようになる。At this time, the power ratio P a / P b between the output power P a of the AGC amplifier 3 and the input power P b of the buffer amplifier 5 at this time.
Is as shown in FIG.
【0024】本発明の他の実施例として、図6のように
π型減衰器の出力側からAGC制御電圧を得る方法、更
には図7のようにT型減衰器として検出する方法等が考
えられる。As another embodiment of the present invention, a method of obtaining an AGC control voltage from the output side of the π-type attenuator as shown in FIG. 6 and a method of detecting as an T-type attenuator as shown in FIG. 7 are considered. Be done.
【0025】[0025]
【発明の効果】以上説明したように本発明は、AGC回
路に抵抗器によって構成された結合回路を有することに
より、広帯域な信号に対して一定レベルの信号出力が得
られ、また安定な出力振幅が得られる効果がある。As described above, according to the present invention, since the AGC circuit has the coupling circuit constituted by the resistor, a signal output of a constant level can be obtained for a wide band signal and a stable output amplitude is obtained. There is an effect that can be obtained.
【図1】本発明の第1の実施例の光受信回路のブロック
図である。FIG. 1 is a block diagram of an optical receiving circuit according to a first embodiment of the present invention.
【図2】第1の実施例の出力レベル検出回路4、緩衝増
幅器5、検波回路6の回路図である。FIG. 2 is a circuit diagram of an output level detection circuit 4, a buffer amplifier 5, and a detection circuit 6 according to the first embodiment.
【図3】本発明の第2の実施例の光受信回路のブロック
図である。FIG. 3 is a block diagram of an optical receiving circuit according to a second embodiment of the present invention.
【図4】第2の実施例の抵抗減衰器10、緩衝増幅器
5、検波回路6の回路図である。FIG. 4 is a circuit diagram of a resistance attenuator 10, a buffer amplifier 5, and a detection circuit 6 according to a second embodiment.
【図5】第2の実施例における抵抗減衰器10の減衰量
と抵抗減衰器入力電力と検出回路出力電力の関係を示す
グラフである。FIG. 5 is a graph showing the relationship between the attenuation amount of the resistance attenuator 10, the resistance attenuator input power, and the detection circuit output power in the second embodiment.
【図6】第2の実施例の抵抗減衰器10、緩衝増幅器
5、検波回路6の回路図である。FIG. 6 is a circuit diagram of a resistance attenuator 10, a buffer amplifier 5, and a detection circuit 6 according to a second embodiment.
【図7】第2の実施例の抵抗減衰器10、緩衝増幅器
5、検波回路6の回路図である。FIG. 7 is a circuit diagram of a resistance attenuator 10, a buffer amplifier 5, and a detection circuit 6 according to a second embodiment.
【図8】光受信回路の従来例のブロック図である。FIG. 8 is a block diagram of a conventional example of an optical receiving circuit.
【図9】図8の従来例の出力レベル検出回路4の回路図
である。9 is a circuit diagram of a conventional output level detection circuit 4 of FIG.
【符号の説明】 1 ホトダイオード 2 前置増幅器 3 AGC増幅器 4 出力レベル検出回路 5 緩衝増幅器 6 検波回路 7 直流増幅器 8 電圧比較回路 9 出力端 10 抵抗減衰器 11、15、17、21〜24、32、34 抵抗 12、14、18、31、35 コンデンサ 16、33 ダイオード 19 入力端 20 出力端[Description of Reference Signs] 1 Photodiode 2 Preamplifier 3 AGC amplifier 4 Output level detection circuit 5 Buffer amplifier 6 Detection circuit 7 DC amplifier 8 Voltage comparison circuit 9 Output terminal 10 Resistance attenuator 11, 15, 17, 21-24, 32 , 34 resistors 12, 14, 18, 31, 35 capacitors 16, 33 diode 19 input end 20 output end
Claims (6)
れた電気信号の振幅の変動に対し一定振幅出力を得るた
めのAGC回路を備えた光受信回路において、前記AG
C回路に抵抗器によって構成された結合回路を有するこ
とを特徴とする光受信回路。1. An optical receiver circuit comprising an AGC circuit for obtaining a constant amplitude output with respect to fluctuations in the intensity of input light and fluctuations in the amplitude of a converted electric signal.
An optical receiver circuit having a coupling circuit composed of a resistor in a C circuit.
衰器と抵抗分割回路を組合せた構成である請求項1記載
の光受信回路。2. The optical receiving circuit according to claim 1, wherein the coupling circuit has a combination of a π-type or T-type resistance attenuator and a resistance division circuit.
緩衝増幅器を有する請求項1または2記載の光受信回
路。3. The optical receiving circuit according to claim 1, further comprising a wide-band buffer amplifier between the coupling circuit and the detection circuit.
一定振幅出力を得るためのAGC回路を備えた光送信回
路において、前記AGC回路に抵抗器によって構成され
た結合回路を有することを特徴とする光送信回路。4. An optical transmitter circuit having an AGC circuit for obtaining a constant amplitude output in response to fluctuations in the amplitude of an input electric signal, wherein the AGC circuit has a coupling circuit composed of a resistor. Optical transmitter circuit.
衰器と抵抗分割回路を組合せた構成である請求項4記載
の光送信回路。5. The optical transmission circuit according to claim 4, wherein the coupling circuit has a combination of a π type or T type resistance attenuator and a resistance division circuit.
緩衝増幅器を有する請求項4または5記載の光送信回
路。6. The optical transmission circuit according to claim 4, further comprising a wide-band buffer amplifier between the coupling circuit and the detection circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30353691A JPH05145360A (en) | 1991-11-19 | 1991-11-19 | Optical reception circuit and optical transformation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30353691A JPH05145360A (en) | 1991-11-19 | 1991-11-19 | Optical reception circuit and optical transformation circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05145360A true JPH05145360A (en) | 1993-06-11 |
Family
ID=17922176
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP30353691A Pending JPH05145360A (en) | 1991-11-19 | 1991-11-19 | Optical reception circuit and optical transformation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH05145360A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5946393A (en) * | 1997-02-10 | 1999-08-31 | Integration Associates, Inc. | Data access arrangement |
GB2420458A (en) * | 2004-11-19 | 2006-05-24 | Matsushita Electric Ind Co Ltd | Envelope detector circuit for an automatic gain control |
JP2008092500A (en) * | 2006-10-05 | 2008-04-17 | Dx Antenna Co Ltd | Optical subscriber terminal device |
JP2017112476A (en) * | 2015-12-16 | 2017-06-22 | 日本オクラロ株式会社 | Optical receiving module |
-
1991
- 1991-11-19 JP JP30353691A patent/JPH05145360A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5946393A (en) * | 1997-02-10 | 1999-08-31 | Integration Associates, Inc. | Data access arrangement |
GB2420458A (en) * | 2004-11-19 | 2006-05-24 | Matsushita Electric Ind Co Ltd | Envelope detector circuit for an automatic gain control |
GB2420458B (en) * | 2004-11-19 | 2008-09-17 | Matsushita Electric Ind Co Ltd | Envelope detector circuit |
JP2008092500A (en) * | 2006-10-05 | 2008-04-17 | Dx Antenna Co Ltd | Optical subscriber terminal device |
JP2017112476A (en) * | 2015-12-16 | 2017-06-22 | 日本オクラロ株式会社 | Optical receiving module |
US10014956B2 (en) | 2015-12-16 | 2018-07-03 | Oclaro Jaoan, Inc. | Optical receiver module |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2577490B2 (en) | AGC circuit of FM front end | |
JPS59216339A (en) | Light receiver and light transmission system | |
JPS6331135B2 (en) | ||
JPH05145360A (en) | Optical reception circuit and optical transformation circuit | |
JP4246149B2 (en) | Optical receiver circuit | |
JP3009857B2 (en) | Transmission power control circuit | |
US4793000A (en) | Light signal receiver | |
JPH07177099A (en) | Optical reception equipment | |
KR100377794B1 (en) | Apparatus for compensating mixer signal loss of BTS in a communication system | |
KR940001233Y1 (en) | Protection circuit for high-frequency power amp | |
JP3134127B2 (en) | High frequency amplifier circuit for FM | |
JPS5921138A (en) | Transmitting system having amplitude-frequency characteristic variation compensating circuit | |
JP3138772B2 (en) | High frequency amplifier circuit | |
JPH05206765A (en) | Constitution of amplification circuit | |
JPH0214605A (en) | Optical reception circuit | |
EP1432121A1 (en) | Temperature compensated amplifer circuit | |
JPH10233741A (en) | Optical receiver | |
JP2622490B2 (en) | Optical transmission loss compensation circuit | |
JPH0516728Y2 (en) | ||
JPH08186524A (en) | Equalizer | |
JPH07135488A (en) | Light receiving circuit for av optical space transmission | |
JPH08139617A (en) | Transmission output control circuit for ame transmitter | |
JPH09130686A (en) | Booster for television | |
JPH1188069A (en) | Light-receiving circuit | |
JPH02214333A (en) | Class b transmitter |