JPH05134628A - Driving device for liquid crystal display body - Google Patents

Abstract

PURPOSE:To provide the driving device for the liquid crystal display body which can drive the liquid crystal display body with good image quality having a good contrast with substantially no flickering. CONSTITUTION:Switches SW 38, 37 are turned on and a positive polarity precharging is impressed to a picture element 21 just before the positive polarity signal component of a video signal is inputted. Switches 35, 36 are turned on and the picture element 21 is driven by a 1st current driver 40 at the time of inputting of the positive polarity signal. The switches SW 35, 36 are turned on and the negative polarity precharging signal is impressed to the picture element 21 just before the negative polarity signal of the video signal is inputted. The switches 34, 37 are turned on and the picture element 21 is driven by a 2nd current driver 39 at the time of inputting of the negative polarity signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display driving device for driving a liquid crystal display by AC inversion.

[0002]

2. Description of the Related Art Conventionally, as a drive circuit of this type of AC inversion drive type liquid crystal display body, a drive circuit configuration of a class A operation system shown in FIG. 7 is generally used. When the switch SW1 is turned on, the video signal is stored in the capacitor 2 and is amplified by the operational amplifier 3. Totem pole MOSFETs 4 and 5 are connected to the output terminal of the operational amplifier 3, and the amplified output of the operational amplifier 3 is superposed on the drain current I ₁ to drive the liquid crystal display (LCD).

However, in such a drive circuit configuration, each M
Since the drain current I ₁ constantly flows through the OSFETs 4 and 5, the power consumption increases. Therefore, LCD
The driver chip generates heat and is not suitable for multi-pin output for driving many LCD pixels.

FIG. 8 shows a precharge type drive circuit configuration for reducing power consumption in order to eliminate such inconvenience. In this drive circuit, an output drive transistor having a totem pole structure is composed of a minute constant current source 6 and a large current driver 7. That is, immediately before the display data held in the capacitor 8 is transferred to the LCD 9, the switch SW11 and the switch SW12 are turned on with the switch SW10 being turned off every time, and the LCD 9 is once precharged with the electric charge of the V _DD level. Next, the switches SW11 and SW12 are turned off and the switch SW10 is turned on to take out the video signal held in the capacitor 8 and amplify it by the operational amplifier 13. A small current always flows through the output drive transistor of the totem pole structure, but a sink current flows through the large current driver 7 only when the amplified output of the operational amplifier 13 is input, and substantial data writing is performed by this sink current. Is done.

FIG. 9 shows a waveform of a drive voltage applied to the LCD 9 by the precharge type drive circuit. As shown in FIG. 9A, the switches SW11 and SW12 are turned on every one data transmission period T ₁ . When each of these switches SW11 and SW12 is turned on, as shown in (b) of the figure, the positive precharge voltage of V _DD level is applied to the LCD 9 immediately before the video signal V ₁ is transferred, and immediately after that, the video signal V ₁ is transferred. Therefore, according to such a precharge type drive circuit configuration, since only a small current constantly flows through the output drive transistor of the totem pole configuration, the bias current is suppressed as much as possible as compared with the class A operation type drive circuit. Low power consumption can be achieved.

[0006]

However, in the above-mentioned conventional precharge type liquid crystal display driving circuit, the applied voltage effective in each of the positive polarity phase and the negative polarity phase of the LCD drive voltage waveform shown in FIG. The magnitude of the value is different. As a result, the positive / negative balance of the LCD drive voltage is lost, and the video signal voltage common level V.V.
COM. Is a common level LC. Applied voltage to the LCD. CO
M. Will be different from. This is because V _{DD is} always applied regardless of whether the precharge voltage is in the positive polarity phase or the negative polarity phase of the video signal.
This is because the waveform area is larger in the positive polarity phase because it is applied at the level. Therefore, conventionally, due to the imbalance of the effective values of the positive and negative applied voltages, L
The contrast of the CD is lowered, the flicker is increased, and the image quality of the LCD is deteriorated.

[0007]

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and is an AC inversion drive type liquid crystal display in which an AC image signal is applied to change the molecular alignment direction of a liquid crystal display. In the body drive device, the positive and negative polarity precharge voltages are alternately applied to the liquid crystal display body each time the phase of the alternating-current image signal is inverted, and the positive and negative effective voltages for driving the liquid crystal display body are changed. Each size is balanced.

Further, a first source follower circuit composed of a p-channel transistor for driving a liquid crystal display body according to a first minute constant current source and an input AC image signal, and a connection between the first minute constant current source and a power source. , A second switch for connecting and disconnecting the p-channel transistor and the reference potential in conjunction with the first switch, and n for driving the liquid crystal display according to the input AC image signal.
A second source follower circuit including a channel transistor and a second minute constant current source; a third switch for connecting and disconnecting the n-channel transistor and the power supply;
And a fourth switch for connecting and disconnecting the connection between the minute constant current source and the reference potential in conjunction with the third switch, thereby constituting the liquid crystal display driving device.

Further, a first source follower circuit composed of a p-channel transistor for driving a liquid crystal display according to a first minute constant current source and an input AC image signal, and a connection between the first minute constant current source and a power source. A first switch for connecting and disconnecting, a second switch for connecting and disconnecting the gate bias to the p-channel transistor in conjunction with the first switch, an n-channel transistor for driving the liquid crystal display body according to an input AC image signal, Second composed of the second minute constant current source
Source follower circuit, a third switch for connecting / disconnecting the gate bias to the n-channel transistor, and a fourth switch for connecting / disconnecting the connection between the second minute constant current source and the reference potential in conjunction with the third switch. And a liquid crystal display driving device as described above.

[0010]

Immediately before the positive polarity signal component of the alternating current image signal is input, the third and fourth switches are turned on to apply the positive polarity precharge voltage to the liquid crystal display, and the positive polarity signal component of the alternating current image signal is applied. , The first and second switches are turned on and the p-channel transistor drives the liquid crystal display. Immediately before the negative polarity signal component of the AC image signal is input, the first and second switches are turned on to apply a negative polarity precharge voltage to the liquid crystal display, and the negative polarity signal component of the AC image signal At the time of input, the third and fourth switches are turned on and the n-channel transistor drives the liquid crystal display.

[0011]

FIG. 2 is a circuit block diagram showing a schematic structure of a liquid crystal display to which an LCD driver according to an embodiment of the present invention is applied.

The liquid crystal display comprises pixels 21 arranged in a matrix, column line driver circuits 22 for driving each pixel 21 in the column direction, and row line driver circuits 23 for driving each pixel 21 in the row direction. There is. Each pixel 21 has a pixel capacity and a liquid crystal cell 21b.
And is selected by the pixel transistor 21c. The liquid crystal cell 21b is a TN field effect type cell in which the molecular arrangement direction is changed by application of an AC inversion drive voltage. In addition, the column line driver circuit 2
2 is composed of a plurality of LCD drivers to be described later, and these LCD drivers are provided for each column. The column line driver circuit 22 converts the video signal into a DA signal.
It is serially input as TA _X and supplied in parallel to each pixel 21 in the X _{1 to} X _n columns. Further, the row line driver circuit 23 inputs the vertical synchronizing signal CLY, sequentially applies a gate voltage to each pixel transistor 21c in the G _{1 to} G _n rows, and supplies the video signal supplied by the column line driver circuit 22 to each liquid crystal cell 21b. Tell every line.

FIG. 1 is a circuit diagram showing the above LCD driver according to the present embodiment, which is formed in the column line driver circuit 22.

The switch SW31 is a switch for connecting and disconnecting a video signal which is an AC image signal. The output end of the switch SW31 is connected to the non-inverting input terminal of the operational amplifier 38. A switch SW32 having one end connected to the power supply V _DD and a switch SW33 having one end grounded are connected to the non-inverting input terminal. Gates of the first current driver 40 and the second current driver 39 are commonly connected to the output terminal of the operational amplifier 38. The first current driver 40 is a p-channel MOSF
ET, the second current driver 39 is an n-channel MOSFE
The drain and source circuits of the current drivers 39 and 40 are connected in series. Also,
This connection point is connected to the inverting input terminal of the operational amplifier 38, and is also connected to the first minute constant current source 41 and the second minute constant current source 42. Further, it is also connected to the pixel 21.

Second current driver 39 and power supply V
_A switch SW34 and a switch SW36 connect and disconnect between _{DD and} between the first minute constant current source 41 and the power supply V _DD, respectively. Further, the switch SW35 and the switch S are provided between the first current driver 40 and the ground potential, and between the second minute constant current source 42 and the ground potential, respectively.
It is interrupted by W37. Switches SW35 and S
W36 is interlocked as described later, and the first minute constant current source 41 and the first current driver 40 controlled by these switches SW35 and SW36 form a first source follower circuit. Also, switch SW
34 and SW37 are interlocked as described later,
The second current driver 39 and the second minute constant current source 42 controlled by these switches SW34 and SW37 form a second source follower circuit.

In such a configuration, when line phase inversion drive is performed, the switches SW31 to SW37 operate at the timings shown in FIGS. 3B to 3H. Note that FIG. 9A shows the timing of the row shift clock CLY input to the row line driver circuit 23, and the period T ₂ corresponds to one horizontal period.

As shown in FIG. 2B, the switch SW3
1 is turned on with a fixed time delay from the rise of the row shift clock CLY, and is kept on for one horizontal period T ₂ .
While the switch SW31 is off, the video signal is not input to the operational amplifier 38, and the switches SW32 and SW33 are alternately turned on as shown in FIGS. When the switch SW32 is on, the switches SW34 and SW37 are also on, as shown in FIGS. Therefore, the positive precharge voltage of the voltage V _DD level shown in FIG. 4B is applied to the pixel 21 via the switch SW34 and the second current driver 39. Here, FIG. 4 is a diagram conceptually showing a video signal level applied to one pixel. 4A shows switching timings of the switches SW32 and SW33, and FIG. 4B shows an AC inversion drive voltage waveform applied to the pixel 21. Also,
While the precharge voltage is being applied, the power supply voltage V _DD is input to each input terminal of the operational amplifier 38, and no amplified output is output from the operational amplifier 38. Due to this large precharge voltage, charges are rapidly accumulated in the pixel 21.

The switch 32 turns off and the switch SW31
When is turned on, the positive polarity signal component of the video signal is input to the operational amplifier 38 and is amplified. This switch SW3
When 1 is in the on state, the switches SW35 and SW36 are also changed to the on state as shown in FIGS. 3 (f) and 3 (g). Therefore, the power source voltage V _DD is applied to the first source follower circuit composed of the first minute constant current source 41 and the first current driver 40, and the operational amplifier 38
The p-channel transistor 40 is driven by the video signal amplified and output from the pixel 21, and the positive video signal voltage + V ₁ shown in FIG. On this occasion,
The voltage applied to the pixel 21 changes from the precharge voltage V _DD level to the video signal voltage + V ₁ , and the charge rapidly accumulated in the pixel 21 according to this voltage change is drawn into the p-channel transistor 40. Writing to the pixel 21 by the positive polarity video signal is substantially performed by this drawing current.

Next, when the switch SW31 is turned off, the video signal input is interrupted, and the switch SW33 is turned on as described above. When the switch SW33 shown in FIG. 3D is in the ON state, the switches SW35 and SW36 are also in the ON state as shown in FIGS. Therefore, the negative polarity precharge voltage at the ground potential level shown in FIG. 4B is applied to the pixel 21 via the switch 35 and the first current driver 40. Further, while the precharge voltage is being applied, the ground potential is input to each input terminal of the operational amplifier 38, and no amplified output is output from the operational amplifier 38. Due to the large negative precharge voltage, the charge is rapidly extracted from the pixel 21.

The switch 33 turns off and the switch SW31
When is turned on, the negative polarity signal component of the video signal is input to the operational amplifier 38 and is amplified. This switch SW3
When 1 is in the on state, the switches SW34 and SW37 are also changed to the on state as shown in FIGS. 2 (e) and 2 (h). Therefore, the power source voltage V _DD is applied to the second source follower circuit composed of the second current driver 39 and the second minute constant current source 42, and the operational amplifier 38 is applied.
The second current driver 39 is driven by the video signal amplified and output from the pixel 21, and the negative video signal voltage −V ₁ shown in FIG. 4B is applied to the pixel 21. At this time, the voltage applied to the pixel 21 changes from the precharge voltage at the ground potential level to the video signal voltage −V ₁ , and the charge rapidly extracted from the pixel 21 in accordance with this voltage change is the second current driver. It is injected into the pixel 21 via 39. Pixel 2
Writing to the 1 by the negative polarity video signal is substantially performed by this injection current.

As described above, according to this embodiment, the precharge voltage is applied every time the phase of the video signal is inverted between the positive polarity phase and the negative polarity phase, and the driving voltage to the pixel 21 shown in FIG. The waveform has a positive / negative symmetrical shape, and the magnitudes of the applied voltage effective values in the positive and negative phases are equal. For this reason, the video signal voltage common level V. COM. Are balanced between positive and negative polarities, and the common voltage level LC. COM. Matches Therefore, the contrast of the pixel 21 is improved, flicker is reduced, and the image quality of the pixel 21 is improved.

However, it should be noted that the above description of the potential balance is a theory in which the potential shift due to the parasitic capacitance of the pixel transistor 21c is omitted for convenience.

Further, the first and second source follower circuits are respectively configured to include high resistance minute constant current sources 41 and 42, and each source follower circuit is supplied from each of the constant current sources 41 and 42. Only current flows.
That is, unlike the conventional drive circuit shown in FIG. 7, the LCD drive circuit according to the present embodiment does not perform class A operation, so that power consumption is suppressed as much as possible. Therefore, an LCD drive circuit suitable for multi-pin output is provided.

FIG. 5 is a circuit diagram showing an LCD driving circuit according to another embodiment of the present invention. The same or corresponding portions as those in FIG. 1 are designated by the same reference numerals and the description thereof will be omitted. The difference between the drive circuit according to this embodiment and the drive circuit according to the above embodiments is as follows. That is, in the above embodiment, the first
In the current driver 40 and the second current driver 39, the drain / source circuits are switches SW35 and SW3.
4, the gate biases of the first current driver 40 and the second current driver 39 are interrupted by the switches SW55 and SW54 in the present embodiment. Since each gate bias is interrupted, each gate potential becomes uncertain when each switch SW54 and SW55 is in the OFF state. Therefore, the gate of the first current driver 40 is connected to the power supply V _DD via the resistor 52,
The gate of the second current driver 39 is grounded via the resistor 51.

In this embodiment as well, the drain currents of the current drivers 39 and 40 are controlled by switching the switches SW54 and SW55 on and off, and the switches SW54 and SW55 are the switches SW34 and SW35 in the above embodiment. Plays a similar function to. Therefore, each switch S in this embodiment is
W is also interrupted at the same timing as the timing shown in FIG. 3 according to the above-described embodiment, so that the positive and negative precharge voltages are applied to the pixel 21 when the phase of the video signal is inverted. Therefore, the LCD drive circuit according to the present embodiment has the same effect as that of the above-described embodiment, and the pixel 2
The magnitudes of the positive and negative effective voltages of the voltage applied to 1 are balanced, and the positive and negative polarities are balanced. Therefore, the image quality of the pixel 21 is improved. Further, since the class A operation is not performed, the power consumption is reduced, which is suitable for the multi-pin output as in the above embodiment.

FIG. 6 shows the L according to the embodiment shown in FIG.
It shows a configuration in which the CD drive circuit is monolithically formed. That is, the MOSFETs are formed on the same semiconductor substrate, and the switches SW32 and SW33 have a small area M.
It is composed of OSFETs 32 'and 33'. The operational amplifier 38 is a MOSFET group 38 'shown by a dotted line.
, And is constituted by small-area MOSFETs 38a to 38g. The first current driver 40 is composed of a large-area n-channel MOSFET 40 ', and the second current driver 39 is composed of a large-area p-channel MOSFET 39'. The switches SW54 and 55 for connecting and disconnecting each of these gate biases are small-area MOSFETs 54.
′, 55 ′ and resistors 51, 52 are small area MOSFET 5
It is composed of 1'and 52 '. Further, the first minute constant current source 41 and the switch SW37 have a small area of MO.
The second small constant current source 42 and the switch SW36 are composed of the SFET 42 'and the small area MOSFET 4
It is composed of 1 '.

That is, according to the drive circuit configuration of the above-described embodiment, a large current for writing data in the pixel 21 flows only in the first and second current drivers 39 and 40, so that only the formation area of these MOSFETs is required. It suffices to increase the size, and other MOSFETs can be formed in a small area. Therefore, according to the LCD drive circuit configuration of the above embodiment, it is possible to form the driver chip in a small area. That is, since a drive circuit having a small area and low current consumption is configured, a driver chip suitable for more pin output can be provided.

[0028]

As described above, according to the present invention, the positive and negative precharge voltages are applied to the liquid crystal display each time the phase of the AC image signal is inverted, so that the liquid crystal display is driven. The magnitudes of the positive polarity effective voltage and the negative polarity effective voltage are balanced. Therefore, in the state where the power consumption is reduced, the contrast of the liquid crystal display is improved, flicker is reduced, and the image quality of the liquid crystal display is improved.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of an LCD drive circuit according to an embodiment of the present invention.

FIG. 2 is a circuit block diagram showing a schematic configuration of a liquid crystal display to which an embodiment of the present invention is applied.

FIG. 3 is a timing chart showing an intermittent state of each switch in the embodiment shown in FIG.

FIG. 4 is a waveform diagram of an LCD drive voltage in the embodiment shown in FIG.

FIG. 5 is a circuit diagram showing a configuration of an LCD drive circuit according to another embodiment of the present invention.

FIG. 6 is a schematic diagram showing an LCD driving circuit shown in FIG.
2 is a circuit diagram in the case of being configured monolithically.

FIG. 7 is a circuit diagram showing a configuration of a first conventional LCD drive circuit.

FIG. 8 is a circuit diagram showing a configuration of a second conventional LCD drive circuit.

9 is an LCD drive voltage waveform diagram in the conventional circuit shown in FIG.

[Explanation of symbols]

 21 ... Pixel (liquid crystal display body) 31-37 ... Switch SW 38 ... Operational amplifier 39 ... Second current driver (n-channel transistor) 40 ... First current driver (p-channel transistor) 41 ... First minute constant current source 42 ... Second minute constant current source

Claims (4)

[Claims] 1. In an AC inversion drive type liquid crystal display driving device for applying an AC image signal to change the molecular alignment direction of the liquid crystal display, a positive polarity and a negative polarity each time the phase of the AC image signal is inverted. The precharge voltage is alternately applied to the liquid crystal display, and the positive effective voltage and the negative effective voltage for driving the liquid crystal are balanced in magnitude. .. 2. A first source follower circuit composed of a p-channel transistor for driving a liquid crystal display in response to a first minute constant current source and an input AC image signal, and the first minute constant current source and a power source. A first switch that connects and disconnects the connection, a second switch that connects and disconnects the connection between the p-channel transistor and the reference potential in conjunction with the first switch, and drives a liquid crystal display according to an input AC image signal. Second source follower circuit comprising an n-channel transistor and a second minute constant current source, a third switch for connecting and disconnecting the n-channel transistor and a power source, the second minute constant current source and a reference potential A fourth switch for connecting and disconnecting the connection between the third switch and the third switch, wherein the third switch is provided immediately before the positive polarity signal component of the AC image signal is input. And a fourth switch are turned on to apply a positive polarity precharge voltage to the liquid crystal display, and the first and second switches are turned on when the positive signal component of the alternating-current image signal is input to the p-channel transistor. The liquid crystal display is driven by, and immediately before the negative polarity signal component of the AC image signal is input, the first and second switches are turned on to apply a negative precharge voltage to the liquid crystal display, 2. The liquid crystal display driving device according to claim 1, wherein the liquid crystal display is driven by the n-channel transistor by turning on the third and fourth switches when a negative signal component of a signal is input. 3. A first source follower circuit comprising a first micro constant current source and a p-channel transistor for driving a liquid crystal display according to an input AC image signal, and the first micro constant current source and power source. A first switch that connects and disconnects the connection, a second switch that connects and disconnects a gate bias to the p-channel transistor in association with the first switch, and an n switch that drives a liquid crystal display according to an input AC image signal. A second source follower circuit including a channel transistor and a second minute constant current source, a third switch for connecting and disconnecting a gate bias to the n-channel transistor, and a connection between the second minute constant current source and a reference potential. A fourth switch for connecting and disconnecting the third switch in conjunction with the third switch, wherein the third switch and the fourth switch are connected immediately before the positive polarity signal component of the AC image signal is input. The fourth switch is turned on to apply a positive precharge voltage to the liquid crystal display, and when the positive signal component of the AC image signal is input, the first and second switches are turned on and the p-channel transistor is used. The liquid crystal display is driven, and immediately before the negative polarity signal component of the AC image signal is input, the first and second switches are turned on to apply the negative precharge voltage to the liquid crystal display, and the AC image signal 2. The liquid crystal display driving device according to claim 1, wherein the third and fourth switches are turned on to drive the liquid crystal display by the n-channel transistor when the negative polarity signal component is input. 4. The p-channel transistor and the n-channel transistor are respectively formed on the same semiconductor substrate by a large-area field effect transistor, and a first minute constant current source and a first switch, and a second minute constant current source, The second switch is formed on the same semiconductor substrate as the semiconductor substrate by one small area field effect transistor, and the third and fourth switches are formed on the same semiconductor substrate by the small area field effect transistor. The liquid crystal display drive device according to claim 3, wherein the liquid crystal display drive device is formed on a substrate.