JPH05114693A - Semiconductor device - Google Patents

Abstract

PURPOSE:To realize multichip mounting at a high packaging density in the state of one package of a chip-on-chip structure. CONSTITUTION:An IC chip 2 is fixed to the bed 1 of a lead frame. An insulating film 4 of a polyimide resin on which a wiring pattern 13 is expanded is formed on the chip 2 and a plurality of semiconductor chips respectively having sizes smaller than that of the chip 2 is fixed to the film 4. Then a desired circuit is constituted by connecting the IC chip 2 and semiconductor chips 5 to the wiring pattern 13 through bonding wires 14-1, 14-2, and 14-3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a one-packaged semiconductor device which achieves multi-chip mounting on a lead frame.

[0002]

2. Description of the Related Art A multi-chip mounting method on a lead frame is disclosed in JP-A-60-41249 and JP-A-60-18.
It is described in Japanese Patent Publication No. 9958. FIG. 3 is a cross-sectional view showing a multi-chip mounted resin-sealed semiconductor device having a configuration similar to that of the above publications.

In FIG. 3, the bed 31 of the lead frame is shown.
The wiring sheet 32 is fixed on the top, and the IC chips 33, 34, 35 having respective functions are fixed on the wiring sheet 32. The chips 33, 34, and 35 are wire-bonded via the conductor wiring 36 to form connections between the chips and the leads 37 of the lead frame. IC chip 33,3
4, 35 are sealed with resin 38 together with the bed 31 and one end of the lead 37.

In the above configuration, as the system scale in the package increases, the individual chip size also increases, and it tends to spread in the XY directions (planar). Therefore, it is difficult to perform high-density mounting.

Further, in multi-chip mounting using a pattern of a lead frame or a circuit board such as a wiring sheet 32 on a bed, there is a restriction on a fine pattern, and improvement in the degree of integration cannot be expected so much.

[0006]

As described above, in the prior art,
There is a drawback that high-density multi-chip mounting becomes more difficult as the individual chip size increases. The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a semiconductor device which realizes high-density multi-chip mounting.

[0007]

According to the present invention, an IC chip fixed to a bed of a lead frame, an insulating film formed on the IC chip, a wiring pattern formed on the insulating film, and A plurality of semiconductor chips smaller than the IC chip fixed on the insulating film; first connecting means for connecting the IC chip and the semiconductor chip to the wiring pattern; and the IC chip and the semiconductor chip respectively. It is characterized in that it is provided with a second connecting means which is wire-connected to each other and a third connecting means which is wire-connected to the IC chip and the lead of the lead frame.

[0008]

In the present invention, a wiring pattern is formed on a polyimide-based insulating film, so that a complicated wiring pattern can be developed on the insulating film. This facilitates the integration of wiring connections between the semiconductor chips on the IC chip.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the accompanying drawings. FIG. 1 is a perspective view showing a structure of a multi-chip-mounted semiconductor device according to the present invention before sealing. This is a chip-on-chip structure in which a plurality of semiconductor chips or semiconductor elements smaller than the IC chip are mounted on the IC chip.

An IC chip on the bed 1 of the lead frame
2 is stuck. A surface protection film 3 made of SiN or the like is formed on the IC chip 2, and an insulating film 4 made of polyimide or the like and having a thickness of about 10 μm is formed on the surface protection film 3. Semiconductor chips 5 to 12 having a smaller chip area than the chip 2 are fixed on the insulating film 4. Semiconductor chips 5-12
Is, for example, an IC chip or a passive element.

An electrode wiring pattern 13 for wiring the semiconductor chips 5 to 12 is formed on the insulating film 4. A protective film 16 such as SiN is formed around the electrode wiring pattern 13.

The IC chip 2 and the respective semiconductor chips 5 to 12 on the IC chip 2 are subjected to necessary wire bonding with or without the wiring pattern 13 interposed therebetween. The bonding wire 14-1 is a bonding wire that connects the electrode pad of each chip and the electrode wiring pattern 13. The bonding wire 14-2 is a bonding wire that connects chips. Bonding wire 14-3 is chip 2
Is a bonding wire that connects the electrode pad to the lead 15 of the lead frame. Since the electrode pads are arranged around the periphery of the chip 2 and bonding is performed, the surface protective film 3
And the insulating film 4 have been removed.

The IC chip 2 and the semiconductor chips 5 to
Reference numeral 12 denotes a semiconductor device in which a bonding wire necessary for connection is formed, and which includes one end of the bed 1 and the lead 15 and is sealed by, for example, a resin 21 as shown in the sectional view of FIG. Becomes The same parts as those in FIG. 1 are designated by the same reference numerals.

As the adhesive member 21 for fixing the chips 5 to 12 on the chip 2, a conductive paste or an insulating paste may be used as in a normal IC. The wiring material of the bonding wire 14 and the electrode wiring pattern 13 is Al, Al
-Si, Al-Si-Cu, Cu, etc. are considered. Further, if the protective film 16 such as SiN that protects the periphery of the electrode wiring pattern 13 is covered except the pad portion to which the bonding wire 14-1 is connected, the reliability is further improved.

The polyimide insulating film 4 having the electrode wiring pattern 13 formed on the surface has a short manufacturing process only by forming a pattern of a metal and a protective film. Further, it is possible to make it more complicated than to develop the wiring pattern on the substrate. Due to these advantages, it is expected that the development period of multi-chip mounting will be shortened.

Further, in order to shorten the delivery time to the user, the electrode wiring pattern 13 may be classified into some test patterns in advance. It is also possible to select a similar electrode wiring pattern and cut the wiring by laser cutting or the like to configure the circuit.

[0017]

As described above, according to the present invention,
By developing a complicated wiring pattern on the insulating film,
Since the wiring connections between the semiconductor chips on the IC chip are easily integrated, it is possible to provide a single-packaged semiconductor device that realizes high-density multi-chip mounting.

[Brief description of drawings]

FIG. 1 is a perspective view showing the configuration of a semiconductor device according to an embodiment of the invention.

FIG. 2 is a cross-sectional view showing the configuration of a semiconductor device packaged in one package with resin sealing according to an embodiment of the present invention.

FIG. 3 is a cross-sectional view showing the configuration of a conventional resin-sealed semiconductor device.

[Explanation of symbols]

1 ... Bed, 2 ... IC chip, 3 ... Surface protective film, 4 ... Insulating film, 5-12 ... Semiconductor chip, 13 ... Electrode wiring pattern,
14-1 to 14-3 ... Bonding wire, 15 ... Lead, 16 ... Protective film, 22 ... Resin.

Claims (2)

[Claims] 1. An I fixed to a bed of a lead frame
A C chip, an insulating film formed on the IC chip,
A wiring pattern formed on the insulating film, a plurality of semiconductor chips smaller than the IC chip fixed on the insulating film, and the IC chip and each of the semiconductor chips and the wiring pattern are connected by wiring. Connection means, second connection means for interconnecting the IC chip and semiconductor chip to each other, and third connection means for interconnecting the IC chip and the lead of the lead frame. A semiconductor device characterized by the above. 2. The insulating film formed on the IC chip and having a developed wiring pattern is a polyimide-based member, and is a protective film except for the connection portion of the wiring pattern where the first connecting means is formed. The semiconductor device according to claim 1, wherein the semiconductor device is covered.