JPH0494732U - - Google Patents

Info

Publication number: JPH0494732U
Authority: JP; Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Pending

Application number

JP1991000493U

Other languages

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1991-01-11

Filing date

1991-01-11

Publication date

1992-08-17

1991-01-11 Application filed filed Critical

1991-01-11 Priority to JP1991000493U priority Critical patent/JPH0494732U/ja

1992-08-17 Publication of JPH0494732U publication Critical patent/JPH0494732U/ja

Status Pending legal-status Critical Current

Classifications

- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/1401—Structure
- H01L2224/1403—Bump connectors having different sizes, e.g. different diameters, heights or widths
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/1405—Shape
- H01L2224/14051—Bump connectors having different shapes
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/141—Disposition
- H01L2224/1412—Layout
- H01L2224/14179—Corner adaptations, i.e. disposition of the bump connectors at the corners of the semiconductor or solid-state body
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

Landscapes

Wire Bonding (AREA)

JP1991000493U 1991-01-11 1991-01-11 Pending JPH0494732U (en)

Priority Applications (1)

Application Number	Priority Date	Filing Date	Title
JP1991000493U JPH0494732U (en)	1991-01-11	1991-01-11

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP1991000493U JPH0494732U (en)	1991-01-11	1991-01-11

Publications (1)

Publication Number	Publication Date
JPH0494732U true JPH0494732U (en)	1992-08-17

Family

ID=31727223

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
JP1991000493U Pending JPH0494732U (en)	1991-01-11	1991-01-11

Country Status (1)

Country	Link
JP (1)	JPH0494732U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP2009283718A (en) *	2008-05-22	2009-12-03	Panasonic Corp	Semiconductor element and semiconductor device using the same

1991
- 1991-01-11 JP JP1991000493U patent/JPH0494732U/ja active Pending

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JP2009283718A (en) *	2008-05-22	2009-12-03	Panasonic Corp	Semiconductor element and semiconductor device using the same
JP4639245B2 (en) *	2008-05-22	2011-02-23	パナソニック株式会社	Semiconductor element and semiconductor device using the same

Publication	Publication Date	Title
DE4291719T1 (en)	1993-07-15
EP0740471A3 (en)	1996-12-11
FR2680667B1 (en)	1995-06-02
FR2674766B1 (en)	1994-04-22
DE4291110T1 (en)	1993-05-13
EP0510639A3 (en)	1995-04-12
EP0531772A3 (en)	1995-04-26
FR2678794B1 (en)	1995-03-10
JPH0494732U (en)	1992-08-17
DK189091D0 (en)	1991-11-19
ECSM91539U (en)	1992-02-14
EP0525427A3 (en)	1994-01-12
AU7377391A (en)	1992-01-23
AU7921191A (en)	1991-10-17
EP0533377A3 (en)	1994-01-05
EP0533195A3 (en)	1994-03-30
EP0532380A3 (en)	1994-05-04
EP0531991A3 (en)	1994-03-02
EP0531852A3 (en)	1994-02-23
EP0531171A3 (en)	1994-08-03
EP0531024A3 (en)	1994-01-05
EP0530555A3 (en)	1994-01-26
EP0529284A3 (en)	1994-03-16
EP0526070A3 (en)	1994-02-16
AU7133791A (en)	1991-12-19