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JPH0449795B2 - - Google Patents

Info

Publication number
JPH0449795B2
JPH0449795B2 JP60191201A JP19120185A JPH0449795B2 JP H0449795 B2 JPH0449795 B2 JP H0449795B2 JP 60191201 A JP60191201 A JP 60191201A JP 19120185 A JP19120185 A JP 19120185A JP H0449795 B2 JPH0449795 B2 JP H0449795B2
Authority
JP
Japan
Prior art keywords
insulating sheet
plating
printed wiring
wiring board
adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60191201A
Other languages
Japanese (ja)
Other versions
JPS6251288A (en
Inventor
Seiji Honma
Nobuo Uozu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lincstech Circuit Co Ltd
Original Assignee
Hitachi AIC Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi AIC Inc filed Critical Hitachi AIC Inc
Priority to JP19120185A priority Critical patent/JPS6251288A/en
Publication of JPS6251288A publication Critical patent/JPS6251288A/en
Publication of JPH0449795B2 publication Critical patent/JPH0449795B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はフレキシブルなプリント配線板の製造
方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a flexible printed wiring board.

(従来の技術) 従来のフレキシブルなプリント配線板は、薄い
プラスチツクフイルムを絶縁性シートとして用
い、この絶縁性シートの両面に接着剤で銅箔を貼
り合わせ、銅箔を貼り合わせた後に孔を明け、孔
内壁にめつき触媒を付着し、無電解めつき或いは
無電解めつきと電気めつきの併用による孔内壁に
めつき層を形成し、その後、銅箔をエツチング処
理して回路を形成して製造されている。
(Conventional technology) Conventional flexible printed wiring boards use a thin plastic film as an insulating sheet, bond copper foil to both sides of the insulating sheet with adhesive, and punch holes after bonding the copper foil. A plating catalyst is attached to the inner wall of the hole, a plating layer is formed on the inner wall of the hole by electroless plating or a combination of electroless plating and electroplating, and then a circuit is formed by etching the copper foil. Manufactured.

(発明が解決しようとする問題点) しかし、従来の方法では、孔内壁のめつき層を
形成するためにめつき触媒を付与しなければなら
ず、また、表面の回路形成とは別工程となつてい
るために製造工程が複雑になり信頼性が低くなり
易い欠点があつた。
(Problems to be Solved by the Invention) However, in the conventional method, a plating catalyst must be applied to form a plating layer on the inner wall of the hole, and a process separate from the circuit formation on the surface is required. Because of this, the manufacturing process was complicated and reliability tended to be low.

本発明は、製造工程が簡単で信頼性の高いプリ
ント配線板の製造方法の提供を目的とするもので
ある。
An object of the present invention is to provide a method for manufacturing a printed wiring board with a simple manufacturing process and high reliability.

(問題点を解決するための手段) 本発明は、以上の目的を達成するために、絶縁
性シートに無電解めつきによる回路を形成しうる
プリント配線板の製造方法において、厚さ25μm
〜70μm範囲の絶縁性シートを用いこの絶縁性シ
ートにめつき触媒入り接着剤を塗布する工程と、
該絶縁性シートに孔を設ける工程と、該工程後に
前記絶縁性シートにめつきレジストを設ける工程
と、該工程後に無電解めつきにより前記絶縁性シ
ートの表面及び内壁に同時にめつき層を形成する
ことを特徴とするプリント配線板の製造方法を提
供するものである。
(Means for Solving the Problems) In order to achieve the above objects, the present invention provides a method for manufacturing a printed wiring board in which a circuit can be formed on an insulating sheet by electroless plating.
a step of using an insulating sheet in the range of ~70 μm and applying a plating catalyst-containing adhesive to the insulating sheet;
A step of providing holes in the insulating sheet, a step of providing a plating resist on the insulating sheet after this step, and simultaneously forming a plating layer on the surface and inner wall of the insulating sheet by electroless plating after this step. The present invention provides a method for manufacturing a printed wiring board characterized by:

(作用) 本発明によれば、厚さ25μm〜70μmの範囲の
絶縁性シートを用い、この絶縁性シートにめつき
触媒入り接着剤層を設けているために、シート表
面と孔内壁とに無電解めつきにより同時にめつき
層を形成でき、工程が簡単になる。
(Function) According to the present invention, since an insulating sheet having a thickness in the range of 25 μm to 70 μm is used and a plating catalyst-containing adhesive layer is provided on this insulating sheet, there is no interference between the sheet surface and the inner wall of the hole. Electrolytic plating allows the formation of a plating layer at the same time, simplifying the process.

(実施例) 以下、本発明の実施例を図面に基づいて説明す
る。
(Example) Hereinafter, an example of the present invention will be described based on the drawings.

先ず、絶縁性シートとして厚さ25μm〜70μm
の範囲ポリイミドフイルムやエポキシフイルム、
ポリエステルフイルム等の絶縁フイルムを用い、
この絶縁性シート1に、第1図に示す通り、パラ
ジウム化合物をめつき触媒としこれをアクリロニ
トリルブタジエンゴム、フエノール樹脂系組成物
中に含有した接着剤2を塗布する。
First, as an insulating sheet, the thickness is 25 μm to 70 μm.
A range of polyimide films and epoxy films,
Using an insulating film such as polyester film,
As shown in FIG. 1, this insulating sheet 1 is coated with an adhesive 2 containing a palladium compound as a plating catalyst in an acrylonitrile butadiene rubber and phenolic resin composition.

次に、この絶縁性シート1に、第2図に示す通
り孔3パンチやドリル等により設け、洗浄する。
洗浄後、第3図に示す通り、接着剤2表面の任意
の箇所にめつきレジスト層4をスクリーン印刷す
る。
Next, holes 3 are formed in the insulating sheet 1 by punching, drilling, etc. as shown in FIG. 2, and the holes are cleaned.
After cleaning, as shown in FIG. 3, a plating resist layer 4 is screen printed on an arbitrary location on the surface of the adhesive 2.

めつきレジスト層4印刷後、硼弗化水素酸、重
クロム酸ソーダ等からなる粗化液により、第4図
に示す通り、接着剤2表面を化学粗化する。
After printing the plating resist layer 4, the surface of the adhesive 2 is chemically roughened using a roughening liquid made of borofluoric acid, sodium dichromate, etc., as shown in FIG.

化学粗化後、硫酸銅、ホルムアルデヒド、錯化
剤、苛性ソーダ、シアン化ソーダ等からなる無電
解めつき液中に、絶縁性シート1を浸漬し、無電
解めつきにより、第5図に示す通り、表面及び孔
3内壁に同時にめつき層5を形成する。
After chemical roughening, the insulating sheet 1 is immersed in an electroless plating solution containing copper sulfate, formaldehyde, a complexing agent, caustic soda, soda cyanide, etc., and electroless plating is performed to form the sheet as shown in FIG. , a plating layer 5 is formed on the surface and the inner wall of the hole 3 at the same time.

例えば、実施例1として、 絶縁性シート:厚さ25μmのポリイミドフイル
ム、 接着剤:めつき触媒入り接着剤(日立化成工業社
製HA−21)を厚さ20μmに塗布 めつきレジスト層:めつきレジストインク(日立
化成工業社製HGM−02BK)を印刷、 無電解めつき:ホルムアルデヒド、錯化剤、苛性
ソーダ及びシアン化ソーダ等からなる無電解め
つき液中に35Hr浸漬し、めつき処理、絶縁性
シート及び孔内壁に厚さ35μmのめつき層を形
成し、 プリント配線板とする。
For example, as Example 1, insulating sheet: polyimide film with a thickness of 25 μm, adhesive: plating catalyst-containing adhesive (HA-21 manufactured by Hitachi Chemical Co., Ltd.) applied to a thickness of 20 μm, plating, resist layer: plating. Printed with resist ink (HGM-02BK manufactured by Hitachi Chemical Co., Ltd.), electroless plating: immersed for 35 hours in an electroless plating solution consisting of formaldehyde, complexing agent, caustic soda, soda cyanide, etc., plating processing, and insulation. A 35 μm thick plating layer is formed on the adhesive sheet and the inner walls of the holes to form a printed wiring board.

また、実施例2は、絶縁板フイルムとして厚さ
70μmのポリイミドフイルムを用いた以外は実施
例1と同じ条件で処理し、プリント配線板を製造
する。
In addition, in Example 2, the thickness of the insulating plate film was
A printed wiring board was manufactured under the same conditions as in Example 1 except that a 70 μm polyimide film was used.

そして、これらの実施例1と2について、
MIL−1070の規定に従い衝撃テストを75回繰返
し行つたが問題はなかつた。
Regarding these Examples 1 and 2,
The impact test was repeated 75 times in accordance with the MIL-1070 regulations, but no problems were found.

なお、比較例として、厚さ100μmのポリイミ
ドフイルムを用いた以外は実施例1と同じ条件で
処理し、プリント配線板を製造したが、孔内のめ
つき層が均一に形成されず、両面のめつき層が導
通しなかつた。
As a comparative example, a printed wiring board was manufactured under the same conditions as in Example 1 except that a polyimide film with a thickness of 100 μm was used, but the plating layer inside the holes was not formed uniformly and the The plating layer was not conductive.

(発明の効果) 以上の通り、本発明によれば、めつき触媒入り
接着剤を塗布した厚さ25μm〜70μmの範囲の絶
縁性シートをフレキシブルな基板として用いるた
めに、製造工程が簡単で信頼性の高いプリント配
線板の製造方法が得られる。
(Effects of the Invention) As described above, according to the present invention, since an insulating sheet coated with a plating catalyst-containing adhesive and having a thickness in the range of 25 μm to 70 μm is used as a flexible substrate, the manufacturing process is simple and reliable. A method for manufacturing a printed wiring board with high performance can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第5図は本発明の実施例の各製造段階
を示し、第1図は接着剤層を設けた絶縁性シート
の正面断面図、第2図は孔を明けた絶縁性シート
の正面断面図、第3図はめつきレジスト層形成後
の絶縁性シートの正面断面図、第4図は接着剤を
粗化した絶縁性シートの正面断面図、第5図は本
発明の実施例によるプリント配線板の正面断面図
を示す。 1……絶縁性シート、2……接着剤、3……
孔、4……めつきレジスト層、5……めつき層。
Figures 1 to 5 show each manufacturing stage of an embodiment of the present invention. Figure 1 is a front sectional view of an insulating sheet provided with an adhesive layer, and Figure 2 is a cross-sectional view of an insulating sheet with holes. Fig. 3 is a front sectional view of the insulating sheet after forming a plating resist layer, Fig. 4 is a front sectional view of the insulating sheet with roughened adhesive, and Fig. 5 is according to an embodiment of the present invention. A front sectional view of the printed wiring board is shown. 1... Insulating sheet, 2... Adhesive, 3...
Hole, 4...Plated resist layer, 5...Plated layer.

Claims (1)

【特許請求の範囲】[Claims] 1 絶縁性シートに無電解めつきにより回路を形
成しうるプリント配線板の製造方法において、厚
さ25μm〜70μmの範囲の絶縁性シートを用いこ
の絶縁性シートにめつき触媒入り接着剤層を設け
る工程と、該絶縁性シートに孔を設ける工程と、
該工程後に前記絶縁性シートにめつきレジストを
設ける工程と、該工程後に無電解めつきにより前
記絶縁性シートの表面及び孔内壁に同時にめつき
層を形成することを特徴とするプリント配線板の
製造方法。
1. In a method for manufacturing a printed wiring board in which a circuit can be formed by electroless plating on an insulating sheet, an insulating sheet with a thickness in the range of 25 μm to 70 μm is used, and a plating catalyst-containing adhesive layer is provided on this insulating sheet. a step of providing holes in the insulating sheet;
A printed wiring board comprising a step of providing a plating resist on the insulating sheet after the step, and simultaneously forming a plating layer on the surface of the insulating sheet and the inner wall of the hole by electroless plating after the step. Production method.
JP19120185A 1985-08-30 1985-08-30 Manufacture of printed wiring board Granted JPS6251288A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19120185A JPS6251288A (en) 1985-08-30 1985-08-30 Manufacture of printed wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19120185A JPS6251288A (en) 1985-08-30 1985-08-30 Manufacture of printed wiring board

Publications (2)

Publication Number Publication Date
JPS6251288A JPS6251288A (en) 1987-03-05
JPH0449795B2 true JPH0449795B2 (en) 1992-08-12

Family

ID=16270587

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19120185A Granted JPS6251288A (en) 1985-08-30 1985-08-30 Manufacture of printed wiring board

Country Status (1)

Country Link
JP (1) JPS6251288A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009057446A1 (en) 2007-10-30 2009-05-07 Tokai Riken Co., Ltd. Electronic key

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0760922B2 (en) * 1988-07-15 1995-06-28 横浜ゴム株式会社 Multi-layer film for additive method wiring board

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51149564A (en) * 1975-06-17 1976-12-22 Tokyo Shibaura Electric Co Method of manufacturing circuit substrate
JPS5943594A (en) * 1982-09-03 1984-03-10 大日本印刷株式会社 Conductive circuit sheet

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51149564A (en) * 1975-06-17 1976-12-22 Tokyo Shibaura Electric Co Method of manufacturing circuit substrate
JPS5943594A (en) * 1982-09-03 1984-03-10 大日本印刷株式会社 Conductive circuit sheet

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009057446A1 (en) 2007-10-30 2009-05-07 Tokai Riken Co., Ltd. Electronic key

Also Published As

Publication number Publication date
JPS6251288A (en) 1987-03-05

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