JPH0445302Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a timer device in which data such as on-time, off-time, timer control device selection, etc. can be input by key input or the like.

[Technical background of the invention and its problems] Conventionally, there is a timer device of this type as shown in FIG. In the figure, IN is AC100V
The power input terminal where power is input, OUT ₁ is
The power output terminal that outputs AC100V power, OUT ₂ is a data output terminal that outputs function data as timer control device selection data, and between the power input terminal IN and the power output terminal OUT ₁ ,
A parallel circuit of a bypass switch 1 and a timer control switch 2 is connected. Bypass switch 1
is switched manually, and the timer control switch 2 is switched under the control of the controller 3. The controller 3 has a memory 3a for storing timer on time, timer off time, function data for selecting a timer control device when the timer is on and off, etc. inputted by a key matrix 4 as an input setting means. Timer control switch 2
At the same time, the function data is output to the output terminal OUT ₂ through the switch 5. Note that the switch 5 is turned on and off by control signals that go to L and H levels in accordance with the on and off of the bypass switch 1, and the controller 3
Controls the output of function data from.

The operation of the conventional device whose configuration has been described above will be described below. When the timer on time, timer off time and control function are input using the key matrix 4, these are stored in the memory 3 of the controller 3.
It is stored in a. When the timer is on, the controller 3 turns on the timer control switch 2.
At this time, if bypass switch 1 is on, switch 5 is turned off by a control signal from bypass switch 1. Therefore, even when the timer is turned on, the function data stored in the memory 3a is not output from the output terminal _OUT2 . That is, even if the timer is on, if the bypass switch 1 is on, the current state is maintained.

When the bypass switch 1 is off, the switch 5 is on due to the control signal from the bypass switch 1, so the memory 3a is turned on according to the timer on.
Function data from the switch 5 passes through the switch 5 and is output from the output terminal OUT ₂ , so that a timer operation is performed.

However, in the conventional device described above, timer control is not possible as long as the user turns on the bypass switch 1 and operates the audio equipment. Therefore, in order to perform timer-linked control, the user must remember to turn off the bypass switch 1, and if the user forgets to do this, it will interfere with important recordings.

[Purpose of the invention] The present invention was made in order to eliminate the drawbacks of the conventional ones mentioned above, and it makes it possible to select an important function regardless of the state of the bypass switch. The purpose of this invention is to provide a timer device that is not damaged.

[Summary of the invention] A timer device devised to achieve the above-mentioned purpose controls the output of timer control device selection data through logical processing of data representing the priority of timer control device selection data and the state of a bypass switch. By doing so, even when the bypass switch is in the bypass state, the timer control device selection data can be output based on the priority data, so that important data such as recording will not be missed.

[Example] Hereinafter, an example of the present invention will be described based on the drawings.

FIG. 1 is a block circuit diagram showing an embodiment of a timer device according to the present invention, in which the same parts as those described above with reference to FIG. 2 are given the same reference numerals.

The controller 3 has a memory 3a for storing on-time, off-time and function data input by the key matrix 4, as well as a memory 3b for storing timer priorities input by the key matrix 4. The higher priority stored in the memory 3b is designated by H, and the lower priority is designated by L, and is assigned in correspondence to each function data stored in the memory 3a.

The priority data from the memory 3b is output at the same time as the corresponding function data is output from the controller 3, and is input to the other side of the OR circuit 10, one input of which is input with the control signal from the bypass switch 1. entered into the input. The OR circuit 10 logically ORs the control signal from the bypass switch 1 and the priority data from the controller 3, and outputs a signal for controlling the on/off of the switch 5.

The controller 3 also outputs an H level signal during on-time to light up the indicator 11,
It is now possible to notify users that they are on-time.

The operation of the above configuration will be explained below.

When setting the timer, timer on time, timer off time, function data and priority data of the audio equipment to be controlled are input using the key matrix 4, and are stored in the respective memories 3a and 3b in the controller 3.

In the above state, when the bypass switch 1 is in the on state, the control signal inputted from the bypass switch 1 to one input of the OR circuit 10 is L. When the timer is turned on here, the priority data is input from the memory 3b to the other input of the OR circuit 10. The priority data is H,
When the priority of the function data currently being output is high, the output of the OR circuit 10 becomes H level and switch 5 is turned on, so bypass switch 1 is turned on for the function data. Nevertheless, the signal is output from the output terminal OUT ₂ through the switch 5. but,
When the priority of the function data output during the timer on time is low and the priority data from the memory 3b is L, the output of the OR circuit 10 remains L and the switch 5 is maintained in the off state.

When bypass switch 1 is off,
Since the control signal input from the bypass switch 1 to one input of the OR circuit 10 is H, and the output of the OR circuit 10 is also H, the switch 5
remains on. Therefore, when the timer is turned on, the function data from the memory 3a is outputted from the output terminal _OUT2 through the switch 5, regardless of the priority data from the memory 3b.

When the timer is turned on, the indicator 11 is lit by a signal output from the controller 3 to notify that the set timer time has arrived.

In the illustrated embodiment, the state of the bypass switch 1 and the priority data are logically summed, and the result is used to turn on and off the switch for outputting the function data. It is also possible to realize this by using

[Effects] As explained above, according to the present invention, data representing the priority of the timer control device selection data can also be stored, and the timer control device selection data can be output by logical processing of the priority data and the state of the bypass switch. This eliminates the problem of conventional methods in which the output of timer control device selection data is controlled only by the state of the bypass switch, and when the priority is high, the timer control device is Selected data can now be output, making it possible to avoid, for example, missing important recordings.

In addition, when the timer is turned on, a notification means is activated to notify the user that the timer is on, so if the priority is low and the timer control device selection data is not being output due to the status of the bypass switch, the user can take appropriate measures. It is possible to signal the timer on so that the timer can be turned on.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a timer device according to the present invention, and FIG. 2 is a block diagram showing an embodiment of a conventional device. 1... Bypass switch, 2... Timer control switch, 3... Controller, 3a... Memory,
3b...Memory, 4...Key matrix, 5...
...Switch, 10...OR circuit, 11...Indicator.

Claims (1)

[Claims for Utility Model Registration] (1) A parallel circuit of a bypass switch and a timer control switch provided in a power supply path, and an on-time input by key input, etc.
a controller having a storage means for storing data such as off time and timer control equipment selection, and the controller controls the timer control switch based on the data stored in the storage means, and also controls the timer control switch from the storage means. The timer device outputs selection data, further comprising priority data storage means for storing data representing the priority of the timer control device selection data stored in the storage means by the controller, and when the timer is turned on, the A timer device characterized in that output of timer control device selection data is controlled by logical processing of data in a priority data storage means and a state of the bypass switch. (2) The timer device according to claim (1), wherein the controller outputs a signal that activates a notification means to notify that the timer is on time when the timer is on.