JPH0440548U - - Google Patents
Info
- Publication number
- JPH0440548U JPH0440548U JP8336790U JP8336790U JPH0440548U JP H0440548 U JPH0440548 U JP H0440548U JP 8336790 U JP8336790 U JP 8336790U JP 8336790 U JP8336790 U JP 8336790U JP H0440548 U JPH0440548 U JP H0440548U
- Authority
- JP
- Japan
- Prior art keywords
- vacant terminal
- ground
- internal circuit
- integrated circuit
- vacant
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Description
第１図、第２図、第３図は、本考案の原理図、
第４図は本考案の実施例、第５図は従来の集積回
路を示す図である。
図中、２は空き端子、３，４はスイツチ、５は
内部回路、６は電源、７は接地である。
Figures 1, 2, and 3 are diagrams of the principle of the present invention;
FIG. 4 shows an embodiment of the present invention, and FIG. 5 shows a conventional integrated circuit. In the figure, 2 is an empty terminal, 3 and 4 are switches, 5 is an internal circuit, 6 is a power supply, and 7 is a ground.
Claims (1)
、該空き端子を該電源に接続するスイツチ３を設
けたことを特徴とする集積回路。 (2) 空き端子２と内部回路５のアース７間に該
空き端子を該アースに接続するスイツチ４を設け
たことを特徴とする集積回路。 (3) 空き端子２と内部回路５の電源６間及び空
き端子と内部回路のアース７間に該空き端子を該
電源又は該アースに接続するスイツチ３，４を設
けたことを特徴とする集積回路。[Claims for Utility Model Registration] (1) An integrated circuit characterized in that a switch 3 for connecting the vacant terminal to the power source is provided between the vacant terminal 2 and the power source 6 of the internal circuit 5. (2) An integrated circuit characterized in that a switch 4 is provided between the vacant terminal 2 and the ground 7 of the internal circuit 5 for connecting the vacant terminal to the ground. (3) An integrated circuit characterized in that switches 3 and 4 are provided between the vacant terminal 2 and the power supply 6 of the internal circuit 5 and between the vacant terminal and the ground 7 of the internal circuit for connecting the vacant terminal to the power supply or the ground. circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8336790U JPH0440548U (en) | 1990-08-06 | 1990-08-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8336790U JPH0440548U (en) | 1990-08-06 | 1990-08-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0440548U true JPH0440548U (en) | 1992-04-07 |
Family
ID=31630978
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8336790U Pending JPH0440548U (en) | 1990-08-06 | 1990-08-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0440548U (en) |
-
1990
- 1990-08-06 JP JP8336790U patent/JPH0440548U/ja active Pending