JPH04361477A - Picture processing unit - Google Patents

Abstract

PURPOSE:To decode more accurately a multi-value picture data corresponding to an original picture by prohibiting edge emphasis processing with respect to an aimed picture element of a picture data binarized by the dot centralized dither method. CONSTITUTION:In the picture processing unit provided with an image area discrimination means 102 discriminating whether each picture element is resident in an area of a binary picture data of a pseudo halftone or in an area of a binary picture data of a non-halftone and a decoding means decoding a binary picture data discriminated to be an area of a binary picture data of a pseudo halftone into a multi-value picture data, edge emphasis processing emphasizing a density difference between the aimed picture element and its surrounding picture element is implemented to a binary picture data of the aimed picture element. However, whether or not the binary picture data of the aimed picture element is a binary picture data binarized by the dot centralized dither method is discriminated and when the picture is discriminated to be the binary picture data binarized by the dot centralized dither method, the edge emphasis processing is prohibited.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus equipped with an image restoration circuit for restoring pseudo-halftone binary image data to multi-value image data corresponding to the original image.

0002

[Prior Art] Conventionally, in facsimile machines, image signals are transmitted via public telephone lines, so for halftone images such as photographs, multi-valued image data of the halftone image is transmitted on the transmitting side using dithering methods, etc. The image data is converted into pseudo-halftone binary image data by binarization and transmitted to the receiving side, and the receiving side restores the received pseudo-halftone binary image data to multi-valued image data. method is used. Furthermore, although color laser printers that record multivalued image data at high speed and high resolution have recently been put into practical use, binary printers that record binary image data are generally used more often. Storing multi-value image data in a storage device requires a large-capacity storage device, but in order to solve this problem, multi-value image data is first converted into binary image data and then stored in the storage device. A method has been proposed in which, during image processing or recording, the binary image data is read out from the storage device and then restored to multivalued image data.

A multi-value restoration image processing method (hereinafter referred to as the first conventional method) for converting pseudo-halftone binary image data to multi-value image data is disclosed in, for example, Japanese Patent Laid-Open Publication No. This method is disclosed in Japanese Patent No. 62-114377, and the following three methods are proposed in this publication. (1) After dividing the binary image data into each block, count the number of black pixels in each block, estimate the density level of each block from the number of black pixels to obtain the density, and restore to multi-valued image data. do. (2) After dividing the binary image data into each unit area, count the number of black pixels in each unit area, and check the variation in the number of black pixels in the divided area made up of a predetermined number of adjacent unit areas. When the variation is small, a large-sized density matrix pattern is used, and when the variation is large, a small-sized density matrix pattern is used to find a black pixel array and restore it to multivalued image data. (3) Prepare a scanning aperture with a size of N x N pixels for binary image data, count the number of black pixels in each aperture while shifting the scanning aperture by one pixel, and sequentially set the counted value as the density level. , and restore it to multivalued image data. This method consists of 4
This corresponds to performing convolution processing on binary image data using a spatial filter in which all pixels within a ×4 window are “1”. In addition, in the above-mentioned publication, when performing the convolution process (3) above, the binary image data of the pixel of interest is multiplied by 4, and the binary image data of a total of four peripheral pixels in the main scanning direction and the sub-scanning direction are It is proposed to simultaneously perform image enhancement using a Laplacian filter that performs filtering by multiplying image data by (-1) and then adding each multiplied value. Furthermore, as in (1) above, smoothing processing is performed on the binary image data within a certain window to calculate a smoothed value, and on the other hand, after calculating the amount of edge enhancement within the window, the smoothed value and A method (hereinafter referred to as a second conventional example) of restoring multivalued image data corresponding to original image data based on the edge enhancement amount is known.

0004

[Problem to be solved by the invention] However, the above (
In method 1), for example, when restoring multi-value image data with N or more integer gradations, the multi-value image data must be restored based on N or more pixels, and the original pseudo-halftone Unless restoration processing is performed using a window whose length on one side is equal to or longer than the cycle interval of the binary image data, the restored image may be affected by pseudo-halftone texture. In order to solve these problems, it is necessary to use a relatively large window, which causes the problem that the circuit for counting black pixels within the window becomes large. Furthermore, when an edge portion exists within the window, there is a problem in that the edge portion is smoothed by the smoothing method of (1) above, and the original image may not be accurately restored.

[0005] Furthermore, as described above, when the relative amount of edge components (hereinafter referred to as edge component amount) is detected using the Laplacian filter and edge enhancement is performed from the detected amount of edge components, The amount of edge enhancement to be used,
It is possible to calculate the edge discrimination amount used when determining whether an edge exists or not, but when using the above Laplacian filter, high frequency components are calculated from an image with one period of (7 × 2) dots. The amount cannot be detected accurately, that is, the high frequency component of the edge is reduced. In addition, since it is not possible to detect the directionality of edge components, it is not possible to detect the amount of edge components that takes directionality into account. There were cases where edges could not be detected in images containing images. Therefore, when restoring multivalued image data based on the edge component amount calculated by the Laplacian filter using the method of the second conventional example, the multivalued image data corresponding to the original image can be accurately restored. The problem was that it could not be done.

[0006] Furthermore, for example, it is possible to determine whether the image data is binary image data that has been binarized with pseudo halftones or binary image data that has been binarized with non-halftones using a predetermined threshold. When a conventional image area discrimination circuit that discriminates image areas is applied to an image restoration device, it is possible to detect the unique image pattern of an image that has been binarized with pseudo halftones using the error diffusion method and the distributed dither method. Therefore, binary image data that has been binarized with pseudo-halftones using the dot-concentrated dither method and has relatively low spatial frequency components may be incorrectly determined to be a non-halftone image. . In this case, edge enhancement processing is performed on binary image data that has been binarized with pseudo halftones using the dot concentrated dither method, resulting in a grid-like image that is completely different from the original image. There was a problem in that the corresponding multivalued image data could not be accurately restored.

An object of the present invention is to solve the above-mentioned problems, and to solve the above-mentioned problems by detecting an edge of a pixel of interest in pseudo-halftone binary image data that has been binarized by a dot concentrated dither method among input binary image data. Emphasis processing can be prohibited,
An object of the present invention is to provide an image processing device that can more accurately restore multivalued image data corresponding to an original image.

[0008]

[Means for Solving the Problems] An image processing device according to the present invention provides binary image data that has been binarized with pseudo halftones and binary image data that has been binarized with non-halftones using a predetermined threshold. Based on the binary image data corresponding to a predetermined area including the pixel of interest and a plurality of pixels around it, out of the input binary image data including the binary image data, the input binary image data is image area determining means for determining whether each pixel of image data is a pseudo-halftone binary image data area or a non-halftone binary image data area; and the image area determining means. In the image processing apparatus, the image processing apparatus is equipped with a restoring means for restoring the binary image data determined to be a region of pseudo-halftone binary image data into multi-value image data by An edge enhancement means performs edge enhancement processing to emphasize the density difference between the pixel of interest and its surrounding pixels on the binary image data of the pixel of interest; a dither determining means for determining whether or not the binary image data is binary image data that has been binarized with a pseudo halftone by the dither discriminating means; and prohibiting means for prohibiting edge enhancement processing performed by the edge enhancement means on the binary image data of the pixel of interest when it is determined that the image data is binarized binary image data. Features.

[0009]

[Operation] With the above configuration, the image area discriminating means can perform the input pixel based on the binary image data corresponding to a predetermined area including the input pixel of interest and a plurality of surrounding pixels. The restoring means determines for each pixel of the binary image data whether it is a pseudo-halftone binary image data area or a non-halftone binary image data area, and the restoring means Binary image data determined by the image area determining means to be an area of pseudo-halftone binary image data is restored to multivalued image data. Here, the edge emphasizing means includes two pixels of interest in the input binary image data.
Edge enhancement processing is performed on the value image data to emphasize the density difference between the pixel of interest and its surrounding pixels, and the dither discrimination means performs edge enhancement processing to emphasize the difference in density between the pixel of interest and its surrounding pixels, and the dither discriminator performs a pseudo-intermediate processing on the binary image data of the pixel of interest using a dot concentrated dither method. It is determined whether or not the image data is binary image data that has been binarized in the key. Furthermore, the prohibiting means is configured to convert the binary image data of the pixel of interest into two pseudo halftones by the dither determining means using a dot concentrated dither method.
When it is determined that the image data is digitized binary image data,
Edge enhancement processing performed by the edge enhancement means on the binary image data of the pixel of interest is prohibited.

[0010] Therefore, "the problem to be solved by the invention"
As mentioned above in the section, when a conventional image area discrimination circuit is applied to an image restoration device, edge enhancement processing is performed on binary image data that has been binarized with pseudo halftones using the dot concentrated dither method. This can prevent the image from being restored to a grid-like image that is completely different from the original image. As a result, binary image data can be restored to multivalued image data more accurately than in the conventional example, that is, more faithfully to the original image.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A facsimile apparatus according to an embodiment of the present invention will be described below with reference to the drawings. As shown in FIG. 2, the facsimile apparatus of this embodiment is characterized in that it includes an image restoration processing section 62 that restores received binary image data to multivalued image data. In addition,
In the description of the examples below, "halftone image" and "halftone area" respectively refer to multi-valued image data of a halftone image such as a photograph, which is binarized using a pseudo halftone method such as a dither method. The term "non-halftone image" and "non-halftone region" refer to a pseudo-halftone image and a region of the image, respectively, for example, a non-halftone image such as a character.

A facsimile machine according to an embodiment of the present invention will be explained in the following order. (1) Features of this embodiment (2) Configuration and operation of facsimile machine (3) Image restoration processing section (4) 10x21 matrix memory circuit (5) Image area discrimination section (5-1) Configuration and operation of each part (5-2) Dither judgment unit (5-3) Adjacent state judgment unit (5-4) 5×11 matrix memory circuit (5-5)
Judgment data generation section (5-6) Discrimination data signal generation section (6) Halftone image restoration section (6-1) Configuration and operation of each section (6-2) Window counting section (6-3) Smoothing amount calculation section (6-4) Edge enhancement amount calculation unit (6-5) Edge area determination unit (6-6) Restored data calculation unit (7) Other embodiments

(1) Features of this Embodiment As shown in FIG. 3, the facsimile machine of this first embodiment uses binary image data that has been binarized with pseudo halftones and a predetermined threshold value. A predetermined edge enhancement amount, a predetermined smoothing value, and a predetermined edge region discrimination amount are calculated based on the received binary image data including binary image data binarized with non-halftone using A concentrated first dithered image discrimination signal and a concentrated second dithered image discrimination signal inputted from the discrimination data signal generation unit 114 and indicating the discrimination result that the image is a predetermined concentrated dithered image, and each of the above calculated quantities. A halftone image restoring unit 101 restores input binary image data to multi-value halftone data based on the received binary image data, and a halftone image restoring unit 101 restores input binary image data to multi-value halftone data for each pixel in a predetermined area centered on the pixel of interest based on the received binary image data. A first concentrated dither image discrimination signal and a second concentrated dither image discrimination signal indicating the determination result that the image is a predetermined concentrated dither image are generated, and the image is in a halftone region or a non-halftone region. An image area discriminating unit 102 outputs image area discriminating data indicating the result of determining whether the A simple multi-value conversion unit 103 that simply converts into non-half-tone image data, and a simple multi-value half-tone image data output from the half-tone image restoration unit 101 according to the mixing ratio indicated by the image area discrimination data. It is characterized by comprising a data mixing section 104 that generates multi-value image data by mixing the multi-value non-halftone image data output from the multi-value converting section 103 and outputs it to the printer control section 55. do.

Here, the halftone image restoration section 101 and the image area discrimination section 102 are particularly characterized.
01 is (a) an in-window counting unit 1 that counts the number of black pixels within a plurality of predetermined windows based on input pixel data and outputs black pixel number data (hereinafter abbreviated as data) for each window;
13, (b) an edge region discriminator 109 that calculates and outputs an edge region discrimination amount used for discriminating an edge region based on the data output from the in-window count section 113, and (c) an in-window count. a smoothing amount calculation unit that calculates and outputs the amount of smoothing (7×7 black pixel number second data and 9×9 black pixel number data) for restoring halftone image data based on the data output from the unit 113; 110 and (d) in-window counting section 11
an edge enhancement amount calculation unit 111 that calculates and outputs edge enhancement amount first data and edge enhancement amount second data for performing edge enhancement processing based on the data output from 3;
(e) Data output from each section 109 to 111 and the centralized first output from the discrimination data signal generation section 114
It includes a restored data calculation unit 112 that restores and outputs multivalued halftone image data based on the dithered image discrimination signal and the concentrated second dithered image discrimination signal.

The image area determination unit 102 also determines (a) the adjacent state of the smaller number of pixels of the same type in a predetermined area in four directions in the main and sub-scanning directions based on the input pixel data; In addition to calculating the number of adjacencies in the main and sub-scanning directions,
The black pixel number data within a predetermined 3×3 window is calculated, and based on each of the calculated data and the black pixel number data within a predetermined 7×7 window output from the dither determination unit 106, the above An all-white all-black image detection signal indicating whether the inside of the 7x7 window is an all-white image or an all-black image, and an all-white all-black image detection signal indicating that the image in a predetermined area centered on the pixel of interest is a halftone image. an adjacent state determination unit 1 that generates and outputs a halftone image detection signal indicating that the image in the predetermined area is a non-halftone image; and a non-halftone image detection signal indicating that the image in the predetermined area is a non-halftone image.
05, and (b) a first concentrated type that detects whether or not it is a concentrated organized dithered image with a screen angle of 0 degrees for each pixel based on the input pixel data and indicates the detection result.
It outputs a dither detection signal and the screen angle is 4.
a dither determination unit 106 that detects whether or not the image is a concentrated systematic dither image of 5 degrees and outputs a concentrated second dither detection signal indicating the detection result; and (c) an adjacent state determination unit 105.
and a 5×11 matrix that simultaneously outputs five detection signals (total of 5 bits) serially output for each pixel from the dither determination unit 106 within a predetermined 5×11 window centered on the pixel of interest. The memory circuit 107 and (d) generate each judgment data obtained by adding each detection signal within the 5×11 window for each detection signal based on each detection signal output from the matrix memory circuit 107. (e) Based on each determination data output from the determination data generation unit 108, the image in the predetermined 5×11 window area has a screen angle of 0 degrees. Generates and outputs a first concentrated dither image discrimination signal that determines whether the image is a concentrated organized dither image and indicates the determination result, and determines whether the image in the predetermined 5×11 window area has a screen angle. Generates and outputs a concentrated second dithered image discrimination signal that determines whether the image is a concentrated systematic dithered image with an angle of 45 degrees and indicates the determination result, and also generates and outputs a concentrated second dithered image discrimination signal that indicates whether the image is a concentrated systematic dithered image with an angle of 45 degrees or not; and a discrimination data signal generation unit 114 that outputs image area discrimination data indicating the result of discrimination.

(2) Structure and operation of facsimile device FIG. 1 is a vertical cross-sectional view of the mechanism of a facsimile device according to a first embodiment of the present invention, and FIG. FIG. 2 is a block diagram showing the configuration of a signal processing section of the FIG. As shown in Figure 1, this facsimile machine is
The printer section 1 is roughly divided into a printer section 1 and an image reading section 20 installed above the printer section 1. An operation panel 40 is provided on the printer section 1, and a telephone 42 is provided on the side of the printer section 1.

In FIG. 1, a printer section 1 is an electrophotographic laser beam printer having a configuration similar to that of a conventional device, and its operation will be briefly described below. First, the photoreceptor on the rotationally driven photoreceptor drum 2 is uniformly charged by the charger 3 . Next, a laser beam is irradiated by the optical system 4 according to the image data to form an electrostatic latent image on the photoreceptor drum 2. Toner from the developing device 5 adheres to this electrostatic latent image. On the other hand, cut sheets are placed in a paper feed cassette 11, and after being picked up one by one by a pick-up roller 12, the cut sheets are sent to a transfer section of the photosensitive drum 2 by a paper feed roller 13. The toner adhering to the photosensitive drum 2 is transferred onto the cut paper by a transfer charger 6 and fixed by a fixing device 12. The cut paper after the fixing process is carried out by the paper ejection rollers 14 and 1.
6, the paper is discharged to the paper discharge tray 13 via the paper discharge path 15. Note that the toner that does not adhere to the cut paper is collected by the cleaner 8, and one printing operation is completed.

Next, the operation of the image reading section 20 will be explained. Reading of the transmitted document is performed in the same manner as in conventional devices. That is, the originals placed on the original tray 21 are detected by the original sensor 22, and the originals are fed one by one to the position of the sensor 25 by the roller 23. next,
The original is read by the contact type linear image sensor 26 in synchronization with the rotation of the roller 24 by a motor (not shown) and the reading by the contact type linear image sensor 26, and the original image is converted into digital image data. The image data is output to a buffer memory 59 shown in FIG. 2, and is converted into compressed image data by a compression/expansion section 60, which will be described later, and stored in a compressed image memory 51. After image reading is completed, the document is discharged onto a paper discharge tray 28 by a discharge roller 27.

As shown in FIG. 2, this facsimile machine includes an MPU 50 that controls the entire facsimile machine, an HDLC analysis section 52 and a modem 53 that perform facsimile signal processing and communication processing, respectively.
and an NCU 54, an image compression image memory 51, a buffer memory 59, and a page memory 61 that temporarily store facsimile image signals, and a compression/expansion unit 60 and an image restoration processing unit 62 that process predetermined image signals, respectively. and each processing section 20, 51, 52, 53
, 54, 59, 60, 61 connect to the MPU 5 via the bus 63.
Connected to 0. In addition, the operation panel 40 directly connects the MPU
A printer control section 55 is connected to the MPU 50 and controls a multi-value laser printer 70 that is provided in the printer section 1 and prints an image of the image data based on the multi-value image data.

First, the receiving operation of the facsimile machine will be described. When there is an incoming call from the other party's facsimile device via the telephone line, the incoming call signal is sent to the NCU 54 and modem 53.
After being input to the MPU 50 and detected, a line connection process with a destination facsimile machine is executed according to a predetermined facsimile line connection procedure. After the line connection process, the compressed image signal sent from the destination facsimile device is input to the modem 53 via the NCU 54 and demodulated, and the demodulated compressed image data is compressed from the HDLC frame in the HDLC analysis section 52. After a predetermined HDLC reverse processing process is performed to extract only the image data, the data is stored in the compression image memory 51. When compressed image signals for all pages are received, a line disconnection process with the destination facsimile machine is executed according to a predetermined facsimile line disconnection procedure. The image data stored in the compression image memory 51 is expanded and developed into actual image data page by page by the compression/expansion section 60 using the page memory 61. The image data developed in the page memory 61 is input to the image restoration processing section 62, converted into high-density binary image data through processing described in detail later, and then output to the printer control section 55. In synchronization with the transfer of image data to the printer control section 55, a recording start signal is output from the MPU 50 to the printer control section 55, and the printer control section 55 sends a control signal and image data to the laser printer 70 to print the image. Execute data recording.

Next, the transmission operation of the facsimile machine will be explained. When all of the above-described image reading operations by the image reading section 20 are completed, line connection processing with the other party's facsimile device is executed. After this line connection process is completed, the compressed image data stored in the compression image memory 51 is transferred to the page memory 61 by the compression/expansion section 60.
After being decompressed, recompression processing is executed according to the capabilities of the destination facsimile machine, and the data is stored in the compression image memory 51. The stored image data is sent to the HDLC analysis unit 5.
2 performs predetermined HDLC frame processing, and then the modem 53 modulates the signal into a predetermined facsimile signal. The facsimile signal modulated with the image data is transmitted to the destination facsimile device via the NCU 54 and the telephone line. When the transmission of the image data is completed, a line disconnection process with the destination facsimile machine is executed according to a predetermined line disconnection procedure, and the transmission operation is completed.

The MPU 50 performs predetermined processing based on the operator's commands input using the operation panel 40, and also outputs instruction information to the operator and status information of the facsimile machine to the operation panel 40. indicate.

(3) Image Restoration Processing Unit As shown in FIG. 3, the image restoration processing unit 62 includes a halftone image restoration unit 101 that restores multi-value halftone data from received binary image data. However, this halftone image restoration processing has the following effects. That is, halftone image data such as a photographic image is generally represented by multi-valued image data with multiple bits per pixel. However, when communicating image data such as facsimile communication or storing image data such as filing, the multi-valued image data is binarized with pseudo halftones and converted to binary image data. It is possible to significantly reduce the amount of data required.

This halftone image restoration process is effective, for example, when halftone data that has been binarized using pseudo halftones is recorded or displayed in binary form at different pixel densities. In other words, by performing scaling processing after once restoring multilevel image data, rather than simply performing scaling processing, it is possible to prevent the occurrence of moiré due to the periodicity of the original pseudo-halftone binary image data. . The restored multivalued image data is binarized with pseudo halftones and output to an output system such as a display or printer. At this time, if the output system is a device that can process input data at high density, the characteristics of the device can be fully utilized. Also, for example,
The halftone image restoration process is performed using two binarized pseudo halftone images.
This is effective when restoring value image data to multi-value image data and outputting it to an output system such as a multi-value display or printer.

FIG. 3 shows the image restoration processing section 6 shown in FIG.
2 is a block diagram of FIG.

As shown in FIG. 3, the binary image data read out serially from the page memory 61 is 10×21
It is input to matrix memory circuit 100. 10×2
1 matrix memory circuit 100, as shown in FIG.
0, and the window counting unit 113 in the halftone image restoration unit 101 and the adjacent state detection unit 105 in the image area discrimination unit 102
is output to the dither determination section 106 and the simple multi-value conversion section 103. In FIG. 30, arrow MS indicates the main scanning direction, and arrow SS indicates the sub-scanning direction. Also, i is window W1
is a parameter indicating the position of the main scanning line within 021, and j
is a parameter indicating the position of the sub-scanning line.

The halftone image restoration section 101 includes a window counting section 1
13, an edge region determination unit 109, and a smoothing amount calculation unit 11
0, an edge enhancement amount calculation section 111, and a restored data calculation section 112. The intra-window counting section 113 counts the number of black pixels within a plurality of predetermined windows and outputs the data to the edge region discriminating section 109, the smoothing amount calculating section 110, and the edge enhancement amount calculating section 111, respectively. Edge region discriminator 109 calculates an edge region discriminant amount used to discriminate an edge region based on the data output from window counting section 113 and outputs the calculated edge region discriminant amount to restored data calculation section 112 . Smoothing amount calculation section 1
10 calculates the amount of smoothing (7×7 black pixel number second data and 9×9 black pixel number data) for restoring halftone image data based on the data output from the window counting unit 113. It is output to the restored data calculation unit 112. The edge enhancement amount calculation unit 111 calculates a first edge enhancement amount for performing edge enhancement processing based on the data output from the window counting unit 113.
The calculated data and edge enhancement amount second data are output to the restored data calculation unit 112. Furthermore, the restored data calculation unit 1
12 is multi-valued halftone image data based on the data output from each section 109 to 111 and the concentrated first dither image discrimination signal and the concentrated second dither image discrimination signal output from the discrimination data signal generation section 114. is restored and output to the data mixing unit 104.

The image area discriminating unit 102 has an adjacent state detecting unit 10.
5, a dither determination unit 106, a 5×11 matrix memory circuit 107, a determination data generation unit 108, and a determination data signal generation unit 114. Adjacent state determination unit 10
5 calculates the number of adjacent pixels in the main and sub-scanning directions indicating the adjacency state of the smaller number of pixels of the same type in a predetermined area in four directions in the main and sub-scanning directions based on the input pixel data; , calculate the black pixel number data within a predetermined 3×3 window, and based on each of the calculated data and the black pixel number data within a predetermined 7×7 window output from the dither determination unit 106, The all-white all-black image detection signal indicating whether the 7×7 window is an all-white image or an all-black image, and the image in a predetermined area centered on the pixel of interest is a halftone image. and a non-halftone image detection signal indicating that the image in the predetermined area is a non-halftone image are generated and output. On the other hand, the dither determination unit 106 detects for each pixel, based on the input pixel data, whether or not it is a concentrated systematic dither image with a screen angle of 0 degrees, and displays the detection result. In addition to outputting a first dither detection signal, it detects whether or not the image is a concentrated organized dither image with a screen angle of 45 degrees, and outputs a second concentrated dither detection signal indicating the detection result.

Furthermore, the 5×11 matrix memory circuit 107 includes an adjacent state determining section 105 and a dither determining section 106.
The five detection signals (total of 5 bits) serially output for each pixel from
They are simultaneously output to the determination data generation unit 108 within one window. The determination data generation unit 108 generates each determination data obtained by adding each detection signal within the 5×11 window for each detection signal based on each detection signal output from the matrix memory circuit 107. and outputs it to the discrimination data signal generation section 114. Finally, the discrimination data signal generation unit 114 determines, based on each judgment data output from the judgment data generation unit 108, that the image of the area of the predetermined 5×11 window is a concentrated tissue whose screen angle is 0 degrees. generating and outputting a concentrated first dithered image discrimination signal that determines whether the image is a target dithered image and indicates the discrimination result;
Determine whether or not the image in the predetermined 5×11 window area is a concentrated systematic dithered image with a screen angle of 45 degrees, and generate a concentrated second dithered image discrimination signal indicating the determination result. At the same time, it outputs image area discrimination data indicating the result of determining whether the area is a halftone area or a non-halftone area. Here, the image area discrimination data has a value range from 0 to 1, which is 0 when the image in the area is a completely halftone image, and 1 when it is a non-halftone image.

Furthermore, the simple multilevel conversion unit 103 generates two-valued data that is binarized in non-halftones using a predetermined threshold based on the pixel data output from the matrix memory circuit 100.
The value image data is simply converted into multi-value non-halftone image data indicating white or black, and outputted to the data mixing unit 104 as non-halftone data. Further, the data mixing unit 104 is configured with a table ROM, and combines the multivalued halftone image data output from the halftone image restoration unit 101 with the simple multivalue conversion unit 1.
Based on the multivalued non-halftone image data output from 03 and the above image area discrimination data, the following "Equation 1" is calculated,
That is, by mixing these data according to the mixing ratio indicated by the image area discrimination data, 6-bit multivalued image data is generated and output to the printer control section 55.

[Equation 1] Multivalued image data = (halftone image data) x {1 - (image area discrimination data)} + (non-halftone image data) x (image area discrimination data)

In this embodiment, in order to make erroneous image area discrimination in areas that can be halftones or non-halftones less noticeable,
As described above, the data mixing unit 104 mixes and multiplies the halftone image data and the non-halftone image data according to the mixing ratio of the image area discrimination data indicating the likeness of a halftone image and the likeness of a non-halftone image. Value image data is being restored.

(4) 10×21 Matrix Memory Circuit FIG. 4 is a block diagram of the 10×21 matrix memory circuit 100 shown in FIG. 3. As shown in Figure 4, 1
The 0x21 matrix memory circuit 100 receives images based on a clock CLK having the same cycle as the transfer clock cycle of the binary image data input from the page memory 61, that is, the cycle of one dot of image data. Nine FIFO memories DM1 to DM9 delay data by one horizontal period, which is one scan time in the main scanning direction, and each input image data in synchronization with the clock CLK by one cycle period of the clock CLK. 200 delay type flip-flops D that output with delay
F001 to DF020, DF101 to DF120,
DF201 to DF220, . ．． ．． , DF901 to D
F920.

Binary image data serially output from the page memory 61 in the direction from the first pixel to the last pixel of the image of each page is input to the flip-flop DF001, and then input to the flip-flop DF001, which is then input to the cascade-connected 20 The signals are outputted via the flip-flops DF001 to DF020, inputted to the FIFO memory DM1, and then outputted via nine cascade-connected FIFO memories DM1 to DM9. The image data output from the FIFO memory DM1 is input to the flip-flop DF101, and then input to the cascade-connected flip-flops DF101 to DF12.
Output via 0. Furthermore, the image data output from the FIFO memory DM2 is transferred to the flip-flop DF20.
1, then cascaded flip-flops D
It is output via F201 to DF220. Similarly, the image data output from each FIFO memory DM3 to DM9 is transferred to the flip-flop DF3.
After being input to 01 to DF901, the flip-flops DF301 to DF320, D which are connected in cascade, respectively.
F401 to DF420, . ．． ．． , DF901 to DF
920.

In the 10×21 matrix memory circuit 100 configured as described above, when one dot of pixel data first input to the circuit 100 is output from the flip-flop DF920, the image input at that time is The data is output as pixel data D000, and each flip-flop DF001 to DF020
Each pixel data D001 to D020 on the main scanning line of i=0 within a 10×21 window is outputted from the FIFO memory DM1 and each flip-flop DF1.
Each pixel data D100 to D120 on the i=1 main scanning line within a 10×21 window is output from 01 to DF120, and 1 pixel data is output from each FIFO memory DM2 and each flip-flop DF201 to DF220.
Each pixel data D200 to D220 on the i=2 main scanning line within the 0x21 window is output, and in the same way, each pixel data D300 is output from each FIFO memory DM3 to DM9 and each flip-flop DF301 to DF920. to D920 are output.

In FIG. 31, WP is the reference range of each pixel at the time of determination in the adjacent state determination unit 105 and dither determination unit 106, and the pixel of interest at the time of determination (
i=3, j=10) is indicated by *. Also, W511
is the reference range of each pixel at the time of determination in the determination data signal generation unit 114, and the pixel of interest (i
=5, j=5) is indicated by ◎. Here, the reference range W
511 is a 5×11 window centered on the pixel of interest ◎. Further, W9 is a reference range of each pixel during restoration in the halftone image restoration unit 101, and the pixel of interest (i=5, j=5) during the restoration process is indicated by a circle. Here, the reference range W9 is 9×9 centered on the pixel of interest ◎.
window.

(5) Image area discriminator (5-1) Configuration and operation of each section FIGS. 5 to 19 are block diagrams of the image area discriminator 102 shown in FIG. An adjacent state determining unit 105, a dither determining unit 106, a 5×11 matrix memory circuit 107, a determination data generating unit 108,
and a discrimination data signal generation section 114. The characteristics of the processing in the image area determination unit 102 will be described below.

FIG. 32 shows an example of a non-halftone image obtained when a character image is read and then binarized using a predetermined threshold, and FIG. 33 shows an example of a non-halftone image obtained after reading a uniform density chart. , shows an example of a pseudo-halftone binarized image obtained when binarized using the error diffusion method. Furthermore, FIG. 34 shows an example of a pseudo-halftone binarized image obtained when a photographic image is read and binarized using the dot concentrated systematic dithering method with a screen angle of 0 degrees. , shows an example of a pseudo-halftone binarized image obtained when a photographic image is read and binarized using a dot concentrated systematic dithering method with a screen angle of 45 degrees. In the following, for convenience of explanation, the image shown in FIG. 33 will be referred to as a distributed halftone image, and the images shown in FIGS. 34 and 35 will be referred to as a concentrated halftone image. Further, the image in FIG. 34 is referred to as a concentrated first dither image, and the image in FIG. 35 is referred to as a concentrated second dither image.

In this embodiment, the adjacent state determining section 105 performs processing for determining whether or not the image of the input image data is a distributed halftone image. A dither determination unit 106 performs processing to determine whether the image is a concentrated halftone image. Further, the adjacent state determining unit 105 uses the image of FIG. 32 and the image of FIG.
It is determined whether the image is different from the one shown in the image. In each window W7 in FIGS. 32 and 33, there are the same number of black pixels, and it can be said that the image density of each image in the window W7 is the same. The major difference between the images in window W7 is the main scanning direction and sub-scanning direction (hereinafter referred to as the main/sub-scanning direction) of a small number of pixels.
is the adjacent state. Here, the minority pixel refers to the smaller number of white pixels and black pixels within a predetermined window, and in the examples of FIGS. 32 and 33, the minority pixel is the black pixel.

Further, the total number of minority pixels connected in any of the four directions from the minority pixels to the main and sub-scanning directions by pixels of the same type as the minority pixels is hereinafter referred to as the number of adjacent pixels in the four directions. Generally, in a graph of the number of black pixels in a 7×7 window and the number of adjacent pixels in four directions in the main and sub-scanning directions, a halftone image area and a non-halftone image area are shown separated as shown in FIG. As is clear from FIG. 36, when the number of black pixels and the number of white pixels become equal within a predetermined window, the number of neighbors in four directions indicating the threshold on the boundary line of each image area increases, and the threshold A non-halftone image exists when the number of neighbors in four directions is larger than the value, and a non-halftone image exists when the number of neighbors in four directions is smaller than the threshold value. Therefore, in this embodiment, the threshold data is stored in the table ROM 156 shown in FIG. The above-mentioned image areas are discriminated by comparing the threshold values.

Furthermore, in this embodiment, a concentrated halftone image is determined using the periodicity of the change in image density in the main scanning direction or the sub-scanning direction, that is, the peripheral distribution characteristic. The number of dot-concentrated systematic dithering methods is theoretically infinite, but in reality, only a limited number of dithering methods are practical due to the number of gradations in the image reading device and the resolution of the image recording device. is not. Therefore, in this embodiment, the first concentrated dither image shown in FIG. 34 and the second concentrated dither image shown in FIG. 35 are to be determined.

In order to determine the former concentrated type first dither image, eight windows each shown in FIGS. 37 and 38 are used. Note that in FIGS. 37 and 38 and the following figures, * indicates a pixel of interest. As shown in FIG. 37, each of seven pixel data D007 to D continuous in the sub-scanning direction
The count value data of the number of black pixels in 607 is data S10, and each of the seven consecutive pixel data D0 in the sub-scanning direction
The count value data of the number of black pixels in 08 to D608 is set as data S11, and in the same manner, data S12 to S17 are set as data S11.
Define. Furthermore, as shown in FIG. 38, the count value data of the number of black pixels in each of the seven pixel data D007 to D013 continuous in the main scanning direction is set as data S20, and
The count value data of the number of black pixels in each of the seven consecutive pixel data D107 to D113 in the main scanning direction is defined as data S21, and the following data S22 to S27 are defined in the same manner. The peripheral distribution of the counted number of black pixels in the main scanning direction or sub-scanning direction of these data is generally as shown in FIG. Note that in FIG. 41, X is the number 1 or 2.

Furthermore, in order to discriminate the latter concentrated second dither image, eight windows each shown in FIGS. 39 and 40 are used. As shown in FIG. 39, seven consecutive images are formed in a diagonal direction from the upper right to the lower left (hereinafter referred to as the first diagonal direction) that is inclined at an angle of 45 degrees with respect to both the main scanning direction and the sub-scanning direction. Each pixel data D006 to D600
The count value data of the number of black pixels within is data S30, and each of the seven consecutive pixel data D00 in the first diagonal direction
The count value data of the number of black pixels in 8 to D602 is data S.
31, and data S32 to S37 are defined in the same manner. Furthermore, as shown in FIG. 40, the continuous diagonal direction from the upper left to the lower right (hereinafter referred to as the second diagonal direction) is inclined at an angle of 45 degrees with respect to both the main scanning direction and the sub-scanning direction. Each of the seven pixel data D000 to D
The count value data of the number of black pixels in 606 is designated as data S40, and the count value data of the number of black pixels in each of the seven consecutive pixel data D002 to D608 in the second diagonal direction is designated as data S41, and the same applies hereinafter. and data S42 to S
Define 47. Regarding the discrimination of the concentrated second dithered image, similar to the discrimination of the above-mentioned concentrated first dithered image,
This is done based on the marginal distribution characteristics.

(5-2) Dither judgment unit The dither judgment unit 106 shown in FIG. 3 includes the first calculation unit 106a in FIG. 5, the second calculation unit 106b in FIG. , the fourth calculation unit 106d in FIG. 9, the fifth calculation unit 106e in FIG. 10, and the sixth calculation unit 10 in FIG.
6f, and a seventh calculation unit 106g in FIG. In addition,
In the drawings after FIG. 5, the number of bits is displayed adjacent to the symbol of each data bus, and in the display of the number of bits, for example, 7 (S1) means 7 (S1) including 1 sign bit. Indicates a bit data bus.

FIG. 5 shows the first calculation section 1 of the dither judgment section 106.
06a, and FIG. 6 is a block diagram of the dither determination unit 106.
It is a block diagram of the 2nd calculation part 106b of. These first
And in the second calculation units 106a and 106b, 32 logic B outputs 3-bit data indicating the number of black pixels included in the pixel data based on the 7-bit pixel data.
Circuits LB-10 to LB-17, LB-20 to LB-
27, LB-30 to LB-37, LB-40 to LB
-47, respectively, and data S10 to S17, S
20 to S27, S30 to S37, S40 to S47
generate.

FIG. 7 is a block diagram of the logic B circuit LB shown in FIGS. 5 and 6, and is similar to FIGS. 18 and 20 below.
Logic B circuit LB shown in FIGS. 23 to 23 also has a similar configuration.

As shown in FIG. 7, the logic B circuit LB performs a predetermined logic B operation on the input 7-bit data D1 to D7, and then converts the input 7-bit data to "1". This is a logic circuit that outputs 3-bit data Q1, Q2, and Q3 as a result of an operation indicating the number of bits of a black pixel (black pixel), and performs logical operations ( It includes two logic A circuits LA-1 and LA-2 that perform a logic A operation (hereinafter referred to as logic A operation), and one adder AD1.

[0047]

[Math 2]

[Math 3]

The least significant three bits of data D1 to D3 are input to the logic A circuit LA-1, and the data D1 to D3 are input to the logic A circuit LA-1.
The most significant 3 bits of data D4 to D6 are input to the logic A circuit LA-2, and the most significant 1 bit of data D7 is input to the carry-in terminal CI of the adder AD1. LA-2 performs the above logic A operation on the input 3-bit data, and then calculates the 2
Bit data is output to adder AD1. Adder AD
1 adds the two input 2-bit data,
The 3-bit data Q1, Q2, Q3 of the addition result is output.

FIG. 8 is a block diagram of the third calculation section 106c of the dither determination section 106. As shown in FIG. 8, the data S10 to S16 are added by the adders AD11 to AD16, and the 7×7 black pixel number first data, which is the addition result, is sent from the adder AD16 to the input terminal A of the comparator CM1 and each addition. It is output to each input terminal A of the devices AD17 and AD18 and the third calculation unit 105c of the adjacent state determination unit 105 in FIG. The adder AD17 adds the 7×7 black pixel number first data and the data S17, and outputs the addition result data S1A to the sixth calculation unit 106f of the dither determination unit 106 in FIG. Further, the adder AD18 is connected to the first 7×7 black pixel number.
Add the data and data S20, and add the data S20.
2A in the sixth calculation unit 106 of the dither determination unit 106 in FIG.
Output to f. Further, the comparator CM1 compares the 7×7 black pixel number first data calculated above with the data of “24”, and when the 7×7 black pixel number first data is larger than “24”, it is a minority pixel. outputs an H-level black and white selection signal SEL1 indicating that the pixel is a white pixel to the first calculation unit 105a of the adjacent state determination unit 105, while determining whether the 7×7 black pixel number first data is equal to “24” or When it is small, a monochrome selection signal SEL1 of L level indicating that the minority pixels are black pixels is similarly output.

FIG. 9 is a block diagram of the fourth calculation section 106d of the dither determination section 106. As shown in FIG. 9, data S30 to S37 are added by adders AD21 to AD27, and data S3A as a result of addition is added to adder AD2.
7 to the seventh calculation unit 106g of the dither determination unit 106.

FIG. 10 is a block diagram of the fifth calculating section 106e of the dither determining section 106. As shown in Figure 10,
Data S40 to S47 are added to adders AD31 to AD37
and the addition result data S4A is added by adder A.
The signal is output from D37 to the seventh calculation unit 106g of the dither determination unit 106.

FIG. 11 is a block diagram of the sixth calculation section 106f of the dither judgment section 106.

As shown in FIG. 11, data S10 to S
17 are respectively input to multipliers MU10 to MU17, and after each data is multiplied by 8, each data of the multiplication result is outputted to each input terminal A of comparators CM10 to CM17, respectively. On the other hand, data S1A is transmitted from comparators CM10 to CM
Each comparator CM10 to CM17 compares each data inputted to each input terminal A and B, and when A>B, outputs an H level signal to the centralized first input terminal B.
ROMRT1 for table to judge dithered image
is output to each address terminal A7 to A0, and when A≦B, an L level signal is similarly output. ROMRT1 outputs an H level signal to the first input terminal of AND gate AND1 when determining that the image is a concentrated first dither image, and outputs an L level signal when determining that it is not a concentrated first dither image. Similarly output.

Further, data S20 to S27 are input to multipliers MU20 to MU27, respectively, and each data is
After being multiplied, each data of the multiplication result is sent to the comparator CM.
It is output to each input terminal A of CM20 to CM27. on the other hand,
Data S2A is input to each input terminal B of comparators CM20 to CM27, and each comparator CM20 to CM27 compares each data input to each input terminal A and B, and when A>B, an H level signal is output. is outputted to each address terminal A7 to A0 of the table ROMRT2 for determining the concentrated first dither image, and when A≦B, an L level signal is similarly outputted. ROMRT2 outputs an H level signal to the second input terminal of AND gate AND1 when determining that the image is a concentrated first dither image, and outputs an L level signal when determining that it is not a concentrated first dither image. Similarly output.

Furthermore, the AND gate AND1 outputs the concentrated first dither detection signal indicating the result of ANDing the input signals as one of the determination data to the 5×11 matrix memory circuit 107 of FIG.

The sixth calculation unit 106f uses comparators CM10 to CM17 to determine the magnitude relationship between the number of black pixels in each window shown in FIGS. 38 and 39 and their average number of black pixels.
, CM20 to CM27, and as described above with reference to the peripheral distribution characteristics in FIG. It is determined whether the image is a concentrated first dither image in both directions of the scanning direction. Next, a concentrated first data detection signal of H level is outputted only when it is determined that the image is a concentrated first dithered image in both directions.

FIG. 12 is a block diagram of the seventh calculation section 106g of the dither determination section 106.

As shown in FIG. 12, data S30 to S
37 are respectively input to multipliers MU30 to MU37, and after each data is multiplied by 8, each data of the multiplication result is output to each input terminal A of comparators CM30 to CM37, respectively. On the other hand, data S3A is from comparators CM30 to CM
Each comparator CM30 to CM37 compares each data inputted to each input terminal A and B, and when A>B, outputs an H level signal to the centralized second input terminal B.
ROMRT3 for table to judge dithered image
is output to each address terminal A7 to A0, and when A≦B, an L level signal is similarly output. ROMRT3 outputs an H level signal to the first input terminal of the AND gate AND2 when determining that the image is a concentrated second dither image, and outputs an L level signal when determining that it is not a concentrated second dither image. Similarly output.

Further, data S40 to S47 are input to multipliers MU40 to MU47, respectively, and each data is
After being multiplied, each data of the multiplication result is sent to the comparator CM.
It is output to each input terminal A of CM40 to CM47. on the other hand,
Data S4A is input to each input terminal B of comparators CM40 to CM47, and each comparator CM40 to CM47 compares each data input to each input terminal A and B, and when A>B, an H level signal is input. is outputted to each address terminal A7 to A0 of the table ROMRT4 for determining the concentrated second dither image, and when A≦B, an L level signal is similarly outputted. ROMRT4 outputs an H level signal to the second input terminal of the AND gate AND2 when determining that the image is a concentrated second dither image, and outputs an L level signal when determining that it is not a concentrated second dither image. Similarly output.

Furthermore, the AND gate AND2 outputs the concentrated second dither detection signal indicating the result of the AND of the input signals as one of the determination data to the 5×11 matrix memory circuit 107 of FIG.

The seventh calculation unit 106g uses comparators CM30 to CM37 to determine the magnitude relationship between the number of black pixels in each window shown in FIGS. 40 and 41 and the average number of black pixels.
, CM40 to CM47, and as described above with reference to the marginal distribution characteristics in FIG. It is determined whether or not the image is a concentrated second dither image in both directions, ie, the second diagonal direction and the second diagonal direction. Next, a concentrated second data detection signal of H level is outputted only when the image is determined to be a concentrated second dithered image in both directions.

(5-3) Adjacent state determining unit The adjacent state determining unit 105 shown in FIG.
, a second calculation section 105b shown in FIG. 15, and a third calculation section 106c shown in FIG. 16.

In this embodiment, the number of adjacent pixels in the four directions of the main and sub-scanning directions of a small number of pixels is determined by counting the adjacent locations between each pixel indicated by the arrows shown in FIGS. 42 and 43. Here, in order to count the number of adjacent lines on each scanning line in the main scanning direction or the sub-scanning direction, a main/sub-scanning direction adjacent number counter (hereinafter referred to as an adjacent number counter) CA shown in FIG. 14 is used.

FIG. 13 is a block diagram of the first calculation section 105a of the adjacent state determination section 105 shown in FIG. Figure 1
3, each adjacent number counter CA-1 to CA-
7, Black and white selection signal SEL1 to CA-11 to CA-17
is input.

Seven consecutive pixel data D in the main scanning direction
007 to D013 are inputted to the adjacent number counter CA-1 to count the number of adjacent pixels of a minority pixel, and then outputted to the adder AD41, and seven consecutive pixel data D1 in the main scanning direction are inputted to the adjacent number counter CA-1.
07 to D113 are inputted to the adjacent number counter CA-2 to count the number of adjacent pixels of a minority pixel, and then outputted to the adder AD41, and seven consecutive pixel data D20 in the main scanning direction are inputted to the adjacent number counter CA-2.
7 to D213 are inputted to the adjacent number counter CA-3 to count the number of adjacent pixels of a minority pixel, and then outputted to the adder AD42, and seven consecutive pixel data D307 in the main scanning direction are inputted to the adjacent number counter CA-3.
D313 to D313 are input to an adjacent number counter CA-4, the number of adjacent pixels of a minority pixel is counted, and then outputted to an adder AD42. In addition, seven pixel data D continuous in the main scanning direction
407 to D413 are inputted to the adjacent number counter CA-5 to count the number of adjacent pixels of a minority pixel, and then outputted to the adder AD44, and seven consecutive pixel data D5 in the main scanning direction are inputted to the adjacent number counter CA-5.
07 to D513 are inputted to the adjacent number counter CA-6 to count the number of adjacent pixels of a minority pixel, and then outputted to the adder AD44, and seven consecutive pixel data D60 in the main scanning direction are inputted to the adjacent number counter CA-6.
7 to D613 are input to an adjacent number counter CA-7, the number of adjacent pixels of a minority pixel is counted, and then outputted to an adder AD45.

Furthermore, seven consecutive pixel data D007 to D607 in the sub-scanning direction are stored in the adjacent number counter CA-11.
Adder A after counting the number of adjacent pixels of the minority pixels.
Seven pixel data D008 to D608 that are output to D45 and continuous in the sub-scanning direction are stored in the adjacent number counter CA-12.
Adder A after counting the number of adjacent pixels of the minority pixels.
Seven pixel data D009 to D609 that are output to D51 and continuous in the sub-scanning direction are stored in the adjacent number counter CA-13.
Adder A after counting the number of adjacent pixels of the minority pixels.
Seven pixel data D010 to D610 that are output to D51 and continuous in the sub-scanning direction are stored in the adjacent number counter CA-14.
Adder A after counting the number of adjacent pixels of the minority pixels.
It is output to D52. Furthermore, 7 consecutive
The pixel data D011 to D611 are input to the adjacent number counter CA-15 to count the number of adjacent pixels of the minority pixel, and then output to the adder AD52, and the 7
The pixel data D012 to D612 are input to the adjacent number counter CA-16 to count the number of adjacent pixels of the minority pixel, and then output to the adder AD54, and the 7
The pixel data D013 to D613 are input to the adjacent number counter CA-17, and the number of adjacent pixels of the minority pixels is counted and then output to the adder AD54.

Each of the adjacent number counters CA-1 to CA-
The number of adjacent pixels of each minority pixel counted by CA-7 to CA-11 to CA-17 is calculated by adders AD41 to AD47, A
After addition by D51 to AD56, the number of adjacencies in the main and sub-scanning directions as a result of addition is output from the adder AD56 to the third calculation unit 105c of the adjacency state determination unit 105 in FIG.

FIG. 14 is a block diagram of each adjacent number counter CA shown in FIG. 13.

As shown in FIG. 14, the first bit data D1 of the input 7-bit data is connected to the first input terminal of the AND gate AND11 and the NOR gate NOR1.
The second bit of data D2 is input to the first inverting input terminal of AND gate AND11, the second inverting input terminal of NOR gate NOR12, the first input terminal of AND gate AND13, and Noah Gate NOR
The signal is input to the first inverting input terminal of No. 14. Further, the third bit data D3 is the second input terminal of the AND gate AND13, the second inverting input terminal of the NOR gate NOR14,
It is input to the first input terminal of the AND gate AND15 and the first inverted input terminal of the NOR gate NOR16,
The bit data D4 is input to the second input terminal of the AND gate AND15, the second inverting input terminal of the NOR gate NOR16, the first input terminal of the AND gate AND17, and the first inverting input terminal of the NOR gate NOR18. Furthermore, the data D5 of the fifth bit is AND gate AND
17, the second inverting input terminal of the NOR gate NOR18, the first input terminal of the AND gate AND9, and the first inverting input terminal of the NOR gate NOR20. gate AND
19, a second inverting input terminal of the NOR gate NOR20, a first input terminal of the AND gate AND21, and a first inverting input terminal of the NOR gate NOR22. Furthermore, the seventh bit of data D7 is input to the second input terminal of the AND gate AND21 and the second inverting input terminal of the NOR gate NOR22.

Each logic gate AND11 to AND21,
The signals output from NOR12 to NOR22 are respectively input to the input terminals A1, B1, A2, and
B2, A3, B3, A4, B4, A5, B5, A6, B
When the black and white selection signal SEL1 at the L level is input, the selector SE11 selects the data input to each input terminal A1 to A6 in order to count the number of adjacent black pixels, which are minority pixels. and each output terminal Y1
The output terminals Y3 to Y3 are output to each input terminal of the logic A circuit LA-11, and the output terminals Y4 to Y6 are output to each input terminal of the logic A circuit LA-12, while the H level black and white selection signal SEL1 is input. In order to count the number of adjacent white pixels, which are minority pixels, each input terminal B1 to B
6 is selected and output in the same way. Each 2-bit data output from each logic A circuit LA-11, LA-12 is input to an adder AD57, and after being added by the adder AD57, the data of the addition result is used to calculate the number of adjacent units in the main and sub-scanning directions. Output as a number.

FIG. 15 is a block diagram of the second calculation unit 105b of the adjacent state determination unit 105.
5b is a circuit for counting the number of black pixels within a 3×3 window centered on the pixel data D310.

As shown in FIG. 15, three consecutive pieces of data D209 to D211 in the main scanning direction are connected to the logic A circuit LA.
-13, and after the number of black pixels in each data is counted, the data of the counted value is output to the adder AD58. In addition, three consecutive data D309 to D311 in the main scanning direction are input to the logic A circuit LA-14, and after the number of black pixels in each data is counted, the data of the counted value is output to the adder AD58. be done. Furthermore, three consecutive pieces of data D409 to D411 in the main scanning direction are input to the logic A circuit LA-15, and after the number of black pixels in each data is counted, the data of the counted value is output to the adder AD59. be done. Each data counted by each logic A circuit LA-13 to LA-15 is added by adders AD58 and AD59, and the data of the addition result is sent from the adder AD59 to the third calculation unit 105c in FIG. Output as pixel count data.

FIG. 16 is a block diagram of the third calculation section 105c of the adjacent state determination section 105.

As shown in FIG. 16, 3×3 black pixel number data is input to input terminal B of each comparator 150, 151,
On the other hand, data of "0" is input to input terminal A of comparator 150, and data of "9" is input to input terminal A of comparator 151. Comparator 150 outputs an H level signal to the first input terminal of AND gate 158 only when A=B, and similarly outputs an L level signal at other times. Further, the comparator 151 outputs an H level signal to the first input terminal of the AND gate 159 only when A=B, and similarly outputs an L level signal at other times.

Third calculation section 106c of dither judgment section 106
The 7×7 black pixel number first data output from each comparator 1
It is input to each input terminal B from 52 to 155, and
A table ROM 156 that stores a threshold value table for determining whether it is a halftone image area or a non-halftone image area.
is input to the address terminal of Threshold data TJ0, which will be described in detail later, is input to input terminal A of the comparator 152,
The data of “49-TJ0” is input terminal A of comparator 153
is input. The comparator 152 outputs an H level signal to the second input terminal of the AND gate 158 when A>B,
On the other hand, at other times, an L level signal is similarly output. Furthermore, when A<B, the comparator 153 outputs an H level signal to the second input terminal of the AND gate 159;
In other cases, an L level signal is similarly output. Each output signal from AND gates 158 and 159 is input to NOR gate 160, and the output signal from NOR gate 160 is input to each first input terminal of AND gates 162 and 163.

Furthermore, data of "0" is input to the input terminal A of the comparator 154, and data of "49" is input to the input terminal A of the comparator 155.
It is input to input terminal A of . Comparator 154 outputs an H level signal to the first input terminal of OR gate 161 when A=B, and similarly outputs an L level signal at other times. Further, when A=B, the comparator 155
An H level signal is output to the second input terminal of the OR gate 161, while an L level signal is similarly output at other times. The OR gate 161 converts a signal indicating the logical sum of the input signals into an all-white all-black image detection signal indicating that all pixels within a 7x7 window are white pixels or black pixels. 11 matrix memory circuit 107.

The threshold data output from the table ROM 156 is input to the input terminal A of the comparator 157,
On the other hand, if the number of neighbors in the main and sub-scanning directions is input terminal B of the comparator 157
is input. 7×7 as described above with reference to FIG.
A comparator 1 provided for determining whether an image in a region within a window is a halftone image or a non-halftone image.
57, when A>B, the H level signal is connected to AND gate 1.
62 and outputs an H level signal to the second input terminal of AND gate 163 when A<B. Further, the signal outputted from the AND gate 162 is outputted as a halftone image detection signal to the 5×11 matrix memory circuit 107, and the signal outputted from the AND gate 163 is outputted as a non-halftone image detection signal to the 5×11 matrix memory circuit 107. It is output to the memory circuit 107.

In the third calculation section 105c, 7×
Based on the threshold data output from the table ROM 156 based on the first data on the number of black pixels within the window No. 7 and the counted number of adjacent pixels in the main and sub-scanning directions, the image in the area within the window is a halftone image. The comparator 157 determines whether the image is a grayscale image or a non-halftone image. However, in the following two cases, the determination result is "unknown" and it is determined that the image is neither a halftone image nor a non-halftone image. (a) When the number of adjacencies in the main and sub-scanning directions matches the threshold data, that is, when A=B in the comparator 157. (b) A small number of pixels within a 7×7 window is smaller than a predetermined threshold value TJ0 (when the output signal of the comparator 152 is at H level or when the output signal of comparator 153 is at H level), And when there is no minority pixel within a 3×3 window centered on the pixel of interest (when the output signal of comparator 150 is at H level or when the output signal of comparator 151 is at H level).

In order to determine "unknown" in the case (a) above, the comparator 157 is configured so that no H level signal is input to the AND gates 162 and 163. Furthermore, in order to indicate "unknown" in the case of (b) above, a signal output from the NOR gate 160 and active at L level is input to the AND gates 162 and 163.

The reason why the above case (b) is determined as "unknown" will be explained below using FIGS. 45 and 46. Figure 4
5 and FIG. 46 are diagrams showing an example in which a linear non-halftone image approaches a 7×7 window W7. In the state shown in FIG. 45, only the edge of the linear image falls within the window W7, so it is impossible to distinguish it from isolated points, and if a halftone image/non-halftone image is discriminated, it will be mistaken. It is determined that it is a halftone image. Therefore, as shown in Figure 46, it is better to leave the determination result as "unknown" until the linear image approaches the periphery of the pixel of interest* to some extent, so this conditional determination is This is done depending on whether or not there are a few pixels within the window W3. Furthermore, in this case, of course, the number of minority pixels should be less than the threshold value TJ0, so this determination is also made at the same time.

Furthermore, in the calculation section 105c,
Comparators 154 and 155 determine whether all pixels within the 7×7 window W7 are white pixels or black pixels, and in either case, the all-white all-black detection signal is set to H level. The detection signal is generated by the discrimination data signal generation section 11
It is used for determining the concentrated dither image in step 4.

Furthermore, the reason why the threshold value TJ0 is provided in the calculating section 105c will be explained below. For example, as shown in FIG. 44, when there are no minority pixels around the pixel of interest*, but there are a relatively large number of minority pixels within the 7x7 window W7 for adjacency determination, halftone image/non-halftone image It can be said that images can be discriminated. In the case of FIG. 44, there are 7
Although there are a small number of pixels, it is naturally determined that the image is a non-halftone image. Therefore, the condition for the determination result to be "unknown" is (number of minority pixels in the 7×7 window W7<TJ
0) and (there are no minority pixels within the 3×3 window W3). This conditional expression is satisfied in the following two cases. (a) When the minority pixels are white pixels, each comparator 150
, 152 are at H level. (b) When the minority pixels are black pixels, each comparator 151
, 153 are at H level. In this embodiment, the preferable value of the threshold TJ0 is 6.

(5-4) 5×11 matrix memory circuit FIG. 17 is a block diagram of the 5×11 matrix memory circuit 107 shown in FIG. 3.

As shown in FIG. 17, each of the 5×11 matrix memory circuits 107 has the same cycle as the transfer clock cycle of the binary image data inputted from the page memory 61, that is, the cycle of one dot of the image data. The 5-bit judgment data consisting of the following 5 detection signals, which are detected and input for each pixel in synchronization with the clock CLK, is delayed by one horizontal period, which is one scan time in the main scanning direction4. FIFO memories DM11 to DM1
4, and 50 delay type flip-flops DG301 to DG310, DG401 to DG41, each delaying the 5-bit judgment data input in synchronization with the clock CLK by one cycle period of the clock CLK and outputting the same.
0, DG501 to DG510, . ．． ．． , DG701 to DG710. Note that each circuit of the matrix memory circuit 107 processes the following 5-bit determination data in parallel. (a) Sixth calculation unit 106 of dither determination unit 106 in FIG. 11
A concentrated first dither detection signal (hereinafter referred to as determination data A) output from f. (b) Sixth calculation unit 106 of dither determination unit 106 in FIG. 12
A concentrated second dither detection signal (hereinafter referred to as determination data B) output from g. (c) Third calculation unit 10 of adjacent state determination unit 105 in FIG. 16
Halftone image detection signal (hereinafter referred to as determination data C) output from 5c. (d) Third calculation unit 10 of adjacent state determination unit 105 in FIG. 16
A non-halftone image detection signal (hereinafter referred to as determination data D) outputted from 5c. (e) Third calculation unit 10 of adjacent state determination unit 105 in FIG. 16
All-white and all-black image detection signals (hereinafter referred to as determination data E) output from 5c.

The 5-bit determination data serially output from each of the calculation circuits in the direction from the first pixel to the last pixel of the image of each page is sent to the flip-flop DG30.
1, and then outputted through ten cascade-connected flip-flops DG301 to DG310, and inputted to FIFO memory DM11, and then outputted to four cascade-connected FIFO memories DM11 to DM14.
Output via . The image data output from the FIFO memory DM11 is input to the flip-flop DG401, and then to the cascade-connected flip-flop DG40.
1 to DG410. Also, FIFO
The image data output from the memory DM12 is input to the flip-flop DG501, and then output via the cascade-connected flip-flops DG501 to DG510. Thereafter, in the same manner, each FIFO memory DM13
The judgment data output from DM14 is input to flip-flops DG601 to DG701, respectively, and then to flip-flops DG60 connected in cascade, respectively.
1 to DG610 and DG701 to DG710.

In the 5×11 matrix memory circuit 107 configured as described above, the 5-bit judgment data corresponding to one dot of pixel data, which is first input to the circuit 107, is output from the flip-flop DG710. At this time, the judgment data inputted at that time is output as judgment data J300, and 5×11
Judgment data J300 to J310 corresponding to each pixel data on the i=3 main scanning line within the window are output,
FIFO memory DM11 and each flip-flop DG4
Each pixel data J400 to J on the i=4 main scanning line within a 5×11 window from 01 to DG410, respectively.
410 is output, and 5 is output from the FIFO memory DM12 and each flip-flop DG501 to DG510.
Each pixel data J500 to J510 on the i=5 main scanning line in the x11 window is output, and in the same way, each pixel data J600 to J510 is output from each FIFO memory DM13, DM14 and each flip-flop DG601 to DG710. J610, J700 to J710
is output.

Therefore, as shown in FIG. 47, each pixel (i=3, 4,...,7; j=0,
1, 2, . . . , 10) are simultaneously outputted from the matrix memory circuit 107 to the determination data counting unit 108 in FIG. 18.

(5-5) Judgment Data Generation Unit FIG. 18 is a block diagram of the judgment data counting unit 108 shown in FIG. 3. In this embodiment, the circuit shown in FIG. Five pieces are provided corresponding to E to E. In FIG. 18, X corresponds to A to E in the above judgment data A to E. For example, 5-bit judgment data J300 is expressed as J300-X (X=A, B, C, D, E).
It is expressed as

As shown in FIG. 18, the judgment data A to E output from the matrix memory circuit 107 are sent to eight logic B circuits LB-51 to LB-51 to LB-51 to LB-51 to LB-51 to LB-51 to LB-51 to LB-51 to LB-51 to LB-51 to LB-51 to LB-51 to LB-51 to LB-51 to LB-51 to LB-51 to LB-51 to LB for each judgment data.
-58, and is input to each circuit LB-51 to LB-58 at H level (“1
”) are counted, those counted data are added by adders AD60 to AD66, and the data of the addition result is determined as the judgment data counted value JS-X (X=A,
B, C, D, E). Therefore, the above judgment data A to E are added for each judgment data within the window shown in FIG. 47, and the data resulting from the addition is output as the judgment data count value JS-X. Here, the judgment data count value JS-X (X = A, B, C, D, E) means the following data corresponding to the above judgment data A to E,
These five pieces of data are output to the discrimination data signal generation section 114. (a) Judgment data count value JS-A in the window of FIG. 47 of judgment data A: number of pixels detected in the concentrated first dither image. (b) Judgment data count value JS-B in the window of FIG. 47 of judgment data B: number of pixels detected in the concentrated second dither image. (c) Judgment data count value JS-C in the window of FIG. 47 of judgment data C: number of halftone image detection pixels. (d) Judgment data count value JS-D in the window of FIG. 47 of judgment data D: number of non-halftone image detection pixels. (e) Judgment data count value JS-E in the window of FIG. 47 of judgment data E: number of pixels detected in an all-white all-black image.

(5-6) Discrimination Data Signal Generation Section FIG. 19 is a block diagram of the discrimination data signal generation section 114 shown in FIG. 3.

As shown in FIG. 19, the concentrated first data detection pixel number JS-A is used for a table for discriminating the concentrated first dithered image and outputting the non-halftone index and discrimination signal for the image. Input to the first address terminal of ROMRT7, concentrated second data detection pixel number JS-B
is input to the first address terminal of the table ROMRT 6 for discriminating the concentrated second dither image and outputting the non-halftone index and discrimination signal for the image. Further, the number of halftone image detection pixels JS-C is input to the first address terminal of the table ROMRT5 for outputting the non-halftone index for the distributed halftone image, and the number of non-halftone image detection pixels JS- D is ROMRT for table
5 is input to the second address terminal. Furthermore, the data "55" indicating the total number of pixels within the 5x11 window for image area discrimination is input to the input terminal A of the subtracter SU1, and the number of pixels JS-E for detecting the all-white and all-black image is Subtractor SU
-1 input terminal B. The subtracter SU1 is A-
Perform the subtraction of B and store the subtraction result data in the table ROM.
It is output to each second address terminal of RT6 and RT7.

FIG. 48 is a graph of non-halftone indexes for distributed halftone images stored in the table ROM RT5, and FIG. 49 is a graph of the non-halftone index stored in the table ROMRT6, RT7.
2 is a graph of non-halftone indices for concentrated halftone images stored in . Here, data x1 on the horizontal axis of each graph
, x2 are expressed by the following "Math. 4" and "Math. 5".

[Formula 4] x1=(Number of non-halftone image detection pixels)/{(Number of non-halftone image detection pixels)+(Number of halftone image detection pixels)}

[Formula 5] (a) For table ROMRT7 x2 = (number of pixels detected in concentrated first dither image)/{(total number of pixels) - (number of pixels detected in all-white all-black image)} (b) ROMRT6 for table When x2 = (number of pixels detected in concentrated second dither image) / {(total number of pixels) - (number of pixels detected in all-white all-black image)}

Note that the denominator of data x2 is calculated by subtractor SU1. As is clear from FIG. 48, the non-halftone index y1 indicating the non-halftone-likeness of the distributed halftone image has the following value for the data x1. (a) When 0≦x1≦0.5, y1=0, (b) 0.
When 5<x1≦0.8, y1=2×x1-1, (c)
When x1>0.8, y1=1.

Further, as is clear from FIG. 49, the non-halftone index y2, which indicates the non-halftone-likeness of the concentrated halftone image, has the following value for the data x2. (a) When 0≦x2≦2/3, y2=0, (b) x2
>2/3, y2=2×x2-1.

Note that in the graph of FIG. 49, data x
If 2 is greater than 2/3, table ROMRT7
, RT6, respectively, and output a concentrated first dither image discrimination signal of H level and a second dither image discrimination signal of H level. Ru. On the other hand, when the data x2 is 2/3 or less, it is determined that the concentrated first dither image and the concentrated second dither image are not detected from the table ROMs RT7 and RT6, respectively, and the L level concentrated first dither image is A discrimination signal and an L level concentrated second dither image discrimination signal are output. Also, for convenience of explanation, non-halftone indexes y1, y
Although the value of 2 is a value from 0 to 1, in the circuit of FIG. 19, the non-halftone indexes y1 and y2 are represented by 4-bit data.

The table ROMRT 5 calculates the non-halftone index for the distributed halftone image from the stored table based on the data JS-C and JS-D input to the address terminal, and then calculates the non-halftone index for the distributed halftone image. It is output to the first input terminal of CS2. In addition, the table ROMRT7 includes data JS-A input to the address terminal and the subtractor SU1.
After calculating the non-halftone index for the concentrated halftone image from the stored table based on the output data of The signal is output to the restored data calculation section 112 in FIG. Furthermore, ROMRT6 for table
calculates the non-halftone index for the concentrated halftone image from the stored table based on the data JS-B input to the address terminal and the output data of the subtractor SU1, and then At the same time, the concentrated second dither image discrimination signal is output to the restored data calculation unit 112 in FIG. 28.

The comparison selector CS1 selects the largest data among the input halftone indexes, and then outputs the selected data to the first input terminal of the comparison selector CS2. Further, the comparison selector CS2 selects the largest data among the input halftone indexes, and then outputs the selected data to the data mixing unit 104 in FIG. 3 as image area discrimination data.

(6) Halftone image restoration section (6-1) Configuration and operation of each section The halftone image restoration section 101 shown in FIG. Calculation part 1
10, an edge enhancement amount calculation section 111, and a restored data calculation section 112. The characteristics of the operations in each of the calculation units 109 to 113 will be described below.

In the smoothing amount calculation unit 110, the spatial filter F11 of the 7×7 window W7 shown in FIG.
Then, the spatial filter F12 of the 9×9 window W9 shown in FIG. 51 is switched and used in accordance with the concentrated second dither image discrimination signal, as will be described in detail later. In both the spatial filter F11 in FIG. 50 and the spatial filter F12 in FIG. 51, each window W
7. The weighting coefficient for each pixel in W9 is set to 1. This is an image restored by the device of this embodiment.
This is because the target is a halftone image that has been binarized using a pseudo halftone of the area gradation method, which expresses the image density using the number of black pixels per unit area. In this embodiment, a square shape is used as the window for calculating the amount of smoothing, but the shape is not limited to this. As shown in FIG. 52, the spatial filter F1 of the window whose distance from the pixel of interest is approximately constant
3 may be used.

Next, the necessity of calculating the edge enhancement amount in the edge enhancement amount calculation section 111 will be explained.

FIG. 55 shows an image in which a white image and a black image are reversed in the main scanning direction MS every three pixels. The spatial frequency of this image in the main scanning direction MS is 1/6 [lp/pixel]. Now, the 1×6 window smoothing spatial filter F14 shown in FIG. 53 and the 1×6 window smoothing spatial filter F14 shown in FIG.
FIG. 55 shows the smoothed values CV1 and CV2 calculated when scanning on the scanning line MSL in the main scanning direction MS using the smoothing spatial filter F15 with a ×3 window.
Shown below. As is clear from the results shown in FIG. 55, when the image in FIG. 55 is smoothed using the spatial filter F15, its spatial frequency components are preserved; on the other hand, when the image in FIG. 55 is smoothed using the spatial filter F14, It can be seen that in this case, the spatial frequency component is lost. Therefore, a smoothing spatial filter for a window whose width in the scanning direction is a natural number n pixels, when scanning in the scanning direction using the spatial filter, has a spatial width higher than 1/(2n) [lp/pixel]. It can be seen that the frequency components are attenuated. From this, the spatial filters F11 and F12 shown in FIGS. 50 and 51, respectively, are 1/14[lp/
It can be seen that an image having a spatial frequency component higher than 1/18 [lp/pixel] cannot be restored satisfactorily. Further, even if edge enhancement is applied to image data after smoothing processing, it is impossible to recover lost spatial frequency components. Therefore, in this embodiment, in addition to finding the smoothing amount, the edge enhancement amount corresponding to the edge component is calculated in order to recover the spatial frequency component lost due to the smoothing process.

FIGS. 56 to 63 show spatial filters F21 to F28 for calculating the amount of edge enhancement. Here, the spatial filter F21 is a spatial filter for calculating the difference in the number of black pixels between a pair of 3×7 windows W37a and W37b having a width of 3 pixels in the edge emphasis direction in the sub-scanning direction. The spatial filter F22 is a spatial filter for calculating the difference in the number of black pixels between a pair of 3×7 windows W37a and W37c having a width of 3 pixels in the edge emphasis direction in the sub-scanning direction. It is. Also,
The spatial filter F23 is a spatial filter for calculating the difference in the number of black pixels between a pair of 7×3 windows W73a and W73b having a width of 3 pixels in the edge emphasis direction in the main scanning direction, The spatial filter F24 is a spatial filter for calculating the difference in the number of black pixels between a pair of 7×3 windows W73a and W73c having a width of 3 pixels in the edge emphasis direction in the main scanning direction.

Furthermore, the spatial filter F25 is a spatial filter for calculating the difference in the number of black pixels between a pair of windows WIa and WIb having a width of 22 pixels in the second diagonal edge enhancement direction. , and the spatial filter F2
6 is a spatial filter for calculating the difference in the number of black pixels between a pair of windows WIa and WIc having a width of two pixels in the second diagonal edge enhancement direction. The spatial filter F27 also includes a pair of windows W having a width of two pixels in the first diagonal edge emphasis direction.
This is a spatial filter for calculating the difference in the number of black pixels between Ja and WJb, and the spatial filter F28 is a pair of windows WJa and WJb each having a width of two pixels in the first diagonal edge emphasis direction. This is a spatial filter for calculating the difference in the number of black pixels between WJc.

[0104] Therefore, the above spatial filters F21 to F2
Step 8 is to calculate the amount of edge enhancement in a total of 8 directions, 4 directions in the main and sub-scanning directions, and 4 directions in the first and second diagonal directions, centering on the pixel of interest (i=5, j=5). Can be done.

FIGS. 64 to 71 respectively show spatial filters F31 to F38, which correspond to the above-mentioned spatial filters F21 to F28 and are used to obtain the edge enhancement amount of the edge enhancement component of a higher spatial frequency.

The spatial filter F31 is a pair of 1×7 filters having a width of one pixel in the edge emphasis direction in the sub-scanning direction.
This is a spatial filter for calculating the difference in the number of black pixels between the windows W17a and W17b, and the spatial filter F32
are a pair of 1×7 windows W17a and W17c having a width of one pixel in the edge emphasis direction in the sub-scanning direction.
This is a spatial filter for calculating the difference in the number of black pixels between. Moreover, the spatial filter F33 is a spatial filter for calculating the difference in the number of black pixels between a pair of 7×1 windows W71a and W71b having a width of one pixel in the edge emphasis direction in the main scanning direction. Yes, the spatial filter F34 is
This is a spatial filter for calculating the difference in the number of black pixels between a pair of 7×1 windows W71a and W71c having a width of one pixel in the edge emphasis direction in the main scanning direction. Furthermore, the spatial filter F35 is a spatial filter for calculating the difference in the number of black pixels between a pair of windows WKa and WKb having a width of one pixel in the second diagonal edge enhancement direction, The spatial filter F36 has a width of one pixel in the second diagonal edge emphasis direction.
This is a spatial filter for calculating the difference in the number of black pixels between a pair of windows WKa and WKc. Furthermore, the spatial filter F37 includes a pair of windows WLa, WL each having a width of one pixel in the first diagonal edge emphasis direction.
The spatial filter F38 is a spatial filter for calculating the difference in the number of black pixels between windows WLa and WLc, and the spatial filter F38 is a spatial filter for calculating the difference in the number of black pixels between windows WLa and WLc. This is a spatial filter for calculating the difference in the number of black pixels in .

In these spatial filters F31 to F38, it is necessary to calculate the image density from more pixel data in order to reduce the influence of the image pattern peculiar to pseudo halftones, and for this reason, edge emphasis The width of the window is increased in the direction perpendicular to the direction. However, since it is necessary to prevent the image pattern peculiar to pseudo-halftones from being emphasized, the edge area discriminating unit 109
is provided, and the above-mentioned edge enhancement is performed only on pixels determined to be within the edge area.

FIGS. 72 to 75 respectively show spatial filters F41 to F44 for calculating edge region discrimination amounts for determining edge regions.

The spatial filter F41 is a pair of 4×7 filters having a width of 4 pixels in the edge emphasis direction in the main scanning direction.
This is a spatial filter for calculating the difference in the number of black pixels between the windows W47a and W47b, and the spatial filter F42
are a pair of 4×7 windows W47a and W47c having a width of 4 pixels in the edge emphasis direction in the sub-scanning direction.
This is a spatial filter for calculating the difference in the number of black pixels between. Further, the spatial filter F43 is a spatial filter for calculating the difference in the number of black pixels between a pair of windows WMa and WMb having a width of three pixels in the second diagonal edge enhancement direction, The spatial filter F44 is a spatial filter for calculating the difference in the number of black pixels between a pair of windows WMc and WMd having a width of three pixels in the first diagonal edge enhancement direction.

[0110] Each window of the spatial filters F41 to F44 for calculating these edge region discrimination amounts is a spatial filter for edge emphasis to eliminate the amount of edge emphasis detected by the spatial filter for edge emphasis. The width in the edge enhancement direction is set to be larger than each window in . Note that each window of the spatial filter for smoothing is set to include each window of the spatial filter for edge enhancement, and also each window of the spatial filter for edge region determination.

(6-2) Window counting section The window counting section 113 includes a first calculation section 113a, a second calculation section 113b, a third calculation section 113c, and a fourth calculation section 11.
3d.

FIG. 20 is a block diagram of the first calculating section 113a of the window counting section 113 for counting the number of black pixels for each of seven consecutive pixel data in the main scanning direction. 113a includes nine logic B circuits LB-60 to LB-68.

As shown in FIG. 20, each of the seven consecutive pixel data D102 to D108 in the main scanning direction is input to the logic B circuit LB-60, and the number of black pixels for each pixel data is counted. , count value data DS10 is output, and each of seven consecutive pixel data D202 to D208 in the main scanning direction is input to the logic B circuit LB-61, and the number of black pixels for each pixel data is counted. After that, data DS11 of the count value is output. Similarly, the number of black pixels for each of the seven pixel data D302 to D308, D402 to D408, ..., D902 to D908 that are continuous in the main scanning direction for i=3 to 9 is determined from the logic B circuits LB-62 to D908. After being counted by LB-68, data DS12 to DS18 of the counted value are output.

FIG. 21 is a block diagram of the second calculating section 113b of the window counting section 113 for counting the number of black pixels for each of seven consecutive pixel data in the sub-scanning direction. 113b includes nine logic B circuits LB-70 to LB-78.

As shown in FIG. 21, each of the seven consecutive pixel data D201 to D801 in the sub-scanning direction is input to the logic B circuit LB-70, and the number of black pixels for each pixel data is counted. , count value data DS20 is output, and each of seven consecutive pixel data D202 to D802 in the sub-scanning direction is input to the logic B circuit LB-71, and the number of black pixels for each pixel data is counted. After that, data DS21 of the counted value is output. Similarly, the number of black pixels for each of the seven pixel data D203 to D803, D204 to D804, ..., D209 to D809 that are continuous in the sub-scanning direction for j=3 to 9 is determined from the logic B circuits LB-72 to D809. After being counted by LB-78, data DS22 to DS28 of the counted value are output.

FIG. 22 is a block diagram of the third calculating section 113c of the window counting section 113 for counting the number of black pixels for each of seven consecutive pixel data in the first diagonal direction. The calculation unit 113c includes nine logic B circuits LB-8.
0 to LB-88.

As shown in FIG. 22, seven pieces of pixel data D006, D105, . . . , D continuous in the first diagonal direction
600 is input to the logic B circuit LB-80, and after counting the number of black pixels for each pixel data, the count value data DS30 is output, and each of the seven consecutive pixels in the first diagonal direction is Pixel data D007, D106,..., D6
01 is input to the logic B circuit LB-81, the number of black pixels for each pixel data is counted, and then the counted value data DS31 is output. Thereafter, in the same manner, each of the seven pixel data D107 and D20 consecutive in the first diagonal direction is
6,...,D701;D108,D207,...,D702
;…;D310,D409,…,D904;D311,
After the number of black pixels for D410, .

FIG. 23 is a block diagram of the fourth calculating section 113d of the window counting section 113 for counting the number of black pixels for each of seven pixel data consecutive in the second diagonal direction. The calculation unit 113d includes nine logic B circuits LB-9.
0 to LB-98.

As shown in FIG. 23, seven pieces of pixel data D004, D105,...D6 consecutive in the second diagonal direction
10 is input to the logic B circuit LB-90, and after counting the number of black pixels for each pixel data, the counted value data DS40 is output, and each of the seven consecutive pixels in the second diagonal direction is Pixel data D003, D104,..., D60
9 is input to the logic B circuit LB-91, the number of black pixels for each pixel data is counted, and then the counted value data DS41 is output. Thereafter, in the same manner, seven pieces of pixel data D103 and D204 consecutive in the second diagonal direction are
,...,D709;D102,D203,...,D708;
...;D300,D401,...,D906;D400,D
After the number of black pixels for 501, .

(6-3) Smoothing amount calculation unit FIG. 24 is a block diagram of the smoothing amount calculation unit 110 shown in FIG. 3.

As shown in FIG. 24, data DS11,D
S12 is input to adder AD71, and data DS13,
DS14 is input to adder AD72. Furthermore, data DS15 and DS16 are input to adder AD74, and data DS17 is input to adder AD75. Each data D
S11 to DS17 are six adders AD71 to AD7
6, and the addition result data is added to adder AD7.
6, 7× which is the calculation result by the spatial filter F11
7 The number of black pixels is output as second data to the restored data calculation unit 112 and adder AD81.

Furthermore, data DS10 and DS18 are input to adder AD77, and data DS20 and DS28 are input to adder AD78. Pixel data D101, D80
1, D108, D808, and three "0" data are input to the logic B circuit LB-99, and after counting the number of black pixels for each data, the data of the count value is input to the adder A.
It is output to D80. These data DS10, DS1
8, DS20, DS28, D101, D801, D10
8, D808 are added by adders AD77 to AD80, and then the data of the addition result is output from adder AD80 to adder AD81. The adder AD81 adds each piece of input data and outputs the data resulting from the addition to the restored data calculation unit 112 as 9×9 black pixel number data.

(6-4) Edge Emphasis Amount Calculation Unit The edge emphasis amount calculation unit 111 calculates the edge emphasis amount (hereinafter referred to as edge (This is called emphasis amount first data.)
The first calculation unit 111a for calculating the amount of edge emphasis (hereinafter referred to as edge emphasis amount second data) having the largest absolute value among the respective edge emphasis amounts calculated using the spatial filters F31 to F38. Second calculation unit 11 for calculation
1b.

FIG. 25 is a block diagram of the first calculation section 111a of the edge enhancement amount calculation section 111.

As shown in FIG. 25, data DS10 to DS12 are added by adders AD91 and AD92, and the resulting data is sent from adder AD92 to subtracter SU1.
It is input to input terminal A of No. 1. Further, the data DS13 to DS15 are added by adders AD93 and AD94, and the data of the addition result is sent from the adder AD94 to the subtracter SU.
11 and input terminal A of the subtracter SU12. Furthermore, the data DS16 to DS18 are added by adders AD95 and AD96, and the data of the addition result is transferred from the adder AD96 to the input terminal B of the subtracter SU12.
is input. The subtracter SU11 performs subtraction of B-A and outputs the data of the subtraction result to the comparison selector CS11 as data of the calculation result of the spatial filter F21. Further, the subtracter SU12 performs subtraction of A-B and outputs the data of the subtraction result to the comparison selector CS11 as the data of the calculation result of the spatial filter F22. In response, the comparison selector CS11 selects data with a large absolute value from among the input data and outputs it to the comparison selector CS13.

[0126] Data DS20 to DS22 are added to adder AD.
97 and AD98, and the data of the addition result is input from the adder AD98 to the input terminal A of the subtracter SU13. Also, data DS23 to DS25 are sent to the adder A.
D99 and AD100 add the data, and the resultant data is sent from the adder AD100 to the input terminal B of the subtracter SU13.
and is input to the input terminal A of the subtracter SU14. Furthermore, data DS26 to DS28 are sent to adders AD101 and A
They are added by D102, and the data of the addition result is input from the adder AD102 to the input terminal B of the subtracter SU14. The subtracter SU13 subtracts B-A and outputs the data of the subtraction result to the comparison selector CS12 as the data of the calculation result of the spatial filter F23. Also, the subtractor SU1
4 performs subtraction of A-B and uses the subtraction result data as data of the calculation result of the spatial filter F24 in the comparison selector CS.
Output to 12. In response, the comparison selector CS12
selects data with a large absolute value from among the input data and outputs it to the comparison selector CS13.

Data DS30 to DS32 are added to adder AD
103 and AD104, and the resultant data is sent from the adder AD104 to the input terminal A of the subtracter SU15.
is input. Furthermore, data DS33 to DS35 are added by adders AD105 and AD106, and the data resulting from the addition is input from adder AD106 to input terminal B of subtractor SU15 and input terminal A of subtractor SU16. Further, the data DS36 to DS38 are sent to the adder AD1.
07 and AD108, and the data of the addition result is input from the adder AD108 to the input terminal B of the subtracter SU16. The subtracter SU15 performs subtraction of B-A and outputs the data of the subtraction result to the comparison selector CS14 as the data of the calculation result of the spatial filter F25. Further, the subtracter SU16 performs subtraction of A-B and outputs the data of the subtraction result to the comparison selector CS14 as the data of the calculation result of the spatial filter F26. In response to this, the comparison selector CS14 selects data having a large absolute value from among the input data and outputs it to the comparison selector CS16.

[0128] Data DS40 to DS42 are added to adder AD.
109 and AD110, and the resultant data is sent from the adder AD110 to the input terminal A of the subtracter SU17.
is input. Furthermore, data DS43 to DS45 are added by adders AD111 and AD112, and the data resulting from the addition is input from adder AD112 to input terminal B of subtractor SU17 and input terminal A of subtractor SU18. Further, the data DS46 to DS48 are sent to the adder AD1.
13 and AD114, and the data of the addition result is input from the adder AD114 to the input terminal B of the subtracter SU18. The subtracter SU17 performs subtraction of B-A and outputs the data of the subtraction result to the comparison selector CS15 as data of the calculation result of the spatial filter F27. Further, the subtracter SU18 performs subtraction of A-B and outputs the data of the subtraction result to the comparison selector CS15 as the data of the calculation result of the spatial filter F28. In response, the comparison selector CS15 selects data with a large absolute value from among the input data and outputs it to the comparison selector CS16.

[0129] The comparison selector CS13 selects data having a large absolute value among the input data and selects the data having a large absolute value.
Also, the comparison selector CS16 selects the data with the largest absolute value among the input data and outputs it to the comparison selector CS17. In response, the comparison selector CS17 selects data having a large absolute value from among the input data, and outputs the selected data to the restored data calculation unit 112 as edge enhancement amount first data.

FIG. 26 is a block diagram of the second calculation section 111b of the edge enhancement amount calculation section 111.

As shown in FIG. 26, data DS13 is input to input terminal A of subtracter SU21, and data DS14 is input to input terminal A of subtracter SU21.
is input to the input terminal B of the subtractor SU21 and the input terminal A of the subtractor SU22, and the data DS15 is input to the input terminal B of the subtractor SU22.
is input to input terminal B of . The subtracter SU21 subtracts B-A and sends the subtraction result data to the spatial filter F31.
It is output to the comparison selector CS21 as the data of the calculation result. Further, the subtracter SU22 performs subtraction of A-B and outputs the data of the subtraction result to the comparison selector CS21 as the data of the calculation result of the spatial filter F32. In response to this, the comparison selector CS21 selects data with a large absolute value from among the input data and outputs it to the comparison selector CS23.

Data DS23 is input to input terminal A of subtractor SU23, data DS24 is input to input terminal B of subtractor SU23 and input terminal A of subtractor SU24,
Data DS25 is input to input terminal B of subtracter SU24. The subtracter SU23 performs subtraction of B-A and outputs the data of the subtraction result to the comparison selector CS22 as the data of the calculation result of the spatial filter F33. Also, the subtractor SU
24 performs the subtraction of A-B and uses the subtraction result data as the data of the calculation result of the spatial filter F34 in the comparison selector C.
Output to S22. In response, the comparison selector CS2
2 selects data with a large absolute value from among the input data and outputs it to the comparison selector CS23.

Data DS33 is input to input terminal A of subtractor SU25, data DS34 is input to input terminal B of subtractor SU25 and input terminal A of subtractor SU26,
Data DS35 is input to input terminal B of subtracter SU26. The subtracter SU25 subtracts B-A and outputs the data of the subtraction result to the comparison selector CS24 as the data of the calculation result of the spatial filter F35. Also, the subtractor SU
26 performs subtraction of A-B and uses the subtraction result data as the data of the calculation result of the spatial filter F36 to the comparison selector C.
Output to S24. In response, the comparison selector CS2
4 selects data with a large absolute value from among the input data and outputs it to the comparison selector CS26.

Data DS43 is input to input terminal A of subtractor SU27, data DS44 is input to input terminal B of subtractor SU27 and input terminal A of subtractor SU28,
Data DS45 is input to input terminal B of subtracter SU28. The subtracter SU27 performs subtraction of B-A and outputs the data of the subtraction result to the comparison selector CS25 as the data of the calculation result of the spatial filter F37. Also, the subtractor SU
28 performs the subtraction of A-B and uses the subtraction result data as the data of the calculation result of the spatial filter F38 to the comparison selector C.
Output to S25. In response, the comparison selector CS2
5 selects data having a large absolute value from among the input data and outputs it to the comparison selector CS26.

[0135] The comparison selector CS23 selects data having a large absolute value from among the input data and selects the data having a large absolute value.
Also, the comparison selector CS26 selects the data with the largest absolute value among the input data and outputs it to the comparison selector CS27. In response, the comparison selector CS27 selects data with a large absolute value from among the input data, and outputs the selected data to the restored data calculation unit 112 as edge enhancement amount second data.

The reason why the edge enhancement amount calculation unit 111 selects the absolute value edge enhancement amount from among the edge enhancement amounts calculated by each spatial filter is as follows. That is, in edge enhancement processing for multivalued image data, edge components in all directions are added, but on the other hand, in edge enhancement processing for binary image data, the edge components are added for image patterns specific to pseudo-halftones. often outputs a small amount of edge enhancement. This is because this small amount of edge enhancement has low reliability, and adding them together will result in a large error.

(6-5) Edge Area Discriminator FIG. 27 is a block diagram of the edge area discriminator 109 shown in FIG. 3.

As shown in FIG. 27, data DS10 to DS13 are added by adders AD121 to AD123, and the data resulting from the addition is output from adder AD123 to input terminal A of subtracter SU31. Also, data D
S14 to DS17 are adders AD124 to AD126
The data of the addition result is added by the adder AD12.
6 to input terminal B of the subtracter SU31. The subtracter SU31 subtracts B-A and outputs the data of the subtraction result to the comparison selector CS31 as data of the calculation result of the spatial filter F41.

[0139] Data DS21 to DS24 are added to adder AD.
127 to AD129, and the data of the addition result is output from the adder AD129 to the input terminal A of the subtracter SU32. Further, the data DS25 to DS28 are added by the adders AD130 to AD132, and the data of the addition result is transferred from the adder AD132 to the subtracter SU32.
is output to input terminal B of. The subtracter SU32 performs subtraction of A-B and sends the subtraction result data to the spatial filter F42.
It is output to the comparison selector CS31 as the data of the calculation result.

[0140] Data DS31 to DS34 are added to adder AD.
133 to AD135, and the data of the addition result is output from the adder AD135 to the input terminal A of the subtracter SU33. Further, the data DS35 to DS38 are added by the adders AD136 to AD138, and the data of the addition result is transferred from the adder AD138 to the subtracter SU33.
is output to input terminal B of. The subtracter SU33 performs subtraction of A-B and sends the data of the subtraction result to the spatial filter F43.
It is output to the comparison selector CS32 as the data of the calculation result.

[0141] Data DS40 to DS43 are added to adder AD.
139 to AD141, and the data of the addition result is output from the adder AD141 to the input terminal A of the subtracter SU34. Further, the data DS44 to DS47 are added by the adders AD142 to AD144, and the data of the addition result is transferred from the adder AD144 to the subtracter SU34.
is output to input terminal B of. The subtracter SU34 performs subtraction of B-A, and the data of the subtraction result is sent to the spatial filter F44.
It is output to the comparison selector CS32 as the data of the calculation result.

[0142] The comparison selector CS31 selects data having a large absolute value from among the input data and selects the data having a large absolute value.
33, and the comparison selector CS32 selects the data with the largest absolute value among the input data and outputs it to the comparison selector C
Output to S33. In response, the comparison selector CS3
3 selects data with a large absolute value from among the input data and outputs the selected data to the absolute value circuit AB1. The absolute value circuit AB1 uses the data of the absolute value of the input data as an edge area discrimination amount in the restored data calculation unit 11.
Output to 2.

[0143] The reason why the edge area discriminator 109 outputs absolute value data as the edge area discrimination amount is because the information on the direction of the edge component corresponding to the positive or negative edge component amount is used in the restored data calculation. This is because it is unnecessary in the section 112.

(6-6) Restored Data Calculation Unit FIG. 28 is a block diagram of the restored data calculation unit 112 shown in FIG. 3.

As shown in FIG. 28, data of 9×9 black pixels is input to the multiplier 201, and a 9×9 window W is input to the multiplier 201.
The input data is multiplied by 49/81 in order to convert the total number of pixels in 9 and the total number of pixels in 7×7 window W7, and the multiplication result data is output to input terminal A of selector 202. be done. Further, the 7×7 black pixel count second data is input to each input terminal A of the comparators 203 and 204, and is also input to the input terminal B of the selector 202. Data of a predetermined threshold TJ1 is input to the input terminal B of the comparator 203, and the comparator 203 outputs an H level signal to the clear terminal of the multiplier 206 via the NOR gate 205 when A<B. On the other hand, at other times, an L level signal is similarly output. Furthermore, the data of "49-TJ1" is input to the input terminal B of the comparator 204,
outputs an H level signal to the clear terminal of the multiplier 206 via the NOR gate 205 when A>B, and similarly outputs an L level signal at other times.

The concentrated first dithered image discrimination signal is sent to the comparison selector 20 via the OR gate 209 and the OR gate 210.
The concentrated second dither image discrimination signal is input to the clear terminal of the comparison selector 207 via the OR gate 209 and the OR gate 210, and is also input to the selection terminal SEL of the selector 202. .

[0147] The selector 202 selects the H level centralized second
When the dither image discrimination signal is input to the selection terminal SEL, select the data input to the input terminal A,
On the other hand, when the L level concentrated second dither image discrimination signal is input to the selection terminal SEL, the data input to the input terminal B is selected and output to the multiplier 211. do. The multiplier 211 is provided to convert from 50 gradations to 64 gradations, and after multiplying the input data by a multiplier of 63/49, the multiplication result data is used as a smoothing amount and sent to the input terminal A of the addition circuit 213. Output to.

The edge emphasis amount first data is provided by the comparison selector 20
The edge enhancement amount second data is input to the multiplier 206. The multiplier 206 converts the size of each window of each spatial filter used when calculating the edge enhancement amount first data and each window of each spatial filter used when calculating the edge enhancement amount second data. is provided to multiply the input data by 3 and output the multiplication result data to the input terminal A of the comparison selector 207. Here, the H level signal is transmitted to the multiplier 20.
When input to the clear terminal of 6, the output data is “
Cleared to 0”.

[0149] The data of the edge region discrimination amount is sent to the comparator 208.
is input to the input terminal A of the comparator 208, and data of a predetermined threshold TJ2 is input to the input terminal B of the comparator 208
8 outputs an H level signal to the comparison selector 207 via the OR gate 210 when A<B, and similarly outputs an L level signal at other times. Comparison selector 207
When an L level signal is input to the clear terminal, selects the data with the largest absolute value among the data input to each input terminal A and B and outputs it to the multiplier 212; When an H level signal is input to the terminal,
Clear the output data and add “0” data to the multiplier 212
Output to. The multiplier 212 adds (63×
0.4/21) and outputs the multiplication result data to the input terminal B of the addition circuit 213 as an edge emphasis amount. Further, the addition circuit 213 adds the data of the smoothing amount and the data of the edge enhancement amount input to each input terminal A and B as will be described in detail later, and then converts the data of the addition result into halftone restored image data. The data is output to the data mixing section 104.

In the restored data calculating section 112 configured as described above, the selector 202 selects data corresponding to 9×9 black pixels or 7× A selection is made as to whether to select the 7 black pixel number second data. In the concentrated first dither image, there is one period of density change for every four dots in the main and sub-scanning directions. Therefore, in order to calculate the smoothing amount, a window larger than the 4×4 window is required, and in this embodiment, a 7×7 window W7 is used. On the other hand, in the concentrated second dither image, there is one cycle of density change every four dots in the diagonal direction. Therefore,
In order to calculate the amount of smoothing, a window larger than the window of (square root of 2 x 4) x (square root of 2 x 4) is required, and in this example, by adding the margin, a window of 9 x 9 is required.
window W9 is used. Note that for a distributed halftone image, a 7×7 window W7 is used to calculate the amount of smoothing.

Note that in order to prevent the occurrence of moiré, it is desirable to use a window whose size is an integral multiple of the dither period. Therefore, it is more preferable to use a 4×4 window or an 8×8 window for the concentrated first dither image in order to calculate the amount of smoothing. In addition, for the concentrated second dither image, in order to calculate the amount of smoothing, an 8 x 8 window whose sides are parallel to the main and sub-scanning directions is tilted by 45 degrees to the main and sub-scanning directions. It is more preferable to use a closed window.

The restored data calculation unit 112 also uses the concentrated first dithered image discrimination signal and the concentrated second dithered image discrimination signal in order to determine whether or not the pixel of interest is in an edge region. When the edge region discrimination amount is smaller than the predetermined threshold TJ2 (when the output signal of the comparator 208 is at H level), or either the concentrated first dither image discrimination signal or the concentrated second dither image discrimination signal When the signal is at H level (the output signal of OR gate 209 is H level)
level), the output signal of the OR gate 210 is H
At this time, the output data of the comparison selector 207 is cleared to "0", the edge enhancement amount becomes "0", and edge enhancement is not performed. This is a centralized first or second
In a dithered image area, since the spatial frequency of the dither pattern is relatively low, the edge discrimination amount is such that the edge area discriminating unit 109, which aims to detect a distributed halftone image, incorrectly determines that it is an edge area. This is because there is a risk of outputting. Note that in this embodiment, the threshold value TJ2 is preferably 4.

Furthermore, in order to convert the difference in size between the spatial filter window used to calculate the edge enhancement amount first data and the spatial filter window used to calculate the edge enhancement amount second data. A multiplier 206 is provided. The conversion ratio needs to be set so that for an image having the spatial frequency of one window, the edge enhancement amount calculated using that window is selected.

[0154] Furthermore, the number of minority pixels is equal to a predetermined threshold value TJ1.
When this is the case (when both output signals of the comparators 203 and 204 are at L level), the conversion data of the edge enhancement amount second data by the multiplier 206 is cleared and set to "0". This is because the edge enhancement amount second data is the edge enhancement amount calculated for a thin line-shaped image with a width of 1, and in such an image, as described above, the number of minority pixels is relatively small. It is from. Further, by this processing, when the number of minority pixels increases, it is possible to prevent the pseudo-halftone image pattern from being emphasized. In this embodiment, the threshold value TJ1 is preferably 8.

FIG. 29 shows the adder circuit 21 shown in FIG.
It is a block diagram of No. 3.

The adder circuit 213 has 7 bits including 1 bit of sign.
A circuit that adds a bit edge emphasis amount and a 6-bit smoothing amount, and includes an adder AD151 and comparators CM51 and C.
M52, a bit truncation circuit BAC that truncates and outputs one sign bit and one most significant bit, and a selector SE.
1, and a multiplier MU51 that multiplies input data by 1/2 and outputs the multiplier.

The edge enhancement amount data output from the multiplier 212 and the smoothing amount data output from the multiplier 211 are input to the adder AD151.
The 8-bit data including the 1-bit code outputted from 1 is outputted to each input terminal A of the comparators CM51 and CM52, and is also outputted to the selector SE1 via the bit truncation circuit BAC. " to input terminal B of comparator CM51
0'' data is input, the comparator CM51 compares the data input to each input terminal A and B, and when the data input to input terminal A is smaller than the data input to input terminal B, the comparator CM51 becomes H level. The comparison result signal of is outputted to the selection signal input terminal SELA of selector SE1, while the comparison result signal of L level is similarly outputted at other times.
Data "64" is input to the input terminal B of the comparator CM52, and the comparator CM52 compares the data input to each input terminal A and B, and the data input to the input terminal A is input to the input terminal B. When the data is greater than or equal to the specified data, the H level comparison result signal is sent to the selection signal input terminal SEL of the selector SE1.
On the other hand, at other times, an L level comparison result signal is similarly output. The selector SE1 outputs "0" data that is input to the input terminal A when the signal input to the selection signal input terminal SEA is at H level, and when the signal input to the selection signal input terminal SEB is at H level. Outputs the data “64” input to input terminal A when
When the signals input to each selection signal input terminal SEA, SEB are both at L level, the 6-bit data input to input terminal C is output. The data output from the selector SE1 is output to the data mixing unit 104 as restored halftone multi-value image data via the multiplier MU51.

The adder circuit 213 configured as described above adds the edge emphasis amount and the smoothing amount, and after rounding the data of the addition result less than 0 and 64 or more to 0 and 63, respectively, the lower 1 bit is By truncating, it is possible to calculate 5-bit data having a certain value from 0 to 31, and output the data resulting from this calculation to the data mixing unit 104 as restored halftone multi-value image data.

(7) Other Embodiments In the above embodiments, concentrated halftone images are detected based on the changes in the peripheral distribution shown in FIG. Windows W4a to W4d
A pattern matching method using .

In FIG. 76, a 4×4 pixel including the pixel of interest *
window W4a, and each of four windows located adjacent to the window W4a in the first and second diagonal directions.
By performing image pattern matching between the ×4 windows W4b to W4d and counting the number of pixels for which each pixel data does not match, the halftone discrimination value for the concentrated halftone image can be obtained. The four windows W4b to W4d are used to simultaneously accommodate two types of dot-concentrated systematic dithered images with screen angles of 0 degrees and 45 degrees.

Now, for example, the image pattern PA in FIG.
Table 1 shows the results of counting the number of non-matching pixels using the pattern matching method described above for T1, image pattern PAT2 of FIG. 78, and image pattern PAT3 of FIG. 79.

[0162]

[Table 1]

As is clear from "Table 1", in the case of image pattern PAT1 in FIG. 77, which is a non-halftone image pattern, the number of non-matching pixels is a large value, and this causes The validity of the method was demonstrated.

[0164]

Effects of the Invention As described in detail above, according to the present invention, binary image data that has been binarized with pseudo-halftones and binary image data that has been binarized with non-halftones using a predetermined threshold 2 corresponding to a predetermined area including the pixel of interest and a plurality of pixels around it, out of input binary image data including value image data.
Based on the value image data, it is determined for each pixel of the input binary image data whether it is a pseudo-halftone binary image data area or a non-halftone binary image data area. In an image processing apparatus comprising image area discriminating means for discriminating, and restoring means for restoring the input binary image data into multi-valued image data, the image area discriminating means converts pseudo-halftone binary image data into multi-valued image data. For the binary image data of the pixel of interest among the binary image data determined to be a region,
an edge enhancement means that performs an edge enhancement process that emphasizes the density difference between the pixel of interest and its surrounding pixels; and a binary image data of the pixel of interest that is binarized in a pseudo halftone by a dot concentrated dither method. a dither determining means for determining whether or not the pixel is image data, and the binary image data of the pixel of interest is binary image data obtained by converting the binary image data of the pixel of interest into a pseudo halftone using a dot concentrated dithering method by the dither determining means. and prohibition means for prohibiting edge enhancement processing performed by the edge enhancement means on the binary image data of the pixel of interest when it is determined that

Therefore, as in the conventional example, edge enhancement processing is performed on binary image data that has been binarized with pseudo halftones using the dot concentrated dither method, resulting in a grid pattern that is completely different from the original image. It is possible to prevent the image from being restored. This has the advantage that binary image data can be restored to multivalued image data more accurately than in the conventional example, that is, more faithfully to the original image.

[Brief explanation of drawings]

FIG. 1 is a longitudinal cross-sectional view of a mechanical section of a facsimile machine that is an embodiment of the present invention.

FIG. 2 is a block diagram of a signal processing section of the facsimile machine illustrated in FIG. 1;

FIG. 3 is a block diagram of the image restoration processing section shown in FIG. 2;

FIG. 4 is a block diagram of the 10×21 matrix memory circuit illustrated in FIG. 3;

5 is a block diagram of a first calculation section of the dither determination section shown in FIG. 3; FIG.

6 is a block diagram of a second calculation section of the dither determination section shown in FIG. 3. FIG.

[Figure 7] Figures 5, 6, 18, and 20 to 2
3 is a block diagram of the logic B circuit illustrated in FIG.

8 is a block diagram of a third calculation section of the dither determination section shown in FIG. 3. FIG.

9 is a block diagram of a fourth calculation section of the dither determination section shown in FIG. 3. FIG.

10 is a block diagram of a fifth calculation section of the dither determination section shown in FIG. 3. FIG.

11 is a block diagram of a sixth calculation section of the dither determination section shown in FIG. 3. FIG.

12 is a block diagram of a seventh calculation section of the dither determination section shown in FIG. 3. FIG.

13 is a block diagram of a first calculation section of the adjacent state determination section shown in FIG. 3. FIG.

14 is a block diagram of the main/sub-scanning direction adjacent number counter shown in FIG. 13; FIG.

15 is a block diagram of a second calculation section of the adjacent state determination section illustrated in FIG. 3. FIG.

16 is a block diagram of a third calculation section of the adjacent state determination section shown in FIG. 3. FIG.

17 is a block diagram of the 5×11 matrix memory circuit illustrated in FIG. 3. FIG.

18 is a block diagram of the determination data counting section illustrated in FIG. 3. FIG.

19 is a block diagram of the discrimination data signal generation section illustrated in FIG. 3. FIG.

20 is a block diagram of a first calculation section of the window counting section shown in FIG. 3; FIG.

21 is a block diagram of a second calculation section of the in-window counting section shown in FIG. 3; FIG.

22 is a block diagram of a third calculation section of the in-window counting section shown in FIG. 3; FIG.

23 is a block diagram of a fourth calculation section of the in-window counting section shown in FIG. 3; FIG.

24 is a block diagram of the smoothing amount calculation section shown in FIG. 3. FIG.

25 is a block diagram of a first calculation section of the edge enhancement amount calculation section shown in FIG. 3; FIG.

26 is a block diagram of a second calculation section of the edge enhancement amount calculation section shown in FIG. 3. FIG.

27 is a block diagram of the edge area determination unit illustrated in FIG. 3. FIG.

28 is a block diagram of the restored data calculation unit shown in FIG. 3. FIG.

29 is a block diagram of the adder circuit shown in FIG. 28. FIG.

FIG. 30 is a diagram showing each pixel data within a 10×21 window used in this example.

31] The reference range of each pixel at the time of determination in the adjacent state determination section and the dither determination section illustrated in FIG. 3, the reference range of each pixel at the time of determination in the discrimination data signal generation section illustrated in FIG. 3, FIG. 6 is a diagram showing a reference range of each pixel during restoration in the illustrated halftone image restoration section.

FIG. 32 is a diagram showing an example of a non-halftone image obtained when a character image is read and then binarized using a predetermined threshold.

FIG. 33 is a diagram showing an example of a pseudo-halftone binarized image obtained when a uniform density chart is read and then binarized using an error diffusion method.

FIG. 34 is a diagram showing an example of a pseudo-halftone binarized image obtained when a photographic image is read and then binarized by a dot concentrated systematic dithering method with a screen angle of 0 degrees.

FIG. 35 is a diagram showing an example of a pseudo-halftone binarized image obtained when a photographic image is read and then binarized using a dot concentrated systematic dithering method with a screen angle of 45 degrees.

FIG. 36 is a graph showing the number of adjacent pixels in four directions in the main and sub-scanning directions with respect to the number of black pixels in a 7×7 window.

37 is a diagram showing black pixel number data S10 to S17 of each window used in the dither determination section shown in FIG. 3. FIG.

38 is a diagram showing black pixel number data S20 to S27 of each window used in the dither determination section shown in FIG. 3. FIG.

39 is a diagram showing black pixel number data S30 to S37 of each window used in the dither determination section shown in FIG. 3. FIG.

40 is a diagram showing black pixel number data S40 to S47 of each window used in the dither determination section shown in FIG. 3. FIG.

FIG. 41 is a graph showing the peripheral distribution of the number of black pixels for each black pixel number data of each window continuous in the main scanning direction or the sub-scanning direction.

FIG. 42 is a diagram showing adjacency in the main scanning direction of each pixel within a 7×7 window.

FIG. 43 is a diagram showing adjacency in the sub-scanning direction of each pixel within a 7×7 window.

FIG. 44 is a diagram illustrating an example of a case where there are no minority pixels around the pixel of interest, but a relatively large number of minority pixels exist within the window for adjacency determination.

FIG. 45 is a diagram illustrating an example of a case where a linear non-halftone image approaches a 7×7 window.

FIG. 46 is a diagram showing another example where a linear non-halftone image approaches a 7×7 window.

47 is a diagram showing detection signals of each pixel in the 5×11 matrix memory circuit shown in FIG. 3. FIG.

48 is a graph of non-halftone indexes for distributed halftone images stored in the table ROM of the discrimination data signal generation unit shown in FIG. 3; FIG.

49 is a graph of non-halftone indexes for concentrated halftone images stored in the table ROM of the discrimination data signal generation unit shown in FIG. 3; FIG.

50 is a diagram showing a spatial filter for counting the number of black pixels within a 7×7 window, which is used in the smoothing value calculation unit shown in FIG. 3. FIG.

51 is a diagram showing a spatial filter for counting the number of black pixels within a 9×9 window, used in the smoothing value calculation unit shown in FIG. 3. FIG.

FIG. 52 is a diagram showing a modified example of a spatial filter used to calculate a smoothed value.

FIG. 53 is a diagram showing an example of a smoothing spatial filter used to explain the necessity of calculating an edge enhancement amount.

FIG. 54 is a diagram showing another example of a smoothing spatial filter used to explain the necessity of calculating an edge enhancement amount.

FIG. 55 shows an example of an image used to explain the necessity of calculating the amount of edge enhancement, and each calculated value when the smoothing spatial filter of FIG. 53 and FIG. 54 is applied to the image in the main scanning direction. It is a diagram.

56 is a diagram showing a spatial filter F21 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation section shown in FIG. 3. FIG.

57 is a diagram showing a spatial filter F22 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation unit shown in FIG. 3. FIG.

58 is a diagram showing a spatial filter F23 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation section shown in FIG. 3. FIG.

59 is a diagram showing a spatial filter F24 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation section shown in FIG. 3. FIG.

60 is a diagram showing a spatial filter F25 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation section shown in FIG. 3. FIG.

61 is a diagram showing a spatial filter F26 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation section shown in FIG. 3. FIG.

62 is a diagram showing a spatial filter F27 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation section shown in FIG. 3. FIG.

63 is a diagram showing a spatial filter F28 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation section shown in FIG. 3. FIG.

64 is a diagram showing a spatial filter F31 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation section shown in FIG. 3. FIG.

65 is a diagram showing a spatial filter F32 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation section shown in FIG. 3. FIG.

66 is a diagram showing a spatial filter F33 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation section shown in FIG. 3. FIG.

67 is a diagram showing a spatial filter F34 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation unit shown in FIG. 3. FIG.

68 is a diagram showing a spatial filter F35 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation section shown in FIG. 3. FIG.

69 is a diagram showing a spatial filter F36 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation section shown in FIG. 3. FIG.

70 is a diagram showing a spatial filter F37 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation section shown in FIG. 3. FIG.

71 is a diagram showing a spatial filter F38 for calculating an edge enhancement amount, which is used in the edge enhancement amount calculation section shown in FIG. 3. FIG.

72 is a diagram showing a spatial filter F41 for calculating an edge region discrimination amount, which is used in the edge region discriminator shown in FIG. 3. FIG.

73 is a diagram showing a spatial filter F42 for calculating an edge region discrimination amount, which is used in the edge region discriminator shown in FIG. 3. FIG.

74 is a diagram showing a spatial filter F43 for calculating an edge region discrimination amount, which is used in the edge region discriminator shown in FIG. 3. FIG.

75 is a diagram showing a spatial filter F44 for calculating an edge region discrimination amount, which is used in the edge region discriminator shown in FIG. 3. FIG.

FIG. 76: Five pattern matching windows W for explaining a pattern matching method that is a modified example for calculating a halftone index for a concentrated halftone image.
It is a figure showing 4a to W4e.

[FIG. 77] First image pattern PAT used to show an example of calculation by the pattern matching method performed using the pattern matching window illustrated in FIG. 76.
FIG.

78] Second image pattern PAT used to show an example of calculation by the pattern matching method performed using the pattern matching window illustrated in FIG. 76
FIG.

[Fig. 79] Third image pattern PAT used to show an example of calculation by the pattern matching method performed using the pattern matching window shown in Fig. 76.
It is a figure showing 3.

[Explanation of symbols]

62...Image restoration processing unit, 100...10x21 matrix memory circuit, 101...
Halftone image restoration section, 102... Image area discrimination section, 105... Adjacent state discrimination section, 106... Dither judgment section, 107... 5x11 matrix memory circuit, 108... Judgment data generation section, 109... Edge region discrimination section, 110 ...Smoothing amount calculation section, 111... Edge enhancement amount calculation section, 112... Restored data calculation section, 113... Window calculation section, 114... Discrimination data signal generation section, 207... Comparison selector, 209, 210... OR gate.

Claims (1)

[Claims] Claim 1: An input binary image including binary image data binarized with pseudo halftones and binary image data binarized with non-halftones using a predetermined threshold. Based on the binary image data corresponding to a predetermined area including the pixel of interest and a plurality of surrounding pixels of the data, two pseudo halftones are generated for each pixel of the input binary image data. image area discriminating means for discriminating whether the area is a value image data area or a non-halftone binary image data area; and the image area discriminating means determines whether the area is a pseudo halftone binary image data area. and a restoring means for restoring the determined binary image data into multivalued image data. An edge enhancement means that performs edge enhancement processing to emphasize the density difference between the pixel of interest and its surrounding pixels, and a binary image in which the binary image data of the pixel of interest is binarized in a pseudo halftone by a dot concentrated dither method. a dither discriminating means for discriminating whether or not the pixel is data;
An image processing apparatus comprising: prohibition means for prohibiting edge enhancement processing performed by the edge enhancement means on the binary image data of the pixel of interest when it is determined that the image data is value image data.