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JPH0431208B2 - - Google Patents

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Publication number
JPH0431208B2
JPH0431208B2 JP2479285A JP2479285A JPH0431208B2 JP H0431208 B2 JPH0431208 B2 JP H0431208B2 JP 2479285 A JP2479285 A JP 2479285A JP 2479285 A JP2479285 A JP 2479285A JP H0431208 B2 JPH0431208 B2 JP H0431208B2
Authority
JP
Japan
Prior art keywords
signal
circuit
stereo
frequency
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2479285A
Other languages
Japanese (ja)
Other versions
JPS61184940A (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2479285A priority Critical patent/JPS61184940A/en
Priority to KR1019860000642A priority patent/KR900005891B1/en
Priority to CA000501507A priority patent/CA1294003C/en
Priority to EP86101769A priority patent/EP0191472B1/en
Priority to DE8686101769T priority patent/DE3688338T2/en
Priority to US06/828,855 priority patent/US4707856A/en
Publication of JPS61184940A publication Critical patent/JPS61184940A/en
Publication of JPH0431208B2 publication Critical patent/JPH0431208B2/ja
Granted legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H20/00Arrangements for broadcast or for distribution combined with broadcast
    • H04H20/44Arrangements characterised by circuits or components specially adapted for broadcast
    • H04H20/46Arrangements characterised by circuits or components specially adapted for broadcast specially adapted for broadcast systems covered by groups H04H20/53-H04H20/95
    • H04H20/47Arrangements characterised by circuits or components specially adapted for broadcast specially adapted for broadcast systems covered by groups H04H20/53-H04H20/95 specially adapted for stereophonic broadcast systems
    • H04H20/49Arrangements characterised by circuits or components specially adapted for broadcast specially adapted for broadcast systems covered by groups H04H20/53-H04H20/95 specially adapted for stereophonic broadcast systems for AM stereophonic broadcast systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H40/00Arrangements specially adapted for receiving broadcast information
    • H04H40/18Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H40/00Arrangements specially adapted for receiving broadcast information
    • H04H40/18Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving
    • H04H40/45Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving for FM stereophonic broadcast systems receiving

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Stereo-Broadcasting Methods (AREA)

Description

【発明の詳細な説明】 (イ) 産業上の利用分野 本発明はAMステレオ受信機に関するもので、
特にAMステレオ放送信号中に含まれるステレオ
識別信号を正確に判別することが出来るAMステ
レオ受信機に関する。 (ロ) 従来の技術 現在3つのAMステレオ放送方式が提案され、
米国において実施されている。前記AMステレオ
放送方式としては、直交変調型で25Hzの第1識別
信号を含む米国モトローラ社により提案された方
式(第1方式)、ISB(独立側帯)変調型で15Hzの
第2識別信号を含む米国ヘーゼルタイン社により
提案された方式(第2方式)、及び位相変調型で
5Hzの第3識別信号を含む米国マグナボツクス社
により提案された方式(第3方式)があり、周波
数の異る前記第1乃至第3識別信号を検出するこ
とにより、受信回路の自動切換や受信されたAM
ステレオ放送の方式表示を行うことが出来る。し
かして、前記第1乃至第3識別信号の検出は、特
願昭59−100038号に記載されている如く、前記第
1乃至第3識別信号の周波数をそれぞれ中心周波
数とする複数のバンドパスフイルタを用いれば、
簡単に行うことが出来る。第2図は、その様な識
別信号の検出を行う為の検出回路を示すもので、
検波回路1の出力信号中に含まれる識別信号は、
第1乃至第3バンドパスフイルタ2乃至4に印加
され、該第1乃至第3バンドパスフイルタ2乃至
4の出力信号は、それぞれ第1乃至第3検出回路
5乃至7で検出された後第1乃至第3表示器8乃
至10を点灯駆動する。例えば、いま受信機が第
1方式のAMステレオ放送を受信したとすれば、
25Hzの中心周波数を有する第1バンドパスフイル
タ2により第1識別信号が検出され、第1表示器
8が点灯するので、第1方式のAMステレオ放送
を受信していることが表示される。また、受信機
が第2方式のAMステレオ放送を受信したとすれ
ば、15Hzの中心周波数を有する第2バンドパスフ
イルタ3により第2識別信号が検出され、第2表
示器9が点灯し、第2方式のAMステレオ放送を
受信していることが表示される。第3方式のAM
ステレオ放送の受信時も同様の動作が行なわれ、
同様の表示が行なわれる。従つて、第2図の回路
を用いれば、現在受信している放送が如何なる種
類のものであるかを判別することが出来る。 (ハ) 発明が解決しようとする問題点 しかしながら、前記第2図の回路は、IC(集積
回路)化の出来ない複数のバンドパスフイルタを
必要とするので、IC化に不向きであるという欠
点を有する。また、第1乃至第3識別信号の周波
数が近接しているので、誤動作防止の為バンドパ
スフイルタのQを高くしなければならず、前記バ
ンドパスフイルタのQを高くすると、前記バンド
パスフイルタの特性が前記バンドパスフイルタを
構成する素子のバラツキに応じて変化仕易くなる
という欠点があつた。 (ニ) 問題点を解決するための手段 本発明は、上述の点に鑑み成されたもので、
IF信号周波数にロツクするPLL回路と、該PLL
回路から得られる直交同期信号に応じてIF信号
を同期検波する直交同期検波回路と、該直交同期
検波回路の出力信号中に含まれるステレオ識別信
号を通過させるバンドパスフイルタと、該バンド
パスフイルタを通過したステレオ識別信号の周波
数に応じたパルスを発生するパルス発生回路と、
前記PLL回路から得られる信号に基きクロツク
信号を作成するクロツク信号作成回路と、前記パ
ルス発生回路から発生されるパルスに応じて前記
クロツク信号を計数する計数回路と、該計数回路
の計数値に応じて前記ステレオ信号の判別を行う
判別回路とを備える点を特徴とする。 (ホ) 作用 本発明に依れば、放送局から送信される周波数
が正確に規定された放送搬送波に基きクロツク信
号を作成し、該クロツク信号を計数することによ
り、ステレオ識別信号の判別を行つているので、
判別の精度を高めることが出来る。 (ヘ) 実施例 第1図は、本発明の一実施例を示す回路図で、
11はAMステレオ放送信号のIF信号を増幅する
IF増幅回路、12は該IF増幅回路11の出力信
号が印加される位相比較器13と、ループフイル
タ14と、VCO(電圧制御発振器)15と、第1
分周器16とから成るPLL(フエーズロツクドル
ープ)回路、17は前記IF増幅回路11の出力
信号を、前記PLL回路12の第1分周器16の
出力信号(IF信号周波数と周波数が等しく、位
相が90度ずれた信号)により同期検波する直交同
期検波回路、18は該直交同期検波回路17の出
力信号中に含まれるステレオ識別信号を通過させ
るバンドパスフイルタ、19は該バンドパスフイ
ルタ18を通過したステレオ識別信号に応じたパ
ルス巾を有するパルス信号を発生するパルス発生
回路、20は前記PLL回路12の第1分周器1
6の出力信号を分周してクロツク信号を発生する
第2分周器、21は前記パルス発生回路19の出
力パルスの発生期間中前記第2分周器20から得
られるクロツク信号を計数する計数回路、22は
該計数回路21の計数値がどのステレオ識別信号
に対応するかを判別する判別回路、23乃至25
は該判別回路22の出力信号により駆動される第
1乃至第3表示器である。 次に動作を説明する。IF増幅回路11の出力
端に得られる450KHzのIF信号は、直交同期検波
回路17に印加されるとともに、PLL回路12
の位相比較器13に印加される。前記PLL回路
12は、位相比較器13と3.6MHzのフリーラン
周波数を有するVCO15と該フリーラン周波数
を8分周して450Hzの信号を作成する第1分周器
16とを備えているので、前記位相比較器13に
おいて前記IF信号と前記第1分周器16の出力
信号とが比較され、PLL12が前記IF信号にロ
ツクされる。その結果、前記第1分周器16の出
力信号の周波数は、前記IF信号の周波数と等し
くなり、前記出力信号の位相は、前記IF信号の
位相と正確に90度ずれたものとなる。 前記第1分周器16の出力信号は、直交同期検
波回路17に直交同期信号として印加され、IF
信号が前記直交同期検波回路17で検波される。
その為、先に述べた3種類のAMステレオ放送方
式中の第1方式のステレオサブ信号の如く、IF
信号中に含まれる直交変調された信号が前記直交
同期検波回路17で復調され、出力端子26から
後段に伝送される。前記復調された信号は、後段
においてステレオ復調を行う為に用いられる。前
記直交同期検波回路17において、直交同期信号
によりIF信号が同期検波されると、ステレオ識
別信号も同期検波される。そして、前記ステレオ
識別信号は、バンドパスフイルタ18を通過し、
パルス発生回路19に印加される。前記パルス発
生回路19は、前記ステレオ識別信号の零クロス
点を検出し、矩形波信号に変換する変換回路、該
変換回路の出力パルスを2分周する第1分周回
路、及び該第1分周回路の出力パルスを更に2分
周する第2分周回路を含んでおり、出力端に前記
ステレオ識別信号の周波数の1/4の周波数の矩形
パルスを発生させる。第3図は、前記パルス発生
回路19の入力信号と出力信号との関係を示す波
形図で、第3図イはバンドパスフイルタ18を通
過したステレオ識別信号、第3図ロは前記変換回
路の出力信号、第3図ハは前記第1分周回路の出
力信号、及び第3図ニは前記第2分周回路の出力
信号である。 PLL回路12の第1分周器16から得られる
450KHzの信号は、第2分周器20により220Hzの
クロツク信号に分周される。そして、前記クロツ
ク信号は、計数回路21に被計数信号として入力
されるので、前記計数回路21は、前記パルス発
生回路19から前記計数回路21に印加されるス
テレオ識別信号に応じた信号が「H」になつたと
きクロツク信号の計数動作を開始し、「L」にな
つたとき計数動作を停止する。従つて、前記パル
ス発生回路19から「H」の出力信号が発生して
いる期間、前記計数回路21がクロツク信号の計
数を行うことになる。パルス発生回路19の出力
パルスが「L」になり、計数回路21の計数動作
が停止すると、前記計数回路21の計数値が判別
回路22に入力され、判別動作が開始される。前
記判別動作は、あらかじめ各ステレオ識別信号に
対応するデジタルデータを判別回路22内に記憶
しておき、前記各デジタルデータと計数回路21
の計数値とを比較することにより行なわれる。ま
た、前記判別動作は、計数回路21から判別回路
22に入力されるデータの各ビツトの状態を論理
演算し、所定値になつたとき所定の出力端子に出
力信号を発生させる様にしてもよい。 判別動作により、ステレオ識別信号が第1識別
信号であると判別されると、第1表示器23が点
灯し、第1方式のAMステレオ放送を受信してい
ることを表示する。同様に、第2もしくは第3識
別信号が判別されると、第2もしくは第3表示器
24もしくは25が点灯し、第2もしくは第3方
式のAMステレオ放送の受信が表示される。尚、
前記判別回路22の出力信号は、表示用以外に、
受信方式に適した諸回路の自動回路切換、ステレ
オ・モノラル切換等様々な用途に利用出来る。 第2分周器20の出力クロツク信号の周波数
は、220Hzであり、パルス発生回路の出力信号周
波数は、ステレオ識別信号の周波数の1/4である
から、25Hzの第1識別信号の検出時には計数回路
21が17.6個のクロツクパルスを計数し、15
Hzの第2識別信号の場合は28.6個、5Hzの第
3識別信号の場合は88個のクロツクパルスをそれ
ぞれ計数する。尚、各識別信号の周波数が十分に
離間しているので、計数値に十分な許容度を持た
せることが出来、実施例においては16〜20個のク
ロツク信号を計数したとき第1識別信号と見做
し、27〜33個のクロツク信号を計数したとき第2
識別信号と見做し、80〜98個のクロツク信号を計
数したとき第3識別信号と見做している。 (ト) 発明の効果 以上述べた如く、本発明に依れば、AMステレ
オ放送の放送方式を自動的に判別するAMステレ
オ受信機を提供出来る。また本発明に依れば、正
確な周波数となるIF信号を基にクロツク信号を
作成し、該クロツク信号を計数して放送方式の判
別を行つているので、格別の発振器を用いること
無く正確な判別を行うことが出来る。更に本発明
に依れば、AMステレオ受信機に本来必要なIF信
号にロツクするPLL回路からクロツク信号を得
るとともに、直交同期検波回路からステレオ識別
信号を得ているので、回路構成の簡略化が計れ、
IC化に適したAMステレオ受信機が提供出来る。
[Detailed description of the invention] (a) Industrial application field The present invention relates to an AM stereo receiver,
In particular, the present invention relates to an AM stereo receiver that can accurately discriminate a stereo identification signal included in an AM stereo broadcast signal. (b) Conventional technology Currently, three AM stereo broadcasting systems have been proposed.
Implemented in the United States. The AM stereo broadcasting system includes a method (first method) proposed by Motorola of the United States that is a quadrature modulation type and includes a 25Hz first identification signal, and an ISB (independent side band) modulation type that includes a 15Hz second identification signal. There is a method (second method) proposed by Hazeltine, Inc. of the United States, and a method (third method) proposed by Magnabox, Inc. of the United States, which is a phase modulation type and includes a third identification signal of 5 Hz. By detecting the first to third identification signals, automatic switching of the receiving circuit and received AM
It is possible to display the stereo broadcast system. As described in Japanese Patent Application No. 59-100038, the detection of the first to third identification signals is performed using a plurality of bandpass filters whose center frequencies are respectively the frequencies of the first to third identification signals. If you use
It's easy to do. Figure 2 shows a detection circuit for detecting such an identification signal.
The identification signal included in the output signal of the detection circuit 1 is
The output signals of the first to third band pass filters 2 to 4 are applied to the first to third band pass filters 2 to 4, and are detected by the first to third detection circuits 5 to 7, respectively. The third display devices 8 to 10 are driven to turn on. For example, if the receiver is now receiving AM stereo broadcast of the first method,
The first identification signal is detected by the first band pass filter 2 having a center frequency of 25 Hz, and the first indicator 8 lights up, indicating that the first system AM stereo broadcast is being received. Furthermore, if the receiver receives AM stereo broadcasting of the second system, the second identification signal is detected by the second bandpass filter 3 having a center frequency of 15Hz, the second indicator 9 lights up, and the It will be displayed that you are receiving two types of AM stereo broadcasts. Third method AM
A similar operation is performed when receiving stereo broadcasts,
A similar display will be made. Therefore, by using the circuit shown in FIG. 2, it is possible to determine what type of broadcast is currently being received. (c) Problems to be Solved by the Invention However, the circuit shown in FIG. 2 requires multiple bandpass filters that cannot be integrated into an IC (integrated circuit). have Furthermore, since the frequencies of the first to third identification signals are close to each other, it is necessary to increase the Q of the band pass filter to prevent malfunction. A drawback is that the characteristics tend to change depending on variations in the elements constituting the bandpass filter. (d) Means for solving the problems The present invention has been made in view of the above points.
A PLL circuit that locks to the IF signal frequency and the PLL
A quadrature synchronous detection circuit that synchronously detects an IF signal in accordance with an orthogonal synchronous signal obtained from the circuit; a bandpass filter that passes a stereo identification signal included in the output signal of the orthogonal synchronous detection circuit; a pulse generation circuit that generates a pulse according to the frequency of the stereo identification signal that has passed;
a clock signal generation circuit that generates a clock signal based on the signal obtained from the PLL circuit; a counting circuit that counts the clock signal according to the pulses generated from the pulse generation circuit; and a discrimination circuit for discriminating the stereo signal. (E) Effect According to the present invention, a clock signal is created based on a broadcast carrier wave whose frequency is accurately specified to be transmitted from a broadcast station, and the stereo identification signal is determined by counting the clock signal. Because it is on,
The accuracy of discrimination can be improved. (F) Embodiment FIG. 1 is a circuit diagram showing an embodiment of the present invention.
11 amplifies the IF signal of the AM stereo broadcast signal
The IF amplifier circuit 12 includes a phase comparator 13 to which the output signal of the IF amplifier circuit 11 is applied, a loop filter 14, a VCO (voltage controlled oscillator) 15, and a first
A PLL (phase locked loop) circuit 17 includes a frequency divider 16 and a PLL (phase locked loop) circuit 17 which converts the output signal of the IF amplifier circuit 11 into the output signal of the first frequency divider 16 of the PLL circuit 12 (which has a frequency equal to the IF signal frequency). , a signal whose phase is shifted by 90 degrees), 18 is a bandpass filter that passes the stereo identification signal included in the output signal of the orthogonal synchronous detection circuit 17, and 19 is the bandpass filter 18. 20 is a first frequency divider 1 of the PLL circuit 12 ;
21 is a counter that counts the clock signal obtained from the second frequency divider 20 during the output pulse generation period of the pulse generating circuit 19; A circuit 22 is a discrimination circuit 23 to 25 that discriminates which stereo identification signal the count value of the counting circuit 21 corresponds to.
are the first to third display devices driven by the output signal of the discrimination circuit 22. Next, the operation will be explained. The 450KHz IF signal obtained at the output end of the IF amplifier circuit 11 is applied to the quadrature synchronous detection circuit 17 and also to the PLL circuit 12.
is applied to the phase comparator 13 of . The PLL circuit 12 includes a phase comparator 13, a VCO 15 having a free run frequency of 3.6 MHz, and a first frequency divider 16 that divides the free run frequency by 8 to create a 450 Hz signal. In the phase comparator 13, the IF signal and the output signal of the first frequency divider 16 are compared, and the PLL 12 is locked to the IF signal. As a result, the frequency of the output signal of the first frequency divider 16 becomes equal to the frequency of the IF signal, and the phase of the output signal is exactly 90 degrees out of phase with the IF signal. The output signal of the first frequency divider 16 is applied to the orthogonal synchronous detection circuit 17 as an orthogonal synchronous signal, and the IF
The signal is detected by the orthogonal synchronous detection circuit 17.
Therefore, like the stereo sub signal of the first method of the three types of AM stereo broadcasting methods mentioned above, the IF
The orthogonally modulated signal contained in the signal is demodulated by the orthogonal synchronous detection circuit 17 and transmitted from the output terminal 26 to the subsequent stage. The demodulated signal is used for stereo demodulation in the subsequent stage. In the orthogonal synchronous detection circuit 17, when the IF signal is synchronously detected by the orthogonal synchronous signal, the stereo identification signal is also synchronously detected. Then, the stereo identification signal passes through a bandpass filter 18,
It is applied to the pulse generation circuit 19. The pulse generation circuit 19 includes a conversion circuit that detects the zero crossing point of the stereo identification signal and converts it into a rectangular wave signal, a first frequency division circuit that divides the output pulse of the conversion circuit into two, and a first frequency division circuit that divides the output pulse of the conversion circuit into a rectangular wave signal. It includes a second frequency dividing circuit that further divides the frequency of the output pulse of the frequency circuit by two, and generates a rectangular pulse having a frequency of 1/4 of the frequency of the stereo identification signal at the output terminal. FIG. 3 is a waveform diagram showing the relationship between the input signal and the output signal of the pulse generating circuit 19. FIG. Output signals; FIG. 3C is the output signal of the first frequency divider circuit, and FIG. 3D is the output signal of the second frequency divider circuit. obtained from the first frequency divider 16 of the PLL circuit 12
The 450 KHz signal is divided by the second frequency divider 20 into a 220 Hz clock signal. Since the clock signal is input as a signal to be counted to the counting circuit 21, the counting circuit 21 receives a signal corresponding to the stereo identification signal applied from the pulse generating circuit 19 to the counting circuit 21. When the clock signal becomes "L", the counting operation of the clock signal is started, and when the clock signal becomes "L", the counting operation is stopped. Therefore, during the period when the pulse generating circuit 19 is generating an "H" output signal, the counting circuit 21 counts the clock signals. When the output pulse of the pulse generating circuit 19 becomes "L" and the counting operation of the counting circuit 21 is stopped, the count value of the counting circuit 21 is inputted to the discriminating circuit 22, and the discriminating operation is started. In the discrimination operation, digital data corresponding to each stereo identification signal is stored in advance in the discrimination circuit 22, and each digital data and the counting circuit 21 are
This is done by comparing the counted value of Further, the discrimination operation may be performed by performing a logical operation on the state of each bit of data inputted from the counting circuit 21 to the discrimination circuit 22, and generating an output signal at a predetermined output terminal when a predetermined value is reached. . When the stereo identification signal is determined to be the first identification signal through the determination operation, the first indicator 23 lights up to indicate that AM stereo broadcasting of the first system is being received. Similarly, when the second or third identification signal is determined, the second or third indicator 24 or 25 lights up to display reception of AM stereo broadcasting of the second or third system. still,
The output signal of the discrimination circuit 22 is used not only for display purposes but also for
It can be used for various purposes such as automatic circuit switching of various circuits suitable for the reception method, stereo/monaural switching, etc. The frequency of the output clock signal of the second frequency divider 20 is 220Hz, and the output signal frequency of the pulse generation circuit is 1/4 of the frequency of the stereo identification signal, so when the first identification signal of 25Hz is detected, counting is performed. Circuit 21 counts 17.6 clock pulses and 15
28.6 clock pulses are counted for the second identification signal of Hz, and 88 clock pulses are counted for the third identification signal of 5 Hz. In addition, since the frequencies of each identification signal are sufficiently spaced apart, sufficient tolerance can be given to the counted value, and in the embodiment, when 16 to 20 clock signals are counted, the first identification signal and When counting 27 to 33 clock signals, the second
It is regarded as an identification signal, and when 80 to 98 clock signals are counted, it is regarded as a third identification signal. (G) Effects of the Invention As described above, according to the present invention, it is possible to provide an AM stereo receiver that automatically determines the broadcasting system of AM stereo broadcasting. Furthermore, according to the present invention, a clock signal is created based on an IF signal with an accurate frequency, and the broadcasting system is determined by counting the clock signal. It is possible to make a judgment. Furthermore, according to the present invention, the clock signal is obtained from the PLL circuit that locks to the IF signal originally required for the AM stereo receiver, and the stereo identification signal is obtained from the quadrature synchronous detection circuit, so the circuit configuration can be simplified. Measure,
We can provide an AM stereo receiver suitable for IC.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の一実施例を示す回路図、第
2図は従来のAMステレオ受信機の識別信号検出
回路を示す回路図、及び第3図イ乃至ニは第1図
のパルス発生回路を説明する為の波形図である。 主な図番の説明、12…PLL回路、16…第
1分周器、17…直交同期検波回路、19…パル
ス発生回路、20…第2分周器、21…計数回
路、22…判別回路。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing an identification signal detection circuit of a conventional AM stereo receiver, and FIGS. It is a waveform diagram for explaining a circuit. Explanation of main figure numbers, 12 ... PLL circuit, 16... First frequency divider, 17... Quadrature synchronous detection circuit, 19... Pulse generation circuit, 20... Second frequency divider, 21... Counting circuit, 22... Discrimination circuit .

Claims (1)

【特許請求の範囲】[Claims] 1 AMステレオ放送を受信し得るAMステレオ
受信機であつて、受信されたAMステレオ放送信
号のIF信号周波数にロツクするPLL回路と、該
PLL回路から得られる直交同期信号に応じてIF
信号を同期検波する直交同期検波回路と、該直交
同期検波回路の出力信号中に含まれるステレオ識
別信号を通過させるバンドパスフイルタと、該バ
ンドパスフイルタを通過したステレオ識別信号を
分周して出力パルスを発生するパルス発生回路
と、前記PLL回路から得られる信号を分周して
クロツク信号を作成するクロツク信号作成回路
と、前記パルス発生回路から発生されるパルスに
応じて前記クロツク信号を計数する計数回路と、
該計数回路の計数値に応じて前記ステレオ識別信
号の判別を行う判別回路とを備えるAMステレオ
受信機。
1 An AM stereo receiver capable of receiving AM stereo broadcasts, which includes a PLL circuit that locks to the IF signal frequency of the received AM stereo broadcast signal, and
IF according to the orthogonal synchronization signal obtained from the PLL circuit.
A quadrature synchronous detection circuit that synchronously detects a signal, a bandpass filter that passes a stereo identification signal included in the output signal of the orthogonal synchronous detection circuit, and a frequency-divided and output stereo identification signal that has passed through the bandpass filter. A pulse generation circuit that generates pulses, a clock signal generation circuit that divides the frequency of the signal obtained from the PLL circuit to generate a clock signal, and counts the clock signal according to the pulses generated from the pulse generation circuit. a counting circuit;
and a discrimination circuit that discriminates the stereo identification signal according to the count value of the counting circuit.
JP2479285A 1985-02-12 1985-02-12 Am stereo receiver Granted JPS61184940A (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2479285A JPS61184940A (en) 1985-02-12 1985-02-12 Am stereo receiver
KR1019860000642A KR900005891B1 (en) 1985-02-12 1986-01-31 A.m stereo receiver
CA000501507A CA1294003C (en) 1985-02-12 1986-02-10 Am stereo receiver
EP86101769A EP0191472B1 (en) 1985-02-12 1986-02-12 Am stereo receiver
DE8686101769T DE3688338T2 (en) 1985-02-12 1986-02-12 AM STEREO RECEIVER.
US06/828,855 US4707856A (en) 1985-02-12 1986-02-12 AM stereo receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2479285A JPS61184940A (en) 1985-02-12 1985-02-12 Am stereo receiver

Publications (2)

Publication Number Publication Date
JPS61184940A JPS61184940A (en) 1986-08-18
JPH0431208B2 true JPH0431208B2 (en) 1992-05-25

Family

ID=12148037

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2479285A Granted JPS61184940A (en) 1985-02-12 1985-02-12 Am stereo receiver

Country Status (1)

Country Link
JP (1) JPS61184940A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4878970B2 (en) * 2006-09-21 2012-02-15 理研機器株式会社 High pressure gauge

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60233950A (en) * 1984-05-04 1985-11-20 Matsushita Electric Ind Co Ltd System discriminating device in am stereo receiver

Also Published As

Publication number Publication date
JPS61184940A (en) 1986-08-18

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