JPH04287335A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device wherein wirings of a plurality of semiconductor elements accommodated in a package can be formed as perfectly as possible in the same package, and further the space can be reduced. CONSTITUTION:An IC chip 12b is fixed to the nearly central part of an IC chip 12a by using material 24 for fixing. An electrode 22a of the IC chip 12a is connected with a lead wire 16a via a bump. Each electrode 22b of the IC chip 12b is connected with a pad 26b1 of a lead wire 16b and a pad 26c of a lead 16c for internal connection by using bonding wires 18.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a semiconductor element, such as an IC chip, is mounted on a film carrier.

0002

[Prior art] TAB (Tape Automated
Bonding technology is one of the IC chip mounting technologies, and has features such as being able to form leads with a larger number of pins and a narrower pitch than other mounting technologies, and being able to perform high-speed automatic bonding with a face-up method. be. For this reason, TAB technology has attracted particular attention in recent years.

[0003] TAB tape is a tape in which one or more IC chips are mounted on a film on which leads are formed. Some leads are drawn out of the package for connection to a mounting board, while others are routed inside the package to connect IC chips or between IC chips. To join these leads to an IC chip, normally, bumps are transferred to the lead tips of a film carrier in advance, and then the leads and IC are bonded via the bumps.
A transfer bump method is used in which the electrodes of the C chip are bonded by applying pressure and heat. After electrical tests and the like are performed on the IC chip, the IC chip is sealed with resin to improve reliability.

0004

[Problem to be Solved by the Invention] By the way, when a plurality of IC chips are mounted in the same film carrier,
When connecting chips to each other, it may be necessary to cross one lead with another lead due to circuit design. However, it is not possible to perform such cross wiring using leads formed on a film, and therefore, when it is necessary to cross the lead connections, the wiring is performed outside the package. For this reason, in conventional semiconductor devices in which a plurality of IC chips are mounted within the same film carrier, this cross wiring has been an obstacle to reducing the mounting area.

[0005] Also, a plurality of I
In conventional semiconductor devices, when C chips are mounted, the mounting area becomes larger depending on the number of mounted IC chips compared to when one IC chip is mounted, but even in this case, the mounting area can be reduced. It is requested that these efforts be made.

The present invention has been made based on the above-mentioned circumstances, and it is an object of the present invention to enable wiring of a plurality of semiconductor elements housed in one package to be performed within the same package as much as possible, and to save space. The purpose of this invention is to provide a semiconductor device that can perform the following steps.

[0007]

[Means for Solving the Problems] A semiconductor device according to the present invention for achieving the above object includes a first semiconductor element mounted on a film on which leads are formed, and a first semiconductor element mounted on a film on which leads are formed. The device is characterized in that it comprises one or more mounted second semiconductor elements, and that the second semiconductor elements are wired using conductive wires. Also,
Preferably, the wire is coated with an insulator.

[0008]

[Operation] According to the present invention, one or more second semiconductor elements are placed on the first semiconductor element with the above-described configuration,
By connecting the electrodes of the second semiconductor element and the leads or electrodes of the first semiconductor element using conductive wires, it is possible to perform cross wiring within the same package. Space saving can be achieved. In addition, by covering the wire with an insulator,
Even if wires and leads or wires come into contact with each other, there will be no short circuit.

[0009]

[Embodiment] A first embodiment of the present invention will be described below with reference to FIGS. 1 to 3.
Explain with reference to. FIG. 1 is a schematic plan view of a semiconductor device according to a first embodiment of the present invention, and FIG. 2 is an A-A diagram of the semiconductor device.
FIG. 3 is a schematic cross-sectional view taken in the direction of arrow A. FIG. 3 is a schematic cross-sectional view showing a state in which two sets of IC chips of the semiconductor device are resin-sealed as one package.

The semiconductor device shown in FIGS. 1 and 2 includes two IC chips 12a and 12b, a film carrier having leads 16 formed on a film 14, and a bonding wire 18 covered with an insulator. It is something. I
The C chips 12a and 12b are formed into a substantially square shape, and electrodes 22 are formed at the edge portions of their surfaces. IC
The chip 12b is smaller than the IC chip 12a, and is fixed to the approximate center of the IC chip 12a by a fixing member 24. A device hole and an outer lead hole (not shown) are formed in the film 14. The device hole is an opening provided at a position where the IC chips 12a, 12b are placed, and the outer lead hole is an opening provided for cutting the outer lead. film 1
For the material No. 4, polyimide having good heat resistance and stretch resistance is used.

The leads 16 are lead leads 16a, 16 pulled out from the package to connect to the mounting board.
b, and an internal connection lead 16c for connecting between the IC chips 12a and 12b. Drawer lead 16a
is connected to the electrode 22a of the IC chip 12a, and the extraction lead 16b is connected to the electrode 22b of the IC chip 12b. One end of the extraction lead 16a and the internal connection lead 16c is formed to protrude into the device hole, and pads 26a and 26c are provided at the other end. In addition, pads 26b1 are provided at two locations on the lead 16b.
, 26b2 are provided. Pad 26a of extraction lead 16a and pad 26b2 of extraction lead 16b
is a test pad for electrical testing, while the pad 26b1 of the lead 16b and the internal connection lead 16c
The pad 26c is for connection with the bonding wire 18.

In this embodiment, the electrode 2 of the IC chip 12a
A so-called transfer bump method is used to join the lead 2a and the lead 16a. That is, after a bump (not shown) is transferred to the tip of the extraction lead 16a, the lead and the electrode 22a of the IC chip 12a are bonded via the bump by applying pressure and heating. Incidentally, as shown in FIG. 2, the IC chip 12a is bonded to the lower surface of the extraction lead 16a.

On the other hand, the IC chip 12b is similar to the IC chip 1.
2a, it is not possible to directly connect the electrodes 22b of the IC chip 12b and the leads on the film via the bumps. The IC chip 12b has its respective electrodes 22b and pads 26b1 of the extraction leads 16b.
and the pad 26c of the internal connection lead 16c are connected using the bonding wire 18. In this way, the wiring of the IC chip 12b is connected to the bonding wire 18.
By using this method, even if cross wiring occurs due to circuit design, IC chips can be wired within the same package.

The semiconductor device shown in FIG. 3 includes two IC chips 12a and 12b shown in FIGS. 1 and 2 in the same package.
They are arranged in pairs and sealed with resin 28. By resin sealing in this manner, high reliability can be maintained without impairing the electrical characteristics of the manufactured semiconductor device. Note that the same transfer mold as the conventional one can be used for resin-sealing the IC chip. Conventional molds have sufficiently deep cavities, so even if two layers of IC chips are stacked and wire-bonded, as in the semiconductor device of this example, they are held together by the mold, the resin can be removed with enough room. Can be sealed.

In the semiconductor device of this embodiment, cross wiring within the same package is possible by connecting multiple IC chips mounted within the same package using not only leads but also bonding wires. . Furthermore, by stacking two IC chips and mounting them on a film carrier as described above, the package size can be reduced, so the mounting area can be reduced when mounting on a board. Moreover, since the bonding wire is coated with an insulator, even if the lead and the bonding wire come into contact with each other, or even if the bonding wires come into contact with each other, a short circuit will not occur.

Next, a second embodiment of the present invention is shown in FIGS. 4 and 5.
Explain with reference to. FIG. 4 is a schematic plan view of a semiconductor device according to a second embodiment of the present invention, and FIG. 5 is a B-
It is a schematic sectional view taken in the direction of arrow B. In the second embodiment, the first
Components having the same functions as those in the embodiment are given the same reference numerals, and detailed explanation thereof will be omitted.

In the semiconductor device shown in FIGS. 4 and 5, no device hole is formed in the film 14. Instead, a lead joining hole 32 is formed in a portion corresponding to the electrode of the IC chip 12a in order to join the electrode 22a of the IC chip 12a and the extraction lead 16a. The lead 16b passes through the upper part of the lead bonding hole 32 and is extended to the film 14a interposed between the IC chips. IC chip 12b is IC chip 12a
It is fixed to the upper film 14a by a fixing member 24, and the electrode 22b of the IC chip 12b and the extraction lead 16 are fixed to the upper film 14a.
b and the internal connection lead 16c are connected using a bonding wire 18 as in the first embodiment.

In the semiconductor device of the second embodiment, two ICs
Since the film is interposed between the chips, it is possible to prevent the heat generated by each IC chip from being applied to each other. Further, since the lead 16b is extended to the film interposed between the IC chips, the bonding wire used to connect the electrode of the IC chip and the lead, such as an expensive gold wire, can be short. Other effects are similar to those of the first embodiment.

In each of the above embodiments, the case where one IC chip is placed on the IC chip has been explained, but the present invention is not limited to this, and two or more IC chips are placed on the IC chip. Three or more IC chips may be arranged.

For example, the semiconductor device shown in FIG.
Two IC chips 12a1 and 12a2 are fixed side by side on the chip 12a by a fixing member 24. The IC chips 12a1 and 12a2 are connected using bonding wires 18. Further, in the semiconductor device shown in FIG. 7, an IC is mounted on the IC chip 12a by a fixing member 26.
The chips 12b are stacked and fixed, and further, the IC chip 12c is stacked on top of the IC chip 12b. The IC chips 12b and 12c are connected using bonding wires 18.

Furthermore, in each of the above embodiments, when connecting two IC chips, the electrode of one IC chip and the internal connection lead are connected with a bonding wire, but the present invention However, the present invention is not limited to this, and the electrodes between two IC chips may be directly connected with bonding wires without forming internal connection leads.

[0022]

As explained above, according to the present invention, one or more second semiconductor elements are placed on a first semiconductor element, and the connection of the second semiconductor elements is made conductive. By using wires of A semiconductor device that can reduce the mounting area when mounted on a substrate can be provided.

[Brief explanation of the drawing]

FIG. 1 is a schematic plan view of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view taken along the line A-A of the semiconductor device.

FIG. 3 is a schematic cross-sectional view showing how two sets of IC chips of the semiconductor device are resin-sealed as one package.

FIG. 4 is a schematic plan view of a semiconductor device according to a second embodiment of the present invention.

FIG. 5 is a schematic cross-sectional view taken along the line BB of the semiconductor device.

FIG. 6 is a schematic plan view of a semiconductor device according to a first modification of the present invention.

FIG. 7 is a schematic cross-sectional view of a semiconductor device according to a second modification of the present invention.

[Explanation of symbols]

12a, 12b IC chip 14 Film 16 Lead 16a, 16b Drawer lead 16c Internal connection lead 18 Bonding wire 22 Electrode 24 Fixed material 26 Pad 28 Sealing resin 32 Lead connection hole

Claims (2)

[Claims] 1. A semiconductor device comprising: a first semiconductor element mounted on a film on which leads are formed; and one or more second semiconductor elements mounted on the first semiconductor element; A semiconductor device characterized in that the second semiconductor element is wired using a conductive wire. 2. The semiconductor device according to claim 1, wherein the wire is coated with an insulator.