JPH04285994A - Liquid crystal display device, and manufacture and inspection thereof - Google Patents

Abstract

PURPOSE:To detect the defect of a thin film transistor (TFT) before an assembling process of a liquid crystal display device by short-circuiting a drain electrode of the TFT in a manufacturing process, and applying voltage data to the short-circuited drain electrode. CONSTITUTION:On the way of a manufacturing process, a drain electrode of a TFT is short-circuited by a short circuit line 12a, voltage data is applied to its drain electrode, and the TFT having a defect is detected by current data or voltage data which flows in a source signal line 9 or a gate signal line 5. For instance, in the case there is a leak between a gate and a drain of the TFT and when the capacity leaks, a current flows through the gate signal line 5, therefore, it is detected by an ammeter or a voltmeter connected to a gate signal output pad. Also, in the case there is a leak between the source and the drain of the TFT, the current flows through the source signal line 9 therefore, it is detected by an ammeter or a voltmeter connected to a source signal output pad.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device that can be used as a display device for a laptop personal computer or a viewfinder for a video integrated camera, a method for manufacturing the same, and a method for inspecting the same.

0002

[Prior Art] In recent years, liquid crystal display devices have been developed to have features such as being lightweight, thin, low power consumption, and low cost.
Instead of a display device, it is used as a display device for laptop computers that require small size, light weight, and flatness, or video cameras.

[0003]Thin Film Transistor
In active matrix liquid crystal display devices that drive liquid crystal using transistors (hereinafter referred to as TFTs), it is difficult to detect image defects caused by defects in TFTs provided in each display pixel section during the manufacturing process.
Therefore, after completing the manufacturing process as a liquid crystal display device through an assembly process, it was inspected by displaying an image.

0004

[Problems to be Solved by the Invention] However, with the above-mentioned liquid crystal display device and its manufacturing method and inspection method, liquid crystal display devices containing defective TFTs are manufactured, which causes a decrease in yield and an increase in manufacturing costs. .

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a liquid crystal display device, a method for manufacturing the same, and a method for inspecting the same, in which defects in TFTs can be detected before the assembly process.

[0006]

[Means for Solving the Problems] In order to achieve the above object, the present invention provides a T
This configuration detects defects in the TFT by short-circuiting the drain electrodes of the FT, applying voltage data to the short-circuited drain electrodes, and inspecting the current data or voltage data flowing through the source signal line or gate signal line.

[0007] Furthermore, the present invention has a structure that includes a built-in test circuit to realize a reduction in TFT test costs, and has means for replacing defective TFTs with field effect transistors constituting the test circuit in order to provide redundancy.

[0008]

[Operation] With this configuration, it is possible to detect defects in the TFT before the assembly process of the liquid crystal display device. Furthermore, defects can be repaired. As a result, assembly yield can be improved and manufacturing costs can be reduced, and a highly reliable liquid crystal display device can be manufactured.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

1 to 15 are step-by-step cross-sectional views of essential parts for explaining one embodiment of the method for manufacturing a liquid crystal display device of the present invention, and FIG. 16 is a pixel of a liquid crystal display device manufactured by this embodiment. FIG. 17 is an equivalent circuit diagram of the liquid crystal display device manufactured in this example. Further, FIG. 18 is an equivalent circuit diagram in the middle of the manufacturing process for explaining one embodiment of the inspection method for a liquid crystal display device of the present invention, and FIG. 19 is a principal part plan view for explaining the equivalent circuit diagram of FIG. 18. be. Further, FIG. 20 shows an equivalent circuit configuration diagram for explaining a liquid crystal display device according to an embodiment of the third aspect of the present invention, and FIG. 7 shows a liquid crystal display device according to an embodiment of the fourth aspect of the present invention. An equivalent circuit configuration diagram is shown for explaining.

In FIGS. 1 to 21, 1 is a quartz substrate; 2 is a quartz substrate;
is a transistor region, 2s is a source region, 2d is a drain region, 2i is a channel region, 3 is a gate oxide film, 3a
is a thermally oxidized silicon layer, 4 is a gate electrode, 5 is a gate signal line, 5p is a gate signal output pad, 6 is an interlayer insulating film, 7
is the source contact, 7W is the source contact window, 8
is the drain contact, 8W is the drain contact window, 9 is the source signal line, 9p is the source signal output pad, 1
0 is a bonding pad, 11 is an antioxidant film, 12 is a contact film, 12a is a short line, 12p is a signal input pad, 13 is a pixel electrode, 14 is a protective film, 15 is a liquid crystal alignment film, 16 is a top glass plate, 17 is the common electrode, 18 is the second
19 is a spacer, 20 is a liquid crystal, 21 is a pixel portion, 22 is a vertical scanning circuit, 23 is a horizontal scanning circuit, 24
is a vertical test circuit, 24H is a HI power input pad for vertical test, 24L is a LO power input pad for vertical test, 24p is a vertical test output pad, 25 is a horizontal test circuit, 25H is a HI power input pad for horizontal test, 25L is a LO for horizontal inspection
A power supply input pad 25p is a horizontal inspection output pad and a connection line 26.

First, as shown in FIG.
A polysilicon layer having a thickness of about 0.2 μm is formed using a photoresist (photoresist) device, and a transistor region 2 is formed using a plasma etching device using a photoresist as a mask.

Next, as shown in FIG. 2, a thermally oxidized silicon layer 3a having a thickness of approximately 0.1 μm is formed by thermal oxidation, and then a thermally oxidized silicon layer 3a having a thickness of approximately 0.1 μm is formed using a low-pressure CVD apparatus as shown in FIG. A polysilicon layer of approximately 3 μm is formed, and using a photoresist as a mask, a plasma etching device is used to form the gate electrode 4, the gate signal line 5 shown in FIG. 17, and the gate signal line 5 shown in FIG.
A gate signal output pad 5p shown in is formed.

Next, as shown in FIG. 4, using a photoresist as a mask, the thermally oxidized silicon layer 3a except under the gate electrode 4 is removed using a reactive ion etching device to form a gate oxide film 3.

Then, as shown in FIG. 5, P+ or A is formed on the transistor region 2 using a photoresist as a mask.
S+ ions are implanted to form an n+ region source region 2s, drain region 2d, and channel region 2i.

After that, as shown in FIG. 6, NSG (Non-doped
An interlayer insulating film 6 having a source contact window 7W and a drain contact window 8W is formed using a reactive ion etching apparatus using a photoresist as a mask.

Next, as shown in FIG. 7, an Al-Si alloy layer with a thickness of about 1 μm is formed using a DC bias sputtering device, and a source contact 7 and a drain contact 8 are formed using a wet etching device using a photoresist as a mask. At the same time as forming source signal line 9, source signal output pad 9p shown in FIG. 18 and bonding pad 10 shown in FIG. 17 are formed.

As the pixel electrode 13, for example, I
Since an oxide film such as TO (Indium Tin Oxide) is used, in order to prevent the Al-Si alloy from being oxidized when forming the oxide film, as shown in FIG. After forming a silicon nitride layer with a thickness of about 0.2 μm, an anti-oxidation film 11 is formed using a wet etching device using a photoresist as a mask.

With such a CMOS process, FIG.
A thin film transistor portion in the pixel portion 21, a vertical scanning circuit 22, and a horizontal scanning circuit 23 as shown in 7 are formed, and the TFT process is completed.

After this, the pixel electrode process begins, and as shown in FIG. 9, a metal that is difficult to oxidize, such as a Cr film or a Ni film, is sputtered to a thickness of 0.2 μm using a high frequency magnetron sputtering device.
After this, a short line 12a and a signal input pad 12p shown in FIG. 18 are formed using a wet etching apparatus using a photoresist as a mask so as to short-circuit the drain electrodes of all pixels. Further, a plan view of the main part is shown in FIG.

In this state, the TFT is inspected. That is, the inspection method of the present invention can be implemented.

Referring to FIGS. 18 and 19, the second aspect of the present invention
To explain one embodiment of the invention, the signal input pad 12
When a driving voltage is applied to p, if there is a defective TFT, a current flows through the source signal line 5 and gate signal line 9, which can be detected by an ammeter or voltmeter connected to the gate signal output pad 5p and the source signal output pad 9p.

For example, if there is a leak between the gate and drain of the TFT or if there is a leak in the capacitance, current will flow through the gate signal line 5, so the gate signal output pad 5
Detected by an ammeter or voltmeter connected to p.

Furthermore, if there is a leak between the source and drain of the TFT, a current flows through the source signal line 9, so it is detected by an ammeter or voltmeter connected to the source signal output pad 9p.

After completing the TFT inspection in this way,
As shown in FIG. 10, a contact film 12 is formed by leaving the short line 12a only on the drain contact 8 using a wet etching device using a photoresist as a mask.

Then, as shown in FIG. 11, ITO with a thickness of about 0.1 μm was deposited using a high-frequency magnetron sputtering device.
After forming the film, the pixel electrode 13 is formed using a wet etching device using the photoresist as a mask.

Finally, as shown in FIG. 12, SOG (Spin
On Glass), a protective film 14 is formed.

The pixel electrode process is completed as described above, and the pixel portion 21 as shown in FIG. 16 is formed.

After that, on the pixel part 21 by the liquid crystal process,
As shown in FIG. 13, a liquid crystal alignment film 15 made of polyimide is formed and rubbed.

On the other hand, as shown in FIG.
A common electrode 17 such as an ITO film is formed on the common electrode 17, and a second liquid crystal alignment film 18 is further formed on the common electrode 17 and rubbed.
It is bonded so as to face the quartz substrate 1 using a spacer 19 shown in FIG. 17 which also serves as an adhesive.

Then, as shown in FIG. 15, liquid crystal 20 is injected and sealed to manufacture a liquid crystal display device.

As described above, according to this embodiment, it is possible to detect defects in TFTs before the assembly process of a liquid crystal display device.

In this example, a short line 12a was temporarily created during the process of forming a contact film using Cr or Ni in order to short-circuit the drain electrode of the TFT, but in particular, the drain electrode structure was (ITO/C
r/Al-Si/poly-Si), for example, the 2-layer structure of (ITO/poly-Si)
In the case of a layered structure, a short line using ITO may be created at the time of forming the pixel electrode, or a new process may be provided to create the short line 12a or a short film. That is, anything is possible as long as the drain electrodes of the TFTs are short-circuited.

In this embodiment, the case where the scanning circuit is built in on the same substrate has been explained, but even in the case where the scanning circuit is not built in, the TFT
Needless to say, it is possible to detect defects in the TFT, but if the scanning circuit is built on the same substrate as in this example, it is also possible to inspect for insufficient on-current during TFT operation. Become.

Referring to FIG. 18, in order to test for insufficient on-current during TFT operation, vertical scanning circuit 22 and horizontal scanning circuit 23 are sequentially driven, and only one TFT is selected at any given time. When a driving voltage is applied to the signal input pad 12p, the on-current flowing between the drain and source flows through the source signal line 9, so it can be detected and inspected by an ammeter or voltmeter connected to the source signal output pad 9p. .

Furthermore, in this embodiment, as a method for inspecting TFT defects, detection was performed using an ammeter or a voltmeter connected to the gate signal output pad 5p and the source signal output pad 9p. It is okay if you do.

That is, another embodiment of the inspection method of the present invention will be explained using FIG. 20. In addition to FIG. 18 used to explain an embodiment of the second aspect of the present invention, FIG. 20 also shows a built-in test circuit on the quartz substrate 1. In FIG.

Referring to FIG. 21, a vertical inspection circuit 24 and a horizontal inspection circuit 25 are formed on opposite sides of the vertical scanning circuit 22 and the horizontal scanning circuit 23, respectively, with the pixel section 21 in between. These test circuits each consist of a field effect transistor, a resistor, two test power supply (HI power supply and LO power supply) input pads, and a test detection pad formed at the ends of the gate signal line 5 and source signal line 9, and as a whole, It constitutes a NOR circuit.

That is, when a driving voltage is applied to the signal input pad 12p while the HI power and LO power are supplied from the vertical inspection HI power input pad 24H and the vertical inspection LO power input pad 24L, the TFT gate and When there is a leak between the drains or when there is a leak in the capacitance, a voltage is applied to the gate signal line 5, so the field effect transistor in the vertical test circuit 24 operates and the vertical test output pad 24p is connected to the test power supply. LO voltage is detected. When the TFT is operating normally, no voltage is applied to the gate signal line 5, so the field effect transistor does not operate. As a result, the HI voltage of the test power supply is detected on the vertical test output pad 24p.

Similarly, HI power input pad 2 for horizontal inspection
HI power and LO power are supplied from 5H and horizontal inspection LO power input pad 25L, respectively, to the signal input pad 12.
When a driving voltage is applied to p, if there is leakage between the source and drain of the TFT, the field effect transistor in the horizontal inspection circuit 25 operates, and the LO voltage of the inspection power supply is detected at the horizontal inspection output pad 25p. Ru. When the TFT is operating normally, the field effect transistor does not operate.
The HI voltage of the test power source is detected on the horizontal test output pad 25p.

Furthermore, when the scanning circuit is built on the same substrate as described above, the shortage of on-current during TFT operation can be detected at any time by sequentially driving the vertical scanning circuit 22 and the horizontal inspection circuit 23 in exactly the same way. When only one TFT is selected, the HI power supply and LO power supply are supplied from the horizontal inspection HI power input pad 25H and the horizontal inspection LO power input pad 25L, respectively.
By supplying power and applying a drive voltage to the signal input pad 12p, inspection can be performed based on the voltage level of the horizontal inspection output pad 25p.

It goes without saying that the three types of power supplies mentioned above, the HI power supply, the drive power supply, and the LO power supply, can have arbitrary values within the withstand voltage of the TFT as long as they satisfy the relationship of decreasing power in this order.

In this embodiment, the configuration of the test circuit is NO.
Although the case of an R circuit is shown, it is not particularly limited and may be an OR circuit, an exclusive NOR circuit, or an exclusive OR circuit. That is, any circuit that can perform HI/LO comparison may be used.

Next, still another embodiment of the inspection method of the present invention will be described using FIG. 21. In addition to FIG. 20 used to explain an embodiment of the third aspect of the present invention, FIG.
6 was formed.

Referring to FIG. 21, in order to connect the pixel section 21 with the vertical inspection circuit 24 and the horizontal inspection circuit 25,
A communication line 26 is formed using the second layer of aluminum wiring. If a defective TFT is found as a result of the inspection, it may be replaced with a field effect transistor constituting the vertical inspection circuit 24 or the horizontal inspection circuit 25 as appropriate using the connecting line 26.

That is, if there are defective TFTs at positions A and B as shown in FIG. 21, the points indicated by "x" in FIG. replace.

In the above embodiment, the unnecessary portions of the connecting wires 26 were cut using a wiring melting device using the second layer of aluminum wiring, and replaced with field effect transistors, but other methods may also be used. Needless to say.

For example, the cut points of the connecting line 26 as indicated by "X" in FIG. 7 may be formed in advance with a fuse, and the unnecessary portions may be cut off by passing a current, or vice versa. The connecting line 26 may be formed only in necessary parts.

[0049]

As described above, the present invention short-circuits the drain electrodes of TFTs during the manufacturing process of a liquid crystal display device, applies voltage data to the short-circuited drain electrodes, and connects them to source signal lines or gate signal lines. The configuration of testing using flowing current data or voltage data makes it possible to detect defects in TFTs before the assembly process of a liquid crystal display device.

[0050] In addition, a test circuit is built in to reduce TFT test costs, and manufacturing costs are reduced by providing means for replacing defective TFTs with field effect transistors constituting the test circuit to provide redundancy. It also achieves reductions.

As a result, a low-cost, highly reliable liquid crystal display device with improved assembly yield can be provided.

[Brief explanation of the drawing]

[Fig. 1] A cross-sectional view of the main part of the first step in an embodiment of the manufacturing method of the present invention.

[Figure 2] Cross-sectional view of main parts of the second step in the same example

[Figure 3
] Cross-sectional view of main parts of the third step in the same example

[Figure 4] Cross-sectional view of main parts of the fourth step in the same example

[Fig. 5] Cross-sectional view of main parts of the fifth step in the same example

[Fig. 6] Cross-sectional view of main parts of the sixth step in the same example

[Figure 7] Cross-sectional view of main parts of the seventh step in the same example

[Fig. 8] Cross-sectional view of main parts of the eighth step in the same example

[Fig. 9] Cross-sectional view of main parts of the ninth step in the same example

FIG. 10: Cross-sectional view of main parts of the 10th step in the same example.

[Fig. 11] Cross-sectional view of main parts of the 11th step in the same example

[
Figure 12: Cross-sectional view of main parts of the 12th step in the same example

[Figure 13] Cross-sectional view of main parts of the 13th step in the same example

[Figure 1
4] Cross-sectional view of main parts of the 14th step in the same example

[Figure 15
] Cross-sectional view of essential parts of the 15th step in the same example

[Figure 16]
A partial plan view of a pixel portion of a liquid crystal display device manufactured in the examples shown in FIGS. 1 to 15

FIG. 17 is an equivalent circuit diagram of a liquid crystal display device manufactured according to the embodiment shown in FIGS. 1 to 15.

FIG. 18 is an equivalent circuit diagram of an uncompleted liquid crystal display device for explaining an embodiment of the inspection method of the present invention.

FIG. 19 is a plan view of essential parts of a liquid crystal display device for explaining the same embodiment.

FIG. 20 is an equivalent circuit diagram of a liquid crystal display device for explaining another embodiment of the inspection method of the present invention.

FIG. 21 is an equivalent circuit diagram of a liquid crystal display device for explaining still another embodiment of the inspection method of the present invention.

[Explanation of symbols]

1 Quartz substrate (transparent insulating substrate) 2 Transistor region 2s Source region 2d Drain region 2i Channel region 3 Gate oxide film 3a Thermal oxidation silicon layer 4 Gate electrode 5 Gate signal line 5p Gate signal output pad 6 Interlayer insulating film 7 Source contact 7W Source contact window 8 Drain contact 8W Drain contact window 9 Source signal line 9p Source signal output pad 10 Bonding pad 11 Anti-oxidation film 12 Contact film 12a Short line 12p Signal input pad 13 Pixel electrode 14 Protective film 15 Liquid crystal alignment film 16 Top glass plate 17 Common electrode 18 Second liquid crystal alignment film 19 Spacer 20 Liquid crystal 21 Pixel section 22 Vertical scanning circuit 23 Horizontal scanning circuit 24 Vertical inspection circuit 24H HI power input pad for vertical inspection 24L LO power input pad for vertical inspection 24p Vertical Inspection output pad 25 Horizontal inspection circuit 25H Horizontal inspection HI power input pad 25L Horizontal inspection LO power input pad 25p Horizontal inspection output pad 26 Connection line

Claims (4)

[Claims] 1. A step of forming a thin film transistor, which is one of the elements constituting a plurality of pixels, on a light-transmitting insulating substrate, and then shorting the drain electrode of the thin film transistor with a shorting means, and inspecting the characteristics of the thin film transistor. A method for manufacturing a liquid crystal display device, comprising at least the steps of: separating the shorting means to make the drain electrode independent; and forming a liquid crystal structure on the light-transmitting insulating substrate. 2. The drain electrode of a thin film transistor, which is one of the elements constituting a plurality of pixels formed on a light-transmitting insulating substrate, is short-circuited, and a signal input pad is provided on a part of the short-circuit line. A voltage data application means is connected to the signal input pad, and a voltage or current detection means is connected to each of the signal output pads of the commonly connected source electrodes or gate electrodes of the plurality of thin film transistors, and the voltage data application means is connected to the signal input pad. 1. A method for testing a liquid crystal display device, comprising testing the characteristics of the plurality of thin film transistors simultaneously by applying test data from a plurality of thin film transistors. 3. A thin film transistor having a commonly connected source electrode and a gate electrode, each of which is one of the elements constituting a plurality of pixels formed on a light-transmitting insulating substrate, and each of the source electrode and the gate electrode. a plurality of field effect transistors formed by connecting to a common connection point of;
1. A liquid crystal display device comprising: a test circuit comprising the field effect transistor, which outputs an output signal in response to an input signal to a gate electrode of the field effect transistor. 4. The liquid crystal display device according to claim 3, further comprising means for replacing a defective thin film transistor with a field effect transistor.