JPH04256376A - Avalanche photodiode and its manufacture - Google Patents

Abstract

PURPOSE:To provide a reach-through type avalanche photo diode which operates stably at a low voltage. CONSTITUTION:In an avalanche photo diode having a low resistance P-type semiconductor substrate 11, a high resistance P-type photo absorbing layer 14 formed thereon, a P-type avalanche doubled layer 15 formed thereon and a low resistance N-type anode layer 20 formed thereon, a P-type cap layer 13 is provided between the low resistance P-type semiconductor substrate 11 and the high resistance P-type photo absorbing layer 14, which has an intermediate impurity concentration thereof. It is possible to restrain resistivity of the P-type photo absorbing layer 14 very small and to realize reduction of a reach- through voltage. Furthermore, it is possible to improve impurity concentration of the P-type avalanche doubled layer 15, to realize low voltage of avalanche yield and to restrain variation of maximum electric field EMAX due to dispersion of impurity concentration of the low resistance N-type cathode layer 20.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reach-through type avalanche photodiode having a light absorption layer and a multiplication layer utilizing avalanche breakdown.

0002

2. Description of the Related Art FIG. 7 is a sectional view showing the structure of a conventional reach-through type avalanche photodiode. This avalanche photodiode has a p- type epitaxial layer 2 grown on a p+ type semiconductor substrate 1,
On top of that, a p layer 3 for an avalanche electric field and an N+ layer 6 to serve as an anode are formed by double diffusion.
It has a p+ structure. In other words, the p-region 3 for multiplication using avalanche breakdown and the p- region 2 for light absorption are separated from each other, and the depletion layer reaches through at an operating voltage of around 100V, forming a high-speed and highly sensitive photodetector. Become. Note that numerals 4 and 5 indicate a guard ring and a channel stopper, respectively. Moreover, FIG. 8 shows the electric field distribution and impurity concentration distribution corresponding to the n+ pp- p+ structure of this avalanche photodiode.
A) shows the electric field distribution, (B) shows the n+ pp-p+ structure, and (C) shows the impurity concentration distribution.

0003

In this conventional avalanche photodiode, the specific resistance of the p-type epitaxial layer 2 cannot be made sufficiently high. This is due to out-diffusion of impurities from the low resistance p+ semiconductor substrate. Specifically, the limit is about 200 Ωcm, and a value of around 100 Ωcm is usually adopted. Therefore, in order to reach through the depletion layer to the p+ semiconductor substrate 1, an applied voltage of about 100V is required as described above. When supplying a voltage of 100 V, it is difficult to stabilize the power supply, and there is a risk of destruction of related systems such as processing circuits and the avalanche photodiode itself.

0004

[Means for Solving the Problems] The present invention has been made to solve the above problems, and includes a low-resistance p-type semiconductor substrate and a high-resistance p-type light absorption layer formed thereon. , a p-type avalanche multiplication layer formed thereon, and a low-resistance n-type anode layer further formed thereon, the low-resistance p
A p-type cap layer having an intermediate impurity concentration is provided between a type semiconductor substrate and a high-resistance p-type light absorption layer. Furthermore, between the p-type avalanche multiplication layer and the low-resistance n-type cathode layer, a p-type semiconductor layer with a lower impurity concentration than the p-type avalanche multiplication layer and an n-type semiconductor layer with a lower impurity concentration than the low-resistance n-type cathode layer are provided. It is desirable to provide a semiconductor layer.

[0005]

[Operation] Since the p-type cap layer exists between the p-type semiconductor substrate and the p-type light absorption layer, impurity diffusion from the p-type semiconductor substrate to the p-type light absorption layer can be prevented. Therefore, the impurity concentration of the p-type light absorption layer can be kept very low, and the reach-through voltage can be reduced. Also, p
By interposing a p-type semiconductor layer with a lower impurity concentration than the p-type avalanche multiplier layer between the avalanche multiplier layer and the low-resistance n-type cathode layer, the tunnel effect can be suppressed. By increasing the impurity concentration of the double layer, it is possible to lower the avalanche breakdown voltage. Furthermore, due to the presence of the n-type semiconductor layer with a lower impurity concentration than the low-resistance n-type cathode layer, the maximum electric field EMAX due to the variation in the impurity concentration of the low-resistance n-type anode layer is
fluctuations can be suppressed.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a sectional view showing one embodiment of the present invention, and FIGS. 2 and 3 are diagrams showing the manufacturing process thereof. First, the manufacturing process will be explained. First, the impurity concentration is 1018
Polysilicon 12 (or SiO2) is formed on the entire back surface of a p+ type Si semiconductor substrate 11 of cm-3 or more (see FIG. 2(A)). This is to prevent contamination with boron impurities in subsequent steps.

Next, a semi-high resistance p-
The layer 13 is formed to a thickness of about 1 to 4 μm by epitaxial growth (see FIG. 2B). This layer 13 becomes a cap layer for the next high-resistance p--layer 14 to prevent autodoping.

[0008] Next, a p-- light absorbing layer 14 having an impurity concentration of 1.2 x 1013 cm-3 and having a very high resistivity of around 1000 Ωcm is formed to a thickness of 10 to 50 μm by epitaxial growth (Fig. 2 (See (C)). When epitaxially growing this p--light absorption layer 14,
The high concentration impurity (boron) in the p+ semiconductor substrate 11 is
Outdiffusion is suppressed by the p-cap layer 13. That is, no boron doping into the p-- light absorption layer 14 occurs. Therefore, p+ semiconductor substrate 11
It is possible to form a high-resistance light-absorbing layer 14 with a resistance of 1 KΩcm or more, which cannot be obtained by a conventional process in which a light-absorbing layer is directly epitaxially grown thereon. Note that the thickness of this layer will be selected appropriately depending on the application, but for example,
In the case of a photodetector that receives infrared light with optical spectral characteristics of about 800 nm, the thickness is about 30 μm.

Next, SiO2 is applied to the surface of the light absorption layer 14.
A film 16 is formed, and boron ions are implanted using a patterned mask to form a p-type avalanche multiplication layer 15 (see FIG. 2(D)).

[0010] Next, the SiO2 film 16 on the surface is removed and a relatively high resistance p- layer 17 is formed by epitaxial growth. At this time, p-type avalanche multiplication layer 1
In order to prevent the spread of 5, a low temperature epitaxial growth method is used. The thickness of this p- layer 17 is appropriately set depending on the operating voltage of the APD, and in the case of lower voltage, it becomes a thin layer of 1 μm or less. Subsequently, a thin n-type layer 18 with a thickness of 1 μm or less is formed using a low-temperature epitaxial growth method (Fig. 3
(See (A)).

Thereafter, in order to isolate the anode n region of this avalanche photodiode, a channel stopper p-type layer 19 is formed around it by boron ion implantation. Further, an n+ anode layer 2 is provided on the surface of the n-type layer 18.
0 is formed shallowly by As diffusion (see FIG. 3(B)).

Finally, a contact hole is formed in the SiO2 film 21 on the front surface to form an anode electrode 22 of Al, and a cathode electrode 23 is formed on the back surface of the substrate 11 to complete the avalanche photodiode 23 (see FIG. 1). . Reference numeral 24 is an Al film as a light shielding film.

In this manufacturing method, the p-type avalanche multiplication layer 15 is formed by ion implantation, but it can also be formed by epitaxial growth. That is, from the state shown in FIG. 2C, an epitaxial layer with an impurity concentration and thickness suitable for a p-type avalanche multiplication layer is formed on the light absorption layer 14, and then the area other than the light-receiving surface area is removed and the above-mentioned ion implantation is performed. A layer equivalent to the p-type avalanche multiplication layer 15 can be formed. Methods for partially removing the epitaxial layer include a method of scraping it off by silicon etching, and a method of sucking out boron from the surface by selective oxidation to lower the impurity concentration. Thereafter, a similar avalanche photodiode can be completed by using the same method as described in FIGS. 3(A) and 3(B).

The avalanche photodiode of this example thus obtained has n+ np- pp--p-
It will have a p+ structure. Figure 2 shows the n+ np- pp--p- p of this avalanche photodiode.
It shows the electric field distribution and impurity concentration distribution corresponding to the + structure, where (A) shows the electric field distribution and (B) shows the n+ structure.
In the np-pp--p-p+ structure, Figure (C) shows the impurity concentration distribution, respectively.

Next, the operation of the avalanche photodiode constructed as described above will be explained. Visible to infrared (1
When light (100 nm or less) is incident on this avalanche photodiode, the light is absorbed in the p--light absorption layer 14, and electron-hole pairs are generated. These electrons and holes are
Electrons are moved through the depletion layer by an externally applied electric field and are injected into the p-type avalanche multiplication layer 15 with a strong electric field, where a multiplication effect occurs. This is the operating principle of a reach-through type avalanche photodiode. As can be seen from this operating principle, the reach-through type avalanche photodiode is based on completely depleting the p- light absorption layer 14, which allows for a high-speed design determined by the carrier drift response. enable. If the p-- light absorption layer 14 is not depleted, or if the depletion is incomplete, carriers will move by diffusion and become a delay component.

The extension of the depletion layer from the n+p junction depends on the applied voltage and the resistivity of the p-- light absorption layer 14. That is, the depletion layer width W is W=α(V/NA)1/2
...It is given by (1). Here, V is the applied voltage,
NA is the impurity concentration of the p-layer, and α is a proportionality constant. In other words, if the impurity concentration NA [cm-3] is lowered, 1
The depletion layer width increases by /2. In this embodiment, a p-cap layer 13 is used to provide an extremely high resistance p-cap layer 13.
- Formation of the light absorption layer 14 is realized, so that the depletion layer expands with a small applied voltage. When realizing the p- light absorption layer 14 with a specific resistance of 1KΩcm or more, the depletion layer has a voltage of 5V.
The width is 25 μm or more at 8V, and 30 μm or more at 8V. If the reach-through voltage is less than 8V, increase the operating voltage to 20~
It can be set at about 30V.

On the other hand, as the reach-through voltage is lowered, it is necessary to lower the voltage in the strong electric field region where avalanche amplification occurs. To achieve this, it is necessary to increase the impurity concentration of the p-type avalanche multiplication layer 15, which is a strong electric field generating section. However, in the case of a pn junction with a high impurity concentration, a tunnel effect occurs. In order to prevent this tunnel effect, in this embodiment, a high resistance p- layer 1 is used.
7 is provided to widen the width of the strong electric field portion while suppressing the maximum electric field EMAX of the pn junction. This makes it possible to sufficiently secure a high impurity concentration in the p-type avalanche multiplication layer 15 necessary for lowering the voltage in the strong electric field region, while suppressing the tunnel effect and excessive noise.

Furthermore, in order to cause a multiplication operation to occur in the p-type avalanche multiplication layer 15 by electrons generated in the p-- light absorption layer 14 at the same time that the depletion layer reaches through to the p+ semiconductor substrate 11, It is necessary to ensure that the maximum electric field EMAX stably reaches a desired value for a constant applied voltage. Therefore, in this embodiment, n+
An n-type epitaxial layer 18 having a specific resistance of 0.1 to 1 Ωcm is provided between the p junctions. This n-type epitaxial layer 18 suppresses fluctuations in the maximum electric field EMAX due to variations in the impurity concentration of the n+ anode layer 20.

FIG. 5(A) shows the maximum electric field EMAX and n+
It shows the relationship with variations in the impurity concentration of the anode layer 20. In the figure, if the n+ anode layer 20 varies as shown by symbols 41 to 43, the characteristics change as shown by solid lines A1 to A3 under a constant applied voltage. On the other hand, FIG. 5B shows the relationship between the maximum electric field EMAX and the variation in the impurity concentration of the n+ anode layer 6 in the conventional device shown in FIG. B1~B
3 is n+ anode layer 6 due to impurity variation.
This corresponds to three states 51 to 53. As is clear from comparing these two figures, in this example, due to the presence of the n-type epitaxial layer 18, the maximum electric field EMA
The variation ΔEMAX in X becomes significantly smaller. In other words,
The depletion layer electric field strength distribution in the p-type avalanche multiplication layer 15 has a constant slope, and since n+ and p are not in contact, EMAX is not affected by variations in n+ and remains almost constant. Therefore, the controllability of the operating voltage becomes extremely high.

FIG. 6 shows an example in which a plurality of the above-described avalanche photodiodes are provided on the same substrate to form an array. The method of manufacturing this avalanche photodiode array is basically the same as that for the single avalanche photodiode described above.

[0021]

Effects of the Invention As explained above, according to the avalanche photodiode and its manufacturing method of the present invention, the specific resistance of the light absorption layer can be made considerably low, so the voltage can be dramatically lowered compared to the conventional one. operation is possible. Therefore, it becomes easy to stabilize the power supply, and it becomes possible to form a monolithic structure with other functional elements or ICs. In addition, between the p-type avalanche multiplication layer and the low-resistance n-type cathode layer, a p-type semiconductor layer with a lower impurity concentration than the p-type avalanche multiplication layer and an n-type semiconductor layer with a lower impurity concentration than the low-resistance n-type cathode layer are provided. By providing a semiconductor layer, the operating voltage can be stably controlled and tunnel effects and excessive noise can be prevented.
Furthermore, the in-plane amplification factor can be made uniform over a wide area. Uniformity of amplification factor over a wide area is very effective for array formation.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing the structure of a reach-through type avalanche photodiode that is an embodiment of the present invention.

FIG. 2 is a process cross-sectional view showing a method (first half) of manufacturing the avalanche photodiode shown in FIG. 1;

3 is a process cross-sectional view showing the second half of the method for manufacturing the avalanche photodiode shown in FIG. 1; FIG.

FIG. 4 is a diagram showing the electric field distribution and impurity concentration distribution of the avalanche photodiode in FIG. 1;

FIG. 5 is a diagram for explaining the relationship between the maximum electric field EMAX and the variation in impurity concentration of the n+ anode layer 20.

FIG. 6 is a cross-sectional view showing an example of reach-through type avalanche photodiodes arranged in an array.

FIG. 7 is a cross-sectional view showing a conventional reach-through type avalanche photodiode.

FIG. 8 is a diagram showing electric field distribution and impurity concentration distribution in a conventional reach-through type avalanche photodiode.

[Explanation of symbols]

11...p+ type Si semiconductor substrate 13...p- Cap layer 14...p--light absorption layer 15...p-type avalanche multiplication layer 17...p- layer 18...n-type layer 20...n+ anode layer

Claims (4)

[Claims] 1. A low-resistance p-type semiconductor substrate, a high-resistance p-type light absorption layer formed thereon, a p-type avalanche multiplication layer formed thereon, and further formed thereon. In the avalanche photodiode having a low resistance n-type anode layer, a p-type cap layer having an intermediate impurity concentration is provided between the low-resistance p-type semiconductor substrate and the high-resistance p-type light absorption layer. An avalanche photodiode featuring: 2. The avalanche photodiode according to claim 1, wherein a p-type semiconductor having an impurity concentration lower than that of the p-type avalanche multiplication layer is provided between the p-type avalanche multiplication layer and the low-resistance n-type cathode layer. An avalanche photodiode comprising an n-type semiconductor layer having a lower impurity concentration than the low-resistance n-type cathode layer. 3. An avalanche photodiode array characterized in that a plurality of avalanche photodiodes according to claim 2 are formed using a common p-type semiconductor substrate. 4. A low resistance p-type semiconductor substrate, a high resistance p-type light absorption layer formed thereon, and a p-type semiconductor substrate formed thereon.
In the method for manufacturing an avalanche photodiode having an avalanche multiplication layer and a low-resistance n-type anode layer formed thereon, the formation of the p-type light absorption layer includes the step of forming an intermediate impurity on the p-type semiconductor substrate. thin p with concentration
After epitaxially growing the type cap layer, a high-resistance p
A method for manufacturing an avalanche photodiode, which is achieved by epitaxially growing a mold layer.