JPH04245733A - Data transmission system - Google Patents

Abstract

PURPOSE:To improve the reliability of security counterplans for data alteration or the like on a transmission line in a time division multiplex transmission system. CONSTITUTION:A coding circuit 11 in a transmission side data transfer equipment 1 generates two groups of positive logic and negative logic of transmitting serial data and executes the exclusive OR operation of respective groups with respective previously determined codes. The operated results to be the coded data of two channels are time-dividedly multiplexed by a multiplexing circuit 10 and sent to the transmission line as the constitution of a multiplex frame. A separator circuit 20 in a receiving side data transfer device 5 receives the multiplex frame and separates the received frame into the coded data of two channels. A comparator 21 compares the coded data of the two channels in each bit, recognizes the normality of the data when logic is inverted in all bits or a data error when the same logic exists in any bit and informs the recognized result to a control part. In the case of normal data, a decoding circuit 22 decodes the coded data based upon a prescribed code and exclusive OR operation to obtain the transmitted serial data.

Description

[Detailed description of the invention]

0001

[Industrial Application Field] The present invention relates to a data transmission system,
In particular, the present invention relates to a data transmission method for a data transfer device using a time division multiplex transmission system.

0002

[Prior Art] Conventional data transfer devices are based on the assumption that analog transmission paths are used as transmission paths, and only perform communication using a data transmission method in which data transmission paths are formed corresponding to channels. Route connections are guaranteed by switching equipment, etc., but data is guaranteed by communication protocols that are specified between devices, and by recognizing each other using terminal IDs (terminal numbers), etc., each device communicates with the intended party. It was something.

0003

[Problem to be solved by the invention] In this conventional data communication, the receiving source is a transmission line connected by an exchange, and there is no doubt that the data flowing through the transmission line does not recognize the other party using the communication protocol. Therefore, the communication is realized as if it were communicating with the real source. However, even if another third party replaces the communication protocol during transmission, the receiving party may think that it is communicating with the real sender, and the third party may tamper with the communication content. This was a possible transmission method.

[0004] An object of the present invention is to provide a data transmission system with improved security reliability against data tampering by a third party on a transmission path.

[0005]

[Means for Solving the Problems] The data transmission method of the present invention is a time-division multiplex transmission system in which multiple channels are used as one transmission path. an encoding unit that performs a predetermined logical operation using a code to create two channels of encoded data whose logic is inverted bit by bit, and synchronously multiplexes the two channels of encoded data into one frame and sends it to the transmission path. a multiplexing means for separating the encoded data of the two channels from one synchronous multiplexed frame from the transmission path, and a means for separating the encoded data of the two channels from one synchronous multiplexed frame from the transmission path, and a means for separating the encoded data of the two channels in bit units. Comparing means that recognizes and notifies data as an error when a logical inversion abnormality is detected by comparison, and performs a logical operation corresponding to the predetermined logical operation on the normally received encoded data based on the predetermined code and decodes the encoded data. and decoding means.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. The two data transfer devices 1 and 5 are connected to each other by a digital switching network 3 via time division multiplex transmission paths 2 and 4. Each of the data transfer devices 1 and 5 includes a multiplexing circuit 10 that synchronously multiplexes two synchronized channels (8 bits/channel) into one frame.
, 40, serial data transmitting circuits 12, 42 that transmit serial data synchronized by the synchronization blocks from the multiplexing circuits 10, 40, and serial data transmitting circuits 12, 40,
Encoding circuits 11 and 41 synchronize the serial data from 42 with the channel frame using 8-bit fixed data specified by the system and output positive/negative logic serial data encoded in 8-bit units, and one synchronizer. a separation circuit 30 for separating the multiplexed frame into two synchronized channels;
20, a comparison circuit 31, 21 that compares two synchronized channel data bit by bit using exclusive OR, and synchronizes the received serial data with the channel frame using 8-bit fixed data specified by the system and converts the received serial data into 8-bit It is composed of decoding circuits 32, 22 that decode unit by unit, and serial data receiving circuits 33, 23 that receive decoded serial data.

Next, the operation will be explained. Figure 2 shows how the frame structure is multiplexed and separated.

When data is to be transmitted from the data transfer device 1 to the data transfer device 5, when the data transfer device 1 on the sending side writes the data to be transmitted to the serial data transmission circuit 12 using known means, the data is transmitted from the multiplexing circuit 10. Synchronous clock (CLK
) is converted into serial data and sent out. The encoding circuit 11 divides the synchronous serial data into two parts, positive logic data and negative logic data, and temporarily stores them in 8-bit units.The two stored 8-bit data are then unified into an 8-bit code (
For example, the data result encoded by exclusive OR with 01010101) is synchronized with the channel frame synchronization signal (F) from the multiplexing circuit 10 to create two types of encoded channel data. When the creation is completed, the temporary storage is canceled and the next 8 bits are received. Of the two types of encoded channel data, positive logic data is input to the multiplexing circuit 10 as a channel (CH1) and negative logic data as a channel (CH2). The multiplexing circuit 10 time-division multiplexes the synchronized 8-bit data of the two channels to form one multiplexed frame and sends it to the transmission line 2.

In the data transfer device 5 on the receiving side, a separation circuit 20 synchronously separates the time division multiplexed frames transmitted via the time division multiplex transmission lines 2 and 4 into two channels. A comparator circuit 21 performs an exclusive OR on the two respective channel data. If the data is correct from the source, the logics of channel 1 and channel 2 are inverted, and when exclusive OR is taken, all bits become logic "1". If erroneous data is received and channel 1 and channel 2 of any bit have the same logic, the result will be logic "0" and it can be recognized as erroneous data, and a control unit (not shown) will be notified of the error occurrence. do. Next, the serial data of reception channel 1 is input to the decoding circuit 22, and the 8-bit data synchronized with the channel frame is unified in the system.
When the data decoded by exclusive ORing with the bit code is input to the serial data receiving circuit 23 as serial data synchronized with a synchronous clock, the data is read by a control section (not shown).

Next, when transmitting from the data transfer device 5 to the data transfer device 1, the serial data transmission circuit 42, the encoding circuit 41, the multiplexing circuit 40 of the data transfer device 5,
The separation circuit 30, comparison circuit 31, decoding circuit 32, and serial data receiving circuit 33 of the data transfer device 1 operate in the same manner as described above. This allows mutual transmission and reception between the data transfer devices 1 and 5.

0012

As explained above, the present invention utilizes two phase-synchronized channels of a time-division multiplex transmission path to ensure that serial data encoded for security measures is transmitted between the sending source and the receiving source. By being able to verify that data is being transmitted between the two, data tampering on the transmission path can be prevented and highly reliable data transmission can be provided.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention.

FIG. 2 is a diagram showing an example of frame structure for frame multiplexing and demultiplexing in the embodiment of FIG. 1;

[Explanation of symbols]

1, 5 Data transfer device 2, 4 Time division multiplex transmission line 3 Digital switching network 10, 40 Multiplexing circuit 11, 41 Encoding circuit 12, 42 Serial data transmission circuit 20, 30
Separation circuit 21, 31 Comparison circuit 22, 32 Decoding circuit

Claims (1)

[Claims] Claim 1: In a time division multiplex transmission system that uses multiple channels as one transmission path, the transmitting side performs a predetermined logical operation on the transmitted data using a predetermined code in units of predetermined bits, and mutually transmits each bit to each other. comprising an encoding means for creating logically inverted two-channel encoded data, and a multiplexing means for synchronously multiplexing the two-channel encoded data into one frame and sending it to the transmission path,
On the receiving side, means for separating the encoded data of the two channels from one synchronous multiplexed frame from the transmission path, and means for comparing the encoded data of the two channels bit by bit to detect a logic inversion abnormality. Comparing means for recognizing and notifying a data error; and decoding means for decoding the normally received encoded data by performing a logical operation corresponding to the predetermined logical operation based on the predetermined code. A data transmission method characterized by: