JPH04221748A - Image processing device - Google Patents

Abstract

PURPOSE:To perform accurate and high-speed detection of even a microdefect by utilizing the advantage of a binarization image processing in the inspection of appearance of a printed wiring board. CONSTITUTION:A camera image memory 20 to preserve multigradation digital image data of an object to be inspected and a multigradation slice level map memory 22 wherein multigradation slice level data for binary-coded image processing data is mapped in the same image position as that of a camera image are provided. Binary-coded image data is obtained through comparison of outputs from the two memories with each other by means of a comparator 24 for binary-coding. Further, collation reference memories 26 and 28 to preserve reference binary-coded image data of an object to be inspected are provided, and binary-coded image data obtained by the comparator for binary-coding is compared with reference binary-coded image data of the collation reference memory to detect a defect.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing device used in a visual inspection device for printed wiring boards and the like. More specifically, the analog image signal from the camera is converted into multi-tone digital image data and saved, and the binarized image data is compared with the multi-tone slice level mapped to the same image position. This invention relates to an image processing device that improves inspection accuracy by creating an image processing device.

0002

[Prior Art] Appearance inspection equipment for thick-film printed ceramic substrates for hybrid ICs processes image signals from a camera to inspect pattern areas (areas where conductor patterns are formed) and clearance areas (areas where insulators are formed on the surface). The exposed parts) are inspected for defects. In the case of relatively small-scale inspection apparatuses, defects are often detected by pattern matching using image data that is binarized at a fixed slice level.

For example, when a circuit board having a pattern portion 10 as shown in FIG. 2 is inspected, the camera output waveform at the A1-A2 cross section is as shown in FIG. There is clearly a level difference between the output from the clearance section 12 and the output from the pattern section 10, and therefore, in conventional devices, the slice level SL is set exactly in the middle of the two, and the binarized image data is obtained by comparing the slice level SL. .

0004

The above-mentioned inspection method using a binary image has the advantage of simplifying the device configuration and lowering the cost, but on the other hand has the disadvantage that fine structures are difficult to appear on the image. For example, if there is a microscopic crack 14 in the pattern part 10 in FIG. 2, it will be recognized in the camera output as shown in FIG. It disappears. In recent years, with the miniaturization of components, the pattern portions on substrates have become denser, and the above-mentioned problems tend to become even more serious, and it is becoming impossible to cope with the above-mentioned appearance inspection using a simple binary image.

An object of the present invention is to eliminate the drawbacks of the prior art as described above, and to provide an image processing device that can accurately detect even minute defects and facilitates high-speed processing while taking advantage of the advantages of binarized image processing. That's true.

[0006]

[Means for Solving the Problems] In order to achieve the above object, an image processing apparatus according to the present invention performs AD conversion (analog-digital conversion) of an image signal of an object to be inspected from a camera.
A camera image memory that stores multi-tone image data after image processing, and a slice in which multi-tone slice level data for binarizing the image data in the camera image memory is mapped to the same image position as the camera image. It is particularly characterized in that it is equipped with a level map memory and a binarization comparator that compares the outputs of the image memory and slice level map memory and outputs binarized image data. Further, in the present invention, there is provided a comparison reference memory that stores reference binary image data of the inspection object, and a comparison between the binary image data obtained by the binarization comparator and the reference binary image data of the comparison reference memory. It has a comparator for detecting defects.

[0007] When the object to be inspected is various printed wiring boards, two types of reference memory and defect detection comparators are provided in parallel, one for the pattern portion and one for the clearance portion. A configuration is preferable in which a total of four types of memories are simultaneously accessed to detect pattern defects and insulating portion defects at high speed.

[0008]

[Operation] Since the camera image memory stores multi-gradation digital image data, it stores almost the same output information from the camera (including information on minute defects). Since the slice level map memory also stores multi-gradation slice level data, different slice levels can be set for each image position with the accuracy required for defect detection. Therefore,
By comparing the two, even if the image signal from the camera is small due to a minute defect, the defect information is reflected in the binary image data.

[0009] Furthermore, two
A seed comparison reference memory and a defect detection comparator are installed in parallel,
When a total of four types of memories are accessed simultaneously, pattern defects and insulation defects can be detected at high speed.

0010

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram showing an embodiment of an image processing apparatus according to the present invention. To simplify the explanation, buffers, registers, etc. that are necessary in the actual circuit are omitted and each block is drawn. This device is a hybrid IC
This is an example of an image processing device suitable for an appearance inspection device for thick film printed ceramic substrates. Multi-gradation image data after AD converting the image signal of the inspection board from the camera is input.

[0011] This multi-gradation image data is stored in the camera image memory 20. In the slice level map memory 22, multi-tone slice level data for binarizing the image data in the camera image memory 20 is mapped to the same image position as the camera image. Both the camera image memory 20 and the slice level map memory 22 store data in 256 gradations (8 bits). Camera image memory 20 and slice level map memory 22
The 8-bit parallel output of is sent to the comparator 24 for binarization,
Then, a comparison is made and binarized image data indicating whether it is higher or lower than the slice level is output. In addition, in this embodiment, a matching reference memory 26 for a pattern part that stores reference binary image data for a pattern part of an inspection board, and a clearance part (
The clearance section matching reference memory 28 stores reference binarized image data for the section (where the insulator is exposed). Both reference memories 26, 28 are two-level (ie one bit per image position) memories. and a pattern defect detection comparator 30 that compares the binary image data output from the binarization comparator 24 with reference binary image data for the pattern section in the pattern section matching reference memory 26; For detecting clearance part defects (defective insulation parts) by comparing the binary image data obtained by inverting the output from the value comparator 24 with the reference binary image data for the clearance part in the clearance part matching reference memory 28 has a comparator 32.

[0012] A total of four types of memories 20, 22, 26,
28 is connected to a common address line. Note that an address offset device 34 provided before the camera image memory 20 is used for position correction during pattern matching.

Next, the operation of this apparatus will be explained in order. The camera image memory 20 stores 256-gradation data obtained by AD converting an image signal from a camera. In the slice level map memory 22, the levels of camera images are mapped in advance according to patterns so that accurate binarized data can be obtained. Here, the clearance part is set high so that fine dust etc. can be easily found, and conversely, the pattern part is set low so that fine cracks can be easily found. The binarization comparator 24 cuts the image data from the camera image memory 20 at the slice level from the slice level map memory 22 and converts it into binarized image data. In this case, camera image memory 20 and slice level map memory 22 access the same address simultaneously. As a result, ideal binarized image data can be obtained. The above points are especially important in the present invention, and thereby high-speed and accurate processing is performed.

In the pattern section matching reference memory 26, a reference pattern serving as a reference for pattern matching is stored in advance in the form of binary data. Further, in the clearance section comparison reference memory 28, a reference clearance, which is a reference for clearance comparison, is stored in advance in the form of binary data. As mentioned above, since the ideal binarized image data is obtained from the binarization comparator 24, these matching reference memories 26 and 28 only require 1 bit of information for each corresponding image position, resulting in a significant cost reduction. can be achieved. The pattern part defect detection comparator 30 compares and verifies the binarized image data from the binarization comparator 24 with the data in the pattern part matching reference memory 26, and generates a pattern defect detection signal when they do not match. . The clearance section defect detection comparator 32 compares and verifies the binarized image data from the binarization comparator 24 with the data in the clearance section reference memory 28, and when they do not match, outputs a clearance defect detection signal. arise. By accessing the four types of memories mentioned above simultaneously, pattern defects and defects in the insulation portion can be immediately detected.

Although a preferred embodiment of the present invention has been described in detail above, the present invention is not limited to only this configuration. Depending on the object to be inspected, the inspection conditions, etc., only one type of reference memory and one type of comparator for defect detection may be required. Further, in the above example, everything is configured by hardware, but processing such as comparison and verification can also be performed by software using a processor.

[0016]

Effects of the Invention As described above, the present invention saves the image signal from the camera as multi-gradation digital data, and the slice level is also set in a pattern so that accurate binarized image data can be obtained for the camera image. Since the mapping is done differently depending on the situation, even minute defects in high-density patterns can be detected accurately. Since the present invention basically performs inspection by pattern matching using binarized images, the configuration can be relatively simple and the price will not be very high. In particular, if comparators and the like are configured entirely in hardware so that each memory can be accessed simultaneously, processing can be sped up and defects can be detected immediately.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of an image processing device according to the present invention.

FIG. 2 is an explanatory diagram of a printed wiring board that is a detection target.

FIG. 3 is an output waveform diagram from the camera at the A1-A2 cross section in FIG. 2;

[Explanation of symbols]

20 Camera image memory 22 Slice level map memory 24 Comparator for binarization 26 Matching reference memory for pattern section 28 Matching reference memory for clearance section 30 Comparator for pattern section defect detection

Claims (3)

[Claims] 1. A camera image memory for storing multi-gradation image data after AD converting an image signal of an object to be inspected from a camera, and a multi-gradation for binarizing the image data in the camera image memory. A slice level map memory in which slice level data is mapped to the same image position as the camera image, and a binarization device that compares the outputs of the image memory and slice level map memory and outputs binarized image data. a comparator, a matching reference memory for storing reference binarized image data of the inspection object, and the binarized image data obtained by the binarizing comparator and the reference binarized image data of the matching reference memory. An image processing device comprising a defect detection comparator that compares and detects defects. 2. The image processing apparatus according to claim 1, wherein the object to be inspected is a printed wiring board, and the verification reference memory and the defect detection comparator include two types, one for a pattern portion and one for a clearance portion. 3. An image processing apparatus according to claim 2, which accesses four types of memories simultaneously to detect pattern defects and insulation defects.