JPH04225520A - Method of suppressing silicon crystal defect caused by ion implantation - Google Patents

Abstract

PURPOSE:To suppress the generated crystal defects of a deep layer and enable a crystal defect suppressing method which does not cause crystal defects in the surface layer of a substrate by implanting high-energy ions into a silicon substrate. CONSTITUTION:In an ion source 1a, B<+> is created. Since BF3 gas is used for the creation of B<+>, by performing mass separation by an analysis magnet 4a, B<+> is extracted. Next, by accelerating B<+> by the RFQ accelerator arranged in an accelerating part 2, it is made the high energy of 1.0MeV, and is guided to an irradiation part 3. The guided B<+> is implanted into a wafer 5 with dosage of 2X10<14> pieces/cm<2>. The depth of this B<+> implantation is approximately 1.8 7mum. Si<+> is implanted into the wafer 5 where B<+> is implanted. That is, by accelerating Si<+>, it is made the energy of 2.58MeV, and dosage of 1X10<14> pieces/cm<2> is implanted. The depth of this Si<t> implantation is deeper than the depth of B<t> implantation, at approximately 2.2mum.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device.

0002

[Prior art] Conventionally, the ion implantation energy was 20
Although it is below 0 keV, high-energy ion implantation exceeding 200 keV has recently attracted attention as a means of manufacturing new device structures. However, 1
Crystal defects deep within μm or more are becoming a major obstacle when applied to actual devices. For example, by accelerating B+ to a high energy of 1.0 MeV and implanting it into a silicon substrate at a dose of 2 x 1014 particles/cm2,
Thereafter, heat treatment is performed at 900° C. for 20 minutes. Cross-sectional transmission electron microscope (TEM) of the state of occurrence of crystal defects in this case
A photograph is shown in Figure 3. The implantation depth of B+ in this case is 1.
The diameter is 8 μm, and many linear and loop-shaped crystal defects occur in the vicinity thereof.

[0003] Various methods have therefore been attempted as countermeasures against this problem. Among them, W. X. The method of Lu et al.
Appl. Phys. Lett. 55(18)1838
~1840) is 1. by accelerating B+.
Set to high energy of 0 MeV and dose amount 2 x 1014 pieces/
cm2 into a silicon substrate, then accelerate Si+ to an energy of 140 keV, implant a dose of 1 x 1013 atoms/cm2, and then
Heat treatment is performed at 0° C. for 20 minutes. A TEM photograph of the state in which crystal defects occur in this case is shown in FIG. In this case, when B+ is implanted, linear and loop-shaped crystal defects are generated near the implantation depth of 1.8 μm, but during the next process of Si+ implantation and subsequent heat treatment, the crystal defects in the deep layer are removed. As a result of Si+ being sucked into surface crystal defects by implantation, crystal defects in the vicinity of 1.8 μm are considerably suppressed.

0004

[Problem to be solved by the invention] However, W. X
．． In the method of Lu et al., crystal defects occur near the surface, as is clear from FIG. That is, although this method suppresses crystal defects in the deep layer, there is a problem in that crystal defects caused by Si+ implantation remain in the surface layer. Here, the occurrence of crystal defects near the surface of the silicon substrate causes an increase in leakage current, etc., which is extremely harmful to device characteristics.

An object of the present invention is to provide a method for suppressing crystal defects in deep layers caused by high-energy implantation, and in which almost no crystal defects occur in the surface layer, which is important for device structure. There is a particular thing.

[0006]

[Means for Solving the Problems] The method of suppressing silicon crystal defects caused by ion implantation of the present invention involves ionizing an impurity element, accelerating it to a high energy exceeding 200 keV, and implanting it onto a silicon substrate. It is characterized by injecting silicon ions having an energy equal to or higher than that of the ion implantation into the silicon substrate, and then subjecting the substrate to heat treatment.

[0007]

[Operation] Impurity ions are accelerated to a high energy exceeding 200 keV and implanted onto the semiconductor substrate. Crystal defects generated in a predetermined deep layer are then removed by implanting silicon ions with an energy equal to or higher than that used during impurity ion implantation. By making the W
．． X. Similar to the method of Lu et al., crystal defects are suppressed. Moreover, since there are no implanted ions in the substrate surface layer, no crystal defects occur. It is expected that the implanted silicon ions will occupy completely homogeneous lattice positions in the silicon substrate through heat treatment, and will not have any adverse effect on device characteristics.

[0008]

Embodiment FIG. 1 shows an overall configuration diagram of a high-energy ion implantation apparatus used to carry out an embodiment of the present invention. This device is composed of three parts: an injection part 1 that generates ions, an acceleration part 2 that accelerates ions, and an irradiation part that implants ions. The injection section 1 has the function of generating ions used for ion implantation, adjusting the ion beam to an energy and beam shape suitable for the RFQ accelerator, and supplying the ion beam to the RFQ accelerator. In the ion source 1a, the source gas is turned into plasma and ions are generated. Ion source 1a
A duopigatron type ion source is used, and atomic ions can be obtained at a high production ratio. In addition, the entrance part is comprised of a steering electrode for correcting the positional direction of the beam, a slit for measuring the beam current value, and for blocking the beam. Injection part 1 and acceleration part 2
An analysis magnet 4a is provided between the two, and the analysis magnet 4a performs mass separation to allow only ions having a target mass number to enter the RFQ accelerator.

The acceleration section 2 is an RFQ accelerator, and the high frequency power is R.
It consists of a power supply that supplies the FQ accelerator and a control system that controls the electric field of the RFQ accelerator. The ion beam emitted from the accelerator 2 is transferred to an analysis magnet 4.
Neutral beams and the like are removed by b, the energy is analyzed again, and the beam is guided to the end station provided in the irradiation section 3. The end station is comprised of a wafer processing chamber for implanting wafers 5, a wafer transfer chamber for handling wafers, a load lock chamber for storing wafer cassettes, and the like. The ion beam scanning method is a mechanical scanning method, that is, a plurality of wafers 5 are mounted on a rotating disk 6, and the rotating disk 6 is driven to rotate and translate at high speed.

In the embodiment of the present invention, a high-energy ion implantation apparatus having the configuration described above is used. First, B+ used in the present invention is generated in the ion source 1a. Since BF3 gas is used to generate B+, B+
In addition to the atomic ions, molecular ions such as BF+ and BF2+ are also generated. Therefore, B+ is extracted by performing mass separation using the analysis magnet 4a.

Next, an RFQ accelerator placed in the accelerating section 2 accelerates B+ to a high energy of 1.0 MeV, and guides it to the irradiation section 3. Next, the B+ led to the irradiation section 3 is injected into the wafer 5 at a dose of 2×10 14 particles/cm 2 . The depth of this B+ implant is approximately 1
．． It is 8 μm. Then, using the apparatus described above, B
Si + is implanted into the wafer 5 into which + has been implanted. That is, by accelerating Si+, 2.58
The energy is MeV, and the dose is 1 x 1013 pieces/cm.
Inject 2. The depth of this Si+ implantation is approximately 2
．． 2 μm, which is deeper than the depth of the B+ implant.

Thereafter, heat treatment is performed at 900° C. for 20 minutes to activate the implanted ions. FIG. 2 shows a TEM photograph of the state in which crystal defects were generated when the embodiment of the present invention described above was carried out. Linear and loop-shaped crystal defects generated during B+ implantation are sucked into a position deeper than 1.8 μm during the subsequent step of implanting Si+ to a depth of approximately 2.2 μm and subsequent heat treatment. result,
As shown in FIG. 2, crystal defects around 1.8 μm are considerably suppressed. Moreover, W. X. Compared to the method of Lu et al., the crystal defects are smaller and fewer. On the other hand, no crystal defects were generated in the substrate surface layer. Note that the striped pattern near the surface is due to uneven etching during the preparation of the TEM sample, and is not a crystal defect.

[0013]

[Effects of the Invention] As explained above, according to the present invention, crystal defects generated in deep layers by implanting impurity ions with high energy into a semiconductor substrate are treated with energy equal to or higher than that during implantation of impurity ions. Since silicon ions are absorbed by crystal defects generated by implanting silicon ions into a semiconductor substrate, crystal defects in deep layers are suppressed, and crystal defects do not occur in the surface layer of the substrate.

As a result, it is expected that the development of devices with new structures will be facilitated and new developments will be brought about in the field of semiconductor manufacturing processes.

[Brief explanation of the drawing]

[Fig. 1] Overall configuration diagram of a high-energy ion implantation device used in an embodiment of the present invention

[Figure 2] TEM photograph of the crystal structure of the sample obtained in the example of the present invention

[Figure 3] TEM photograph of the crystal structure of the sample obtained by the conventional example

[Figure 4] TEM photograph of the crystal structure of a sample obtained by another conventional example

[Explanation of symbols]

1...Incidence part 1a...Ion source 2...Acceleration section 3...irradiation part 4a, 4b... Analysis magnet 5...Wafer

Claims (1)

[Claims] Claim 1: After an impurity element is ionized, it is accelerated to a high energy exceeding 200 keV and implanted onto a silicon substrate, and then silicon ions having an energy equal to or higher than that during the ion implantation are implanted into the silicon substrate. A method for suppressing silicon crystal defects caused by ion implantation, the method comprising: thereafter subjecting the substrate to heat treatment.