JPH04192834A - Cyclic data transmission system - Google Patents

Abstract

PURPOSE:To surely secure the synchronism of data by deciding that a transmission error is generated, when a packet is not received within a prescribed time, and outputting a time-up signal by a packet receiving time monitoring means. CONSTITUTION:When a packet is not received within a prescribed time, a packet monitoring timer 25 outputs a time-up signal to a packet control means 23. As a result, the packet control means 23 is transferred from a packet reception waiting state of the transmission number order to a packet reception waiting state of the head number, and comes to receive from the packet of the head number again. In such a way, even if a transmission error is generated on the way of one transmission cycle, one data is not constructed by combination of the packets whose transmission cycles are different in a receiving station, and the synchronism of data is secured surely.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a cyclic data transmission system, and more particularly to a cyclic data transmission system in which periodically refreshed data is divided into a plurality of packets and transmitted. It is something.

(Prior Art) As one of the data transmission systems, data that is periodically refreshed, such as input/output data (I10 data) in a programmable controller system, is stored in multiple buckets! There is a cyclic data transmission system that divides and transmits data.

Conventionally, in the cyclic data transmission system as described in -1, the secondary station (receiving station) always maintains a waiting state for receiving packets in order > j- before transmission, and counts the number of packets received. If this reaches a predetermined number of packets for data, it is assumed that data reception has been completed and MPU access to this data is permitted, or I
It is designed to output to 10 devices.

(Problem to be Solved by the Invention) However, in a cyclic data transmission system using control as described above, a transmission error occurs in the middle of one transmission cycle, and for example, the number of packets for data is 4, the first and second packets were successfully received in order, but if a situation occurs in which the third packet is not properly received, the receiving station:
While receiving the first and second packets, the state waits for reception of the third packet in the next cycle, and continues receiving the third packet in the next cycle. The number is independent of the cycle.
When the number of packets for the data is reached, - data reception is completed, so this data is partially composed of packets with different transmission cycles, and data with different transmission cycles are mixed in one data. become.

In this case, there is a possibility that the received data is different from the data that the next station (transmitting station) is trying to transmit, and correct cyclic data transmission will not be performed, reducing the reliability of the transmission.

The present invention was made by focusing on the problem of "double transmission" in conventional cyclic data transmission systems, and even if a transmission error occurs in the middle of one transmission cycle, the receiving station cannot transmit It is an object of the present invention to provide a cyclic data transmission system that does not construct one piece of data by combining packets with different cycles, and that reliably ensures data spacing.

(Means for Solving the Problems) According to the present invention, in a cyclic data transmission system in which periodically refreshed data is divided into a plurality of packets and transmitted, Packet reception time that measures the reception time of received data, determines whether or not the packet has been received within a predetermined time, and outputs a time-up signal if the packet is not received within a predetermined time. When the time-up signal is not given by the monitoring means and the packet reception time monitoring means, the device enters a state of waiting to receive packets in the order of transmission numbers, and when the time-up signal is received, it enters a state of waiting to receive the packet of the first number. This is achieved by a cyclic data transmission system characterized by having a packet control means for transitioning to .

(Function) According to the above configuration, when a packet is not received within a predetermined time, the packet reception time monitoring means outputs a time-up signal as a transmission error has occurred, and the time-up signal is When output, the packet control means transits from the state of waiting to receive packets in the order of transmission numbers to the state of waiting to receive packets with the first number, and starts receiving packets with the first number again.

(Example) The present invention will be described in detail below with reference to the accompanying drawings.

FIG. 1 shows an example of a multiplex transmission system in which a cyclic data transmission system according to the present invention is preferably implemented. In this multiplex transmission system, a plurality of secondary stations 7 are connected to a primary station 3 connected to the first-ranked controller 1 through a transmission line 5. Each of the plurality of secondary stations 7 is set with a unique communication address, and based on the communication address, it communicates with the primary station 1 in a 1:N polling selection method.
It is designed to communicate.

The secondary station 7 includes a communication control circuit that controls data transmission and reception with the secondary station 1, and an MP that controls the communication control circuit 9.
It has a UII, a RAM 13 that receives and stores received data etc. from the communication control circuit 9, and a power supply circuit 15, and - data refreshed at a constant period from the next station 1 is transmitted to the plurality of packet stations 1. It is designed to be received in a format divided into ~.

As shown in FIG. 2, the communication control circuit 9 implementing the cyclic data transmission system 1 according to the present invention includes a transmitting section 17, a receiving section 19, and a transmitting section 17 and a receiving section 19.
It is composed of a physical layer 21 that connects the transmission line 5 and the transmission line 5, a packet control means 23, and a packet monitoring timer 25.

The RAM 13 is a data memory area divided into packets, and in this embodiment, the first numbered packet O
It has four memory areas 13a, 13b, 13c, and 13d for data from the last numbered packet) to 3.

The packet monitoring timer 25 is activated by a signal from the packet control means 23 upon completion of reception of packet 0 with the first number, in order to measure the reception time of received data for each packet, and upon completion of reception of packets 0.1 and 2. It is reset by a signal from the packet control means 23 each time, and it is determined whether or not the reception of one packet is completed within a predetermined time. If the reception of one packet is not completed within a predetermined time, a time-up signal is generated. It is designed to output to the packet control means 23. This time-up time is set to a predetermined amount longer than the time required to transmit one packet 1 under normal conditions.

When the packet control means 23 is not given a time-up signal, it enters a waiting state for receiving packets in the order of transmission numbers, and upon completion of reception of packet 3 having the last number,
When access is granted to the PUII and a time-up signal is given, the state transitions to a state in which it waits to receive the packet of the first number VG, and this state transition is shown in FIG.

Next, the effect will be explained.

The packet control) roll means 23 initially receives packet 0.
When the receiver 19 receives bucket 1-0, it transfers this data to the memory area 13a for packet 0 data, and transitions to a state where it waits to receive packet 1. At this time, the packet monitoring timer 25 is activated.

When the receiving unit 19 receives the packet 1 within the time-up time of the packet monitoring timer 25, the bucket 1 to the control means 23 transfer the data of the packet l-1 to the packet 1 data memory area], 3b, and perform packet monitoring. Reset timer 25! , and then transitions to a state in which it waits for packet 2 to be received.

If a transmission error occurs under this condition and the receiving unit 19 does not receive packet 2 within the time-up time of the packet monitoring timer 25, the packet monitoring timer 25 times up and the time-up (L is sent to the packet controller).
It becomes like le. As a result, the packet control means 23
transitions to a state in which it waits to receive the packet with the first number, that is, a state in which it waits to receive packet 0. Due to this state transition, reception of packet 3 is no longer performed, and at this time, of course, reception of the last numbered packet is not completed, so access to the MPU II is not permitted.

Then, when packet 0 is transmitted to one receiving unit in the next transmission cycle, the receiving unit 19 receives packet 0, transfers this data to the bucket 0 data memory area 13a again, and again A transition is made to a state in which packet I.1 is waited for. From now on, the final number of packets, i.e. buckets! No transmission error occurs until reception of packet -3, each packet is received normally, and when reception of packet 3 is completed, access to the MPU 11 is permitted.

In FIG. 4, (A) shows the transmission cycle, (B) shows the state transition of the secondary station when the packet monitoring timer control according to the present invention is not performed, and (C) shows the present invention as described in -1- The state transitions of the secondary station when the packet monitoring timer control is performed as shown in FIG. Also, (A) in Figure 5 is the fourth
(B) shows the contents of the packet data memory when the secondary station receives each bucket 1 through the state transition shown in FIG. 4 (C). The contents of the packet data memory when the secondary station receives each packet in the transition are shown.

As is clear from these figures, when the packet monitoring timer control according to the present invention is performed, even if a transmission error occurs in the middle of one transmission cycle, the receiving station can combine packets in different transmission cycles to There is no need to construct data, and data synchronization is maintained.

In the embodiment described above, the number of cyclic data buckets was 4, but the present invention is similar to the embodiment described in -1- in cyclic data transmission using two or more packets. Applies to.

In addition, in the embodiment described in 1-1, the reception time of the received data is measured for each packet, and the time between the completion of reception to one bucket 1 and the completion of reception of the next packet is monitored. However, the present invention can also be implemented by monitoring the time from the start of reception of the packet with the first number until the completion of reception of the packet with the last number.

(Effects of the Invention) As can be understood from the above explanation, according to the cyclic data transmission system 1 according to the present invention, when a packet is not received within a predetermined time, the packet reception time monitoring means outputs a time-up signal. This causes the packet control means to transition from the state of waiting to receive packets in the order of transmission numbers to the state of waiting to receive packets with the first number, and to start receiving packets with the first number again. Therefore, even if a transmission error occurs in the middle of one transmission cycle, the receiving station will not be able to construct one piece of data by combining packets from different transmission cycles (this will ensure data synchronization). will be done.

[Brief explanation of the drawing]

mlr;? J is a block diagram showing an example of a multiplex transmission system in which the six digital data wide-speed system of the present invention is implemented, and FIG. A block diagram showing an embodiment of the control circuit device, FIG. 3 is a state transition diagram showing state transitions in packet reception at the secondary station, and FIG. 4 (
A) shows the transmission cycle, (B) shows the state transition of the secondary station when the packet monitoring timer control according to the present invention is not performed, and (C) indicates the packet monitoring timer control according to the present invention as described above. Figure 5 (A) and Figure 4 (B) respectively show the state transition of the secondary station when
Bucket when the secondary station receives each packet at the state transition shown in!・(B) is a memory area diagram showing the contents of the packet data memory when the secondary station receives each packet in the state transition shown in FIG. 4(C). be. 1...I-place controller 3...-Next station 5...Transmission line 7...Secondary station 9...Communication control circuit 11...MPU 13...RAM 15... Power supply circuit 17...Transmitter 19...Receiver 21...Physical layer 23...Packet control means 25...Packet monitoring timer patent Applicant: OMRON Co., Ltd.
Attorney Patent Attorney Kazu [■Constitutional Regulations Figure 2 Figure 3

Claims (1)

[Claims] 1. In a cyclic data transmission system in which data that is periodically refreshed is divided into a plurality of packets and transmitted, the reception time of the received data is measured and the reception of the packets is determined at a predetermined time. packet reception time monitoring means for determining whether or not a packet has been received within a predetermined time and outputting a time-up signal if the packet reception is not completed within a predetermined time; packet control means, which enters a state of waiting to receive packets in the order of transmission numbers when the time-up signal is not received, and shifts to a state of waiting to receive packets of the first number when the time-up signal is given. Click data transmission system.