JPH0412393A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To obtain a function to perform the enlarged display of a required display part by providing a field memory circuit, a line buffer, and a readout data select circuit in a frame memory circuit, and also providing an enlarged display control circuit to variably control respective signal. CONSTITUTION:The frame memory circuit 4 is equipped with the field memory 41 to store an input video signal, the line buffer 42 to store output data of one line, and the readout data select circuit 43 to output the output data of the line buffer 42 and that of the field memory 41 alternatively. Also, the enlarged display control circuit to variably control the length of a write enable signal which controls data write on the field memory 41, the cycle of a read clock signal which controls data read out of the field memory 41, and the number of times of readout of the same data from the line buffer 42 by the readout data select circuit 43, respectively is provided. Thereby, it is possible to enlarge and display an arbitrary part on a screen.

Description

DETAILED DESCRIPTION OF THE INVENTION <Field of Industrial Application> The present invention relates to a liquid crystal display device that is connected to, for example, a personal computer or the like so as to be replaceable with a CRT display device and displays a screen based on a video signal from the personal computer or the like. It is something.

<Prior Art> For example, in order to drive a CRT display device from a personal computer, a horizontal synchronization signal, a vertical synchronization signal, and a video signal are output. On the other hand, conventional liquid crystal display devices
It is driven by a drive source process that is completely different from that of a CRT display device, as it is driven by applying an alternating current voltage between the transparent electrode and the back electrode of each pixel.

Therefore, a liquid crystal display device that could be connected to a personal computer in a replaceable manner with a CRT display device was proposed (Japanese Unexamined Patent Publication No. 6
(Refer to Publication No. 2-92995), and this liquid crystal display device first stores a CRT display drive signal in a frame memory, and then reads data from the frame memory at a timing suitable for liquid crystal display and displays it on the liquid crystal display unit. It is to be displayed.

<Problems to be Solved by the Invention> However, although the above-mentioned liquid crystal display device can faithfully display a screen based on an input video signal from a personal computer, etc., there are cases where the displayed image is complex or too small. Regarding odor, there is a problem that display information cannot be accurately and reliably transmitted on the display screen because there is no function to enlarge and display unclear parts.

The present invention has been made in view of such conventional problems, and a technical object thereof is to provide a liquid crystal display device having a function of enlarging and displaying a required display area.

Means for Solving the Problems> In the present invention, as a technical means for achieving the above-mentioned problems, a liquid crystal display device is configured as follows. In other words, a liquid crystal display in which a video signal from a personal computer or the like is once stored in a frame memory circuit, and then read out from the frame memory circuit at a timing suitable for liquid crystal display, signal processed to data for liquid crystal display, and displayed on a liquid crystal display unit. In the apparatus, the frame memory circuit includes a field memory for storing an input video signal, a line buffer for storing one line of output data of the field memory, and output data of each of the line buffer and the field memory. a read data select circuit that uniformly outputs the length of a write enable signal that controls data writing to the field memory, a period of a read clock signal that controls data reading from the field memory, and the read data select circuit. The present invention is characterized in that it includes an enlarged display control circuit that variably controls the number of times the same data is read from the line buffer by the circuit.

<Function> When a part of the screen to be enlarged is manually specified, the enlargement display control circuit changes the write enable signal of the field memory in accordance with the specified part, and this write enable signal causes the screen area to be enlarged to be enlarged. Only data is stored in field memory. The read clock signal that determines the timing of reading data from this field memory is also varied by the enlargement display control circuit to a period corresponding to the horizontal enlargement magnification. For example, when enlarging the image twice, the period is changed to twice the period of the clock signal for driving the liquid crystal display during normal display, each dot data is expanded twice and read out from the feed memory, and the display data is It is enlarged twice in the line direction, that is, in the horizontal direction. At this time, one line of the horizontally enlarged output data from the field memory is stored in the line buffer.

When the reading of one line of data from the field memory is completed, the read data select circuit switches to output the read data of the line buffer, and the same line data as previously output from the field memory is output.
Lines of data are output from the frame memory. The number of reads from this line buffer is also controlled by the enlarged display control circuit, but if the display is to be enlarged twice in the vertical direction, the number of reads is one time, which is the same as the output data of the field memory. The data now spans two lines, meaning it has been expanded twice in the vertical direction. From then on,
By repeating the same operation a predetermined number of times, a screen enlarged twice is displayed on the liquid crystal display unit.

In this way, any part of the screen can be enlarged and displayed, so if the image is complex or small, the necessary part can be immediately enlarged and screen information can be conveyed accurately and reliably. .

<Example> Hereinafter, a preferred example of the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram showing details of the frame memory circuit 4 of FIG. 1. In FIG. In these figures, a horizontal/vertical timing and basic clock generation circuit 2 is a frame memory data generation and frame memory writing circuit 3 based on horizontal and vertical synchronization signals for driving a CRT display device inputted from a personal computer or the like. A horizontal timing signal, a vertical timing signal, and a basic clock signal CKI for controlling the operation of the controller are generated.

As shown in FIG.
It generates a control signal WRCT consisting of a write clock signal 5WCK, a write enable signal WE, and a reset write signal R3TW to supply to the field memory 41, and outputs it to the field memory 41, which corresponds to one screen created from a video signal from a personal computer or the like. The memory data D in to be stored are sequentially written into the field memory 41 and temporarily stored.

The frame memory readout and display data creation circuit 5 includes:
The aforementioned basic clock signal CK generated in the liquid crystal display circuit 6
Liquid crystal display driving clock signal CK2 with a longer period than I
Based on the control signals from the enlarged display control circuit 8, the read clock signal 5RCK and read reset signal R3 are supplied to the field memory 41, as shown in FIG.
TR, write clock signal WCK, reset write signal R3TW, read clock signal RCK and reset read signal R3TR supplied to the line buffer 42 of the frame memory circuit 4, and data supplied to the read data select circuit 43 of the frame memory circuit 4. It generates a selection signal 5ELDT and outputs it to the frame memory circuit 4, and selects either the output data D of the field memory 41 or the output data D2 of the line buffer 42 using the data selection signal 5ELDT to create a frame. Memory read data D. In addition to outputting it as ut,
This data D. Based on ut, serial liquid crystal display data suitable for the liquid crystal display unit is created.

The liquid crystal display circuit 6 receives a liquid crystal display driving clock signal CK2.
A liquid crystal display that generates signals conforming to the format of the liquid crystal display unit 7, such as a liquid crystal display drive signal, a data shift clock signal, and an alternating current signal, based on the above, and outputs these signals from the frame memory readout and display data creation circuit 5. A predetermined image is displayed on the liquid crystal display unit 7 by outputting the data together with the data to the liquid crystal display unit 7.

The enlarged display control circuit 8, which is a main part of the present invention, determines whether or not the operator has given an instruction to enlarge a part of the screen, and if it is determined that the enlarged display has been instructed, the enlarged display control circuit 8 The frame memory data creation and frame memory writing circuit 3 and the frame memory reading and display data creation circuit 5 are controlled based on the information on the area and the like. The automatic input signal discrimination circuit 1 discriminates input video signals that differ depending on the type of personal computer, for example, from the input synchronization signal, and controls the horizontal/vertical timing and basic clock generation circuit 2.

3 and 4 schematically show the display screen of the liquid crystal display unit 7. To simplify the explanation, the dot configuration is shown with 10 bits horizontally and 8 lines vertically. Yes, the mesh part is the display. 3 shows a normal display state without an instruction for enlarged display, and FIG. 4 shows a display state in which a portion of the upper left quarter of FIG. 3 is enlarged. Here, if we represent the data of each dot, for example, by representing the intersection of the rAJ bit and the "1" line as "A1", then the 10 x 8 dot data corresponding to one screen described above will be: Al, Bl, . . . are stored in the field memory 41.
・, Jl, A2. . . . are written sequentially like J8. Frame memory read data D. ut
The output data D of the field memory 41 is always selected when there is no instruction for enlarged display.

is the liquid crystal display driving clock signal C from the liquid crystal display circuit 6.
They are read out sequentially in synchronization with K2.

Then, enlarge (
The case where the image is displayed as shown in FIG. 4 with the image doubled both vertically and horizontally will be described with reference to FIGS. 5 and 6. (a) of FIG. 5 is a write clock signal for the field memory 41, and (b) to (d) of FIG. 5 are a write enable signal without enlargement of the horizontal component, a write enable signal for frame memory read data, and enlarged display, respectively. same(
e) to (g) respectively show vertical component frame memory read data, a write enable signal without enlargement, and a write enable signal for enlarged display. As shown in the figure, the write enable signal WE from the frame memory data creation and frame memory writing circuit 3 to the frame memory circuit 4 is controlled by the control signal from the enlarged display control circuit 8, and the enlargement of each of the horizontal and vertical components is controlled. In response to the display write enable signal, only 5×4 pieces of data corresponding to one frame of the input video signal, that is, one quarter of the data for one screen, are extracted and written into the field memory 41.

On the other hand, the frame memory readout and display data creation circuit 5 is also controlled by the enlarged display control circuit 8. This operation will be explained with reference to FIG.

The read clock signal 5RCK ((b) in the same figure) for reading data from the field memory 41 is switched to a period obtained by dividing the frequency of the clock signal CK2 ((a) in the same figure) for driving the liquid crystal display by 172. Field memory 4 is activated by read clock signal 5RCK with twice the period.
Output data DI ((C) in the same figure) is read from 1.

At this time, the data selection signal 5ELDT ((g) in the figure) is at a low level and the field memory 41 is selected, so the output data D of the field memory 41 is read out from the frame memory via the read data selection circuit 43. Data D. It is output as ut ((h) in the same figure). This frame memory read data D. When ut is input to the frame memory readout and display data generation circuit 5, it is sampled by the liquid crystal display drive clock signal CK2 with a period of 1/2 of the read clock signal 5RCK, so frame memory readout and display data generation is performed. Enlarged display data input to circuit 5 ((i) in the same figure)
is the same data sampled twice,
It is enlarged twice horizontally.

At the same time, the output data D of the field memory 41,
However, the same dot data is sampled twice each time using the write clock signal WCK having the same period as the liquid crystal display driving clock signal CK2 (see (d) in the same figure), and the line buffer 4
Written to 2.

The above operation is performed when the read clock signal 5RCK and the write clock signal WCK are completed when the reading of one line of four data from the field memory 41 and the writing of one line of eight data to the line buffer 42 are completed.
Interrupts when there is no output. Subsequently, a read clock signal RCK (FIG. 4(e)) having the same period as the liquid crystal display drive clock signal CK2 is given to the line buffer 42, and the horizontally doubled signal from the field memory 41 written in the line buffer 42 is Expanded output data D.

is read out, and this output data D2 ((f) in the same figure) is applied to the data selection signal 5E, which is at a high level at this time.
Frame memory read data D selected by LDT. , , t, and input to the frame memory reading and display data creation circuit 5 as enlarged display data. In this way, by inputting the same data string to two lines, the data is enlarged twice in height.

By repeating the above operation 4 times, ^1. 81. B
l, Bl,...El, El, Al.

AI...El, El, A2. 82. ...E4
．． Enlarged display data E4 is created and enlarged as shown in FIG. 4.

That is, when a portion of the screen to be enlarged is manually instructed, the write enable signal WE of the field memory 41 is changed in response to the instruction, the enlarged area is determined, and a read clock signal to the field memory 41 is generated. The horizontal magnification is determined by the frequency division ratio of the liquid crystal display driving clock signal CK2, and the vertical magnification is further determined by the number of times of reading from the line buffer 42.

<Effect of the invention> = 14 As described above, according to the liquid crystal display device of the present invention, any part of the screen can be enlarged and displayed, so when the image is complicated or too small, the necessary part can be enlarged. It is possible to instantly enlarge and display screen information and accurately and reliably transmit the screen information. It is also possible to highlight any part of the display screen by enlarging it.

[Brief explanation of drawings]

FIG. 1 is a block configuration diagram of an embodiment of the present invention, FIG. 2 is a detailed block configuration diagram of a part of FIG. 1, FIG. 3 is a schematic diagram showing the above-mentioned normal display state, and FIG. 4 is a schematic diagram of a part of Figure 3 in an enlarged display state, Figure 5 is a timing chart of writing to the frame memory circuit when displaying Figure 4, and Figure 6 is a frame memory circuit when displaying Figure 4. 3 is a timing chart of reading from. 4...Frame memory circuit 7...Liquid crystal display unit 8...Enlarged display control circuit 41...Field memory 42...Line buffer 43...Read data selection circuit

Claims (1)

[Claims] (1) After a video signal from a personal computer, etc. is stored in a frame memory circuit, it is read out from the frame memory circuit at a timing suitable for liquid crystal display, signal processed to data for liquid crystal display, and displayed on the liquid crystal display unit. In the display device, the frame memory circuit includes a field memory for storing an input video signal, a line buffer for storing one line of output data of the field memory, and output data of each of the line buffer and the field memory. a read data select circuit that selectively outputs data, the length of a write enable signal that controls data writing to the field memory, the period of a read clock signal that controls data reading from the field memory, and the read data. A liquid crystal display device comprising an enlarged display control circuit that variably controls the number of times the same data is read from the line buffer by the select circuit.