JP7525783B2 - Semiconductor Circuit Breaker - Google Patents

Description

One aspect of the present invention relates to a semiconductor circuit breaker.

In recent years, various technologies have been proposed for semiconductor circuit breakers. For example, Patent Document 1 discloses a semiconductor circuit breaker that aims to quickly cut off current when an accident occurs, and to cut off current by suppressing the generation of surge voltage when the power system is operating normally. Patent Document 2 discloses a semiconductor circuit breaker that aims to quickly cut off overcurrent while suppressing the overvoltage generated when a transistor is cut off to a certain set electromotive voltage or less.

Patent No. 6497488 JP 2015-12706 A

However, as described below, there is still room for improvement in terms of how to improve the versatility of semiconductor circuit breakers. One aspect of the present invention aims to provide a semiconductor circuit breaker that is more versatile than conventional devices.

To solve the above problem, a semiconductor cutoff device according to one aspect of the present invention includes a semiconductor switch, a current sensor that detects the value of a current flowing through the semiconductor switch, and a control unit that cuts off the semiconductor switch based on a time limit characteristic that indicates the allowable continuous current flow time corresponding to the current value.

According to one aspect of the present invention, it is possible to provide a semiconductor circuit breaker device that is more versatile than conventional devices.

1 is a block diagram showing a configuration of a main part of a semiconductor cutoff device according to a first embodiment; 4 is a graph illustrating a time limit characteristic set in a switching control unit of the first embodiment. FIG. 2 is a block diagram showing a configuration of a main part of a semiconductor cutoff device as a comparative example. FIG. 11 is a block diagram showing the configuration of a main part of a semiconductor cutoff device according to a second embodiment. 10 is a graph illustrating a time limit characteristic set in a switching control unit of the second embodiment. FIG. 11 is a block diagram showing a configuration of a main part of a semiconductor cutoff device according to a third embodiment.

[Embodiment 1]
The semiconductor cutoff device 1 of the first embodiment will be described below. For convenience of explanation, the same reference numerals will be used in the following embodiments for components having the same functions as those described in the first embodiment, and the description will not be repeated. For the sake of brevity, the description of matters similar to those in the known art will be omitted as appropriate. In addition, the device configurations shown in the figures are merely examples for convenience of explanation. Therefore, the positional relationship of each component is not limited to the examples in the figures. Furthermore, please note that the numerical values described below in the specification are also merely examples. Please also note that each graph is not necessarily drawn to scale.

(Overview of semiconductor circuit breaker 1)
1 is a block diagram showing the configuration of a main part of a semiconductor shutoff device 1. The semiconductor shutoff device 1 is provided between a first terminal T1 and a second terminal T2. The semiconductor shutoff device 1 is configured to selectively shut off a current flowing between the first terminal T1 and the second terminal T2 (e.g., a current flowing from the first terminal T1 to the second terminal T2). As an example, the first terminal T1 is connected to a power source (not shown), and the second terminal T2 is connected to a load device (not shown).

For simplicity, in the first embodiment, the semiconductor circuit breaker 1 is a DC semiconductor circuit breaker. The values of each voltage and current described in the first embodiment are the magnitude (absolute value) of each voltage and current. However, the semiconductor circuit breaker 1 may be an AC semiconductor circuit breaker. In this case, the values of each voltage and current described in the first embodiment may be interpreted as the effective value of each voltage and current.

The semiconductor cutoff device 1 includes a control circuit 10 (control unit), a semiconductor switch 20, a current sensor 30, a voltage sensor 35, a snubber circuit 40, and a mechanical switch 50. The control circuit 10 includes a switching control unit 110 and a V/I conversion unit 120 (voltage-current conversion unit). In the first embodiment, the control circuit 10 is configured by an FPGA (Field Programmable Gate Array).

The semiconductor switch 20 is provided between the first terminal T1 and the second terminal T2. The ON/OFF (switching state, conductive state) of the semiconductor switch 20 is controlled in response to a switching control signal applied to the semiconductor switch 20. In the example of the first embodiment, the conductive state of the semiconductor switch 20 is controlled in response to a gate control signal applied to the gate G of the semiconductor switch 20. The gate control signal is an example of a switching control signal according to one aspect of the present invention. As described below, the gate control signal is generated by the control circuit 10.

During normal operation of the semiconductor cutoff device 1, the semiconductor switch 20 is ON. The phrase "semiconductor switch 20 is ON" can be read as "semiconductor switch 20 is conductive (closed)." In contrast, the phrase "semiconductor switch 20 is OFF" can be read as "semiconductor switch 20 is non-conductive (open, cut off)." These descriptions regarding the ON/OFF of the semiconductor switch 20 also apply to the mechanical switch 50.

In FIG. 1, an IGBT (Insulated Gate Bipolar Transistor) is shown as an example of the semiconductor switch 20. In the example of FIG. 1, the emitter of the semiconductor switch 20 is connected to the second terminal T2 via node N3. The collector of the semiconductor switch 20 is connected to the first terminal T1 via node N2 and the mechanical switch 50.

However, the semiconductor switch 20 is not limited to an IGBT. The semiconductor switch 20 may be any semiconductor element whose conduction state can be controlled in response to a switching control signal. For example, the semiconductor switch 20 may be a GTO (Gate Turn-Off thyristor).

The snubber circuit 40 is an example of a protection circuit for suppressing an overvoltage that occurs when the semiconductor switch 20 is turned off. The snubber circuit 40 is connected in parallel with the semiconductor switch 20. In the example of FIG. 1, the two terminals of the snubber circuit 40 are connected to nodes N1 and N3, respectively. The node N1 is a node at the same potential as the node N2, and the node N4 is a terminal at the same potential as the node N3.

The mechanical switch 50 is provided in front of the semiconductor switch 20 (i.e., closer to the first terminal T1 than the semiconductor switch 20) in the electrical path between the first terminal T1 and the second terminal T2. As shown in FIG. 1, during normal operation of the semiconductor cutoff device 1, the mechanical switch 50 is ON.

The mechanical switch 50 is provided to further electrically insulate the first terminal T1 from the second terminal T2 after the semiconductor switch 20 has cut off the current flowing between the first terminal T1 and the second terminal T2. Therefore, the mechanical switch 50 is turned OFF after the semiconductor switch 20 is turned OFF. In this way, the mechanical switch 50 is a backup switch in the semiconductor cutoff device 1. The conductive state of the mechanical switch 50 may be controlled by the control circuit 10.

Note that while FIG. 1 illustrates a semiconductor circuit breaker 1 equipped with a snubber circuit 40 and a mechanical switch 50, the snubber circuit 40 and the mechanical switch 50 are not essential components of the semiconductor circuit breaker 1.

The current sensor 30 detects the current flowing through the semiconductor switch 20. In the example of FIG. 1, the current sensor 30 is provided between the first terminal T1 and the mechanical switch 50. Note that, since the impedance of the snubber circuit 40 is sufficiently large, when the semiconductor switch 20 is ON, the current flowing through the snubber circuit 40 is almost zero (negligible). Therefore, the current passing through the current sensor 30 in FIG. 1 can be regarded as the current flowing through the semiconductor switch 20.

In addition, the current sensor 30 may be disposed at a position different from that shown in the example of FIG. 1. For example, the current sensor 30 may be disposed between node N1 and node N2. The current flowing through the semiconductor switch 20 may also be interpreted as the current flowing through the load device.

In this specification, the value of the current (current value) detected by the current sensor 30 is also referred to as the first current value. As shown in FIG. 1, the switching control unit 110 (more specifically, the first determination unit 111 and the second determination unit 112 described later) obtains the first current value from the current sensor 30. Hereinafter, the first current value is also referred to as I1.

The voltage sensor 35 detects the voltage applied to the semiconductor switch 20. In the example of FIG. 1, the voltage sensor 35 detects the potential difference between the node N2 and the node N3. That is, the voltage sensor 35 detects the potential difference between the collector and emitter of the semiconductor switch 20.

For convenience, in this specification, the voltage value (voltage value) detected by the voltage sensor 35 is also referred to as the first voltage value. Hereinafter, the first voltage value is also referred to as V1. The V/I conversion unit 120 acquires V1 from the voltage sensor 35. The V/I conversion unit 120 then converts V1 into a current value by performing a known calculation (conversion calculation). In this specification, the current value derived by the conversion calculation by the V/I conversion unit 120 is also referred to as the second current value. As shown in FIG. 1, the switching control unit 110 (more specifically, the third determination unit 113 described later) acquires the second current value from the V/I conversion unit 120. Hereinafter, the second current value is also referred to as I2.

The conversion calculation in the V/I conversion unit 120 is performed so as to derive I2, which has a positive correlation with V1. As an example, the V/I conversion unit 120 performs the conversion calculation using a predetermined proportional equation that represents the proportional relationship between V1 and I2. For this reason, I2 in the first embodiment can be said to be one of the indices that represent the magnitude of V1.

(Switching control unit 110)
The switching control section 110 includes a first determination section 111, a second determination section 112, a third determination section 113, and an OR circuit 119. The switching control section 110 also includes a timer (not shown).

In the switching control unit 110 in the first embodiment, (i) a time limit characteristic corresponding to a first current value (more specifically, a time limit characteristic indicating a continuous current allowable time corresponding to the first current value) and (ii) a time limit characteristic corresponding to a second current value (more specifically, a time limit characteristic indicating a continuous current allowable time corresponding to the second current value) are preset. In this specification, the time limit characteristic corresponding to the first current value is also referred to as a first type time limit characteristic. Also, the time limit characteristic corresponding to the second current value is also referred to as a second type time limit characteristic.

2 is a graph illustrating the time limit characteristic set in the switching control unit 110. The horizontal axis in the graph of FIG. 2 indicates the current value. The unit of the horizontal axis is a percentage value with the rated current value of the semiconductor circuit breaker 1 as the reference value (100%). The vertical axis in the graph of FIG. 2 indicates the continuous current permissible time (the time during which continuous current of a certain current value is permitted). On the vertical axis of FIG. 2, the continuous current permissible time is abbreviated as "time". The unit of the vertical axis is seconds (s). Hereinafter, the value on the horizontal axis (current value) in the graph of FIG. 2 will be referred to as I, and the value on the vertical axis (time) will be referred to as t.

The functions OC1 and OC2 in the graph of FIG. 2 are functions that define the first type of time-limited characteristic. The term "OC" is intended to be an abbreviation of "Over Current." The functions OC1 and OC2 are preset in the first judgment unit 111 and the second judgment unit 112, respectively. On the other hand, the function OC3 is a function that defines the second type of time-limited characteristic. The function OC3 is preset in the third judgment unit 113. In the following explanation, the functions OC1 to OC3 are also simply abbreviated as OC1 to OC3, respectively. As shown in FIG. 2, 0<Ia<Ib<Ic and 0<tc<tb<ta.

As shown in Figure 2, OC1 specifies the first type of time-limited characteristic in the range of Ia ≤ I ≤ Ib. In the example of Figure 2, Ia = 105% and Ib = 130%. The values of Ia and Ib in the example of Figure 2 are set mutatis mutandis in accordance with the indicated values of overload conditions described in "JIS C 8201-2-1".

2, OC1 is set as a straight line connecting point A (Ia, ta) and point B (Ib, tb). That is, OC1 is expressed by the following formula (1):
t={(tb-ta)/(Ib-Ia)}×(I-Ia)+ta...(1)
2, ta=10 ³ s, tb=10 ⁰ s=1 s. The values of ta and tb in the example of FIG. 2 are set in accordance with the specification ratings of the mechanical switch 50.

OC2 specifies the first type time-limited characteristic in the range Ib≦I≦Ic. In the example of FIG. 2, Ic=1500%. The value of Ic in the example of FIG. 2 is set as the upper limit of the current value that is allowed to flow through the semiconductor switch 20 for a short period of time.

2, OC2 is set as a straight line connecting point B (Ib, tb) and point C (Ic, tc). That is, OC2 is expressed by the following formula (2):
t={(tc-tb)/(Ic-Ib)}×(I-Ib)+tb...(2)
In the example of Fig. 2, tc = ^10-6 s = 1 µs. The value of tc in the example of Fig. 2 is set with the intention of quickly turning off the semiconductor switch 20 when, for example, a short-circuit fault occurs in the load device. Therefore, tc is set to a time (for example, a time on the order of µs) that is sufficiently shorter than ta and tb.

As is clear from equations (1) and (2), OC1 and OC2 are set so that t (the continuous current-carrying time corresponding to the current value I) decreases as I (the current value) increases. That is, OC1 and OC2 define an inverse time characteristic. In this way, the first type of time characteristic is set as an inverse time characteristic. For the above reasons, the inverse time characteristic defined by OC1 may be called the first inverse time characteristic (or the first time characteristic within the first type of time characteristic). Similarly, the inverse time characteristic defined by OC2 may be called the second inverse time characteristic (or the second time characteristic within the first type of time characteristic).

From the above, Ia may be referred to as the lower limit of the current setting value in the first type time-limited characteristic (more specifically, in the first time-limited characteristic within the first type time-limited characteristic). Also, ta may be referred to as the upper limit of the setting value of the continuous current-carrying permissible time in the first type time-limited characteristic.

Ib may be referred to as the upper limit of the current setting value in the first time-limit characteristic of the first type of time-limit characteristic. Ib is also the lower limit of the current setting value in the second time-limit characteristic of the first type of time-limit characteristic. Furthermore, tb may be referred to as the lower limit of the setting value of the continuous current-permitted time in the first time-limit characteristic of the first type of time-limit characteristic. tb is also the upper limit of the setting value of the continuous current-permitted time in the second time-limit characteristic of the first type of time-limit characteristic.

OC3 defines the second type time-limited characteristic in the range of I≧Ic. In the example of FIG. 2, OC3 is set as a straight line that passes through point C and is parallel to the horizontal axis. That is, OC3 is expressed by the following formula (3):
t = tc ... (3)
In this way, OC3 is set as a function (constant function) that takes a constant value (tc) regardless of I. In other words, OC3 specifies a definite time characteristic. In this way, the second type time characteristic is set as a definite time characteristic.

For the above reasons, tc may be referred to as the set value of the continuous current permissible time in the fixed time characteristic. tc is also the lower limit of the set value of the continuous current permissible time in the first type of time characteristic (more specifically, in the second time characteristic within the first type of time characteristic). Also, Ic may be referred to as the lower limit of the current set value in the second type of time characteristic. Ic is also the upper limit of the current set value in the first type of time characteristic (more specifically, in the second time characteristic within the first type of time characteristic).

Next, the operation of the first judgment unit 111 to the third judgment unit 113 will be described. The first judgment unit 111 acquires I1 from the current sensor 30. If Ia≦I1≦Ib, the first judgment unit 111 uses OC1 to calculate the continuous current permissible time (hereinafter referred to as t11) corresponding to I1. Specifically, the first judgment unit 111 calculates t11 by substituting I1 for I in formula (1). Next, the first judgment unit 111 determines whether or not a current value equal to or greater than I1 has continued for a time longer than t11. Hereinafter, the condition that "a current value equal to or greater than I1 has continued for a time longer than t11" is also referred to as the first interruption condition.

The first judgment unit 111 generates a first judgment result signal (hereinafter referred to as X1) which is a signal indicating its own judgment result, and supplies X1 to the OR circuit 119. X1 in the first embodiment is a binary digital signal. This also applies to X2 and X3 described later. In the first embodiment, when the first judgment unit 111 judges that the first interruption condition is satisfied, it sets the value of X1 (signal value) as X1=1. In other cases, the first judgment unit 111 sets the value of X1 as X1=0.

The second determination unit 112 acquires I1 from the current sensor 30. If Ib≦I1≦Ic, the second determination unit 112 uses OC2 to calculate the allowable continuous current flow time (hereinafter referred to as t12) corresponding to I1. Specifically, the second determination unit 112 calculates t12 by substituting I2 for I in formula (2). It is determined whether a current value equal to or greater than I1 continues for a time longer than t12. Hereinafter, the condition that "a current value equal to or greater than I1 continues for a time longer than t12" is also referred to as the second interruption condition.

The second judgment unit 112 generates a second judgment result signal (hereinafter referred to as X2) indicating its own judgment result, and supplies X2 to the OR circuit 119. In the first embodiment, if the second judgment unit 112 judges that the second interruption condition is satisfied, it sets the value of X2 as X2=1. In other cases, the second judgment unit 112 sets the value of X2 as X2=0.

The third determination unit 113 obtains I2 from the V/I conversion unit 120. If I2 ≧ Ic, the third determination unit 113 uses OC3 to calculate the allowable continuous current flow time (hereinafter referred to as t13) corresponding to I2. In the third embodiment, the third determination unit 113 sets t13 as t13=tc regardless of the magnitude of I2 (see formula (3) above). Next, the third determination unit 113 determines whether a current value equal to or greater than I2 has continued for a time longer than t13. Hereinafter, the condition that "a current value equal to or greater than I2 has continued for a time longer than t13" is also referred to as the third shutoff condition.

The third determination unit 113 generates a third determination result signal (hereinafter referred to as X3) indicating its own determination result, and supplies X3 to the OR circuit 119. In the first embodiment, if the third determination unit 113 determines that the third interruption condition is satisfied, it sets the value of X3 as X3=1. In other cases, the third determination unit 113 sets the value of X3 as X3=0.

The OR circuit 119 in the first embodiment is an example of a three-input, one-output logic gate. The OR circuit 119 receives (i) X1 from the first judgment unit 111, (ii) X2 from the second judgment unit 112, and (iii) X3 from the third judgment unit 113. The OR circuit 119 generates the sum (logical sum) of X1, X2, and X3 as an output signal (hereinafter referred to as Y).

That is, the OR circuit 119 calculates the following equation (4):
Y=X1+X2+X3...(4)
Then, the OR circuit 119 supplies Y to the gate G. Y in the first embodiment is an example of a gate control signal. For the above reasons, a switching control unit according to one aspect of the present invention may be referred to as a switching control signal generation unit (gate control signal generation unit).

In the first embodiment, Y=1 corresponds to a gate OFF signal, and Y=0 corresponds to a gate ON signal (gate). As is clear from the above formula (4), when at least one of X1, X2, and X3 has a value of 1, Y=1. Therefore, when at least one of the first blocking condition, the second blocking condition, and the third blocking condition is satisfied, Y is supplied to the gate G as a gate OFF signal, thereby turning off the semiconductor switch 20.

On the other hand, if all of the values of X1, X2, and X3 are 0, then Y = 0. Therefore, if the first, second, and third blocking conditions are not all satisfied, the gate ON signal Y is supplied to the gate G, turning on the semiconductor switch 20.

Comparative Example
Before describing the effects of the semiconductor shutoff device 1, a semiconductor shutoff device 1r will be described as a comparative example. FIG. 3 is a block diagram showing the configuration of the main parts of the semiconductor shutoff device 1r. The semiconductor shutoff device 1r is an example of a conventional semiconductor shutoff device. The control circuit of the semiconductor shutoff device 1r is called a control circuit 10r. Unlike the control circuit 10, the control circuit 10r has a switching control section formed only by a determination section 111r. Also, unlike the semiconductor shutoff device 1, the semiconductor shutoff device 1r does not have a voltage sensor 35 and a V/I conversion section 120.

The judgment unit 111r is a judgment unit that is paired with the first judgment unit 111. However, unlike the first judgment unit 111, the judgment unit 111r does not have a time limit characteristic (first type time limit characteristic). As described below, in the semiconductor cutoff device 1r, the conductive state of the semiconductor switch 20 is controlled based only on the instantaneous value of I1, regardless of the duration of I1.

The judgment unit 111r acquires I1 from the current sensor 30. The judgment unit 111r judges whether I1 exceeds a predetermined threshold Ith. Hereinafter, the condition that "I1 exceeds Ith (I1>Ith)" is also referred to as the interruption condition in the comparative example. Ith may be referred to as the rated interruption current of the semiconductor switch 20 in the comparative example. As an example, Ith=200%. Then, the judgment unit 111r generates a judgment result signal (hereinafter referred to as Xr), which is a signal indicating its own judgment result, and supplies Xr to the gate G. In the comparative example, Xr is used as a gate control signal.

When the judgment unit 111r judges that the blocking condition in the comparative example is satisfied, it sets the value of Xr as Xr = 1. In other cases, the judgment unit 111r sets the value of Xr as Xr = 0. In the comparative example, Xr = 1 corresponds to a gate OFF signal, and Xr = 0 corresponds to a gate ON signal. Therefore, in the comparative example, when the blocking condition is satisfied, Xr is supplied to the gate G as a gate OFF signal, and the semiconductor switch 20 is turned OFF. On the other hand, when the blocking condition is not satisfied, Xr is supplied to the gate G as a gate ON signal, and the semiconductor switch 20 is turned ON.

(effect)
As shown in the comparative semiconductor circuit breaker 1r, in conventional semiconductor circuit breakers, the conductive state of the semiconductor switch 20 is generally controlled based only on the instantaneous value of I1, regardless of the duration of I1.

In response to this, the inventors of the present application (hereinafter referred to as the inventors) came up with a new, different idea from the conventional one of "setting a time limit characteristic for controlling the conductive state of the semiconductor switch 20." For example, the above-mentioned Patent Documents 1 and 2 make no mention of this idea. The inventors then created a new semiconductor cutoff device 1 based on this idea.

It is known that a temporary large current that is not caused by an accident in the load device (hereinafter referred to as a non-fault large current) may flow through the load device. One example of a non-fault large current is the inrush current that flows through the load device when the load device starts up. Since a non-fault large current is not an accident current (a large current caused by an accident in the load device), there is no need to interrupt the non-fault large current with a semiconductor circuit breaker.

However, in a conventional semiconductor cutoff device (e.g., semiconductor cutoff device 1r), when a large non-fault current (I1) larger than Ith flows instantaneously, the semiconductor switch 20 is turned off. Thus, in the semiconductor cutoff device 1r, unnecessary cutoff of the semiconductor switch 20 may occur.

In contrast, in the semiconductor circuit breaker 1, a time limit characteristic is set, similar to a conventional mechanical circuit breaker. Specifically, in the semiconductor circuit breaker 1, a first type time limit characteristic (inverse time limit characteristic) is set. Therefore, in the semiconductor circuit breaker 1, the conductive state of the semiconductor switch 20 can be controlled (the semiconductor switch 20 can be cut off) based on the first type time limit characteristic.

For this reason, in the semiconductor cutoff device 1, even if a non-fault large current (I1) larger than Ith flows instantaneously, the non-fault large current flows for a very short period of time, so the semiconductor switch 20 remains ON. In this way, unlike the semiconductor cutoff device 1r, the semiconductor cutoff device 1 makes it possible to prevent unnecessary cutoff of the semiconductor switch 20. As described above, the semiconductor cutoff device 1 can provide a semiconductor cutoff device that is more versatile than conventional devices.

The semiconductor circuit breaker 1 is easy to operate even for users who are accustomed to using conventional mechanical circuit breakers. As described above, the semiconductor circuit breaker 1 is set with time-limit characteristics similar to those of conventional mechanical circuit breakers. For this reason, the semiconductor circuit breaker 1 is particularly useful for users who are unfamiliar with using conventional semiconductor circuit breakers.

In addition, the semiconductor circuit breaker 1 is further configured with a second type time limit characteristic (definite time limit characteristic). Therefore, the semiconductor circuit breaker 1 can control the conductive state of the semiconductor switch 20 (can cut off the semiconductor switch 20) based on the second type time limit characteristic.

The second type time-limit characteristic is a time-limit characteristic that is not provided in conventional mechanical circuit breakers. By providing the second type time-limit characteristic, the fault current can be interrupted quickly. This is because when a fault current occurs, V1 becomes sufficiently large, and as a result, I2 also becomes sufficiently large. An example of a fault current is the short-circuit current of a load device (the current that flows through the load device when the load device has a short-circuit fault).

In this way, by providing the second type time-limited characteristic, the semiconductor circuit breaker 1 achieves the same effect as a conventional semiconductor circuit breaker, that is, "high-speed interruption of fault current." This effect is not possible with a conventional mechanical circuit breaker (a circuit breaker having only an inverse time-limited characteristic). As described above, the semiconductor circuit breaker 1 can obtain the advantages of both a conventional mechanical circuit breaker and a conventional semiconductor circuit breaker.

(supplement)
In the conventional semiconductor circuit breaker, data processing from obtaining the current value to the semiconductor switch interruption process required at least several tens of microseconds to several hundreds of microseconds. For this reason, in the conventional semiconductor circuit breaker, it was difficult to provide a time limit characteristic (e.g., the second type time limit characteristic in the first embodiment) for quickly interrupting the fault current.

In contrast, in the first embodiment, the control circuit 10 (switching control unit 110 and V/I conversion unit 120) is configured with an FPGA. An FPGA is known as an example of hardware capable of realizing high-speed data processing (high-speed calculation). With an FPGA, data processing from obtaining the current values (first current value and second current value) to the interruption processing of the semiconductor switch 20 can be performed in a short time of about several μs to several tens of μs. Therefore, with an FPGA, it is possible to handle a steep rise in the current value of several tens of A/μs.

As described above, the FPGA makes it easy to set the time limit characteristic (particularly the second type time limit characteristic) for quickly interrupting the fault current. For example, in order to quickly interrupt the fault current, it is preferable that tc is set to 10 μs (10 ⁻⁵ s) or less. Furthermore, in order to interrupt the fault current even faster, it is more preferable that tc is set to several μs or less. As an example, it is more preferable that tc is set to 1 μs (10 ⁻⁶ s) or less.

In addition, in the semiconductor circuit breaker 1, from the viewpoint of distinguishing between the first type time limit characteristic and the second type time limit characteristic, it is preferable that Ic is set sufficiently larger than Ia. As an example, it is preferable that Ic is set to 10 times or more larger than Ia.

[Embodiment 2]
In the first embodiment, a case where two different time limit characteristics, a first time limit characteristic in the first type time limit characteristic and a second time limit characteristic in the first type time limit characteristic, are included in the first type time limit characteristic is illustrated. However, the second time limit characteristic in the first type time limit characteristic does not necessarily have to be set. In the range of Ia≦I≦Ic, one (single) first type time limit characteristic may be set. That is, the first type time limit characteristic may be only the first time limit characteristic in the first type time limit characteristic. Therefore, in the semiconductor cutoff device according to one aspect of the present invention, the second determination unit 112 is not an essential component.

Figure 4 is a block diagram showing the configuration of the main parts of the semiconductor shutoff device 2 of embodiment 2. The control circuit of the semiconductor shutoff device 2 is referred to as the control circuit 10A (control unit). The switching control unit of the semiconductor shutoff device 2 is referred to as the switching control unit 110A. The switching control unit 110A includes a first determination unit 111A, a third determination unit 113, and an OR circuit 119A. Unlike the semiconductor shutoff device 1, the semiconductor shutoff device 2 does not include the second determination unit 112.

Fig. 5 is a graph illustrating a time-limit characteristic set in the switching control unit 110A. The function OC1v in Fig. 5 is set in advance in the first determination unit 111A. As shown in Fig. 5, OC1v defines a first type time-limit characteristic (first type time-limit characteristic in the second embodiment) in the range of Ia ≤ I ≤ Ic. In the example of Fig. 5, OC1v is set as a straight line connecting point A (Ia, ta) and point C (Ic, tc). That is, OC1v is expressed by the following formula (5):
t={(tc-ta)/(Ic-Ia)}×(I-Ia)+ta...(5)
It is set as follows.

The first judgment unit 111A acquires I1 from the current sensor 30. Then, the first judgment unit 111A uses OC1v to calculate the continuous current permissible time (hereinafter referred to as t11v) corresponding to I1. Specifically, the first judgment unit 111A calculates t11v by substituting I1 for I in equation (5). Next, the first judgment unit 111A judges whether a current value equal to or greater than I1 continues for a time longer than t11v.

Hereinafter, the condition that "a current value equal to or greater than I1 continues for a time longer than t11v" is also referred to as the first interruption condition in embodiment 2. When the first determination unit 111A determines that the first interruption condition in embodiment 2 is satisfied, it sets the value of X1 as X1=1. In other cases, the first determination unit 111A sets the value of X1 as X1=0.

As described above, the semiconductor shutoff device 2 does not have the second determination unit 112. Therefore, the semiconductor shutoff device 2 is provided with an OR circuit 119A as a two-input, one-output logic gate. The OR circuit 119A is expressed by the following formula (6):
Y=X1+X3...(6)
Then, the OR circuit 119A supplies Y to the gate G. The control circuit 10A can also turn off the semiconductor switch 20 based on the first type time limit characteristic and the second type time limit characteristic.

[Embodiment 3]
In the second embodiment, a case where two types of time limit characteristics, a first type time limit characteristic and a second type time limit characteristic, are set is exemplified. However, in the semiconductor shutoff device according to one aspect of the present invention, only the first type time limit characteristic may be set. Therefore, in the semiconductor shutoff device according to one aspect of the present invention, the voltage sensor 35, the V/I conversion unit 120, and the third determination unit 113 are not essential components. Furthermore, the OR circuits 119 and 119A are not essential components in the semiconductor shutoff device according to one aspect of the present invention.

Figure 6 is a block diagram showing the configuration of the main parts of the semiconductor shutoff device 3 of embodiment 3. The control circuit of the semiconductor shutoff device 3 is referred to as the control circuit 10B (control unit). The control circuit 10B includes a first determination unit 111A. Unlike the semiconductor shutoff device 2, the semiconductor shutoff device 3 does not include the voltage sensor 35, the V/I conversion unit 120, the third determination unit 113, and the OR circuit 119A. In the semiconductor shutoff device 3, the switching control unit is composed only of the first determination unit 111A.

As shown in FIG. 6, in the semiconductor shutoff device 3, the first judgment unit 111A supplies X1 to the gate G. That is, in the semiconductor shutoff device 3, X1 is supplied to the gate G as a gate control signal. In the third embodiment, X=1 corresponds to a gate OFF signal, and X=0 corresponds to a gate ON signal. As described above, the control circuit 10B can also shut off the semiconductor switch 20 based on the first type time limit characteristic.

[Modifications]
(1) In each of the above-described embodiments, the first type time characteristic is an inverse time characteristic. However, the first type time characteristic does not necessarily have to be an inverse time characteristic. For example, the first type time characteristic may be a fixed time characteristic. However, from the viewpoint of "setting a time characteristic similar to that of a conventional mechanical cutoff device," it is preferable that the first type time characteristic is an inverse time characteristic.

(2) In each of the above-described embodiments, the second type time characteristic is a definite time characteristic. However, the second type time characteristic does not necessarily have to be a definite time characteristic. For example, the second type time characteristic may be an inverse time characteristic. However, from the viewpoint of "speeding up data processing by simplifying calculations," it is preferable that the second type time characteristic is a definite time characteristic.

(3) The first type time characteristic may include three or more different time characteristics. Thus, in a semiconductor circuit breaker according to one aspect of the present invention, the first type time characteristic may include m (m is an integer equal to or greater than 1) different time characteristics. Hereinafter, the i-th time characteristic included in the first type time characteristic is referred to as the i-th time characteristic in the first type time characteristic. i is any integer equal to or greater than 1 and equal to or less than m. The first time characteristic in the first type time characteristic to the m-th time characteristic in the first type time characteristic are each defined in a different range of I1.

The second type time characteristic may include two or more time characteristics. Thus, in a semiconductor circuit breaker according to one aspect of the present invention, the second type time characteristic may include n (n is an integer equal to or greater than 1) different time characteristics. Hereinafter, the jth time characteristic included in the second type time characteristic is referred to as the jth time characteristic in the second type time characteristic. j is any integer equal to or greater than 1 and equal to or less than n. The first time characteristic in the second type time characteristic to the nth time characteristic in the second type time characteristic are each defined in a different range of I2.

By increasing at least one of m and n, the conductive state of the semiconductor switch 20 can be controlled taking into account a wider variety of conditions. Therefore, for example, it becomes possible to deal with a wider variety of abnormal conditions of the load device.

In view of the above, in a semiconductor shutoff device according to one aspect of the present invention, the OR circuit may be provided as a logic gate with (m+n) outputs and one input. In embodiment 1, since m=2 and n=1, semiconductor shutoff device 1 is provided with an OR circuit 119 with three inputs and one output. In embodiment 2, since m=1 and n=1, semiconductor shutoff device 2 is provided with an OR circuit 119A with two inputs and one output.

As shown in embodiment 3, in a semiconductor cutoff device according to one aspect of the present invention, n may be 0. Please note that, as shown in embodiment 3, when m = 1 and n = 0, it is not necessary to provide an OR circuit.

(4) Furthermore, the logic gate according to one embodiment of the present disclosure is not limited to an OR circuit. The logic gate according to one embodiment of the present disclosure only needs to be able to output one output signal that can be used as gate control for (m+n) inputs. For example, the logic gate according to one embodiment of the present disclosure may be an AND circuit. As another example, the logic gate may be a NOR circuit or a NAND circuit.

[Software implementation example]
The control blocks of the semiconductor circuit breakers 1 to 3 (particularly, the control units exemplified as the control circuits 10 to 10B) may be realized by logic circuits (hardware) formed in an integrated circuit (IC chip) or the like, or may be realized by software.

In the latter case, the semiconductor cutoff devices 1 to 3 are provided with a computer that executes the instructions of a program, which is software that realizes each function. This computer is provided with, for example, one or more processors, and a computer-readable recording medium that stores the program. The object of the present invention is achieved by the processor reading the program from the recording medium and executing it in the computer. The processor can be, for example, a CPU (Central Processing Unit). The recording medium can be a "non-transient tangible medium," such as a ROM (Read Only Memory), as well as a tape, a disk, a card, a semiconductor memory, a programmable logic circuit, or the like. The device may also be provided with a RAM (Random Access Memory) that expands the program. The program may be supplied to the computer via any transmission medium (such as a communication network or a broadcast wave) that can transmit the program. Note that one aspect of the present invention can also be realized in the form of a data signal embedded in a carrier wave, in which the program is embodied by electronic transmission.

[Additional Notes]
The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope of the claims. Embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of the present invention.

1, 2, 3 Semiconductor circuit breaker 10, 10A, 10B Control circuit (control unit)
20 semiconductor switch 30 current sensor 35 voltage sensor 110, 110A switching control section 111, 111A first judgment section 112 second judgment section 113 third judgment section 119, 119, 119A, 119A OR circuit 120 V/I conversion section (voltage current conversion section)
OC1, OC2 functions (functions that define the first type time-delay characteristic)
OC1v function (function that specifies the first type time-limited characteristic)
OC3 function (function that specifies the second-class time-limited characteristic)
Ia current value (lower limit of current setting value in the first type time-limited characteristic)
Ic Current value (lower limit of current setting value in finite time characteristic)
tc Time (the set value of the continuous current permissible time in the finite time characteristic)

Claims (8)

A semiconductor switch;
a current sensor for detecting a first current value flowing through the semiconductor switch;
A control unit that cuts off the semiconductor switch based on a first type time-limit characteristic indicating a continuous current-carrying permissible time corresponding to the first current value ,
The semiconductor cutoff device further includes a voltage sensor that detects a voltage value applied to the semiconductor switch,
the control unit further includes a voltage-current conversion unit that converts the voltage value into a second current value,
The control unit further turns off the semiconductor switch based on a second type time-limit characteristic indicating a continuous current-carrying permissible time corresponding to the second current value . 2. The semiconductor circuit breaker of claim 1, wherein said first time-delay characteristic is an inverse time-delay characteristic. The first time-delay characteristic includes a plurality of inverse time-delay characteristics,
3. The semiconductor circuit breaker of claim 2, wherein each of said plurality of inverse time characteristics is defined for a different range of said first current value. 4. The semiconductor circuit breaker according to claim 1, wherein the second type time-limited characteristic is a definite time-limited characteristic. 5. The semiconductor circuit breaker according to claim 4 , wherein the set value of the continuous current-carrying permissible time in the finite time characteristic is 10 [mu]s or less. 6. The semiconductor circuit breaker according to claim 5 , wherein the set value of the continuous current-carrying permissible time in the finite time characteristic is 1 [mu]s or less. 7. The semiconductor circuit breaker according to claim 4 , wherein a lower limit of the current setting value in the fixed time characteristic is at least 10 times a lower limit of the current setting value in the first type time characteristic. The semiconductor circuit breaker according to claim 1 , wherein the control unit is configured by an FPGA (Field Programmable Gate Array).

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