JP7506115B2 - Circuit board analysis device and analysis method - Google Patents

Description

This disclosure relates to technology for analyzing circuit boards.

JP 2009-223885 A (Patent Document 1) discloses a printed circuit board design support device that enables even non-expert designers to design low-noise printed circuit boards in a short time. This design support device obtains design data for printed circuit boards, divides the input and output printed circuit boards into meshes, calculates an equivalent circuit for each mesh, and connects the calculated equivalent circuits for each mesh at each terminal to generate an equivalent circuit model for the entire printed circuit board. The generated equivalent circuit model is then used to calculate the absolute value of the impedance of the printed circuit board as seen from the power supply terminals, and the calculated absolute impedance value is evaluated.

JP 2009-223885 A

The design support device disclosed in JP 2009-223885 A uses a power supply terminal as a reference point, focuses on a specific observation point on the circuit board, calculates the impedance between the observation point and the reference point, and evaluates the absolute value of the calculated impedance. Therefore, although it is possible to evaluate the impedance at a specific observation point, it is not possible to recognize whether the impedance of the observation point is a unique value compared to the impedance of the surrounding area. Therefore, it is not possible to identify which parts of the entire circuit board have impedance singular values (impedance singular points).

The present disclosure has been made to solve the above-mentioned problems, and its purpose is to properly identify impedance singularities in a circuit board.

(1) The circuit board analysis device according to the present disclosure includes an input unit to which design data for the circuit board is input, and a calculation unit that analyzes the circuit board based on the design data. The calculation unit arranges a plurality of observation points in a mesh pattern on a layout area of the circuit board, calculates the frequency characteristics of the impedance from a reference point on the circuit board to each observation point, executes a process for each observation point to calculate the impedance at a reference frequency using the frequency characteristics, and performs an extraction process to extract impedance singular points on the circuit board using the impedance of each observation point. In the extraction process, the calculation unit calculates the average impedance of a group of surrounding observation points arranged around the judgment point, with each observation point as a judgment target point, and extracts the judgment target point as an impedance singular point if the impedance of the judgment target point deviates from the average impedance of the group of surrounding observation points.

(2) In the circuit board analysis device described in 1, the layout area of the circuit board includes a first portion and a second portion different from the first portion. The calculation unit makes the density of observation points in the first portion and the density of observation points in the second portion different from each other.

(Clause 3) In the circuit board analysis device described in clause 1 or 2, if the impedance of the point to be judged deviates from the average impedance of the surrounding observation points by more than a threshold value during the extraction process, the calculation unit extracts the point to be judged as an impedance singular point.

(4) The circuit board analysis device according to 1 further includes a display device. The calculation unit causes the display device to display an image in which the impedances of the multiple observation points are arranged in the order in which the multiple observation points are arranged and graphed.

(Section 5) The method for analyzing a circuit board according to the present disclosure includes the steps of arranging a plurality of observation points in a mesh pattern on a placement area of the circuit board, calculating the frequency characteristics of the impedance from a reference point on the circuit board to each observation point, performing a process for each observation point to calculate the impedance at a reference frequency using the frequency characteristics, and performing an extraction process to extract impedance singular points on the circuit board using the impedance of each observation point. The extraction process step includes the steps of calculating the average impedance of a group of surrounding observation points arranged within a predetermined range from each observation point as a judgment target point, and extracting the judgment target point as an impedance singular point when the impedance of the judgment target point deviates from the average impedance of the group of surrounding observation points.

This disclosure makes it possible to properly identify impedance singularities in a circuit board.

FIG. 1 is a diagram illustrating an overall configuration of an analysis system. FIG. 2 is a diagram illustrating a cross section of a circuit board. FIG. 1 is a diagram showing an example of the arrangement of observation points (part 1). FIG. 4 is a diagram showing an example of impedance frequency characteristics at each observation point. FIG. 11 is a diagram for explaining an example of a technique for extracting an impedance singular point. 13 is a flowchart showing an example of a processing procedure of a calculation unit. FIG. 2 is a diagram showing an example of the arrangement of observation points (part 2).

The following describes in detail the embodiments of the present disclosure with reference to the drawings. Note that the same or corresponding parts in the drawings are given the same reference numerals and their description will not be repeated.

<System Configuration>
1 is a diagram showing an outline of the overall configuration of an analysis system 1 according to the present embodiment. The analysis system 1 analyzes the impedance characteristics of a circuit board 10.

The circuit board 10 is a generally rectangular board having an upper surface 10a and a lower surface 10b on which electronic components are mounted. Note that FIG. 1 shows a top view of the circuit board 10. Hereinafter, the longitudinal direction and the lateral direction of the upper surface 10a of the circuit board 10 are also referred to as the X-axis direction and the Y-axis direction, respectively, and the height (thickness) direction of the circuit board 10 is also referred to as the Z-axis direction.

Figure 2 is a schematic cross-sectional view of the circuit board 10. The circuit board 10 includes a board body 18, integrated circuits 21-23, and electronic components 31-36.

The board body 18 includes four printed circuit board layers 11-14 and three insulating layers 15-17. The four printed circuit board layers 11-14 are arranged in this order between the top surface 10a and the bottom surface 10b of the circuit board 10. The insulating layer 15 is arranged between the printed circuit boards 11 and 12, the insulating layer 16 is arranged between the printed circuit boards 12 and 13, and the insulating layer 17 is arranged between the printed circuit boards 13 and 14.

The integrated circuits 21-23 are circuits in which numerous elements such as transistors, resistors, capacitors, and diodes, and metal wiring connecting them, are integrally formed on a single semiconductor substrate. The integrated circuits 21-23 may be, for example, LSIs (Large-Scale Integration). The electronic components 31-36 are circuit elements such as resistors, capacitors, and diodes. The integrated circuits 21-23 and the electronic components 31-36 are electrically connected in a predetermined connection pattern by metal wiring within the substrate body 18.

In this embodiment, the integrated circuits 21-23 and the electronic components 31-33 are arranged on the upper surface 10a of the circuit board 10, and the electronic components 34-36 are arranged on the lower surface 10b of the circuit board 10.

Returning to FIG. 1, the analysis system 1 includes a database 70 that stores design data for the circuit board 10 to be analyzed, an input device 80 such as a keyboard operated by a user, a display device 90 for displaying images, etc., and an analysis device 100.

The analysis device 100 includes ports 101 to 103, a memory unit 110 including a ROM (Read Only Memory) and a RAM (Random Access Memory), and a calculation unit 120 including a CPU (Central Processing Unit).

Port 101 is an interface for connecting database 70, and realizes input and output of data between database 70 and analysis device 100. Port 102 is an interface for connecting input device 80, and realizes input and output of data between input device 80 and analysis device 100. Port 103 is an interface for connecting display device 90, and realizes input and output of data between display device 90 and analysis device 100.

The memory unit 110 stores the program executed by the calculation unit 120. The memory unit 110 also temporarily stores data generated by the execution of the program in the calculation unit 120 and design data for the circuit board 10 input from the database 70 to the port 101.

The calculation unit 120 performs analysis processing of the circuit board 10 by executing processing based on a program stored in the calculation unit 120 on the design data of the circuit board 10. The calculation unit 120 can display an image showing the analysis results of the circuit board 10 on the display device 90.

<Analysis of Circuit Board 10>
The calculation unit 120 performs the following analysis process on the design data of the circuit board 10 input from the database 70 to the port 101 .

First, the calculation unit 120 identifies the layout area of the circuit board 10 from the design data of the circuit board 10, and arranges a plurality of observation points in a mesh pattern on the layout area of the circuit board 10, for example, according to an input instruction from a user. The observation points are arranged for each of the printed circuit boards 11 to 14 of the circuit board 10.

Figure 3 is a diagram showing an example of the arrangement of multiple observation points on the printed circuit board 11 of the circuit board 10. In the example shown in Figure 3, the area in which the printed circuit board 11 is arranged is divided at regular intervals in the X-axis direction and the Y-axis direction to form multiple meshes (elements). The observation points are arranged at predetermined points (for example, the center of a surface) within the multiple meshes. Such an arrangement of observation points is performed for each of the printed circuit boards 11 to 14.

Note that the reference point P0 shown in FIG. 3 is preset, for example, at the position of a power supply terminal that receives power supplied from an external power supply (not shown).

When the placement of the observation points is completed, the calculation unit 120 calculates the frequency characteristics of the impedance from the reference point P0 to each observation point for each of the multiple observation points. For example, the calculation unit 120 calculates the frequency characteristics of the impedance from the reference point P0 to each observation point using a simulator that can perform S-parameter analysis. That is, the calculation unit 120 according to this embodiment does not actually measure the frequency characteristics of the impedance, but calculates the S-parameters by simulation and converts the calculated S-parameters into impedance values to calculate the frequency characteristics of the impedance from the reference point P0 to each observation point.

Specifically, the calculation unit 120 reads the design data of the circuit board 10 and recognizes the three-dimensional shape information of the circuit board 10, the physical constants (electrical conductivity, dielectric constant, etc.) of the printed circuit boards 11 to 14 within the circuit board 10, and information on the electronic components 31 to 36.

Then, the calculation unit 120 calculates the S-parameters of each observation point by performing an S-parameter analysis (a process of observing how the gain and phase of the observation point change with respect to changes in the frequency of the signal source) for each observation point based on, for example, a sweep frequency band and an analysis step specified by the user. The calculation unit 120 then converts the calculated S-parameters into impedance values. This allows the frequency characteristics of the impedance from the reference point P0 to each observation point to be calculated.

Figure 4 is a diagram showing an example of the impedance frequency characteristics of each observation point calculated by the calculation unit 120. Note that Figure 4 illustrates the frequency characteristics of the impedance at four observation points P11, P12, P21, and P22. In the frequency characteristics of each observation point, the horizontal axis indicates the frequency of the signal source used in the S-parameter analysis, and the vertical axis indicates the impedance.

As shown in Figure 4, the impedance value with respect to frequency differs for each observation point. In particular, in the low frequency band, there is a tendency for the impedance to decrease monotonically with increasing frequency at all observation points, but in the high frequency band that includes the reference frequency f0 that is expected to be used by the circuit board 10, the manner in which the impedance changes with frequency differs significantly from observation point to observation point. Therefore, when the signal input to the circuit board 10 is a high frequency signal near the reference frequency f0, the impedance at each observation point may differ significantly.

Therefore, the calculation unit 120 executes a process for calculating the impedance at the reference frequency f0 for each observation point using the frequency characteristics of the impedance at each observation point. The calculation unit 120 then performs an extraction process to extract impedance singularities on the circuit board 10 using the impedance at each observation point at the reference frequency f0. If it is expected that the frequency of the signal used on the circuit board 10 will fluctuate, multiple reference frequencies f0 can be set to cover the range of fluctuation, and the above extraction process can be performed for each reference frequency f0.

In the extraction process for extracting impedance singularities, the calculation unit 120 determines each observation point as a judgment target point, calculates the average impedance of the surrounding observation points located within a specified range from the judgment target point, and extracts the judgment target point as an impedance singularity if the impedance of the judgment target point deviates from the average impedance of the surrounding observation points.

Figure 5 is a diagram for explaining an example of a method for extracting impedance singularities by the calculation unit 120. In Figure 5, the horizontal axis indicates the position in the X-axis direction in the placement area of the circuit board 10, and the vertical axis indicates the impedance at the reference frequency f0.

In the example shown in FIG. 5, for observation points in region R1 whose positions in the X-axis direction are from the first point x1 to the second point x2, the calculation unit 120 calculates the impedance average Zave1 of the observation points in region R1, regarding the observation points in region R1 as the surrounding observation points, and extracts the observation points having impedances that deviate from the impedance average Zave1 by a threshold value or more as impedance singular points. In the example shown in FIG. 5, the observation points within the dotted frame α are extracted as impedance singular points.

For the observation points in region R2 whose positions in the X-axis direction are from the second point x2 to the third point x3, the calculation unit 120 calculates the impedance average Zave2 of the observation points in region R2, regarding the observation points in region R2 as the surrounding observation points, and extracts the observation points whose impedance deviates from the impedance average Zave2 by more than a threshold value as impedance singular points.

In the example shown in FIG. 5, there is little difference between the magnitude of the impedance within the dotted frame α and the magnitude of the impedance within the dotted frame β. However, since the impedance average Zave1 of the region R1 that includes the observation points within the dotted frame α is relatively low and the impedance within the dotted frame α deviates from the impedance average Zave1 of the region R1 by more than the threshold value, the impedance within the dotted frame α is extracted as an impedance singular point.

On the other hand, the impedance average Zave2 of region R2, which includes the observation points within the dotted frame β, is relatively high, and the impedance within the dotted frame β does not deviate from the impedance average Zave2 of region R2 by more than the threshold value, so the impedance within the dotted frame β is not extracted as an impedance singularity.

However, since the impedance in the dotted frame β seems to deviate slightly from the impedance average Zave2 of the region R2, it is an observation point that requires attention. In view of this, the calculation unit 120 causes the display device 90 to display an image in which the impedance at the reference frequency f0 is drawn from above over the entire region of the circuit board 10. In other words, the calculation unit 120 causes the display device 90 to display an image in which the impedances of all observation points at the reference frequency f0 are arranged in the order of arrangement of the observation points and graphed. For example, the calculation unit 120 causes the display device 90 to display an image in which the arrangement region of the circuit board 10 is arranged on an XY plane including the X axis and the Y axis, and the magnitude of the impedance relative to the position in the X axis direction and the position in the Y axis direction is shown in the Z axis direction. That is, how the impedance is distributed is spatially displayed on the image of the circuit board 10. This allows the user to check the position of the observation point that requires attention while looking at the image displayed on the display device 90.

When the calculation unit 120 displays the overhead image on the display device 90, the impedance singularities may be displayed in a manner different from other observation points so that they stand out. Also, observation points that require attention, such as those within the dotted frame β, may be displayed in a manner different from the impedance singularities and other observation points to draw the user's attention.

Figure 6 is a flowchart showing an example of the processing procedure performed by the calculation unit 120 when extracting impedance singular points. This flowchart is started, for example, when the user inputs an analysis start command to the input device 80. Note that the processing shown in Figure 6 is performed for each of the printed circuit boards 11 to 14 of the circuit board 10 as described above, but in Figure 6, the printed circuit boards 11 to 14 are described as "circuit board 10" without distinguishing between them.

The calculation unit 120 reads the design data for the circuit board 10 and identifies the placement area for the circuit board 10 (step S10).

Then, the calculation unit 120 sets a reference point P0 in the placement area of the circuit board 10 (step S10). For example, if the reference point P0 has been specified in advance by the user, the calculation unit 120 sets the location specified by the user as the reference point P0. In addition, for example, the calculation unit 120 may identify the location where the power supply terminal is located from the design data of the circuit board 10, and set the location where the power supply terminal is located as the reference point P0.

Next, the calculation unit 120 arranges multiple observation points in a mesh pattern (see FIG. 3 above) on the placement area of the circuit board 10 (step S20).

Next, the calculation unit 120 stratifies the multiple observation points into several groups (step S30). Note that this process is intended to reduce the amount of data handled in one analysis by grouping the multiple observation points, in view of the limitations on the amount of data that can be handled in one analysis.

Next, the calculation unit 120 calculates the frequency characteristics of the impedance from the reference point P0 to each observation point in the group (see Figure 4 above) (step S40).

Next, the calculation unit 120 determines whether or not the process of step S40 has been performed for all groups (step S50).
If the process of step S40 has not been performed for all groups (NO in step S50), calculation unit 120 waits until the process of step S40 has been performed for all groups.

If the processing of step S40 has been performed for all groups (YES in step S50), the calculation unit 120 calculates the impedance at the reference frequency f0 for each observation point (step S60).

Next, the calculation unit 120 performs an extraction process of the impedance singularity (step S70). Specifically, as described above, the calculation unit 120 calculates the impedance average Zave of the surrounding observation points arranged around the judgment target point, with each observation point as the judgment target point, and extracts the judgment target point as an impedance singularity if the impedance of the judgment target point deviates from the impedance average Zave of the surrounding observation point group by a threshold value or more. The calculation unit 120 performs such an extraction process for all observation points. Note that the surrounding observation point group may be, for example, an observation point group arranged within a predetermined range centered on the judgment target point, or an observation point group arranged within a range previously set for each area in which the judgment target point is arranged.

Next, the calculation unit 120 causes the display device 90 to display an image of the impedance at the reference frequency f0 over the entire area of the circuit board 10 in a bird's-eye view (step S80). For example, the calculation unit 120 causes the display device 90 to display an image of the impedance at all observation points at the reference frequency f0, arranged in the order of the observation points, in a graph.

As described above, the calculation unit 120 according to this embodiment arranges a plurality of observation points in a mesh pattern on the layout area of the circuit board 10, and calculates the frequency characteristics of the impedance from the reference point P0 of the circuit board to each observation point. The calculation unit 120 then uses the calculated frequency characteristics to calculate the impedance of each observation point at the reference frequency f0, and extracts impedance singular points using the impedance of each observation point.

When extracting impedance singularities, the calculation unit 120 treats each observation point as a judgment target point, calculates the impedance average Zave of the surrounding observation point group arranged around the judgment target point, and extracts the judgment target point as an impedance singularity if the impedance of the judgment target point deviates from the impedance average Zave of the surrounding observation point group by more than a threshold value.

In this manner, in this embodiment, rather than focusing on specific observation points, the entire circuit board 10 is observed comprehensively, and impedance singularities are identified by comparing the relative values of each observation point with those of the surrounding area. Therefore, compared to when focusing only on specific observation points, it is possible to appropriately identify which locations on the entire circuit board 10 are impedance singularities. In addition, since it is possible to identify the locations of impedance singularities that should be eliminated, it is also possible to contribute to improving the EMC (Electromagnetic Compatibility) characteristics of the circuit board 10.

Furthermore, in this embodiment, the calculation unit 120 extracts the target point as an impedance singular point when the impedance of the target point deviates from the impedance average Zave of the surrounding observation point group by more than the "threshold". Therefore, by adjusting the magnitude of the "threshold", the extraction sensitivity (analysis sensitivity) of the impedance singular point can be easily adjusted.

Furthermore, the calculation unit 120 according to this embodiment causes the display device 90 to display an image in which the impedances of all the observation points at the reference frequency f0 are arranged in the order in which the observation points are arranged, and the image is graphed. This allows the user to check how much the impedance of the impedance singularity deviates from the impedance of the surrounding observation points, or to check the positions of observation points other than the impedance singularity that require attention, while looking at the image displayed on the display device 90.

<Modification>
In the above embodiment, the observation points are arranged at regular intervals in the layout area of the circuit board 10. However, in order to perform an efficient analysis, the observation points may be arranged in a coarse or sparse manner for each designated area.

Figure 7 is a diagram showing an example of the arrangement of observation points according to this modified example. In the example shown in Figure 7, area A1 including integrated circuit 21 and electronic component 31, area A2 including integrated circuit 22 and electronic component 32, and area A3 including integrated circuit 23 and electronic component 33 are specified as areas requiring detailed observation. The observation points (mesh) are arranged so that the arrangement density of the observation points in areas A1, A2, and A2 is dense, and the arrangement density of the observation points outside areas A1, A2, and A2 is sparse. Furthermore, in the example shown in Figure 7, the observation points (mesh) are arranged so that the arrangement density of the observation points in area A1 is higher than the arrangement density of the observation points in areas A1 and A2.

In this way, the density of observation points in a specified area in the placement area of the circuit board 10 may be made different from the density of observation points outside the specified area. By doing so, for example, it is possible to increase the number of observation points in areas that require detailed observation and decrease the number of observation points in areas that do not. As a result, it is possible to reduce the computational load required for analysis while ensuring the accuracy of the analysis.

In order to perform the analysis more efficiently, the overall density of observation points can be set coarsely in the first analysis, and the results can be used to determine areas where the density of observation points is to be increased (areas where detailed observations will be performed).

The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present disclosure is indicated by the claims rather than the above description, and is intended to include all modifications within the meaning and scope of the claims.

1 Analysis system, 10 Circuit board, 10a Top surface, 10b Bottom surface, 11-14 Printed circuit board, 15-17 Insulation layer, 18 Board body, 21-23 Integrated circuits, 31-36 Electronic components, 70 Database, 80 Input device, 90 Display device, 100 Analysis device, 101, 102, 103 Port, 110 Memory unit, 120 Calculation unit.

Claims (5)

An apparatus for analyzing a circuit board, comprising:
an input unit to which design data of the circuit board is input;
a calculation unit that performs an analysis of the circuit board based on the design data,
The calculation unit is
A plurality of observation points are arranged in a mesh pattern on a placement area of the circuit board;
Calculating a frequency characteristic of impedance from a reference point on the circuit board to each of the measurement points;
A process of calculating an impedance at a reference frequency using the frequency characteristics is performed for each of the measurement points;
performing an extraction process for extracting impedance singular points on the circuit board using the impedance at each of the measurement points;
In the extraction process, the calculation unit sets each of the observation points as a determination target point,
Calculating an average of the impedances of a group of surrounding observation points arranged around the judgment point;
When the impedance of the determination point deviates from the average impedance of the surrounding observation points, the determination point is extracted as an impedance singular point. the placement area of the circuit board includes a first portion and a second portion different from the first portion;
The circuit board analysis device according to claim 1 , wherein the calculation section makes a density of observation points in the first portion and a density of observation points in the second portion different from each other. The circuit board analysis device according to claim 1 or 2, wherein the calculation unit extracts the target point as an impedance singular point when the impedance of the target point deviates from the average impedance of the group of surrounding observation points by a threshold value or more in the extraction process. Further comprising a display device,
2. The circuit board analysis device according to claim 1, wherein the calculation unit causes the display device to display an image in which the impedances of the plurality of observation points are arranged in an order in which the plurality of observation points are arranged in a graph. A method for analyzing a circuit board, comprising:
arranging a plurality of observation points in a mesh pattern on an arrangement area of the circuit board;
calculating a frequency characteristic of impedance from a reference point on the circuit board to each of the measurement points;
executing a process of calculating impedance at a reference frequency for each of the measurement points using the frequency characteristics;
performing an extraction process for extracting impedance singular points on the circuit board using the impedance of each of the measurement points;
The step of performing the extraction process includes:
calculating an average of impedances of a group of surrounding observation points arranged within a predetermined range from the determination point;
and if the impedance of the determination point deviates from the average impedance of the surrounding observation points, extracting the determination point as an impedance singular point.

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