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JP7567182B2 - Circuit board manufacturing method - Google Patents

Circuit board manufacturing method Download PDF

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JP7567182B2
JP7567182B2 JP2020046544A JP2020046544A JP7567182B2 JP 7567182 B2 JP7567182 B2 JP 7567182B2 JP 2020046544 A JP2020046544 A JP 2020046544A JP 2020046544 A JP2020046544 A JP 2020046544A JP 7567182 B2 JP7567182 B2 JP 7567182B2
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conductor
hole
conductor via
conductor layer
laminated substrate
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JP2021150376A (en
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良尚 松岡
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NEC Corp
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Description

本発明は、回路基板および回路基板の製造方法に関する。 The present invention relates to a circuit board and a method for manufacturing a circuit board.

コンピュータなどで使用するCPU(Central Processing Unit)やFPGA(Field Programmable Gate Array)などのLSI(Large Scale Integration)は、伝送速度の高速化に伴い、それらLSIのピン数の増加の一方で基板サイズの縮小、高密度実装が要求されている。このため、部品間を伝送する配線数が増加する傾向にあり、LSIや部品の電源層接続や引き出しなどを行うために、多層構造の回路基板に多数のスルーホールビアを設けることが必要となり、このスルーホールビアにより回路基板の面積が占有されることがある。また、このスルーホールビアによる接続を回避しようとすると、結果として回路基板上の回路パターンを設けるべき配線エリアの確保が難しくなっている。 Large Scale Integration (LSI) devices such as CPUs (Central Processing Units) and FPGAs (Field Programmable Gate Arrays) used in computers are increasing in number of pins as transmission speeds increase, while at the same time there is a demand for smaller board sizes and higher density mounting. This has resulted in a trend towards an increase in the number of wires connecting between components, and it has become necessary to provide a large number of through-hole vias in multi-layer circuit boards to connect and pull out the power supply layers of LSIs and components, and these through-hole vias can take up a lot of space on the circuit board. Furthermore, if you try to avoid connections using these through-hole vias, it becomes difficult to secure the wiring area on the circuit board where the circuit patterns should be located.

特許文献1に記載された製造方法による多層構造の回路基板は、小径の第1の貫通孔の内周にビアとなる導体層を形成し、その後、前記第1の貫通孔より大径の第2の貫通孔を形成し、この第2の貫通孔の内周にビアとなる導体等を形成することにより、第1、第2の貫通孔に互いに独立したビアを設けた構成となっている。 The multi-layer circuit board manufactured by the method described in Patent Document 1 has a structure in which a conductor layer that becomes a via is formed on the inner circumference of a small-diameter first through hole, then a second through hole that is larger in diameter than the first through hole is formed, and a conductor that becomes a via is formed on the inner circumference of this second through hole, thereby providing independent vias in the first and second through holes.

特許文献2に記載された多層構造の回路基板は、大小二種の径のドリルによる機械加工により貫通孔を形成して、各貫通孔にビアとなる導体層を形成し、さらに、より大径のドリルによりビアとなる導体層を部分的に除去することにより、互いに分割された複数のビアを形成する構成となっている。 The multi-layer circuit board described in Patent Document 2 is configured such that through holes are formed by machining using drills of two different diameters, one large and one small, and a conductor layer that will become a via is formed in each through hole, and then a larger diameter drill is used to partially remove the conductor layer that will become the via, thereby forming multiple vias that are separated from each other.

特許文献3に記載された多層構造の回路基板は、貫通孔の内面に形成されたビアとなる導体層を貫通孔より小径のドリルにより切削する製造方法についての構成が開示されている。 The multilayer circuit board described in Patent Document 3 is configured as a manufacturing method in which a conductor layer that becomes a via formed on the inner surface of a through hole is cut using a drill with a smaller diameter than the through hole.

特開2015-185735号公報JP 2015-185735 A 特開2005-235963号公報JP 2005-235963 A 特開平8-330735号公報Japanese Patent Application Publication No. 8-330735

しかしながら、特許文献1に記載の回路基板は、貫通孔を形成する機械加工工程と、その内周に導体層を形成するめっき等の化学的加工工程とを繰り返し行うことが必要であって、製造工程が複雑化するという課題がある。 However, the circuit board described in Patent Document 1 requires repeated machining steps to form through holes and chemical processing steps such as plating to form a conductor layer on the inner circumference of the through holes, which complicates the manufacturing process.

また特許文献2に記載の回路基板は、貫通孔を形成する機械加工工程と、その内周に導体層を形成するためのめっき等の化学的加工工程と、形成された導体層の一部を除去する機械加工工程と、を必要とし、後で行われる機械加工工程により不要な導体層を全部除去することが必要であるため、除去される導体層が無駄になるという課題がある。 The circuit board described in Patent Document 2 requires a machining process to form through holes, a chemical processing process such as plating to form a conductor layer on the inner circumference of the through holes, and a machining process to remove part of the conductor layer that has been formed. Since it is necessary to remove all of the unnecessary conductor layer in the subsequent machining process, there is an issue that the conductor layer that is removed is wasted.

また特許文献3に記載の回路基板は、ドリルを貫通孔内で移動させながら切削加工する工程が開示されているが、貫通孔より小径のドリルの先端の切刃がいかなる作用によって貫通孔の内周のビアを所望の箇所で切断するかを明確に示すものではない。 In addition, the circuit board described in Patent Document 3 discloses a cutting process in which a drill is moved inside the through hole, but does not clearly indicate how the cutting edge at the tip of the drill, which has a smaller diameter than the through hole, acts to cut the via on the inner circumference of the through hole at the desired location.

この発明は、層間の接続のためのビアを備えた回路基板の製造を容易にすることを目的とする。 The purpose of this invention is to facilitate the manufacture of circuit boards with vias for connecting layers.

上記課題を解決するために、この発明は以下の手段を提案している。
本発明の第1の態様にかかる回路基板は、導体層、コア層、プリプレグ層を繰り返し複数層にわたって積層して構成された積層基板と、この積層基板を厚さ方向に貫通して、前記積層基板の一方の面から他方の面へ内径が漸次拡大する貫通孔と、この貫通孔の内周に前記積層基板の厚さ方向へ互いに分離した複数の領域に設けられ、各領域に対応する積層 基板の導体層に電気的に接続された複数の導体ビアと、を有する回路基板。
In order to solve the above problems, the present invention proposes the following means.
A circuit board according to a first aspect of the present invention comprises a laminated board constructed by repeatedly stacking conductor layers, core layers, and prepreg layers in multiple layers, a through hole penetrating the laminated board in the thickness direction and having an inner diameter gradually increasing from one side of the laminated board to the other side, and a plurality of conductor vias provided on the inner periphery of the through hole in a plurality of regions separated from each other in the thickness direction of the laminated board, and electrically connected to conductor layers of the laminated board corresponding to each region.

本発明の第2の態様にかかる回路基板の製造方法は、導体層、コア層、プリプレグ層を複数層積層して積層基板を形成する工程と、この積層基板を厚さ方向に貫通する貫通孔を形成する工程と、この貫通孔の内周面に、前記導体層に接続された導体ビアを形成する工程と、この導体ビア内で前記積層基板の厚さ方向を回転中心として前記切削工具を回転させることにより前記導体ビアを切断して、複数に分割する工程とを有する。 The method for manufacturing a circuit board according to the second aspect of the present invention includes the steps of forming a laminated board by stacking multiple conductor layers, core layers, and prepreg layers, forming a through hole that penetrates the laminated board in the thickness direction, forming a conductor via connected to the conductor layer on the inner surface of the through hole, and cutting the conductor via by rotating the cutting tool within the conductor via with the thickness direction of the laminated board as the center of rotation, thereby dividing the conductor via into multiple pieces.

本発明によれば、各層の導体層を複数の分割ビアにより接続した回路基板の製造を容易にすることができる。 The present invention makes it easy to manufacture circuit boards in which each conductor layer is connected by multiple split vias.

本発明の第1の態様の最小構成例を示す断面図である。FIG. 2 is a cross-sectional view showing an example of a minimum configuration of the first embodiment of the present invention. 本発明の第2の態様の最小構成例にかかる回路基板の断面図である。FIG. 11 is a cross-sectional view of a circuit board according to a minimum configuration example of the second aspect of the present invention. 本発明の第1実施形態の基板の貫通孔を設ける前の断面図である。2 is a cross-sectional view of the substrate according to the first embodiment of the present invention before a through hole is provided therein. FIG. 本発明の第1実施形態の基板に貫通孔を設けた後の断面図である。3 is a cross-sectional view of the substrate according to the first embodiment of the present invention after a through hole is provided therein. FIG. 図4の貫通孔に導体めっきをほどこした状態の断面図である。5 is a cross-sectional view of the through hole of FIG. 4 after conductor plating has been applied thereto. 図4のビアに切削工具を挿入した状態の断面図である。FIG. 5 is a cross-sectional view of the via of FIG. 4 with a cutting tool inserted therein; 図6の工程によりビアが分割された回路基板における回路を示す断面図である。7 is a cross-sectional view showing a circuit in a circuit board in which a via is divided by the process of FIG. 6. 図7の変形例における電流の流れを示す断面図である。FIG. 8 is a cross-sectional view showing a current flow in the modified example of FIG. 7 . 本発明の第2実施形態の回路基板の貫通孔を設けた後の断面図である。FIG. 11 is a cross-sectional view of a circuit board according to a second embodiment of the present invention after a through hole is provided therein. 図9の貫通孔に導体めっきをほどこした状態の断面図である。10 is a cross-sectional view of the through hole of FIG. 9 in a state where conductor plating has been applied thereto. 図10のビアに切削工具を挿入した状態の断面図である。FIG. 11 is a cross-sectional view of the via of FIG. 10 with a cutting tool inserted therein; 図11の工程によりビアが分割された回路基板における回路を示す断面図である。12 is a cross-sectional view showing a circuit in a circuit board in which a via is divided by the process of FIG. 11 . 図11に示す切削工具と貫通孔の内径との関係の説明図である。12 is an explanatory diagram of the relationship between the cutting tool shown in FIG. 11 and the inner diameter of a through hole. FIG. 本発明の第3実施形態の基板の貫通孔を設けた後の断面図である。FIG. 11 is a cross-sectional view of a substrate according to a third embodiment of the present invention after a through hole is provided therein. 図14の貫通孔に導体めっきをほどこした状態の断面図である。15 is a cross-sectional view of the through hole of FIG. 14 after conductor plating has been applied thereto. 図15のビアに切削工具を挿入した状態の断面図である。FIG. 16 is a cross-sectional view of the via of FIG. 15 with a cutting tool inserted therein. 図16の工程によりビアが分割された回路基板における回路を示す断面図である。17 is a cross-sectional view showing a circuit in a circuit board in which a via is divided by the process of FIG. 16.

本発明の第1の態様にかかる回路基板の最小構成について、図1を参照して説明する。
符号1は積層基板で、この積層基板1は、導体層2、コア層3、プリプレグ層4を繰り返し複数層にわたって積層して構成されている。この積層基板1には、これを厚さ方向に貫通して、前記積層基板1の一方の面(図1の上面)から他方の面(図1の下面)へ内径が漸次拡大する貫通孔5と、この貫通孔5の内周に前記積層基板1の厚さ方向へ互いに分離した複数の領域に設けられ、各領域に対応する積層基板1の導体層2に電気的に接続された複数の導体ビア6が設けられている。
The minimum configuration of a circuit board according to a first aspect of the present invention will be described with reference to FIG.
Reference numeral 1 denotes a laminated substrate, which is constructed by repeatedly stacking a conductor layer 2, a core layer 3, and a prepreg layer 4 in a plurality of layers. The laminated substrate 1 has a through hole 5 penetrating the substrate in the thickness direction and gradually expanding in inner diameter from one surface (upper surface in FIG. 1) of the laminated substrate 1 to the other surface (lower surface in FIG. 1), and a plurality of conductor vias 6 provided on the inner periphery of the through hole 5 in a plurality of regions separated from each other in the thickness direction of the laminated substrate 1 and electrically connected to the conductor layers 2 of the laminated substrate 1 corresponding to each region.

図示例の貫通孔5は、一方の面側の内径をd1、他方の面側の内径d2とすれば、
d1<d2の関係となっている。また前記導体ビア6は、例えば貫通孔5の内面に金属めっきを施すこと、あるいは、相似形状のテーパー筒状導体を挿入することにより形成されていて、上下に二つに分割されている。
In the illustrated example, if the inner diameter of the through hole 5 on one surface side is d1 and the inner diameter of the other surface side is d2, then:
The relationship is d1<d2. The conductive via 6 is formed, for example, by plating the inner surface of the through hole 5 with a metal or by inserting a tapered cylindrical conductor having a similar shape, and is divided into two parts, an upper part and a lower part.

上記構成の回路基板は、上下で内径が異なる貫通孔5の内面に形成された導体ビア6の形成に際し、貫通孔5の内面を金属等の導体のめっき等により被覆しておき、これを前記d1とd2との中間の外径を有するドリル等の切削工具切削することにより分離して前記複数の導体ビア6とすることができる。したがって、切削工具の外径を最適に設定することにより、切削工具を軸方向へ移動させるという単純な工程によって、所要の箇所で分割された複数の導体ビアを備えた回路基板を製造することができる。 When forming the conductor vias 6 on the inner surface of the through hole 5, which has different inner diameters at the top and bottom, the inner surface of the through hole 5 is coated with plating of a conductor such as metal, and the multiple conductor vias 6 can be separated by cutting with a cutting tool such as a drill having an outer diameter intermediate between d1 and d2. Therefore, by optimally setting the outer diameter of the cutting tool, a circuit board with multiple conductor vias separated at required locations can be manufactured by the simple process of moving the cutting tool in the axial direction.

上記構成の回路基板にあっては、図1矢印Aで示すように最上部の導体層2から上部の導体ビア6を経由して上から二段目の導体層2Aへ到る経路で電流が流れることができる。すなわち、最上部の導体層2により構成された導体回路と二段目の導体層2Aにより構成された導体回路とを上部の導体ビア6により電気的に接続することができる。また、矢印Bで示すように、下部の導体ビア6を経由して、最下段の導体層2から下部の導体ビア6を経由して、下から二段目の導体層2Bへ到る経路で電流が流れることができる。 In the circuit board of the above configuration, as shown by arrow A in Figure 1, current can flow from the top conductor layer 2 through the upper conductor via 6 to the second conductor layer 2A from the top. That is, the conductor circuit formed by the top conductor layer 2 and the conductor circuit formed by the second conductor layer 2A can be electrically connected by the upper conductor via 6. Also, as shown by arrow B, current can flow from the bottom conductor layer 2 through the lower conductor via 6 to the second conductor layer 2B from the bottom.

本発明の第2の態様にかかる回路基板の製造方法の最小構成について、図2を参照して説明する。
第2の態様にあっては、導体層2、コア層3、プリプレグ層4を複数層積層して積層基板1を形成する工程と、この積層基板1を厚さ方向に貫通する貫通孔5を形成する工程と、この貫通孔5の内周面に、前記導体層2に接続された導体ビア6を形成する工程と、この導体ビア6内で前記積層基板1の厚さ方向を回転中心として切削工具7のシャンク8を回転させることにより前記導体ビア6を切断して、上下方向へ分割された複数の導体ビア6を形成する工程とにより、回路基板を製造する。
The minimum configuration of the method for manufacturing a circuit board according to the second aspect of the present invention will be described with reference to FIG.
In the second aspect, a circuit board is manufactured by the steps of: laminating multiple conductor layers 2, core layers 3, and prepreg layers 4 to form a laminated substrate 1; forming a through hole 5 penetrating the laminated substrate 1 in the thickness direction; forming a conductor via 6 connected to the conductor layer 2 on the inner surface of the through hole 5; and cutting the conductor via 6 by rotating a shank 8 of a cutting tool 7 within the conductor via 6 with the thickness direction of the laminated substrate 1 as the center of rotation, thereby forming a plurality of conductor vias 6 divided in the vertical direction.

上記構成の製造方法にあっては、前記切削工具7を回転させるとともに、回転中心軸方向と、回転中心と交差する方向とへ移動させることにより、貫通孔5の内面を覆う導体ビア6を積層基板1の厚さ方向に分割することができる。例えば、二段目の導体層2Aとその下側の導体層2Bの間で導体ビア6を切断、除去することにより、導体ビア6を上下に分割して、最上部の導体層2から二段目の導体層2Aへ到る経路で電流が流れることができる。また、下部の導体ビア6を経由して、最下段の導体層2から下部の導体ビア6を経由して、下から二段目の導体層2Bへ到る経路で電流が流れることができる。 In the manufacturing method of the above configuration, the cutting tool 7 is rotated and moved in the direction of the rotation center axis and in the direction intersecting the rotation center, thereby dividing the conductor via 6 covering the inner surface of the through hole 5 in the thickness direction of the laminated substrate 1. For example, by cutting and removing the conductor via 6 between the second conductor layer 2A and the conductor layer 2B below it, the conductor via 6 is divided into upper and lower parts, and a current can flow from the uppermost conductor layer 2 to the second conductor layer 2A. Also, a current can flow from the lower conductor via 6 to the lowermost conductor layer 2 to the lower conductor via 6 to the second conductor layer 2B from below.

(第1実施形態)
図1および2を具体化した本発明の第1実施形態に係る回路基板の製造方法について、図3~図8を参照して説明する。なお、図中図1、2と共通の構成には同一符号を付し、説明を簡略化する。
図3に示すように、導体層2、コア層3を積層して積層基板1Aを形成する。
図4に示すように、積層基板1を厚さ方向に貫通する貫通孔5を形成する。図示例では、内径が一定の貫通孔5が形成されている。
図5に示すように、貫通孔5の内周に金属等の導体によりめっき等の処理を施すことにより、一体の導体ビア16を形成する。また導体ビア16は、各導体層2の表面を覆うように形成されて、電気的に接続される。
First Embodiment
A method for manufacturing a circuit board according to a first embodiment of the present invention, which is realized by embodying Figures 1 and 2, will be described with reference to Figures 3 to 8. Note that in the figures, the same reference numerals are used for the same components as those in Figures 1 and 2, and the description will be simplified.
As shown in FIG. 3, a conductor layer 2 and a core layer 3 are laminated to form a laminated substrate 1A.
4, a through hole 5 is formed penetrating the laminated substrate 1 in the thickness direction. In the illustrated example, the through hole 5 has a constant inner diameter.
5, the inner periphery of the through hole 5 is plated with a conductor such as a metal to form an integral conductor via 16. The conductor via 16 is formed so as to cover the surface of each conductor layer 2 and is electrically connected.

図6に示すように、貫通孔5(詳細には、貫通孔5の内周の導体ビア16を構成するめっき層)の内面の内径より回転半径が小さい切削工具7、例えば、JISB0172に定義された円周、端面で回転切削するフライスカッターを貫通孔5内に挿入し、フライス盤等により、回転中心となるシャンク8の軸線方向への移動と、シャンク8と直交する方向への移動とを行わせることによって、導体ビア16を図6の上下方向へ切断し、複数の導体ビア6に分割する。 As shown in FIG. 6, a cutting tool 7 with a turning radius smaller than the inner diameter of the inner surface of the through hole 5 (specifically, the plating layer that constitutes the conductor via 16 on the inner circumference of the through hole 5), for example a milling cutter that performs rotary cutting on the circumference and end face defined in JIS B0172, is inserted into the through hole 5, and the shank 8, which serves as the center of rotation, is moved in the axial direction and in a direction perpendicular to the shank 8 using a milling machine or the like, thereby cutting the conductor via 16 in the vertical direction in FIG. 6 and dividing it into multiple conductor vias 6.

図6に示す切削工具7による機械加工によって、二段目の導体層2Aとその下側の導体層2Bの間で導体ビア16を切断、除去することにより、図7に示すように、導体ビア16を上下に分割することができる。この結果、矢印Aで示すように、上部の導体ビア6を経由して、最上部の導体層2から二段目の導体層2Aへ到る経路で電流が流れることができる。また、矢印Bで示すように、下部の導体ビア6を経由して、最下段の導体層2から下部の導体ビア6を経由して、下から二段目の導体層2Bへ到る経路で電流が流れることができる。したがって、予め、導体ビア6を切断することを想定して配線パターンを設計しておくことにより、同一の貫通孔5に設けられた、もともとは一つの円筒であった導体ビア16を複数系統の回路(回路パターン)で使用することが可能となる。すなわち、もともと一つであった導体ビアを複数の回路で使用することが可能となるため、積層基板1の異なる層にまたがる配線間の乗り換えに使用していた導体ビアの個数が少なくなり、導体ビアによる配線性(積層基板表面の実質的に配線することができる領域の減少による配線の自由度)の低下が緩和され、配線性の向上および部品実装の高密度化が可能となる。 By cutting and removing the conductor via 16 between the second conductor layer 2A and the conductor layer 2B below it by machining with a cutting tool 7 shown in FIG. 6, the conductor via 16 can be divided into upper and lower parts as shown in FIG. 7. As a result, as shown by arrow A, a current can flow from the uppermost conductor layer 2 to the second conductor layer 2A via the upper conductor via 6. Also, as shown by arrow B, a current can flow from the lowermost conductor layer 2 to the lower conductor via 6 via the lower conductor via 6 to the second conductor layer 2B from below. Therefore, by designing the wiring pattern in advance assuming that the conductor via 6 will be cut, it becomes possible to use the conductor via 16, which was originally a single cylinder provided in the same through hole 5, in multiple circuits (circuit patterns). In other words, since it is now possible to use a single conductor via in multiple circuits, the number of conductor vias used to transfer between wiring across different layers of the laminated substrate 1 is reduced, and the reduction in wiring ability due to conductor vias (the reduction in the degree of freedom in wiring due to the reduction in the area on the surface of the laminated substrate that can actually be wired) is mitigated, improving wiring ability and enabling higher density component mounting.

図8は、導体ビア16を3つに分割した場合の変形例を示す。図8に示すように、二段目の導体層2Aとその下側の導体層2Cの間で導体ビア16の一部を周方向に連続して切断、除去することにより、一体の円筒状であった導体ビア16を上の導体ビア6と下の導体ビア6とに分割することにより、矢印Aで示すように、最上部の導体層2から二段目の導体層2Aへ到る経路で電流が流れることができる。また、導体層2Dとその下側の導体層2Bとの間で、さらに導体ビア16の一部を周方向に連続して切断、除去することにより、矢印Cで示すように、中間部分の一の導体層2Cから中間部分の導体ビア6を経由して他の導体層2Dへ到る経路で電流が流れることができる。さらに、前記導体ビア16の切断により、矢印Bで示すように、最下部の導体層2から導体層2Bへ到る経路で電流が流れることができる。 Figure 8 shows a modified example in which the conductor via 16 is divided into three. As shown in Figure 8, by continuously cutting and removing a portion of the conductor via 16 between the second conductor layer 2A and the conductor layer 2C below it in the circumferential direction, the conductor via 16, which was an integral cylinder, is divided into an upper conductor via 6 and a lower conductor via 6, so that a current can flow from the uppermost conductor layer 2 to the second conductor layer 2A as shown by the arrow A. Furthermore, by continuously cutting and removing a portion of the conductor via 16 between the conductor layer 2D and the conductor layer 2B below it in the circumferential direction, a current can flow from one conductor layer 2C in the middle part to the other conductor layer 2D via the conductor via 6 in the middle part as shown by the arrow C. Furthermore, by cutting the conductor via 16, a current can flow from the lowermost conductor layer 2 to the conductor layer 2B as shown by the arrow B.

すなわち、切削加工を用いて、導体ビア16を同軸上で二分割、三分割して、互いに電気的に絶縁することにより、積層基板1A中に、分割された導体ビア6の数に対応する数の回路を設けることができる。したがって、積層基板1Aの面方向に沿って複数箇所に各々導体ビアを設ける場合、換言すれば複数本にわたって導体ビアを設ける場合に比して、回路パターンの形成に利用することができる基板上の面積が導体ビアにより奪われることが少なく、積層基板1Aの面積を有効に利用することができる。 That is, by dividing the conductor via 16 into two or three parts on the same axis using cutting processing and electrically insulating them from each other, it is possible to provide a number of circuits in the laminated substrate 1A that corresponds to the number of divided conductor vias 6. Therefore, compared to providing conductor vias at multiple locations along the surface direction of the laminated substrate 1A, in other words providing multiple conductor vias, the area on the substrate that can be used to form the circuit pattern is less taken up by the conductor vias, and the area of the laminated substrate 1A can be used effectively.

(第2実施形態)
図1を具体化した本発明の第2実施形態について、図9~図13を参照して説明する。なお、図中図1~図8と共通の構成要素には共通の符号を付し、説明を簡略化する。
第2実施形態の積層基板1Bは、図9の上側の一方の面から図9の下側の他方の面へ漸次内径が拡大するテーパー状の貫通孔5Aを有している。
図9は、導体層2、コア層3、プリプレグ層4を有する積層基板1Bに前記テーパー状の貫通孔5Aを形成した後の形状を示している。前記貫通孔5Aは、例えば、最小径に相当する外径のドリルによって下穴としての貫通孔を形成した後、形成すべきテーパーに対応する形状のリーマ等の切削工具により漸次内径を拡大する機械加工、あるいは、フライスカッターを用いた機械加工等によって形成される。
Second Embodiment
A second embodiment of the present invention which embodies the embodiment shown in Fig. 1 will be described with reference to Fig. 9 to Fig. 13. Note that in the figures, components common to Fig. 1 to Fig. 8 are given the same reference numerals and the description will be simplified.
The laminated substrate 1B of the second embodiment has a tapered through hole 5A whose inner diameter gradually increases from one surface on the upper side in FIG. 9 to the other surface on the lower side in FIG.
9 shows the shape after the tapered through hole 5A is formed in the laminated substrate 1B having the conductor layer 2, the core layer 3, and the prepreg layer 4. The through hole 5A is formed, for example, by forming a through hole as a pilot hole with a drill having an outer diameter corresponding to the minimum diameter, and then mechanically enlarging the inner diameter with a cutting tool such as a reamer having a shape corresponding to the taper to be formed, or by mechanically processing using a milling cutter.

図10は、図9で形成された貫通孔5Aの内面に前記導体等2に電気的に接続された導体ビア16Aを形成した状態を示している。すなわち、図10の工程では、前記貫通孔5Aの内周に金属等の導体によりめっき等の処理を施すことにより、一体の導体ビア16Aを形成する。この導体ビア16Aは、貫通孔5Aの内周面に一定厚さで形成されているため、貫通孔5Aと同等の傾斜のテーパー状をなしている。 Figure 10 shows the state where a conductor via 16A electrically connected to the conductor 2 is formed on the inner surface of the through hole 5A formed in Figure 9. That is, in the process of Figure 10, the inner circumference of the through hole 5A is plated with a conductor such as metal to form an integral conductor via 16A. This conductor via 16A is formed with a constant thickness on the inner circumference surface of the through hole 5A, so it has a tapered shape with the same inclination as the through hole 5A.

前記導体ビア16Aに下方(内径が大きい側)から切削工具7A、図示例では、JISB0171に定義された先端に切れ刃を有するドリル等の工具、を挿入し、シャンク8の軸線を中心として回転させると、切削工具7Aの先端の外径に相当する内径となる迄、導体ビア16Aが切削され、除去される。 A cutting tool 7A (in the illustrated example, a tool such as a drill with a cutting edge at the tip defined in JIS B0171) is inserted into the conductor via 16A from below (the side with the larger inner diameter) and rotated around the axis of the shank 8, cutting and removing the conductor via 16A until the inner diameter becomes equivalent to the outer diameter of the tip of the cutting tool 7A.

前記切削工具7Aは、詳細には、図13に示すように、外径Dxを有し、この外径Dxは、貫通孔5Aの最小径d1、最大径d2に対して、d1<Dx<d2の関係を有する。
すなわち、導体ビア16A内に切削工具7Aを回転させながら挿入すると、導体ビア16Aの内径が切削工具7Aの外径Dxと一致する箇所から切削工具7Aの先端の切れ刃により切削、除去され始める。そして、切削工具7Aの外径Dxが貫通孔5Aの内径dxと一致するまで挿入されるところに達すると、所定範囲の導体ビア16A、より具体的にはめっきによる導体層が除去されて、導体ビア16Aが複数の導体ビア6に分割される。このドリルによる加工は、切削工具の軸方向への移動のみにより行うことができるから、ボール盤等の比較的簡易な工作機械によって行うことができる。
Specifically, as shown in FIG. 13, the cutting tool 7A has an outer diameter Dx, and this outer diameter Dx satisfies the relationship d1<Dx<d2 with respect to the minimum diameter d1 and maximum diameter d2 of the through hole 5A.
That is, when the cutting tool 7A is inserted into the conductor via 16A while being rotated, the cutting edge at the tip of the cutting tool 7A starts cutting and removing the conductor via 16A from a point where the inner diameter of the conductor via 16A coincides with the outer diameter Dx of the cutting tool 7A. Then, when the cutting tool 7A is inserted until the outer diameter Dx of the cutting tool 7A coincides with the inner diameter dx of the through hole 5A, a predetermined range of the conductor via 16A, more specifically, the conductor layer formed by plating, is removed, and the conductor via 16A is divided into a plurality of conductor vias 6. This drill processing can be performed by simply moving the cutting tool in the axial direction, and can therefore be performed by a relatively simple machine tool such as a drill press.

図11は、切削工具7Aにより導体ビア16Aを切削する途中の状態を示し、切削工具7Aを所定の深さ迄挿入すると、図12に示すように、上側と下側の2箇所に、互いに電気的に絶縁された導体ビア6が形成される。
すなわち、矢印Aで示すように、上面の導体層2、上側の導体ビア6、導体層2Aを経由する経路で電流が流れることができる。また、矢印Bで示すように、下面の導体層2、下側の導体ビア6、導体層2Bを経由する経路で電流が流れることができる。
FIG. 11 shows the state in the middle of cutting the conductor via 16A with the cutting tool 7A. When the cutting tool 7A is inserted to a predetermined depth, conductor vias 6 that are electrically insulated from each other are formed at two locations, upper and lower, as shown in FIG. 12.
That is, as shown by arrow A, a current can flow through a path passing through the upper conductor layer 2, the upper conductor via 6, and the conductor layer 2A. Also, as shown by arrow B, a current can flow through a path passing through the lower conductor layer 2, the lower conductor via 6, and the conductor layer 2B.

なお、図11に示す切削工具7Aより小径の切削工具を用いて切削を行なうことにより、図12よりさらに上部で導体ビア16Aを切断、除去することにより、導電ビア16Aをさらに多くの箇所で分断して導電ビア6の数を増やすことができる。なお図11に示す切削工具7Aによる切削の前に、これより大径の切削工具を用いて切削を行うことにより、図12より下部で導体ビア16Aを切断、除去してもよい。 Note that by performing cutting using a cutting tool with a smaller diameter than the cutting tool 7A shown in FIG. 11, the conductive vias 16A can be cut and removed further up than in FIG. 12, thereby dividing the conductive vias 16A at even more locations and increasing the number of conductive vias 6. Note that before cutting with the cutting tool 7A shown in FIG. 11, cutting may be performed using a cutting tool with a larger diameter to cut and remove the conductive vias 16A further down than in FIG. 12.

すなわち、大径から小径へ切削工具(ドリル)の径を変更しながら切削を行おうことにより、導体ビア16Aを軸線方向(基板の厚さ方向)へ二分割、さらには回路基板の設計上の要請に応じて三分割して、互いに電気的に絶縁し、複数の導体ビアを形成することができる。
したがって、積層基板の面方向に沿って複数箇所に導体ビアを設ける場合に比して、回路パターンの形成に利用することができる基板上の面積が導体ビアにより占められることが少なく、積層基板1Aの面積を有効に利用することができる。
なお、切削工具としてフライスカッターを用いれば、前述のドリルを用いる場合のような径の異なるドリルへの変更を伴うことなく、切削工具の軸方向への移動と軸と交差する方向への移動とによって所定箇所で導体ビア16Aを分割することができる。
In other words, by performing cutting while changing the diameter of the cutting tool (drill) from large to small diameter, the conductor via 16A can be divided into two in the axial direction (thickness direction of the board), or even into three depending on the design requirements of the circuit board, and multiple conductor vias can be formed that are electrically insulated from each other.
Therefore, compared to the case where conductor vias are provided in multiple locations along the surface direction of the laminated substrate, the area on the substrate that can be used to form a circuit pattern is less occupied by conductor vias, and the area of the laminated substrate 1A can be used effectively.
Furthermore, if a milling cutter is used as the cutting tool, the conductor via 16A can be divided at a predetermined location by moving the cutting tool in the axial direction and in a direction intersecting the axis, without having to change to a drill of a different diameter as in the case of using the drill described above.

上記の切削工具による機械加工によって、二段目の導体層2Aとその下側の導体層2Bの間で導体ビア6を切断、除去することにより、図7に示すように、導体ビア16Aを上下に分割することができる。この結果、矢印Aで示すように、上部の導体ビア16Aを経由して、最上部の導体層2から二段目の導体層2Aへ到る経路で電流が流れることができる。また、矢印Bで示すように、下部の導体ビア16Aを経由して、最下段の導体層2から下から二段目の導体層2Bへ到る経路で電流が流れることができる。 By cutting and removing the conductor via 6 between the second conductor layer 2A and the conductor layer 2B below it by machining with the above cutting tool, the conductor via 16A can be divided into upper and lower parts as shown in FIG. 7. As a result, as shown by arrow A, current can flow from the top conductor layer 2 to the second conductor layer 2A via the upper conductor via 16A. Also, as shown by arrow B, current can flow from the bottom conductor layer 2 to the second conductor layer 2B from below via the lower conductor via 16A.

(第3実施形態)
図1を具体化した本発明の第3実施形態について、図14、15を参照して説明する。なお、図中図1~図13と共通の構成要素には同一の符号を付し、説明を簡略化する。
図14の積層基板1Cは、図14の上側の一方の面より、図14の下側の他方の面の側で内径が大きくされた貫通孔5を有している。詳細には、図14に示す一方の面から他方の面へ向けて、貫通孔5Aの内径に相当する外径のドリル等の切削工具を挿入して、少なくとも、積層基板1Cの厚さ方向の途中まで貫通する小径の貫通孔5Aを形成し、その後、他方の面から一方の面へ向けて前記貫通孔5Aより大径の貫通孔5Bに相当する外径のドリル等の切削工具を挿入して、積層基板1Cの厚さ方向の途中まで貫通する大径の貫通孔5Bを形成する。
Third Embodiment
A third embodiment of the present invention which embodies the embodiment shown in Fig. 1 will be described with reference to Figs. 14 and 15. In the drawings, components common to those shown in Figs. 1 to 13 are given the same reference numerals and their description will be simplified.
The laminated substrate 1C in Fig. 14 has a through hole 5 whose inner diameter is larger on the side of the other surface on the lower side of Fig. 14 than on the side of the one surface on the upper side of Fig. 14. In detail, a cutting tool such as a drill having an outer diameter equivalent to the inner diameter of the through hole 5A is inserted from one surface to the other surface shown in Fig. 14 to form a small-diameter through hole 5A that penetrates at least halfway through the thickness direction of the laminated substrate 1C, and then a cutting tool such as a drill having an outer diameter equivalent to a through hole 5B having a larger diameter than the through hole 5A is inserted from the other surface to the one surface to form a large-diameter through hole 5B that penetrates halfway through the thickness direction of the laminated substrate 1C.

このようなドリルによる切削加工の繰り返しにより、図14に示すような段状に内径が異なる貫通孔5が形成される。
図15は、図14に示す貫通孔5A、5Bの内面に前記導体等2に電気的に接続された導体ビア16Aを形成した状態を示している。すなわち、図15の工程では、前記貫通孔5Aの内周に金属等の導体によりめっき等の処理を施すことにより、一体の導体ビア16Bを形成する。この導体ビア16Bは、貫通孔5A、5Bの内周面に一定厚さで形成されている。
By repeating such cutting processing using a drill, a through hole 5 having a stepped shape with different inner diameters as shown in FIG. 14 is formed.
Fig. 15 shows a state in which a conductor via 16A electrically connected to the conductor 2 is formed on the inner surface of the through holes 5A and 5B shown in Fig. 14. That is, in the process of Fig. 15, a process such as plating is performed on the inner circumference of the through hole 5A with a conductor such as a metal to form an integral conductor via 16B. This conductor via 16B is formed with a constant thickness on the inner circumference surface of the through holes 5A and 5B.

図15に示す状態において、積層基板1Cの他方の面(下側)から下側の貫通孔5Bの内周を被覆する導体ビア16Bの内径より僅かに小さく、上側の貫通孔5Aの内径より大きな外径を有するドリルを挿入し、貫通孔5A~5Bの間の部分の導体ビア16Bを切断、除去すると、貫通孔5Aの内周部分と貫通孔5Bの内周部分とで導体ビア16Bが分割される。すなわち、上下に分割された二つの導体ビア6が形成され、各導体ビア6は、導体層2A、2Bに接続される。
なお、図14、15の例に代えて、さらに多段に内径が異なる貫通孔5を形成して、導体ビア16Bをさらに多数に分割してもよい。
15, a drill having an outer diameter slightly smaller than the inner diameter of conductor via 16B covering the inner periphery of lower through hole 5B and larger than the inner diameter of upper through hole 5A is inserted from the other surface (lower side) of laminated substrate 1C to cut and remove conductor via 16B in the portion between through holes 5A and 5B, dividing conductor via 16B into the inner periphery portion of through hole 5A and the inner periphery portion of through hole 5B. In other words, two conductor vias 6 divided vertically are formed, and each conductor via 6 is connected to conductor layers 2A, 2B.
Instead of the examples shown in FIGS. 14 and 15, the through holes 5 having different inner diameters may be formed in multiple stages to divide the conductor vias 16B into even more sections.

上記の切削工具による機械加工によって、二段目の導体層2Aとその下側の導体層2Bの間で導体ビア16Bを切断、除去することにより、図16に示すように、導体ビア16Bを上下に分割することができる。この結果、矢印Aで示すように、上部の導体ビア6を経由して、最上部の導体層2から二段目の導体層2Aへ到る経路で電流が流れることができる。また、矢印Bで示すように、下部の導体ビア6を経由して、最下段の導体層2から下より二段目の導体層2Bへ到る経路で電流が流れることができる。 By cutting and removing the conductor via 16B between the second conductor layer 2A and the conductor layer 2B below it by machining with the above cutting tool, the conductor via 16B can be divided into upper and lower parts as shown in FIG. 16. As a result, as shown by arrow A, current can flow from the top conductor layer 2 to the second conductor layer 2A via the upper conductor via 6. Also, as shown by arrow B, current can flow from the bottom conductor layer 2 to the second conductor layer 2B below via the lower conductor via 6.

以上、本発明の実施形態について図面を参照して詳述したが、具体的な構成はこの実施形態に限られるものではなく、本発明の要旨を逸脱しない範囲の設計変更等も含まれる。 The above describes an embodiment of the present invention in detail with reference to the drawings, but the specific configuration is not limited to this embodiment, and design changes and the like that do not deviate from the gist of the present invention are also included.

本発明は、回路基板、およびその製造方法に利用することができる。 The present invention can be used in circuit boards and their manufacturing methods.

1 積層基板
2、2A、2B 導体層
3 コア層
4 プリプレグ層
5、5A、5B 貫通孔
6 導体ビア
7、7A 切削工具
8 シャンク
16、16A、16B 導体ビア
REFERENCE SIGNS LIST 1 laminated substrate 2, 2A, 2B conductor layer 3 core layer 4 prepreg layer 5, 5A, 5B through hole 6 conductor via 7, 7A cutting tool 8 shank 16, 16A, 16B conductor via

Claims (1)

導体層、コア層、プリプレグ層を複数層積層して積層基板を形成する工程と、
この積層基板を厚さ方向に貫通する貫通孔を形成する工程と、
この貫通孔の内周面に、前記導体層に接続された導体ビアを形成する工程と、
この導体ビア内で前記積層基板の厚さ方向に沿う軸を回転中心として切削工具を回転させることにより前記導体ビアを切断して、前記厚さ方向に複数に分割する工程と、
を有し、
前記貫通孔は、前記積層基板の一方の面の側より、他方の面の側の内径が大きく、前記積層基板の一方の面から他方の面へ内径が漸次拡大し、
前記一方の面の側の第1貫通孔と、前記他方の面の側の第2貫通孔と、これら第1貫通孔と第2貫通孔との間に配置された同一内径の中間貫通孔とを有し、
前記切削工具は、ドリルであって、該ドリルを前記導体ビアの軸線方向へ移動させることにより、前記導体ビアを複数に分割して中間貫通孔の上下で互いに分離し、
前記ドリルは、導体ビアの分割箇所に応じて、前記貫通孔の最大径部分と最小径部分との間の外径を有する複数種から選択して用いられる、
回路基板の製造方法。
A step of laminating a plurality of conductor layers, core layers, and prepreg layers to form a laminated substrate;
forming a through hole penetrating the laminated substrate in a thickness direction;
forming a conductor via connected to the conductor layer on an inner peripheral surface of the through hole;
a step of rotating a cutting tool around an axis along a thickness direction of the laminated substrate within the conductor via to cut the conductor via and divide it into a plurality of pieces in the thickness direction;
having
the through hole has an inner diameter larger on one surface side of the laminated substrate than on the other surface side, and the inner diameter gradually increases from one surface to the other surface of the laminated substrate;
a first through hole on the one surface side, a second through hole on the other surface side, and an intermediate through hole having the same inner diameter and disposed between the first through hole and the second through hole,
the cutting tool is a drill, and the drill is moved in an axial direction of the conductor via to divide the conductor via into a plurality of parts and separate them from each other above and below the intermediate through hole;
The drill is selected from a plurality of types having an outer diameter between the maximum diameter portion and the minimum diameter portion of the through hole depending on the division location of the conductor via .
A method for manufacturing a circuit board.
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