JP7549002B2 - Nitride-based bidirectional switching device and method of manufacture thereof - Google Patents

Description

The present invention relates to nitride-based semiconductor devices. More specifically, the present invention relates to a nitride-based bidirectional switching device having a dual gate transistor adapted for operation with a battery protection controller.

In recent years, high-electron-mobility transistors (HEMTs) have been the focus of intense research, especially in high-power switching and high-frequency applications. III-nitride HEMTs use a heterojunction interface between two materials with different bandgaps to form a quantum well-like structure that contains a two-dimensional electron gas (2DEG) region to meet the requirements of high-power/frequency devices. In addition to HEMTs, other examples of devices with heterostructures include heterojunction bipolar transistors (HBTs), heterojunction field effect transistors (HFETs), and modulation-doped FETs (MODFETs). There is currently a need to increase the yield of HMET devices to make them suitable for large-scale manufacturing.

According to one aspect of the present invention, a nitride-based semiconductor device is provided. The nitride-based bidirectional switching device is used to operate with a battery protection controller. The battery protection controller has a power input terminal, a discharge over-current protection (DO) terminal, a charge over-current protection (CO) terminal, a voltage monitoring (VM) terminal, and a ground terminal. The nitride-based bidirectional switching device includes a nitride-based active layer, a nitride-based barrier layer, a plurality of spacer layers, and a dual-gate transistor. The nitride-based active layer is disposed on a substrate. The nitride-based barrier layer is disposed on the nitride-based active layer and has a band gap larger than the band gap of the nitride-based active layer. The spacer layer is disposed on the nitride-based barrier layer and includes at least a first spacer layer and a second spacer layer located on the first spacer layer. The dual-gate transistor includes first and second source electrodes and first and second gate structures. The first and second source electrodes are disposed on the plurality of spacer layers. The first source electrode is arranged to be electrically connected to a ground terminal of the battery protection controller. The second source electrode is arranged to be connected to a VM terminal of the controller through a voltage monitoring resistor. First and second gate structures are disposed on the nitride-based barrier layer and are disposed between the first and second source electrodes. The first gate structure includes a first gate electrode, the first gate electrode arranged to be electrically connected to a DO terminal of the battery protection controller. The second gate structure includes a second gate electrode, the second gate electrode arranged to be electrically connected to a CO terminal of the battery protection controller.

According to one aspect of the present invention, a method for fabricating a nitride-based bidirectional switching device is provided. The method includes the steps of: forming a nitride-based active layer above a substrate; forming a nitride-based barrier layer on the nitride-based active layer, the nitride-based barrier layer having a band gap larger than the band gap of the nitride-based active layer; forming first and second gate electrodes above the nitride-based barrier layer; forming a first passivation layer on the second nitride-based semiconductor layer to cover the first and second gate electrodes; forming a lower blanket field plate on the first passivation layer; patterning the lower blanket field plate by a wet etching process to form first and second lower field plates above the first and second gate electrodes, respectively; forming a second passivation layer on the first passivation layer to cover the first and second lower field plates; forming an upper blanket field plate on the second passivation layer; patterning the upper blanket field plate by a dry etching process to form first and second upper field plates above the first and second lower field plates, respectively.

According to one aspect of the present invention, a nitride-based semiconductor device is provided. The nitride-based bidirectional switching device is adapted to operate with a battery protection controller. The battery protection controller has a power input terminal, a discharge over-current protection (DO) terminal, a charge over-current protection (CO) terminal, a voltage monitoring (VM) terminal, and a ground terminal. The nitride-based bidirectional switching device includes a nitride-based active layer, a nitride-based barrier layer, and a dual-gate transistor. The nitride-based barrier layer is disposed on the nitride-based active layer, and the nitride-based barrier layer has a band gap larger than the band gap of the nitride-based active layer. The dual-gate transistor includes a first source electrode, a second source electrode, a first gate electrode, a second gate electrode, a first lower field plate, a second lower field plate, a first upper field plate, and a second upper field plate. The first source electrode is electrically connected to the ground terminal of the battery protection controller. The second source electrode is arranged to be connected to the VM terminal of the controller via a voltage monitoring resistor. The first gate electrode is disposed so as to be electrically connected to the DO terminal of the battery protection controller. The second gate electrode is disposed so as to be electrically connected to the CO terminal of the battery protection controller. The first lower field plate is disposed above the first gate electrode. The second lower field plate is disposed above the second gate electrode. The first upper field plate is disposed above the first lower field plate. The second upper field plate is disposed above the second lower field plate. The distance from the first upper field plate to the second upper field plate is less than the distance from the first lower field plate to the second lower field plate.

Therefore, the distance from the first upper field plate to the second upper field plate is shorter than the distance from the first lower field plate to the second lower field plate. The arrangement of the field plates is an element that increases the withstand voltage. When the bidirectional switching device is turned off, whether or not breakdown occurs in the region between the multiple gate structures is related to the distribution of the electric field at the position where it is located. This is because there is a high correlation between the arrangement of the field plates and the control situation of the turn-off state, since no other conductive elements are formed between the multiple gate structures. The arrangement of the field plates of the present invention stabilizes the turn-off state, allowing the nitride-based bidirectional switching device to operate well together with the battery protection controller.

The nature of the present disclosure can be readily understood from the following specific embodiments when taken in conjunction with the accompanying drawings. It should be noted that the features are not drawn to scale. In fact, the size of the features may be arbitrarily increased or decreased to better illustrate the present disclosure. The following description will further describe the embodiments of the present invention in more detail with reference to the drawings.

FIG. 1 is a circuit diagram illustrating a nitride based bidirectional switching device operating in conjunction with a battery protection controller according to some embodiments of the present invention.
FIG. 2 is an equivalent circuit diagram illustrating a nitride based bidirectional switching device according to some embodiments of the present invention.
FIG. 3A is a schematic diagram illustrating a bidirectional switching device according to some embodiments of the present invention.
3B and 3C are cross-sectional views of the bidirectional switching device taken along lines II' and II' in FIG. 3A.
FIG. 4A is an enlarged view of the area shown in FIG. 3C.
FIG. 4B is an enlarged view of the area shown in FIG. 3C.
FIG. 5 is a cross-sectional view illustrating a bidirectional switching device according to some embodiments of the present invention.
FIG. 6 is a cross-sectional view of a bidirectional switching device according to some embodiments of the present invention.
FIG. 7 is a cross-sectional view of a bidirectional switching device according to some embodiments of the present invention.
FIG. 8 is a cross-sectional view of a bidirectional switching device according to some embodiments of the present invention.
FIG. 9 is a cross-sectional view of a bidirectional switching device according to some embodiments of the present invention.
FIG. 10 is a cross-sectional view of a bidirectional switching device according to some embodiments of the present invention.
FIG. 11 is a cross-sectional view of a bidirectional switching device according to some embodiments of the present invention.
FIG. 12 is a cross-sectional view of a bidirectional switching device according to some embodiments of the present invention.
FIG. 13 is a cross-sectional view of a bidirectional switching device according to some embodiments of the present invention.
FIG. 14 is a cross-sectional view of a bidirectional switching device according to some embodiments of the present invention.
15A to 15L are diagrams showing different steps of a method for manufacturing a semiconductor device according to some embodiments of the present invention.

In the drawings and detailed description accompanying this specification, identical or similar parts are denoted by the same reference numerals. The detailed description combined with the accompanying drawings below will allow easy understanding of embodiments of the contents of this disclosure.

In describing the space, terms such as "top", "upper", "down", "upward", "left", "right", "lower", "top", "bottom", "longitudinal", "horizontal", "one side", "high", "low", "upwards", "above", "under" and the like are defined with respect to a certain plane of a certain component or a group of components, and the orientation of the components is shown in the corresponding figures. Incidentally, the depiction of space used herein is for illustrative purposes only, and the structures described herein can be installed in space in any direction or manner in practical implementation, and on this premise the advantages of the embodiments of the subject matter of the present invention are not prejudiced by such installation.

It should also be noted that the actual shapes of the various structures depicted as approximations of rectangles may be curved, have circular edges, have slightly non-uniform thickness, etc., depending on the manufacturing conditions of the device. In the context of this invention, the use of straight lines and right angles is used only to illustrate layers and technical features.

In the following description, semiconductor devices/dies/packages and their manufacturing methods are given as preferred examples. Those skilled in the art can easily understand that modifications, including additions and/or substitutions, are possible without departing from the scope and spirit of the present invention. Certain details may be omitted so as not to obscure the present invention. However, the contents of the present invention enable those skilled in the art to realize the teachings of the contents of the present invention without undue experimentation.

Figure 1 is a circuit diagram showing a nitride-based bidirectional switching device Q1 operating with a battery protection controller 10 according to some embodiments of the present invention. Figure 2 is an equivalent circuit diagram showing a nitride-based bidirectional switching device Q1 according to some embodiments of the present invention. A battery 12 is electrically connected to the battery protection controller 10. A capacitor C1 and a resistor R1 can be connected between the battery 12 and the battery protection controller 10 to modulate a signal therebetween. A charger 14 can be electrically connected in the circuit. A resistor R2 can be connected between the charger 14 and the battery protection controller 10 to modulate a signal therebetween. The nitride-based bidirectional switching device Q1 is electrically connected to the battery protection controller 10.

The nitride-based bidirectional switching device Q1 is arranged in the circuit to provide bidirectional turn-on and bidirectional turn-off functions. During a charging operation, current flows from the positive terminal P+ of the charger 14 to the positive terminal B+ of the battery 12. During a discharging operation, current flows from the positive terminal B+ of the battery 12 to the load 16.

The battery protection controller 10 has a power input terminal Vcc, a ground terminal Vss, an overcurrent discharge protection terminal DO, an overcurrent charge protection terminal CO, and a voltage monitoring terminal VM. Since it has two output ports, the overcurrent discharge protection terminal DO and the overcurrent charge protection terminal CO, it is necessary to control the charging and discharging operations using specific switches.

The bidirectional switching device Q1 has source electrodes S1 and S2 and gate electrodes G1 and G2. The source electrode S1 is arranged to be electrically connected to the ground terminal Vss of the battery protection controller 10. The source electrode S2 is arranged to be connected to the voltage monitoring terminal VM of the battery protection controller 10 via a resistor R2. The resistor R2 serves as a voltage monitoring resistor. The gate electrode G1 is arranged to be electrically connected to the overcurrent discharge protection terminal DO of the battery protection controller 10. The gate electrode G2 is arranged to be electrically connected to the overcurrent charge protection terminal CO of the battery protection controller 10.

Referring to FIG. 2, the bidirectional switching device Q1 includes a dual-gate transistor. The dual-gate transistor is realized by a pair of nitride-based transistor elements M1 and M2 connected in series. The nitride-based transistor element M1 includes a source electrode S1 and a gate electrode G1. The nitride-based transistor element M2 includes a source electrode S2 and a gate electrode G2.

When one of the gate electrodes G1 and G2 is disconnected, the corresponding nitride-based transistor M1 or M2 is turned off, thereby terminating the charging or discharging operation. In this state, the bidirectional switching device Q1 has a voltage-resistant structure by including at least one of the turn-off transistor elements. The level of voltage resistance provided by the bidirectional switching device Q1 is determined by the performance of the bidirectional switching device Q1.

For example, in a situation where a bidirectional switching device provides sufficient withstand voltage, charging or discharging operations performed by terminating to the device are smooth. However, if the withstand voltage provided by the bidirectional switching device is low, charging or discharging operations performed by terminating to the device may fail. In this regard, a low withstand voltage may be due to breakdown in the bidirectional switching device.

In addition, the bidirectional switching device Q1 achieves a low voltage drop when performing a charging or discharging operation. One of the reasons for this is that the nitride-based transistor elements M1 and M2 can have a low on-state resistance. The low voltage drop allows the load 16 to operate in a pre-designed operating state. The present invention provides a bidirectional switching device with improved voltage resistance that can be combined with a battery protection controller in the circuit to operate properly.

FIG. 3A is a layout diagram showing a bidirectional switching device 1A according to some embodiments of the present invention. The layout diagram shows the relationship between the gate electrodes 264 and 284, the field plates 122 and 124, and the source electrodes 30 and 32 of the bidirectional switching device 1A. These components constitute a dual-gate transistor in the bidirectional switching device 1A. The layout in this figure reflects a top view of the bidirectional switching device 1A, i.e., the layout reflects the gate electrodes 264 and 284, the field plates 122, 123, 124 and 125, and the source electrodes 30 and 32 are formed in a layered manner and viewed along a direction perpendicular to these layers. Further structural details of the bidirectional switching device 1A are provided below.

Figures 3B and 3C are cross-sectional views of the bidirectional switching device 1A in Figure 3A taken along lines I-I' and II-II'. The bidirectional switching device 1A further comprises a substrate 20, nitride-based semiconductor layers 22 and 24, gate structures 26 and 28, spacer layers 116, 118, 120, 130, 132, vias 134, 136, 138, 140, 142, patterned conductive layers 144, 146, and a protective layer 148.

Substrate 20 may be a semiconductor substrate. Exemplary materials for substrate 20 include, but are not limited to, silicon (Si), silicon germanium (SiGe), silicon carbide (SiC), gallium arsenide, p-doped Si, n-doped Si, sapphire, semiconductor on insulator (e.g., SOI), or other suitable substrate materials. In some embodiments, substrate 102 may include, but is not limited to, a Group 3 element, a Group 4 element, a Group 5 element, or combinations thereof (e.g., III-V compounds). In other embodiments, substrate 20 may include, but is not limited to, one or more other features, such as, but not limited to, a doped region, a buried layer, an epitaxial (epi) layer, or combinations thereof.

The nitride-based semiconductor layer 22 is disposed on the substrate 20. Exemplary materials for the nitride-based semiconductor layer 22 include, but are not limited to, nitrides or III-V compounds. Examples include gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), In _x Al _y Ga _(1-xy) N (where x+y≦1), and Al _y Ga _(1-y) N (where y≦1). The nitride-based semiconductor layer 24 is disposed on the nitride-based semiconductor layer 22. Exemplary materials for the nitride-based semiconductor layer 24 include, but are not limited to, nitrides or III-V compounds. Examples include gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), In _x Al _y Ga _(1-xy) N (where x+y≦1), and Al _y Ga _(1-y) N (where y≦1).

By selecting the exemplary materials of the nitride-based semiconductor layers 22 and 24 and making the band gap (i.e., forbidden band width) of the nitride-based semiconductor layer 24 larger than the band gap of the nitride-based semiconductor layer 22, their electron affinities are made different from each other, and a heterojunction is formed between them. For example, when the nitride-based semiconductor layer 22 is an undoped gallium nitride layer having a band gap of about 3.4 ev, an aluminum gallium nitride (AlGaN) layer having a band gap of about 4.0 ev can be selected as the nitride-based semiconductor layer 24. Thus, the nitride-based semiconductor layers 22 and 24 can be a channel layer and a barrier layer, respectively. A triangular well is generated at the bonding interface between the channel layer and the barrier layer, and electrons are accumulated in the triangular well, generating a two-dimensional electron gas (2DEG) region adjacent to the heterojunction. Thus, the bidirectional switching device 1A includes at least one gallium nitride-based (GaN-based) high-electron-mobility transistor (HEMT).

In some embodiments, the bidirectional switching device 1A further comprises a buffer layer, a nucleation layer, or a combination thereof (not shown). The buffer layer is disposed between the substrate 20 and the nitride-based semiconductor layer 22. The buffer layer is arranged to reduce lattice and thermal mismatch between the substrate 20 and the nitride-based semiconductor layer 22, thereby repairing defects caused by the mismatches/differences. The buffer layer includes a III-V compound. III-V compounds include, but are not limited to, aluminum, gallium, indium, nitrogen, or combinations thereof. Thus, exemplary materials for the buffer layer further include, but are not limited to, gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), aluminum indium gallium nitride (InAlGaN), or combinations thereof. A nucleation layer may be formed between the substrate 20 and the buffer layer. The nucleation layer is arranged to transition to accommodate the mismatch/difference between the substrate 20 and the III-nitride layer of the buffer layer. Exemplary materials for the nucleation layer include, but are not limited to, aluminum nitride (AlN) or any alloy thereof.

The gate structure 26 is disposed on/above/above the nitride-based semiconductor layer 24. The gate structure 26 may include a p-doped III-V compound semiconductor layer 262 and a gate electrode 264, as depicted in FIG. 3A. The p-doped III-V compound semiconductor layer 262 and the gate electrode 264 are stacked on the nitride-based semiconductor layer 24. The p-doped III-V compound semiconductor layer 262 is located between the nitride-based semiconductor layer 24 and the gate electrode 264. In some embodiments, the gate structure 26 may further include an optional dielectric layer (not shown) between the p-doped III-V compound semiconductor layer 262 and the gate electrode 264.

Gate structure 28 is disposed on/above/on top of nitride-based semiconductor layer 24. Gate structure 28 includes an optional p-doped III-V compound semiconductor layer 282 and a gate electrode 284 as depicted in FIG. 3A. The layout of gate structure 26 is applicable to gate structure 28.

In the illustrative embodiment, the bidirectional switching device 1A is an enhancement mode device that is in a normally-off state when approximately zero bias is applied to the gate electrodes 264 and 284. Specifically, the p-doped III-V compound semiconductor layers 262 and 282 form at least one p-n junction with the nitride-based semiconductor layer 24 to deplete the 2DEG region, and at least one area of the 2DEG region corresponding to a location below the corresponding gate structure 26 and 28 is blocked because it has different properties (e.g., different electron concentration) than the remainder of the 2DEG region.

This mechanism gives the bidirectional switching device 1A a normally-off characteristic. In other words, when no voltage is applied to the gate electrodes 264 and 284, or when the voltage applied to the gate electrodes 264 and 284 is less than the threshold voltage (i.e., the minimum voltage required to form an inversion layer under the gate structures 26 and 28), the area of the 2DEG region under the gate structures 26 or 28 remains blocked, thereby preventing current flow. Also, by providing the p-doped III-V compound semiconductor layers 262 and 282, the gate leakage is reduced and the threshold voltage during the off-state process is increased.

Example materials for the p-doped III-V compound semiconductor layers 262 and 282 include, but are not limited to, p-doped III-V nitride semiconductor materials, such as p-type gallium nitride, p-type aluminum gallium nitride, p-type indium nitride, p-type aluminum indium nitride, p-type indium gallium nitride, p-type aluminum indium gallium nitride, or combinations thereof. In some embodiments, p-type impurities (e.g., beryllium (Be), zinc (Zn), cadmium (Cd), and magnesium (Mg)) are used to achieve the p-doped material.

In some embodiments, nitride-based semiconductor layer 22 comprises undoped gallium nitride, nitride-based semiconductor layer 24 comprises aluminum gallium nitride, and p-doped III-V compound semiconductor layers 262 and 282 are p-type gallium nitride layers, bending the bottom band structure upward and depleting corresponding areas of the 2DEG region, thereby placing bidirectional switching device 1A in an off-state condition.

In some embodiments, the gate electrodes 262 and 284 include a metal or a metal compound. The gate electrodes 262 and 284 may be formed as a single layer or multiple layers of the same or different compositions. Exemplary materials for the metal or metal compound include, but are not limited to, tungsten (W), gold (Au), palladium (Pd), titanium (Ti), tantalum (Ta), cobalt (Co), nickel (Ni), platinum (Pt), molybdenum (Mo), titanium nitride (TiN ), tantalum nitride (TaN), metal alloys or compounds thereof, or other metal compounds. In some embodiments, exemplary materials for the gate electrodes 262 and 284 include, but are not limited to, nitrides, oxides, silicides, doped semiconductors, or combinations thereof. In some embodiments, the selectable dielectric layer is formed of a single layer or multiple layers of dielectric materials. Exemplary dielectric materials include, but are not limited to, one or more oxide layers, silicon oxide layers, silicon nitride layers, high-k dielectric materials (e.g., silicon oxide ( _SiOx ) layers, silicon nitride ( _SiNx ) layers, high-k dielectric materials (e.g., hafnium dioxide ( _HfO2 ), aluminum oxide ( _Al2O3 ), titanium dioxide ( _TiO2 ), hafnium zirconium oxide ( _HfZrO ), ditantalum trioxide ( _Ta2O3 ), hafnium silicate ( _HfSiO4 ), zirconium dioxide ( _{ZrO2 )} , zirconium silicon dioxide ( _ZrSiO2 ), etc.), or combinations thereof.

Source electrodes 30 and 32 are disposed on the nitride-based semiconductor layer 24. The source electrodes 30 and 32 are located on respective sides of the gate structures 26 and 28. The gate structures 26 and 28 are located between the source electrodes 30 and 32. Each gate structure 26 and 28 is located laterally between the source electrodes 30 and 32. The gate structures 26 and 28 and the source electrodes 30 and 32 may form a dual-gate transistor having a 2DEG region together, which may be referred to as a nitride-based/GaN-based dual-gate transistor.

In this illustrative embodiment, the source electrodes 30 and 32 are symmetrical with respect to the gate structures 26 and 28 therebetween. In some embodiments, the source electrodes 30 and 32 may optionally be asymmetrical with respect to the gate structures 26 and 28 therebetween.

In some embodiments, the source electrodes 30 and 32 include, but are not limited to, metals, alloys, doped semiconductor materials (e.g., doped crystalline silicon), compounds (e.g., silicides and nitrides), other conductive materials, or combinations thereof. Exemplary materials for the source electrodes 30 and 32 include, but are not limited to, titanium (Ti), aluminum silicon (AlSi), titanium nitride (TiN), or combinations thereof. The source electrodes 30 and 32 may be a single layer or multiple layers of the same or different compositions. In some embodiments, the source electrodes 30 and 32 form an ohmic contact with the nitride-based semiconductor layer 24. The source electrodes 30 and 32 may be provided with titanium (Ti), aluminum (Al), or other suitable materials to achieve the ohmic contact. In some embodiments, each source electrode 30 and 32 is formed of at least one shape-retaining layer and a conductive fill material. The shape-retaining layer may cover the conductive fill material. Exemplary materials for the shape retention layer include, but are not limited to, titanium (Ti), tantalum (Ta), titanium nitride (TiN), aluminum (Al), gold (Au), aluminum silicon (AlSi), nickel (Ni), platinum (Pt), or combinations thereof. Exemplary materials for the conductive filler include, but are not limited to, aluminum silicon (AlSi), aluminum copper (AlCu), or combinations thereof.

Spacer layers 116, 118, 120, 130, 132 are disposed above the nitride-based semiconductor layer 24. The spacer layers 116, 118, 120 are sequentially stacked on the nitride-based semiconductor layer 24. The spacer layers 116, 118, 120 are formed for protection or to enhance the electrical properties of the device (e.g., to provide an insulating effect between different layers/elements). The spacer layer 116 covers the upper surface of the nitride-based semiconductor layer 24. The spacer layer 116 may cover the gate structures 26 and 28. The spacer layer 116 covers at least two opposing sidewalls of the gate structures 26 and 28. The source electrodes 30 and 32 penetrate/pass through the spacer layers 116, 118, 120 to contact the nitride-based semiconductor layer 24.

Exemplary materials for the spacer layers 116, 118 _, 120 include, but are not limited to, silicon nitride ( _SiNx ), silicon oxide ( _SiOx ), silicon nitride ( _Si3N4 ), silicon oxide-nitride (SiON), silicon carbide (SiC), silicon boron nitride (SiBN), silicon boron carbonitride (SiCBN), oxides, nitrides, or combinations thereof. In some embodiments, at least one of the spacer layers 116, 118, 120 may be a multi-layer structure, _{such as a composite dielectric layer of aluminum oxide/silicon nitride (Al2O3/SiN), aluminum oxide/silicon dioxide (Al2O3 / SiO2 ) ,} aluminum nitride/silicon nitride (AlN/SiN), aluminum nitride/silicon dioxide (AlN/ _SiO2 ), or combinations thereof.

Field plates 122, 123, 124, and 125 are disposed above gate structures 26 and 28. Field plates 122 and 123 are located between spacer layers 116 and 118. Field plates 124 and 125 are located between spacer layers 118 and 120. That is, spacer layer 116, field plates 122 and 123, spacer layer 118, field plates 124 and 125, and spacer layer 120 are stacked/formed in order on nitride-based semiconductor layer 24. Field plates 122, 123, 124, and 125 are located between source electrodes 30 and 32. Exemplary materials for field plates 122, 123, 124, and 125 include, but are not limited to, conductive materials. For example, titanium (Ti), tantalum (Ta), titanium nitride (TiN), tantalum nitride (TaN), or combinations thereof. In some embodiments, other conductive materials may also be used, such as aluminum, copper-doped silicon, and alloys containing these materials.

Referring to FIG. 3C, field plates 122 and 123 may be lower field plates in the bidirectional switching device 1A. Field plate 122 is disposed on spacer layer 116 and is therefore isolated from gate structure 26. Field plate 122 laterally spans at least a portion of gate structure 26. Field plate 122 laterally spans a region that is directly adjacent to gate structure 26 and between gate structures 26 and 28. Field plate 123 is disposed on spacer layer 116 and is therefore isolated from gate structure 28. Field plate 123 laterally spans at least a portion of gate structure 28. Field plate 123 laterally spans a region that is directly adjacent to gate structure 28 and between gate structures 26 and 28. Field plates 122 and 123 are laterally spaced apart from each other.

Field plates 124 and 125 may be upper field plates in the bidirectional switching device 1A. Field plate 124 is disposed on the spacer layer 118 and is therefore separate from field plate 122. Field plate 124 laterally spans at least a portion of field plate 122. Field plate 124 laterally spans a region that is directly adjacent to field plate 122 and is located between field plates 122 and 123. Field plate 125 is disposed on the spacer layer 118 and is therefore separate from field plate 123. Field plate 125 laterally spans at least a portion of field plate 123. Field plate 125 laterally spans a region that is directly adjacent to field plate 123 and is located between field plates 122 and 123. Field plates 124 and 125 are laterally spaced apart from each other.

Therefore, the distance from field plate 124 to field plate 125 is shorter than the distance from field plate 122 to field plate 123. The arrangement of field plates 122, 123, 124, and 125 is a factor that increases the withstand voltage. When bidirectional switching device 1A is in the turned-off state, whether or not breakdown occurs in the region between gate structures 26 and 28 is related to the distribution of the electric field in that portion. This is because no other conductive elements are formed between gate structures 26 and 28, and therefore the arrangement of field plates 122, 123, 124, and 125 is highly correlated with the degree of control of the turned-off state.

Because the distance from field plate 124 to field plate 125 is shorter than the distance from field plate 122 to field plate 123, the distribution of the electric field in the region between gate structures 26 and 28 can be suppressed, and the occurrence of peak values of the electric field is avoided. The distribution of the electric field in the region between gate structures 26 and 28 changes smoothly. In this regard, once the concentration of the electric field distribution becomes high, a peak value occurs in the distribution, which may cause destruction, and then the turn-off state will be lost. To avoid the loss of the turn-off state, field plates 124 and 125 are formed to extend to the region between field plates 122 and 123.

In addition, the process for forming field plates 122 and 123 may be different from that for field plates 124 and 125, which is beneficial for improving the electrical characteristics of bidirectional switching device 1A. One reason for this is that such a method avoids deviation of bidirectional switching device 1A from the original design layout.

For example, this relates to a semiconductor device having a stacked structure formed of a lower spacer layer, a lower field plate, an upper spacer layer, and an upper field plate. The process of forming the lower field plate includes patterning a blanket conductive layer to form the lower field plate. However, during the patterning process, some parts of the lower spacer layer (parts adjacent to the upper surface of the lower spacer layer) are removed, thereby reducing the thickness of the lower spacer layer. As a result, the thickness of the lower spacer layer is reduced, and the upper field plate on the upper spacer layer and the lower spacer layer is formed at a lower position than the original design. This affects the stability of the semiconductor device and reduces the performance of the semiconductor device.

Referring to FIG. 4A, FIG. 4A is an enlarged view of area 2A of FIG. 3C, illustrating detailed structural features resulting from different processes of forming field plates 122 and 123 and field plates 124 and 125. The patterning of field plates 122 and 123 is achieved by a wet etching process. The patterning technique of field plates 124 and 125 is achieved using a dry etching process.

In this regard, the chemistry of the wet etching process enhances the etching selectivity. Enhanced etching selectivity means that the etching rate is stronger for the target material but weaker for the non-target material. In comparison, dry etching processes have the disadvantage of low selectivity. One of the reasons for using dry etching processes to pattern the field plates 124 and 125 is that dry etching processes involve ion bombardment, e.g., reactive-ion etching (RIE), which has the characteristics of fast etching and is controllable for the target material. Although the selectivity of the dry etching process is low, it still provides a positive effect on the upper field plate (i.e., field plates 124 and 125) by trading off the low selectivity with the above-mentioned advantages.

As a result, during the patterning process of the field plate 122, the passivation layer 116 is not etched and retains its contours. After the patterning of the field plates 122 and 123, the thickness of the passivation layer 116 remains the same or approximately the same (i.e., the amount of reduction is approximately negligible).

On the one hand, during the patterning process of the field plate 124, the passivation layer 118 is exposed by the field plate 124 and etched, which is called over-etching, and the contour of the shape is modified. Therefore, after the patterning of the field plate 124, the thickness of the passivation layer 118 is significantly reduced. Even if over-etching occurs on the passivation layer 118, the over-etching does not significantly affect the performance of the bidirectional switching device 1A because the positions of the field plates 122 and 124 have already been determined. However, the dry etching process used for the field plate 124 has good controllability, which increases the efficiency of the manufacturing process of the bidirectional switching device 1A (e.g., accelerates the manufacturing process).

The difference between the wet and dry etching also results in different contours for the edge/sidewall locations of the field plates 122 and 124. The field plate 122 has a sidewall SW1 extending upward from the passivation layer 116. The sidewall SW1 of the field plate 122 is recessed inward to receive the passivation layer 118. The field plate 124 has a sloping sidewall SW2 extending upward from the passivation layer 118. The cause of this difference is related to isotropic etching and anisotropic etching, which are caused by wet etching and dry etching, respectively. The sidewall SW1 of the field plate 122 has a different contour than the sloping sidewall SW2 of the field plate 124. The field plates 122 and 124 may also have different roughnesses. In some embodiments, the surface roughness of the sloping sidewall SW2 is greater than the surface roughness of the sidewall SW1. Here, surface roughness refers to a portion of the surface texture (i.e., its size is much smaller than the layer thickness).

The sidewall SW2 of the field plate 124 is formed by anisotropic dry etching technique, so that the sidewall SW2 of the field plate 124 is flat and inclined. For example, the inclined sidewall SW2 of the field plate 124 extends upward from the passivation layer 118 and is inclined with respect to the upper surface of the passivation layer 118. Also, when overetching of the passivation layer 118 occurs, the side of the passivation layer 118 becomes lower than the inclined sidewall SW2 of the field plate 124. The side of the passivation layer 118 may have a flat and inclined profile. The side of the passivation layer 118 extends inclined from the inclined sidewall SW2 so that it is lower than the position of the upper surface of the passivation layer 118. The degree of inclination in the inclined sidewall SW2 and the side of the passivation layer 118 may be different, which is due to the selectivity of the etching between them (i.e., the field plate 124 and the passivation layer 118 have different etching rates for the same etchant).

In some embodiments, the thickness of field plate 122 is approximately the same as the thickness of field plate 124. In some embodiments, the thickness of field plate 122 is greater than the thickness of field plate 124. In some embodiments, the thickness of field plate 122 is less than the thickness of field plate 124. The thickness relationship between field plates 122 and 124 is determined by practical requirements, such as design or engineering requirements for the distribution of electric field. In some embodiments, field plates 122 and 124 are fabricated from the same conductive material. In some embodiments, field plates 122 and 124 are fabricated from different conductive materials.

Referring to FIG. 4B, FIG. 4B is an enlarged view of area 2B in FIG. 3C, illustrating detailed structural features resulting from different techniques for forming field plates 123 and 125. Patterning of field plate 123 may be achieved by a wet etching process. Also, patterning of field plate 125 may be achieved using a dry etching process. The structural features of field plates 122 and 124 are applicable to field plates 123 and 125. That is, the differences between field plates 123 and 125 refer to the above description.

3B and 3C, the spacer layer 130 is disposed above the spacer layer 120 and the source electrodes 30 and 32. The spacer layer 130 covers the spacer layer 120 and the source electrodes 30 and 32. The spacer layer 130 may be a planarization layer and has a horizontal upper surface to support other layers/elements. In some embodiments, the spacer layer 130 may be formed thicker, and a planarization technique may be performed on the spacer layer 130, for example, a chemical mechanical polish (CMP) technique to remove excess portions and form a horizontal upper surface. Exemplary materials for the spacer layer 130 include, but are not limited to, silicon nitride ( _SiNx ), silicon nitride ( _Si3N4 ), silicon oxide nitride ( _SiON ), silicon carbide (SiC), silicon boron nitride (SiBN), silicon boron carbonitride (SiCBN), oxides, or combinations thereof. In some embodiments, the spacer layer 130 is _a multi-layer structure, such as a composite dielectric layer of aluminum _oxide /silicon nitride ( _Al2O3 /SiN), aluminum oxide/silicon dioxide ( _Al2O3 / _SiO2 ), aluminum nitride/silicon nitride (AlN/SiN), aluminum nitride/silicon dioxide (AlN/ _SiO2 ), or combinations thereof.

The contact via 134 is disposed within the spacer layer 130. The contact via 132 passes through the spacer layer 130. The contact via 134 extends vertically and is electrically connected to the source electrodes 30 and 32, respectively. The contact vias 136, 138, and 140 are disposed within at least the spacer layer 130. The contact vias 136, 138, and 140 pass through at least one of the spacer layers 116, 118, 120, and 130. The contact via 136 extends vertically and is electrically connected to the field plates 124 and 125. The contact via 138 extends vertically and is electrically connected to the field plates 122 and 123. The contact via 140 extends vertically and is electrically connected to the gate electrodes 264 and 284. Exemplary materials for the vias 134, 136, 138, and 140 include, but are not limited to, conductive materials such as metals and alloys.

The patterned conductive layer 144 is disposed on the spacer layer 130 and the contact vias 142. The patterned conductive layer 144 is in contact with the contact vias 142. The patterned conductive layer 144 may include metal lines, pads, traces, or combinations thereof, such that the patterned conductive layer 144 forms at least one circuit. Exemplary materials for the patterned conductive layer 144 include, but are not limited to, conductive materials. The patterned conductive layer 144 may include, but is not limited to, silver (Ag), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), titanium (Ti), alloys thereof, oxides thereof, nitrides thereof, or single or multilayer films of combinations thereof.

The spacer layer 132 is disposed above the spacer layer 130 and the patterned conductive layer 144. The spacer layer 132 covers the spacer layer 130 and the patterned conductive layer 144. The spacer layer 132 is used as a planarization layer and has a horizontal upper surface to support other layers/elements. In some embodiments, the spacer layer 132 may be formed thicker, and a planarization process such as a CMP process is performed on the spacer layer 132 to remove excess portions to form a horizontal upper surface. Exemplary materials for the spacer layer 132 include, but are not limited to, silicon nitride ( _SiNx ), silicon nitride ( _Si3N4 ), silicon oxide nitride ( _SiON ), silicon carbide (SiC), silicon boron nitride (SiBN), silicon boron carbonitride (SiCBN), oxides, or combinations thereof. In some embodiments, the spacer layer 132 is _a multi-layer structure, such as a composite dielectric layer of aluminum _oxide /silicon nitride ( _Al2O3 /SiN), aluminum oxide/silicon dioxide ( _Al2O3 / _SiO2 ), aluminum nitride/silicon nitride (AlN/SiN), aluminum nitride/silicon dioxide (AlN/ _SiO2 ), or combinations thereof.

The contact via 142 is disposed within the spacer layer 132. The contact via 142 penetrates the spacer layer 132. The contact via 142 extends vertically and is electrically connected to the patterned conductive layer 144. The top surface of the contact via 142 is not covered by the spacer layer 132. Exemplary materials for the contact via 142 include, but are not limited to, conductive materials such as metals and alloys.

The patterned conductive layer 146 is disposed on the spacer layer 132 and the contact vias 142. The patterned conductive layer 146 contacts the contact vias 142. The patterned conductive layer 146 may include metal lines, pads, traces, or a combination thereof, such that the patterned conductive layer 146 forms at least one circuit. Exemplary materials for the patterned conductive layer 146 include, but are not limited to, conductive materials. The patterned conductive layer 146 may include silver (Ag), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), titanium (Ti), alloys thereof, oxides thereof, nitrides thereof, or a single layer or multilayer film of any combination thereof.

The circuitry of the patterned conductive layer 144 or 146 connects different layers/elements in the structure, which have the same electrical potential. For example, vias 136, 138, 140 are placed on gate electrodes 264 and 284 and field plates 122, 123, 124, 125, and are electrically connected to gate electrodes 264 and 284. With such connections, gate electrodes 264 and 284 and field plates 122, 123, 124, 125 are electrically connected to each other through the circuitry of the patterned conductive layer 144 and have the same electrical potential, making field plates 122, 123, 124, 125 gate field plates.

The protective layer 148 is disposed above the spacer layer 132 and the patterned conductive layer 146. The protective layer 148 covers the spacer layer 132 and the patterned conductive layer 146. The protective layer 148 prevents oxidation of the patterned conductive layer 146. Some portions of the patterned conductive layer 146 are exposed through openings in the protective layer 148, and these openings are arranged to be electrically connected to an external device (e.g., an external circuit).

The relationship between the gate electrodes 264 and 284 and the field plates 122, 123, 124, 125 is variable. The variation is determined by the requirements of the device design. For example, for high voltage devices, parasitic capacitance occurs between the two conductive layers. Therefore, the contours of the conductive layers need to be modified to meet the requirements of the structure. For example, at least one field plate with a large area is formed to suppress the distribution of the electric field.

Figure 5 is a cross-sectional view of a bidirectional switching device 1B according to some embodiments of the present invention. The bidirectional switching device 1B includes gate structures 26B and 28B and field plates 122B, 123B, 124B, and 125B. The gate structure 26B includes a p-doped III-V compound semiconductor layer 262B and a gate electrode 264B. The gate structure 28B includes a p-doped III-V compound semiconductor layer 282B and a gate electrode 284B.

The field plate 122B and the gate structure 26B overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 122B and the gate structure 26B overlap in the lateral direction, with a distance D1 equal to the overall length of the gate structure 26B. The field plate 124B and the gate structure 26B overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 124B and the gate structure 26B overlap in the lateral direction, with a distance D1 equal to the overall length of the gate structure 26B. The field plate 124B and the field plate 122B overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 124B and the field plate 122B overlap in the lateral direction, with a distance D2 equal to the overall length of the field plate 122B.

Field plate 123B and gate structure 28B overlap in the lateral direction. In the illustrated example of this embodiment, field plate 123B and gate structure 28B overlap in the lateral direction, with distance D3 equal to the overall length of gate structure 28B. Field plate 125B and gate structure 28B overlap in the lateral direction. In the illustrated example of this embodiment, field plate 125B and gate structure 28B overlap in the lateral direction, with distance D3 equal to the overall length of gate structure 28B. Field plate 125B and field plate 123B overlap in the lateral direction. In the illustrated example of this embodiment, field plate 125B and field plate 123B overlap in the lateral direction, with distance D4 equal to the overall length of field plate 123B.

Figure 6 is a cross-sectional view of a bidirectional switching device 1C according to some embodiments of the present invention. Bidirectional switching device 1C is similar to bidirectional switching device 1B depicted and illustrated in Figure 5, with the difference being that field plates 124B and 125B are replaced by field plates 124C and 125C.

The bidirectional switching device 1C includes gate structures 26C and 28C and field plates 122C, 123C, 124C, and 125C. The gate structure 26C includes a p-doped III-V compound semiconductor layer 262C and a gate electrode 264C. The gate structure 28C includes a p-doped III-V compound semiconductor layer 282C and a gate electrode 284C.

The field plate 122C and the gate structure 26C overlap in the horizontal direction. In the illustrated example of this embodiment, the field plate 122C and the gate structure 26C overlap in the horizontal direction, and the distance D5 is equal to the total length of the gate structure 26C. The field plate 124C and the gate structure 26C overlap in the horizontal direction. In the illustrated example of this embodiment, the field plate 124C and the gate structure 26C overlap in the horizontal direction, and the distance D5 is equal to the total length of the gate structure 26C. The field plate 124C and the field plate 122C overlap in the horizontal direction. In the illustrated example of this embodiment, the field plate 124C and the field plate 122C overlap in the horizontal direction, and the distance D6 is shorter than the total length of the field plate 122B.

The field plate 123C and the gate structure 28C overlap in the horizontal direction. In the illustrated example of this embodiment, the field plate 123C and the gate structure 28C overlap in the horizontal direction, and the distance D7 is equal to the total length of the gate structure 28C. The field plate 125C and the gate structure 28C overlap in the horizontal direction. In the illustrated example of this embodiment, the field plate 125C and the gate structure 28C overlap in the horizontal direction, and the distance D7 is equal to the total length of the gate structure 28C. The field plate 125C and the field plate 123C overlap in the horizontal direction. In the illustrated example of this embodiment, the field plate 125C and the field plate 123C overlap in the horizontal direction, and the distance D8 is shorter than the total length of the field plate 123C.

Figure 7 is a cross-sectional view of a bidirectional switching device 1D according to some embodiments of the present invention. Bidirectional switching device 1D is similar to bidirectional switching device 1B depicted and illustrated in Figure 5, with the difference being that field plates 124B and 125B are replaced by field plates 124D and 125D.

The bidirectional switching device 1D includes gate structures 26D and 28D and field plates 122D, 123D, 124D, and 12D. The gate structure 26D includes a p-doped III-V compound semiconductor layer 262D and a gate electrode 264D. The gate structure 28D includes a p-doped III-V compound semiconductor layer 282D and a gate electrode 284D.

The field plate 122D and the gate structure 26D overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 122D and the gate structure 26D overlap in the lateral direction, and the distance D9 is equal to the total length of the gate structure 26D. The field plate 124D and the gate structure 26D overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 124D and the gate structure 26D overlap in the lateral direction, and the distance D10 is shorter than the total length of the gate structure 26D. The field plate 124D and the field plate 122D overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 124D and the field plate 122D overlap in the lateral direction, and the distance D11 is shorter than the total length of the field plate 122D.

The field plate 123D and the gate structure 28D overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 123D and the gate structure 28D overlap in the lateral direction, and the distance D12 is equal to the total length of the gate structure 28D. The field plate 125D and the gate structure 28D overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 125D and the gate structure 28D overlap in the lateral direction, and the distance D13 is shorter than the total length of the gate structure 28D. The field plate 125D and the field plate 123D overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 125D and the field plate 123D overlap in the lateral direction, and the distance D14 is shorter than the total length of the field plate 123D.

Figure 8 is a cross-sectional view of a bidirectional switching device 1E according to some embodiments of the present invention. Bidirectional switching device 1E is similar to bidirectional switching device 1B depicted and illustrated in Figure 5, with the difference being that field plates 124B and 125B are replaced by field plates 124E and 125E.

The bidirectional switching device 1E includes gate structures 26E and 28E and field plates 122E, 123E, 124E, and 12E. The gate structure 26E includes a p-doped III-V compound semiconductor layer 262E and a gate electrode 264E. The gate structure 28E includes a p-doped III-V compound semiconductor layer 282E and a gate electrode 284E.

The field plate 122E and the gate structure 26E overlap laterally. In the illustrated example of this embodiment, the field plate 122E and the gate structure 26E overlap laterally, with the distance D15 being equal to the total length of the gate structure 26E. The field plate 124E and the gate structure 26E do not overlap laterally. The field plate 124E and the field plate 122E overlap laterally. In the illustrated example of this embodiment, the field plate 124E and the field plate 122E overlap laterally, with the distance D16 being less than the total length of the field plate 122E.

Field plate 123E and gate structure 28E overlap laterally. In the illustrated example of this embodiment, field plate 123E and gate structure 28E overlap laterally, with distance D17 being equal to the overall length of gate structure 28E. Field plate 125E and gate structure 28E do not overlap laterally. Field plate 125E and field plate 123E overlap laterally. In the illustrated example of this embodiment, field plate 125E and field plate 123E overlap laterally, with distance D18 being less than the overall length of field plate 123E.

Figure 9 is a cross-sectional view of a bidirectional switching device 1F according to some embodiments of the present invention. Bidirectional switching device 1F is similar to bidirectional switching device 1B depicted and illustrated in Figure 5, with the difference being that field plates 122B, 123B, 124B and 125B are replaced by field plates 122F, 123F, 124F and 125F.

The bidirectional switching device 1F includes gate structures 26F and 28F and field plates 122F, 123F, 124F, and 125F. The gate structure 26F includes a p-doped III-V compound semiconductor layer 262F and a gate electrode 264F. The gate structure 28F includes a p-doped III-V compound semiconductor layer 282F and a gate electrode 284F.

The field plate 122F and the gate structure 26F overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 122F and the gate structure 26F overlap in the lateral direction, and the distance D19 is shorter than the overall length of the gate structure 26F. The field plate 124F and the gate structure 26F overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 124F and the gate structure 26F overlap in the lateral direction, and the distance D20 is equal to the overall length of the gate structure 26F. The field plate 124F and the field plate 122F overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 124F and the field plate 122F overlap in the lateral direction, and the distance D21 is equal to the overall length of the field plate 122F.

The field plate 123F and the gate structure 28F overlap laterally. In the illustrated example of this embodiment, the distance D22 by which the field plate 123F and the gate structure 28F overlap laterally is shorter than the total length of the gate structure 28F. The field plate 125F and the gate structure 28F overlap laterally. In the illustrated example of this embodiment, the field plate 125F and the gate structure 28F overlap laterally, and the distance D23 is equal to the total length of the gate structure 28F. The field plate 125F and the field plate 123F overlap laterally. In the illustrated example of this embodiment, the field plate 125F and the field plate 123F overlap laterally, and the distance D24 is equal to the total length of the field plate 123F.

Figure 10 is a cross-sectional view of a bidirectional switching device 1G according to some embodiments of the present invention. Bidirectional switching device 1G is similar to bidirectional switching device 1F depicted and illustrated in Figure 9, with the difference being that field plates 124F and 125F are replaced by field plates 124G and 125G.

The bidirectional switching device 1G includes gate structures 26G and 28G and field plates 122G, 123G, 124G, and 125G. The gate structure 26G includes a p-doped III-V compound semiconductor layer 262G and a gate electrode 264G. The gate structure 28G includes a p-doped III-V compound semiconductor layer 282G and a gate electrode 284G.

The field plate 122G and the gate structure 26G overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 122G and the gate structure 26G overlap in the lateral direction, and the distance D25 is shorter than the total length of the gate structure 26G. The field plate 124G and the gate structure 26G overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 124G and the gate structure 26G overlap in the lateral direction, and the distance D25 is shorter than the total length of the gate structure 26G. The field plate 124G and the field plate 122G overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 124G and the field plate 122G overlap in the lateral direction, and the distance D26 is equal to the total length of the field plate 122G.

The field plate 123G and the gate structure 28G overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 123G and the gate structure 28G overlap in the lateral direction, and the distance D27 is shorter than the total length of the gate structure 28G. The field plate 125G and the gate structure 28G overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 125G and the gate structure 28G overlap in the lateral direction, and the distance D27 is shorter than the total length of the gate structure 28G. The field plate 125G plates overlap in the lateral direction. In the illustrated example of this embodiment, the field plate 125G and the field plate 123G overlap in the lateral direction, and the distance D28 is equal to the total length of the field plate 123G.

Figure 11 is a cross-sectional view of a bidirectional switching device 1H according to some embodiments of the present invention. Bidirectional switching device 1H is similar to bidirectional switching device 1F depicted and shown in Figure 9, with the difference being that field plates 124F and 125F are replaced by field plates 124H and 125H.

The bidirectional switching device 1H includes gate structures 26H and 28H and field plates 122H, 123H, 124H, and 125H. The gate structure 26H includes a p-doped III-V compound semiconductor layer 262H and a gate electrode 264H. The gate structure 28H includes a p-doped III-V compound semiconductor layer 282H and a gate electrode 284H.

The field plate 122H and the gate structure 26H overlap in the horizontal direction. In the illustrated example of this embodiment, the distance D29 by which the field plate 122H and the gate structure 26H overlap in the horizontal direction is shorter than the total length of the gate structure 26H. The field plate 124H and the gate structure 26H overlap in the horizontal direction. In the illustrated example of this embodiment, the field plate 124H and the gate structure 26H overlap in the horizontal direction, and the distance D30 is shorter than the total length of the gate structure 26H. The field plate 124H and the field plate 122H overlap in the horizontal direction. In the illustrated example of this embodiment, the field plate 124H and the field plate 122H overlap in the horizontal direction, and the distance D31 is shorter than the total length of the field plate 122H.

The field plate 123H and the gate structure 28H overlap in the horizontal direction. In the illustrated example of this embodiment, the field plate 123H and the gate structure 28H are stacked in the horizontal direction, and the distance D32 is shorter than the total length of the gate structure 28H. The field plate 125H and the gate structure 28H overlap in the horizontal direction. In the illustrated example of this embodiment, the field plate 125H and the gate structure 28H overlap in the horizontal direction, and the distance D33 is shorter than the total length of the gate structure 28H. The field plate 125H and the field plate 123H overlap in the horizontal direction. In the illustrated example of this embodiment, the field plate 125H and the field plate 123H overlap in the horizontal direction, and the distance D34 is shorter than the total length of the field plate 123H.

Figure 12 is a cross-sectional view of a bidirectional switching device 1I according to some embodiments of the present invention. Bidirectional switching device 1I is similar to bidirectional switching device 1F depicted and shown in Figure 9, with the difference being that field plates 124F and 125F are replaced by field plates 124I and 125I.

The bidirectional switching device 1I includes gate structures 26I and 28I and field plates 122I, 123I, 124I, and 125I. The gate structure 26I includes a p-doped III-V compound semiconductor layer 262I and a gate electrode 264I. The gate structure 28I includes a p-doped III-V compound semiconductor layer 282I and a gate electrode 284I.

The field plate 122I and the gate structure 26I overlap laterally. In the illustrated example of this embodiment, the distance D35 by which the field plate 122I and the gate structure 26I overlap laterally is shorter than the total length of the gate structure 26I. The field plate 124I and the gate structure 26I do not overlap laterally. The field plate 124I and the field plate 122I overlap laterally. In the illustrated example of this embodiment, the distance D36 by which the field plate 124I and the field plate 122I overlap laterally is shorter than the total length of the field plate 122I.

Field plate 123I and gate structure 28I overlap laterally. In the illustrated embodiment, field plate 123I and gate structure 28I overlap laterally, with a distance D37 equal to the overall length of gate structure 28I. Field plate 125I and gate structure 28I do not overlap laterally. Field plate 125I and field plate 123I overlap laterally. In the illustrated embodiment, field plate 125I and field plate 123I overlap laterally, with a distance D38 shorter than the overall length of field plate 123I.

FIG 13 is a cross-sectional view of a bidirectional switching device 1J according to some embodiments of the present invention. Bidirectional switching device 1J is similar to bidirectional switching device 1A depicted and illustrated in FIG 3A-3C, except that field plates 124B and 125B are replaced by field plates 124J and 125J. In this embodiment, field plates 124J and 125J and source electrodes 30J and 32J are fabricated from the same conductive material. During fabrication, field plates 124J and 125J and source electrodes 30J and 32J may be formed from the same blanket conductive layer.

Figure 14 is a cross-sectional view of a bidirectional switching device 1K according to some embodiments of the present invention. Bidirectional switching device 1K is similar to bidirectional switching device 1A depicted and illustrated in Figures 3A-3C, except that field plates 122 and 123 are replaced by field plates 122K and 123K. In this embodiment, field plates 122K and 123K and source electrodes 30K and 32K are fabricated from the same conductive material. During the manufacturing process, field plates 122K and 123K and source electrodes 30K and 32K may be formed from the same blanket conductive layer.

As described above, based on the design of the field plate of the dual gate transistor, various structures are realized by applying such a design. The design meets different requirements. That is, the design of the field plate of the dual gate transistor of the present invention is flexible and therefore has high compatibility in the field of HEMT devices.

Different process diagrams illustrating the method for manufacturing a bidirectional switching device are shown in Figures 15A-15L, as described below. In the following description, deposition techniques may include, but are not limited to, atomic layer deposition (ALD), physical vapor deposition (PVD), chemical vapor deposition (CVD), metal organic CVD (MOCVD), plasma enhanced CVD (PECVD), low-pressure CVD (LPCVD), plasma-assisted vapor deposition, epitaxial growth, or other suitable techniques.

Referring to FIG. 15A, a substrate 20 is provided. Using the deposition techniques described above, nitride-based semiconductor layers 22 and 24 can be formed, in order, on the substrate 20. Using the deposition techniques described above, a blanket p-doped III-V compound semiconductor layer 262 and a blanket conductive layer 28 can be formed, in order, above the nitride-based semiconductor layer 24.

Referring to FIG. 3B, the blanket p-doped III-V compound semiconductor layer 262 and the blanket conductive layer 28 are patterned to form a plurality of gate structures 26 and 28 on the nitride-based semiconductor layer 24. Each gate structure 26 and 28 includes a p-doped III-V compound semiconductor layer 262/282 and a gate electrode 264/284. The patterning technique can be performed by photolithography, exposure and development, etching, other suitable techniques, or a combination thereof. Using the above-mentioned deposition technique, the passivation layer 116 can be formed to cover the surface of the gate structure 26. By covering the gate structures 26 and 28, the passivation layer 116 can form a plurality of protruding portions above the nitride-based semiconductor layer 24 having the gate electrodes 264 and 282.

15C, using the deposition techniques described above, blanket conductive layer 121 and mask layer 150 can be sequentially formed over passivation layer 116. Mask layer 150 serves as a wet etch mask for blanket conductive layer 121 during patterning. In some embodiments, blanket conductive layer 121 is made of titanium nitride (TiN) and mask layer 150 is made of silicon oxide ( _SiOx ) (e.g., silicon dioxide _SiO2 ).

Referring to FIG. 15D, mask layer 150 is patterned to form mask layer 152 having openings. Portions of blanket conductive layer 121 are exposed through the openings in mask layer 152. The contours of mask layer 152 can be transferred to blanket conductive layer 121 by performing a patterning technique.

15E, the blanket conductive layer 121 is patterned to form a field plate 122 above the gate electrode 264. The field plate 122 has a contour similar to that of the mask layer 150, and the field plate 122 laterally straddles the corresponding gate electrode 264. The patterning technique is performed by a wet etching process. In the wet etching process, the mask layer 152 protects the portion of the bottom blanket conductive layer 121. This removes the portion of the blanket conductive layer 121 exposed through the opening in the mask layer 152. As described above, the wet etching process provides high selectivity, so that the passivation layer 116 is not over-etched and the thickness of the passivation layer 116 remains the same or approximately the same. In some embodiments, the blanket conductive layer 121 is made of titanium nitride ( _TiN ) and the passivation layer 116 is made of silicon nitride ( _Si3N4 ), which have high selectivity to the same etchant during the wet etching process.

Referring to FIG. 15F, mask layer 152 is removed. Then, using the lamination techniques described above, passivation layer 118 and blanket conductive layer 123 are formed, in order, on passivation layer 116 and field plate 122. Passivation layer 118 may be formed as a blanket passivation layer 116 and field plate 122. Blanket conductive layer 123 may be formed to cover passivation layer 118.

Referring to FIG. 15G, using the deposition techniques described above, a mask layer 154 is formed on/above/on the blanket conductive layer 123. The mask layer 154 serves as a dry etch mask for the blanket conductive layer 123 during the patterning process. In some embodiments, the blanket conductive layer 121 is made of titanium nitride (TiN) and the mask layer 154 is made of a photosensitive material, such as a mixture of a polymer, a sensitizer, and a solvent.

Referring to FIG. 15H, the mask layer 154 is patterned to form a mask layer 156 having openings. Some portions of the blanket conductive layer 123 are exposed through the openings of the mask layer 156. The contour of the mask layer 156 can be transferred to the blanket conductive layer 123 by performing a patterning technique. In the exemplary diagram of FIG. 3H, the patterning technique is performed using a dry etching process. For example, the dry etching process is an RIE technique, the application of which is to attack the exposed portions of the blanket conductive layer 123 with high energy ions 158 from a plasma source and remove the portions by reaction to achieve patterning. After patterning, the blanket conductive layer 123 forms a field plate 124.

Referring to FIG. 15I, after patterning, mask layer 156 is removed. Field plate 124 is formed above field plate 122. The field plate laterally spans field plate 122. Passivation layer 120 is then formed over passivation layer 118 and field plate 124 using the deposition techniques described above. Passivation layer 120 may be formed as a blanket passivation layer 118 and field plate 124.

Referring to FIG. 15J, contact region 160 is formed by removing portions of passivation layers 116, 118, 120. At least a portion of nitride-based semiconductor layer 24 is exposed from contact region 160.

Referring to FIG. 15K, a blanket conductive layer 125 is formed over the structure generated in FIG. 15J. The blanket conductive layer 125 corresponds to the composite structure of FIG. 153J. The blanket conductive layer 125 is formed to cover the nitride-based semiconductor layer 24 and the passivation layers 116, 118, and 120. The blanket conductive layer 125 is formed to fill the contact region 160, thereby contacting the nitride-based semiconductor layer 24. The next step is to pattern the blanket conductive layer 125. The blanket conductive layer 125 may be patterned to have different contours as required.

Referring to FIG. 15L, FIG. 15L illustrates one patterning result of blanket conductive layer 125, where source electrodes 30 and 32 are formed by patterning blanket conductive layer 125. Portions of blanket conductive layer 125 are removed, and remaining portions of blanket conductive layer 125 within contact region 160 are reserved as source electrodes 30 and 32. In some embodiments, the entirety of source electrodes 30 and 32 (i.e., excess blanket conductive layer 125) is lower than passivation layer 120. In some embodiments, blanket conductive layer 125 may be made thicker, so that source electrodes 30 and 32 (i.e., excess blanket conductive layer 125) are higher than passivation layer 120.

After the step of FIG. 15L, subsequent steps are performed to form a passivation layer, vias and a patterned conductive layer on the resulting structure to obtain the structure described above.

The above description of the invention is provided to achieve the objectives of explanation and illustration. It is not intended to be exhaustive or to limit the invention to the precise form invented. It is intended to be exhaustive or to limit the invention to the precise form invented. It is obvious to one skilled in the art that many modifications and variations are possible.

As used herein and not otherwise defined, terms such as "substantially," "substantially," "approximate," and "about" are used to describe and interpret small variations. When used in conjunction with an event or circumstance, the term includes instances in which the event or circumstance occurred exactly, and instances in which the event or circumstance is likely to occur. For example, when used in conjunction with a numerical value, the term includes a variation of ±10% or less of the numerical value, such as ±5% or less, ±4% or less, ±3% or less, ±2% or less, ±1% or less, ±0.5% or less, 0.1% or less, or ±0.05% or less. The term "substantially coplanar" refers to two surfaces that are aligned along the same plane within a few micrometers (μm), for example, within 40 micrometers (μm), within 30 μm, within 20 μm, within 10 μm, or within 1 μm.

As used herein, the singular terms "single," "one," and "the single," unless otherwise clearly defined in the context, may include plural referents. A member "above" or "on" another member as provided in the description of some embodiments includes a situation in which a preceding member is directly located on (e.g., in physical contact with) a following member, and a situation in which one or more intermediate members are located between the preceding and following members.

The subject matter of the present disclosure has been depicted and described with reference to specific embodiments of the subject matter, but these depictions and descriptions are not intended to be limiting. Those skilled in the art may make various modifications and substitute equivalents without departing from the actual spirit and scope of the subject matter of the present invention as defined in the appended claims. The accompanying drawings are not necessarily drawn to scale. Due to manufacturing techniques and tolerances, there may be variations between the techniques shown in the subject matter of the present invention and the actual devices. Other embodiments of the subject matter of the present invention have not been specifically described. The specification and accompanying drawings are illustrative, not limiting. Modifications may be made to adapt a particular situation, material, composition of matter, method, or process to the objective, spirit, and scope of the subject matter of the present invention. All such modifications are within the scope of the claims appended hereto. Although the methods described herein are described as carrying out certain operations with reference to a particular sequence, it should be understood that the operations may be combined, sub-divided, or rearranged to form methods that produce equivalent effects without departing from the teachings of the present invention. Thus, unless specifically indicated, no limitations are placed on the order or grouping of these operations.

Claims (22)

1. A nitride based bidirectional switching device operating in conjunction with a battery protection controller, comprising:
a nitride-based active layer disposed on a substrate;
a nitride-based barrier layer disposed on the nitride-based active layer and having a band gap larger than the band gap of the nitride-based active layer;
a plurality of spacer layers disposed on the nitride-based barrier layer, the spacer layers including at least a first spacer layer and a second spacer layer, the first spacer layer and the second spacer layer being positioned on the nitride-based barrier layer ;
a dual gate transistor ,
The battery protection controller has a power input terminal, a discharge over-current protection (DO) terminal, a charge over-current protection (CO) terminal, a voltage monitoring (VM) terminal, and a ground terminal;
The dual gate transistor is
first and second source electrodes disposed on the plurality of spacer layers, the first source electrode being arranged to be electrically connected to the ground terminal of the battery protection controller, and the second source electrode being arranged to be connected to the VM terminal of the battery protection controller via a voltage monitoring resistor;
first and second gate structures disposed on the nitride-based barrier layer and positioned laterally between the first and second source electrodes, the first gate structure including a first gate electrode and the second gate structure including a second gate electrode, the first gate electrode being arranged to be electrically connected to the DO terminal of the battery protection controller, and the second gate electrode being arranged to be electrically connected to the CO terminal of the battery protection controller ;
the nitride based bidirectional switching device further comprising a first lower field plate disposed on the first spacer layer; and a second lower field plate disposed on the first spacer layer, the first and second lower field plates being laterally spaced from one another;
the nitride based bidirectional switching device further comprising a first upper field plate disposed on the second spacer layer and a second upper field plate disposed on the second spacer layer, the first and second upper field plates being laterally spaced from one another;
a distance from the first upper field plate to the second upper field plate is shorter than a distance from the first lower field plate to the second lower field plate;
a lateral overlap distance between the first lower field plate and the first gate structure is less than an overall length of the first gate structure, and a lateral overlap distance between the second lower field plate and the second gate structure is less than an overall length of the second gate structure . the first lower field plate is separate from the first gate structure and laterally spans at least a portion of the first gate structure and a region that is directly adjacent to the first gate structure and is between the first gate structure and the second gate structure;
2. The nitride based bidirectional switching device of claim 1 , wherein the second lower field plate is separate from and laterally spans at least a portion of the second gate structure, and a region immediately adjacent to and between the second gate structure and the first gate structure. the first upper field plate is separate from the first lower field plate and laterally spans at least a portion and region of the first lower field plate, the region being directly adjacent to the first lower field plate and between the first and second lower field plates;
3. The nitride based bidirectional switching device of claim 2 , wherein said second upper field plate is separate from and laterally spans at least a portion and area of said second lower field plate, said area being immediately adjacent to said second lower field plate and located between said first and second lower field plates. The nitride-based bidirectional switching device of claim 3, characterized in that the sidewall contour of the first lower field plate is different from the sidewall contour of the first upper field plate, and the sidewall contour of the second lower field plate is different from the sidewall contour of the second upper field plate. The nitride-based bidirectional switching device of claim 3, characterized in that the sidewalls of the first and second lower field plates extend upward from the first spacer layer and are recessed inward to receive the second spacer layer. The nitride-based bidirectional switching device of claim 3, wherein the first and second upper field plates have sloping sidewalls. The nitride-based bidirectional switching device of claim 3, characterized in that the thicknesses of the first and second lower field plates and the thicknesses of the first and second upper field plates are approximately the same. The nitride-based bidirectional switching device of claim 3, wherein the sidewalls of the first and second lower field plates have a first surface roughness, and the sidewalls of the first and second upper field plates have a second surface roughness greater than the first surface roughness. The nitride-based bidirectional switching device of claim 3, characterized in that the distance by which the first upper field plate and the first lower field plate overlap in the lateral direction is equal to the overall length of the first lower field plate, and the distance by which the second upper field plate and the second lower field plate overlap in the lateral direction is equal to the overall length of the second lower field plate. The nitride-based bidirectional switching device of claim 3, characterized in that the distance by which the first upper field plate and the first lower field plate overlap in the lateral direction is shorter than the total length of the first lower field plate, and the distance by which the second upper field plate and the second lower field plate overlap in the lateral direction is shorter than the total length of the second lower field plate. The nitride-based bidirectional switching device of claim 3, characterized in that the first upper field plate and the first gate structure overlap laterally, the distance being equal to the overall length of the first gate structure, and the second upper field plate and the second gate structure overlap laterally by a distance equal to the overall length of the second gate structure. The nitride-based bidirectional switching device of claim 3, characterized in that the distance by which the first upper field plate and the first gate structure overlap in the lateral direction is less than the total length of the first gate structure, and the distance by which the second upper field plate and the second gate structure overlap in the lateral direction is less than the total length of the second gate structure. forming a nitride-based active layer on a substrate;
forming a nitride-based barrier layer on the nitride-based active layer, the nitride-based barrier layer having a band gap larger than the band gap of the nitride-based active layer;
forming first and second gate electrodes above the nitride-based barrier layer;
forming a first passivation layer on the nitride-based barrier layer to cover the first and second gate electrodes;
forming a lower blanket field plate over the first passivation layer;
patterning the lower blanket field plate by a wet etching process to form first and second lower field plates above the first gate electrode and the second gate electrode, respectively;
forming a second passivation layer on the first passivation layer to cover the first and second lower field plates;
forming an upper blanket field plate over the second passivation layer;
patterning the upper blanket field plate using a dry etch process to form first and second upper field plates above the first and second lower field plates, respectively ;
a distance from the first upper field plate to the second upper field plate is shorter than a distance from the first lower field plate to the second lower field plate;
a distance over which the first lower field plate and the first gate electrode overlap in a lateral direction is shorter than a total length of the first gate electrode, and a distance over which the second lower field plate and the second gate electrode overlap in a lateral direction is shorter than a total length of the second gate electrode . The method of claim 13 further comprising forming a third passivation layer to cover the first and second upper field plates. 15. The method of claim 14, further comprising forming a pair of first and second source electrodes above the nitride-based barrier layer, and positioning the first and second gate electrodes, the first and second lower field plates, and the first and second upper field plates between the first and second source electrodes. The lower blanket field plate is patterned to
the first lower field plate laterally straddles at least a portion of the first gate electrode and a region directly adjacent the region and the first gate electrode and is located between the first gate electrode and the second gate electrode ;
14. The method of claim 13, wherein said second lower field plate straddles at least a portion of said second gate electrode and a region thereof, said region and said second gate electrode being directly adjacent and located between said first gate electrode and said second gate electrode , said first and second lower field plates being laterally spaced from one another . The upper blanket field plate is patterned to
the first upper field plate spans at least a portion of the first lower field plate and a region where the region and the first lower field plate are directly adjacent to and between the first and second lower field plates;
the second upper field plate spans at least a portion and a region of the second lower field plate, the region and the second lower field plate being directly adjacent and located in a region between the first and second lower field plates;
The method of claim 13 , wherein said first and second upper field plates are laterally spaced from one another. 1. A nitride based bidirectional switching device operating in conjunction with a battery protection controller, comprising:
A nitride-based active layer;
a nitride-based barrier layer disposed on the nitride-based active layer and having a band gap larger than the band gap of the nitride-based active layer;
a dual gate transistor,
The battery protection controller has a power input terminal, a discharge over-current protection (DO) terminal, a charge over-current protection (CO) terminal, a voltage monitoring (VM) terminal, and a ground terminal;
The dual gate transistor is
a first source electrode electrically connected to the ground terminal of the battery protection controller;
a second source electrode arranged to be connected to the VM terminal of the battery protection controller through a voltage monitoring resistor;
a first gate electrode arranged to be electrically connected to the DO terminal of the battery protection controller;
a second gate electrode arranged to be electrically connected to the CO terminal of the battery protection controller;
a first lower field plate disposed above the first gate electrode;
a second lower field plate disposed above the second gate electrode;
a first upper field plate disposed above the first lower field plate;
a second upper field plate disposed above the second lower field plate, the second upper field plate being spaced apart from the first upper field plate by a distance that is shorter than the distance that is longer from the first lower field plate to the second lower field plate;
a lateral overlap distance between the first lower field plate and the first gate electrode is less than an overall length of the first gate electrode, and a lateral overlap distance between the second lower field plate and the second gate electrode is less than an overall length of the second gate electrode . 20. The nitride based bidirectional switching device of claim 18, wherein a lateral overlap distance between the first upper field plate and the first lower field plate is equal to an overall length of the first lower field plate, and a lateral overlap distance between the second upper field plate and the second lower field plate is equal to an overall length of the second lower field plate. 20. The nitride based bidirectional switching device of claim 18, wherein a lateral overlap distance between the first upper field plate and the first gate electrode is equal to an overall length of the first gate electrode, and a lateral overlap distance between the second upper field plate and the second gate electrode is equal to an overall length of the second gate electrode. 20. The nitride based bidirectional switching device of claim 18, wherein a lateral overlap distance between the first upper field plate and the first lower field plate is less than an overall length of the first lower field plate, and a lateral overlap distance between the second upper field plate and the second lower field plate is less than an overall length of the second lower field plate. 20. The nitride based bidirectional switching device of claim 18, wherein a lateral overlap distance between the first upper field plate and the first gate electrode is less than an overall length of the first gate electrode, and a lateral overlap distance between the second upper field plate and the second gate electrode is less than an overall length of the second gate electrode.