JP7478120B2 - Imaging device and electronic device - Google Patents

Description

The present invention relates to an imaging device and an electronic device .

There is a known imaging element that groups multiple pixels into blocks and reads out signals in parallel on a block-by-block basis (see Patent Document 1). With such an imaging element, it is difficult to perform binning processing between signals of the same color.

According to a first aspect of the invention, an imaging element includes a first block arranged in a first direction and a second direction intersecting the first direction, the first block being composed of a plurality of pixels, each including a photoelectric conversion unit that converts light from a first filter that transmits light in a first wavelength range into an electric charge ; a second block that spatially overlaps with the first block, the second block being composed of a plurality of pixels arranged in the first direction and the second direction, the second block being composed of a plurality of pixels, each including a photoelectric conversion unit that converts light from a second filter that transmits light in a second wavelength range into an electric charge; a first signal line electrically connected to the plurality of pixels constituting the first block, the first signal line performing a binning process using signals output from at least two of the plurality of pixels constituting the first block; and a second signal line electrically connected to the plurality of pixels constituting the second block, the first signal line being formed in a layer different from the first signal line, the second signal line performing a binning process using signals output from at least two of the plurality of pixels constituting the second block.
According to a second aspect of the invention, an electronic device includes the imaging device described above.

FIG. 1 illustrates an example of the configuration of a digital camera. FIG. 1 is a diagram illustrating an overview of an imaging element. FIG. 2 is a diagram illustrating a cross section of an imaging element. FIG. 1 is a diagram illustrating a Bayer array. FIG. 2 is a circuit diagram illustrating a configuration of a block of an image sensor. FIG. 2 is a schematic diagram illustrating a block. FIG. 7(a) is a diagram explaining the wiring for R pixels, FIG. 7(b) is a diagram explaining the wiring for B pixels, FIG. 7(c) is a diagram explaining the wiring for G pixels, and FIG. 7(d) is a diagram explaining the wiring for G pixels. 8A and 8B are diagrams for explaining wiring according to the first modified example. FIG. 11 is a diagram illustrating wiring according to a second modified example. FIG. 13 is a diagram illustrating wiring according to modified example 3.

The image sensor according to the present embodiment is configured so that a plurality of pixels are grouped into blocks, and signals generated by the pixels can be read out in parallel on a block-by-block basis.
1 is a diagram showing a schematic configuration example of a digital camera equipped with an image sensor 101 according to one embodiment. The digital camera is composed of an interchangeable lens 110 and a camera body 100, and the interchangeable lens 110 is attached to the camera body 100 via a lens attachment portion 105.
The digital camera may be configured as a camera with an integrated lens, rather than an interchangeable lens type.

In Figure 1, x, y and z axes are defined, which form a mutually orthogonal coordinate system. Light from the subject is assumed to be incident in the positive direction of the z axis in Figure 1. As shown on the coordinate axes, the direction towards the front of the paper, perpendicular to the z axis, is the positive x axis, and the upward direction perpendicular to the z and x axes is the positive y axis. In the following figures, the coordinate axes are displayed so that the orientation of each figure can be seen, based on the coordinate axes in Figure 1.

The interchangeable lens 110 includes, for example, a lens control unit 111, a zoom lens 112, a focus lens 113, an anti-vibration lens 114, an aperture 115, and a lens operation unit 116. The lens control unit 111 includes a CPU and peripheral components such as a memory. The lens control unit 111 controls the drive of the focus lens 113 and the aperture 115, detects the positions of the zoom lens 112 and the focus lens 113, transmits lens information to the camera body 100, and receives camera information from the camera body 100.

The camera body 100 includes, for example, an image sensor 101, a body control unit 102, a body operation unit 103, and a display unit 104. The image sensor 101 is disposed at the intended imaging plane (intended focal plane) of the interchangeable lens 110, and photoelectrically converts the subject image formed by the interchangeable lens 110. The body operation unit 103 includes a shutter button and operation members for various settings. The display unit 104 is, for example, configured by an LCD monitor (also called a rear monitor) mounted on the rear of the camera body 100.

The body control unit 102 includes a CPU and peripheral components such as memory. The body control unit 102 controls the operation of the digital camera, such as driving and controlling the image sensor 101, reading out image signals from the image sensor 101, focus detection calculations, focus adjustment of the interchangeable lens 110, and processing and recording of image signals. The body control unit 102 also communicates with the lens control unit 111 via electrical contacts 106 provided in the lens attachment unit 105, receiving lens information and transmitting camera information (such as defocus amount and aperture value).

A subject image is formed on the light receiving surface of the image sensor 101 by a light beam that passes through the interchangeable lens 110. This subject image is photoelectrically converted by the image sensor 101, and the signal after photoelectric conversion is sent to the body control unit 102.

The body control unit 102 detects the focus adjustment state (defocus amount) of the interchangeable lens 110 by performing a known focus detection calculation based on a signal from the image sensor 101. The defocus amount detected by the body control unit 102 is sent to the lens control unit 111. The lens control unit 111 calculates the drive amount of the focus lens 113 based on the received defocus amount. Then, the focus lens 113 is moved to the in-focus position by driving a motor (not shown) or the like based on the calculated drive amount.

The body control unit 102 also processes the signal from the image sensor 101 to generate image data and stores the image data in a memory card (not shown). The body control unit 102 also causes the display unit 104 to display a monitor image (also called a through image) based on the signal from the image sensor 101.

<Configuration of image sensor>
Fig. 2 is a schematic diagram for explaining an overview of the image sensor 101. The image sensor 101 is configured by a CMOS image sensor. The image sensor 101 has a pixel area 201, a vertical control unit 202, a horizontal control unit 203, an output unit 204, and a control unit 205. Note that a power supply unit and detailed circuits are omitted in Fig. 2.

The pixel area 201 has a number of pixels arranged two-dimensionally, for example, in a horizontal direction (row direction) parallel to the x-axis, and a vertical direction (column direction) parallel to the y-axis. Each pixel has a photodiode (photoelectric conversion unit) that generates an electric charge according to the amount of incident light. Each of the multiple pixels is driven by a vertical control unit 202 and a horizontal control unit 203, and a signal based on the electric charge generated by the photodiode of each pixel is read out via a signal line 210.

The output unit 204 performs correlated double sampling (CDS) on the signals read from each pixel and applies gain as necessary. The signals processed by the output unit 204 are output to a downstream signal processing unit (not shown).

In the above description, an example has been described in which the output unit 204 outputs an analog signal to a downstream signal processing unit, but the output unit 204 may also be configured to include an A/D converter and output a digital signal after A/D conversion.

In this embodiment, as described above, a plurality of pixels are grouped together to form a block, and signals generated by the pixels in the block are read out via the same signal line 210. Therefore, the number of signal lines 210 is equal to the number of blocks. Because of this configuration, the output unit 204 can input signals from a plurality of blocks in parallel, process the input signals from the plurality of blocks in parallel, and output the signals in parallel to a downstream signal processing unit (not shown).

The control unit 205 controls the above-mentioned individual units of the image sensor 101. That is, the operation of the image sensor 101 described below is performed under the control of the control unit 205 that receives commands from the body control unit 102.
In this embodiment, the photodiode and the readout unit that reads out a signal based on the charge generated by the photodiode are collectively called a "pixel." An example of the readout unit including each transfer transistor, a floating diffusion (FD) region, an amplification transistor, and a selection transistor, which will be described later, will be described, but the scope of the readout unit does not necessarily have to be as shown in this example.

Figure 3 is a diagram illustrating a cross section of the image sensor 101. Note that Figure 3 shows only a partial cross section of the entire image sensor 101. The image sensor 101 is a so-called back-illuminated image sensor. The image sensor 101 photoelectrically converts incident light directed in the positive direction of the z axis. The image sensor 101 is configured, for example, by stacking a first semiconductor substrate 70 and a second semiconductor substrate 80.

The first semiconductor substrate 70 includes at least a PD layer 71 and a wiring layer 72. The PD layer 71 is disposed on the back side (z-axis minus side) of the wiring layer 72. A plurality of photodiodes PD are disposed two-dimensionally in the PD layer 71. In the wiring layer 72, a signal line 210 and the like are formed by wiring 61, wiring 62, wiring 63, and wiring 64. The wiring 61 to wiring 64 are each formed in a different layer of the wiring layer 72. Although four layers of wiring are illustrated in FIG. 3, the number of layers may be changed as appropriate. The layers of the wiring layer 72 may be connected, for example, by a via (via) not shown. In the second semiconductor substrate 80, various circuits such as the output unit 204 are disposed. The second semiconductor substrate 80 may also be configured in multiple layers.

A plurality of color filters 73 corresponding to the plurality of photodiodes PD are provided on the incident side (z-axis minus side) of the PD layer 71 for incident light. There are a plurality of types of color filters 73 that transmit light in wavelength regions corresponding to red (R), green (G), and blue (B), respectively. The color filters 73 are, for example, three types corresponding to red (R), green (G), and blue (B), and are arranged to form a Bayer array as shown in FIG.
In this embodiment, the Bayer array is described as an example, but the color filters 73 may be arranged in an array other than the Bayer array. In the Bayer array, photodiodes PD provided with color filters 73 that transmit light in different wavelength regions are adjacent to each other, whereas in an array other than the Bayer array, photodiodes PD provided with color filters 73 that transmit light in the same wavelength region may be adjacent to each other.

On the incident side (negative side of the z-axis) of the color filter 73, a plurality of microlenses 74 corresponding to each of the plurality of color filters 73 are provided. The microlenses 74 focus the incident light toward the corresponding photodiode PD. Only a portion of the wavelength range of the incident light that passes through the microlenses 74 is transmitted by the color filter 73, and the light is incident on the photodiode PD. The photodiode PD performs photoelectric conversion of the incident light to generate an electric charge.

A plurality of bonding pads 75 are arranged on the surface (positive side of the z-axis) of the wiring layer 72. A plurality of bonding pads 76 facing the plurality of bonding pads 75 are arranged on the surface (negative side of the z-axis) of the second semiconductor substrate 80 facing the wiring layer 72. The plurality of bonding pads 75 and the plurality of bonding pads 76 are bonded to each other. The first semiconductor substrate 70 and the second semiconductor substrate 80 are electrically connected via the plurality of bonding pads 75 and the plurality of bonding pads 76.
The number of the bonding pads 75 and the number of the bonding pads 76 can be equal to the number of the blocks. That is, one set of the bonding pads 75 and the bonding pads 76 is provided for one block. This configuration has the advantage that the signal lines for each block can be configured to have approximately the same length, thereby suppressing the variation in impedance of the wiring between the blocks.

In this embodiment, one pixel section 30 of the image sensor 101 is composed of a first pixel section 30x provided on the first semiconductor substrate 70 and a second pixel section 30y provided on the second semiconductor substrate 80. The first pixel section 30x includes a microlens 74, a color filter 73, a photodiode PD, as well as transistors described in detail below, wiring 61 to wiring 64 connecting the pixel sections 30, and the like. The second pixel section 30y includes circuits such as the output section 204 described above.

<Block Description>
5 is a circuit diagram illustrating the configuration of a block of the image sensor 101. One block includes a plurality of (e.g., N) first pixel units 30x-1 to 30x-N. One first pixel unit 30x has a photodiode PD, four transistors (a transfer transistor Tx, a reset transistor RST, an amplification transistor SF, and a selection transistor SEL), and an FD region. Each unit of the first pixel unit 30x is connected as shown in FIG. 5. In FIG. 5, the symbol VDD indicates a power supply voltage.

The transfer transistor Tx transfers the charge generated by the photodiode PD to the FD region. When the control signal φTx goes high, the transfer transistor Tx turns on and transfers the charge, and when the control signal φTx goes low, the transfer transistor Tx turns off.

The FD region converts the transferred charge into a voltage. The amplifier transistor SF forms a source follower circuit and amplifies a signal according to the potential of the FD region. The reset transistor RST resets the charge in the FD region and the photodiode PD. The reset transistor RST turns on when the control signal φRST goes high and turns off when the control signal φRST goes low.

The selection transistor SEL outputs the signal amplified by the amplification transistor SF to the block signal line 60. The block signal line 60 interconnects the first pixel units 30x-1 to 30x-N in the block. The block signal line 60 is connected to the signal line 210 corresponding to the block. The selection transistor SEL turns on and outputs a signal when the control signal φSEL goes to high level, and turns off when the control signal φSEL goes to low level.

The selection transistors SEL of the first pixel units 30x-1 to 30x-N in the block are supplied with independent control signals φSEL-1 to φSEL-N. For this reason, for example, when the control unit 205 sequentially supplies high-level control signals φSEL-1 to φSEL-N, the selection transistors SEL-1 to SEL-N are turned on in sequence and output signals to the signal line 210 via the block signal line 60.

Furthermore, when the control unit 205 simultaneously supplies High-level control signals φSEL-1 to φSEL-N, the selection transistors SEL-1 to SEL-N are simultaneously turned on and output signals to the signal line 210 via the block signal line 60. When the selection transistors SEL-1 to SEL-N simultaneously output signals, the signals output from the first pixel units 30x-1 to 30x-N are added in the signal line 210, so that binning can be performed by the first pixel units 30x-1 to 30x-N in the block.
Note that signals may be output to the signal line 210 via the block signal line 60 by any combination of the selection transistors SEL-1 to SEL-N. In this case, signals output from some of the first pixel units 30x-1 to 30x-N are added in the signal line 210, so that binning can be performed by any combination of the first pixel units 30x-1 to 30x-N in the block.

With the above configuration, it is possible to read out signals individually from any of the first pixel units 30x-1 to 30x-N in a block, and to perform binning between at least two of the first pixel units 30x-1 to 30x-N.

In this embodiment, a block is formed by a plurality of pixels of the same color. That is, pixel units 30 having the same wavelength range of light passing through the above-mentioned color filter 73 are combined to form one block. FIG. 6 is a schematic diagram for explaining blocks. In an area surrounded by a solid line around a pixel unit 30 (called an R pixel) having a color filter 73 that transmits light in a wavelength range corresponding to red (R), an R color block 301 is formed by nine R pixels consisting of the R pixel and eight R pixels surrounding the R pixel. Also, in an area surrounded by a dashed line around a pixel unit 30 (called a B pixel) having a color filter 73 that transmits light in a wavelength range corresponding to blue (B), a B color block 302 is formed by nine B pixels consisting of the B pixel and eight B pixels surrounding the B pixel.

Furthermore, in an area surrounded by a dashed line around a pixel section 30 (referred to as a G pixel) located on the GR column and having a color filter 73 that transmits light in a wavelength region corresponding to green (G), a first G color block 303 is formed by nine G pixels consisting of the G pixel and eight G pixels surrounding the G pixel. Furthermore, in an area surrounded by a dashed line around a pixel section 30 (referred to as a G pixel) located on the GB column and having a color filter 73 that transmits light in a wavelength region corresponding to green (G), a second G color block 304 is formed by nine G pixels consisting of the G pixel and eight G pixels surrounding the G pixel.

As shown in FIG. 6, the R color block 301 and the first G color block 303 overlap each other at the top and bottom. Also, the B color block 302 and the first G color block 303 overlap each other at the left and right.

Furthermore, the upper and lower portions of the B color block 302 and the second G color block 304 overlap each other. Furthermore, the left and right portions of the R color block 301 and the second G color block 304 overlap each other.

On the other hand, referring to the circuit diagram of Fig. 5, each of the N pixel units 30 in a block of the same color is connected to the block signal line 60 corresponding to that block in the wiring layer 72 (Fig. 3). Therefore, the output terminals of the selection transistors SEL of the N pixel units 30 in a block of the same color are connected to each other. Naturally, they are not connected to the block signal lines 60 of blocks of other colors. As described above, the wiring that connects to the block signal lines 60 in a block of the same color is formed by the wiring 61 to the wiring 64 in the wiring layer 72.
In this embodiment, wiring is provided in different layers of the wiring layer 72 depending on the color of the block so that wiring within a block does not come into contact with blocks of different colors that overlap spatially in the pixel area 201 (FIG. 2).
For convenience, the first G color block 303 and the second G color block 304 are treated as different colors. Also, "spatially overlapping" refers to a relationship in which the top and bottom or left and right portions of blocks of different colors overlap in FIG. 6.

Figures 7(a) to 7(d) are schematic diagrams explaining the wiring for each color. Figure 7(a) is a diagram illustrating wiring 61 of a block signal line 60 that connects the outputs of the selection transistors SEL of the R pixels in the R color block 301. The wiring 61 is shown shaded. Figure 7(b) is a diagram illustrating wiring 62 of a block signal line 60 that connects the outputs of the selection transistors SEL of the B pixels in the B color block 302. The wiring 62 is shown with vertical stripes.

Figure 7(c) is a diagram illustrating wiring 63 of a block signal line 60 that connects the outputs of the selection transistors SEL of the G pixels of the first G color block 303. The wiring 63 is indicated by dots. Figure 7(d) is a diagram illustrating wiring 64 of a block signal line 60 that connects the outputs of the selection transistors SEL of the G pixels of the second G color block 304. The wiring 64 is indicated by horizontal stripes.

The wiring 61 to wiring 64 are formed in different layers in the wiring layer 72. In this way, different wirings 61 to 64 are formed for each color in the wiring layer 72, and the pixel units 30 in the blocks of each color are wired and connected by each wiring 61 to 64, so that when a block spatially overlaps with a block of another color in the pixel area 201, it is possible to appropriately connect only the pixel units 30 in the block of the same color in each block. Note that the wiring in FIG. 7 is in the shape of the character "日".
7(a) to 7(d), the wirings 61 to 64 are point-symmetric with respect to the pixel unit 30 located at the center of each color block 301 to 304. The wirings 61 to 64 are also line-symmetric with respect to a straight line in the horizontal direction (row direction) or vertical direction (column direction) that passes through the pixel unit 30 located at the center of each color block 301 to 304.

In the blocks 301 to 304 described above, the center of gravity of the N pixel units 30 in each color block 301 to 304 is called the color center of gravity. In this embodiment, the position of the pixel unit 30 located at the center of the nine pixel units 30 constituting each color block 301 to 304 becomes the color center of gravity of the block 301 to 304. In Figures 6 and 7, the pixel units 30 corresponding to the color center of gravity in this example are displayed in different forms. That is, the color center of gravity of the R color block 301 is shown with shading, the color center of gravity of the B color block 302 is shown with vertical stripes, the color center of gravity of the first G color block 303 is shown with dots, and the color center of gravity of the second G color block 304 is shown with horizontal stripes. If you pay attention to the color centers of gravity of each block 301 to 304 in Figure 6, you can see that it is a Bayer array. This means that when binning is performed using the first pixel units 30x-1 to 30x-N in the blocks 301 to 304 of each color, the signal after binning maintains the Bayer array. According to this embodiment, the color centers of the blocks 301 to 304 are spaced at equal intervals, and there is no bias in the color centers.

The bonding pads 75 in the blocks 301 to 304 of each color are preferably provided near the N pixel units 30, but do not necessarily have to be provided at the color center of gravity.

According to the above-described embodiment, the following advantageous effects can be obtained.
(1) The image sensor 101 includes a pixel area 201 in which a plurality of pixels 30 that photoelectrically convert light are arranged in a row direction (x-axis direction) and a column direction (y-axis), a plurality of blocks 301-304 in which the pixel area 201 is divided into a plurality of pixels 30 that photoelectrically convert light in a common wavelength range, a plurality of signal lines 210 provided in each of the plurality of blocks 301-304, and block signal lines 60 provided in each of the plurality of blocks 301-304 and connecting the plurality of pixels 30 in each of the blocks 301-304 to each other.
Since each block 301 to 304 is composed of a plurality of pixels 30 that photoelectrically convert light in a common wavelength range, same-color signal binning can be easily performed simply by adding the signals in each block 301 to 304. For example, the same-color signal binning process is overwhelmingly simpler than in the conventional technology in which pixels that photoelectrically convert light in different wavelength ranges are mixed in a block.
In addition, since the signal line 210 is provided for each of the blocks 301 to 304, the signals for each color can be output in parallel. For example, when pixels that photoelectrically convert light of different wavelength ranges are mixed within a block, the signals for each color can be output in a short time compared to the case where the signals are output in a time-division manner.

(2) In the image sensor 101, the block signal line 60 is connected to the signal line 210 corresponding to the blocks 301 to 304, and each of the pixels 30 in the blocks 301 to 304 is equipped with a selection transistor SEL that connects or disconnects the output terminal of the amplification transistor SF of the pixel 30 to the block signal line 60. With this configuration, it is possible to output signals from all the pixels 30 in the blocks 301 to 304 to the signal line 210, or to output only signals from any pixel 30 in each block to the signal line 210.

(3) In the image sensor 101, the pixel area 201 has a plurality of pixels 30 that photoelectrically convert light in different wavelength regions repeatedly arranged in the row and column directions. The blocks 301 to 304 are configured by pixels 30 that photoelectrically convert light in the same wavelength region as the pixel of interest within a range of 2 pixels (5 pixels x 5 pixels) from the pixel section 30 (assumed to be the pixel of interest) that photoelectrically converts light in the wavelength region corresponding to red (R) in FIG. 6 in the pixel area 201. Because of this configuration, for example, the R color block 301 can be configured using the R pixel and the R pixels located in the vicinity of the pixel section 30 (assumed to be the pixel of interest) that photoelectrically converts light in the wavelength region corresponding to red (R) in FIG. 6 as the center. The same applies to the B color block 302, the first G color block 303, and the second G color block 304.

(4) In the image sensor 101, the blocks 301 to 304 are arranged in the pixel area 201 such that, for example, an R-color block 301 is made up of nine R pixels, including a pixel unit 30 (specified as a pixel of interest) that photoelectrically converts light in a wavelength region corresponding to red (R) in FIG. 6 and eight R pixels surrounding that R-color block 301. The same is true for the B-color block 302, the first G-color block 303, and the second G-color block 304.
With this configuration, when the R pixels, G pixels, and B pixels are arranged in a Bayer array, the color centroids of blocks 301 to 304 also maintain the Bayer array, so that an image processing engine based on the Bayer array can be used as is, regardless of whether binning is performed or not.

(5) In the image sensor 101, multiple blocks 301 to 304 are arranged to spatially overlap in the pixel area 201. This allows the density of the centers of gravity of the blocks to be higher than when the blocks do not spatially overlap.

(6) The image sensor 101 includes a wiring layer 72 that connects block signal lines 60. Among the multiple blocks 301 to 304, for example, the block signal lines 60 of an R block 301 having multiple pixels 30 that photoelectrically convert light in a red (R) wavelength range are connected by wiring 61 ( FIG. 7( a )) in a first layer of the wiring layer 72, and the block signal lines 60 of a B block 302 having multiple pixels 30 that photoelectrically convert light in a blue (B) wavelength range are connected by wiring 62 ( FIG. 7( b )) in a second layer of the wiring layer 72. In addition, the block signal lines 60 of the first G color block 303 having a plurality of pixels 30 that photoelectrically convert light in the green (G) wavelength range are connected by wiring 63 (FIG. 7(c)) in the third layer of the wiring layer 72, and the block signal lines 60 of the second G color block 304 having a plurality of pixels 30 that photoelectrically convert light in the green (G) wavelength range are connected by wiring 64 (FIG. 7(d)) in the fourth layer of the wiring layer 72.
With this configuration, the block signal lines 60 in each of the blocks 301 to 304 can be appropriately connected so as not to come into contact with the block signal lines 60 of blocks of other colors that spatially overlap with each other.

The following modifications are also within the scope of the present invention, and one or more of the modifications may be combined with the above-described embodiment.
(Variation 1)
In the first modification, wiring is separated so that wiring in a block does not come into contact with wiring in a spatially overlapping block of another color in the pixel area 201, and wiring for two colors is provided in one wiring layer. As in the above embodiment, the first block of G color and the second block of G color are treated as different colors for convenience.

8(a) and 8(b) are schematic diagrams for explaining wiring for each color according to Modification 1. In Modification 1, as shown in Fig. 8(a), for example, wiring 61-1 connecting R pixels in an R color block and wiring 61-2 connecting B pixels in a B color block are formed in the same layer. The wiring 61-1 is shown by hatching. The wiring 61-2 is shown by vertical stripes.
8B, a wiring 62-1 that connects the G pixels in the first G block and a wiring 62-2 that connects the G pixels in the second G block are formed in the same layer. The wiring 62-1 is indicated by dots. The wiring 62-2 is indicated by horizontal stripes.
The wirings 61-1 and 61-2 and the wirings 62-1 and 62-2 are formed in different layers of the wiring layer 72.

By wiring in this manner, the number of layers formed in the wiring layer 72 for wiring connection between the pixel units 30 in a block can be reduced from four to two, compared to the wiring in the above embodiment (FIG. 7), thereby reducing costs.
Furthermore, even if the number of layers formed in the wiring layer 72 is reduced in this manner, when a block spatially overlaps with a block of a different color in the pixel area 201, it is possible to properly connect only the pixel units 30 in the block of the same color in each block.
8(a) and 8(b), the wirings 61-1, 2 to 62-1, 2 are point-symmetric with respect to the pixel unit 30 located at the center of each color block 301 to 304. Also, the wirings 61-1, 2 to 62-1, 2 are line-symmetric with respect to a straight line in the horizontal direction (row direction) or vertical direction (column direction) that passes through the pixel unit 30 located at the center of each color block 301 to 304.

The above-mentioned first modification provides the following advantageous effects. That is, the image sensor 101 includes a wiring layer 72 that connects the block signal lines 60. Among the multiple blocks 301 to 304, for example, the block signal line 60 of the R block 301 having multiple pixels 30 that photoelectrically convert light in the red (R) wavelength range and the block signal line 60 of the B block 302 having multiple pixels 30 that photoelectrically convert light in the blue (B) wavelength range are connected by wiring 61-1 and wiring 61-2 in the same layer of the wiring layer 72, respectively (FIG. 8(a)). By wiring in this manner, the number of layers used can be reduced from two to one, and costs can be reduced, compared to the case where two layers of the wiring layer 72 are used to connect the block signal lines 60 in the blocks 301 and 302.

The block signal line 60 of the first G color block 303 having a plurality of pixels 30 that photoelectrically convert light in the green (G) wavelength range and the block signal line 60 of the second G color block 304 having a plurality of pixels 30 that photoelectrically convert light in the green (G) wavelength range are connected by wiring 62-1 and wiring 62-2 in the same layer of the wiring layer 72, respectively (FIG. 8(b)). By wiring in this manner, the number of layers used can be reduced from two to one, and costs can be reduced, compared to the case where two layers of the wiring layer 72 are used to wire and connect the block signal lines 60 in the blocks 303 and 304.

Furthermore, reducing the number of layers that use the wiring layer 72 also reduces the number of vias for connecting between layers, which has the advantage of reducing the variation in impedance of the wiring. Note that the wiring in Figure 8 is in the shape of the character "K".

(Variation 2)
In the second modification, wiring is divided so that wiring within a block does not come into contact with wiring between spatially overlapping blocks of other colors in the pixel area 201, and wiring for four colors is provided in one wiring layer. As in the above embodiment and the first modification, the first block of G color and the second block of G color are treated as different colors for convenience.

Figure 9 is a schematic diagram illustrating the wiring for each color according to the second modification. In the second modification, wiring is provided in a spiral shape starting from the pixel unit 30 located at the center of the block and connecting the pixel units 30 together. For example, wiring 61-1 is provided to connect the R pixel located at the center of the R color block 301 to an R pixel two pixel pitches away in the upward direction, and wiring 61-1 is provided to an R pixel two pixel pitches away in the right direction. Next, wiring 61-1 is provided to connect the R pixel located at the center of the R color block 301 to an R pixel two pixel pitches away in the right direction, and wiring 61-1 is provided to an R pixel two pixel pitches away in the downward direction.

Similarly, wiring 61-1 connects from the R pixel located at the center of the R color block 301 to an R pixel two pixel pitches away in the downward direction, and then wiring 61-1 connects further to an R pixel two pixel pitches away in the left direction. Furthermore, wiring 61-1 connects from the R pixel located at the center of the R color block 301 to an R pixel two pixel pitches away in the left direction, and then wiring 61-1 connects further to an R pixel two pixel pitches away in the upward direction. Wiring 61-1 within the R color block is shown shaded.

Similarly, for the first G color block 303, the second G color block 304, and the B color block 302, wiring is performed starting from the pixel unit 30 located at the center of each block, connecting pixel units 30 of the same color. In FIG. 9, wiring 61-2 in the B color block is shown with vertical stripes. Furthermore, wiring 61-3 in the first G color block is shown with dots. Furthermore, wiring 61-4 in the second G color block is shown with horizontal stripes. The wiring 61-1 to 61-4 of each color are formed in the same layer of the wiring layer 72. As shown in FIG. 9, wiring 61-1 to 61-4 are point-symmetrical with respect to the pixel unit 30 located at the center of each color block.

By wiring in this manner, the number of layers formed in the wiring layer 72 for wiring and connecting the pixel units 30 in a block can be reduced from two to one, compared to the first modification, thereby reducing costs.
Furthermore, even if the number of layers formed in the wiring layer 72 is reduced in this manner, when a block spatially overlaps with a block of a different color in the pixel area 201, it is possible to properly connect only the pixel units 30 in the block of the same color in each block.

According to the above-mentioned modified example 2, the following effects can be obtained. That is, in the pixel area 201, the block signal line 60 of the image sensor 101 connects the pixel of interest (for example, an R pixel) of the R color block 301 to a first pixel (R pixel) that is two pixel pitches away from the pixel of interest in the row direction, and a second pixel (R pixel) that is two pixel pitches away from the first pixel (R pixel) in the column direction, by the wiring 61-1, and also connects the pixel of interest (R pixel) to a third pixel (R pixel) that is two pixel pitches away from the pixel of interest (R pixel) in the column direction, and a fourth pixel (R pixel) that is two pixel pitches away from the third pixel (R pixel) in the row direction. By making such connections, the pixel of interest and the R pixels surrounding the pixel of interest in the R color block 301 are connected to each other.

The B-color block 302, the first G-color block 303, and the second G-color block 304 are connected in the same manner. That is, the B-color block 302 is connected by a wiring 61-2, the first G-color block 303 is connected by a wiring 61-3, and the second G-color block 304 is connected by a wiring 61-4. With this configuration, it is only necessary to use one wiring layer 72 to wire and connect the block signal lines 60, and costs can be further reduced compared to the first modification.
It also reduces the number of vias for connecting between layers, which has the advantage of reducing the variation in impedance of the wiring.

(Variation 3)
In the first and second variants, blocks 301 to 304 are configured from pixels 30 that perform photoelectric conversion on light in the same wavelength range as the pixel of interest within a range of two pixels from the pixel of interest in pixel area 201 (block size is 5 pixels in the row direction by 5 pixels in the column direction), but the size of the blocks may be further expanded.

Figure 10 is a schematic diagram for explaining the wiring of each color according to the third modification. In Figure 10, for example, a pixel unit 30 (assumed to be a pixel of interest) that photoelectrically converts light in a wavelength region corresponding to red (R) is placed at the center, and an R-color block 301 is formed by 25 R pixels consisting of the R pixel and 24 R pixels surrounding the R pixel. That is, within a range of 4 pixels from the pixel of interest in the pixel area 201 (the size of the block is 9 pixels in the row direction × 9 pixels in the column direction), the pixel unit 30 is configured to photoelectrically convert light in the same wavelength region as the pixel of interest. In this way, even if the block size is increased, the pixel units 30 can be wired in a spiral shape starting from the pixel unit 30 located at the center of the block. As shown in Figure 10, the wiring 61-1 to 61-4 are point-symmetrical with respect to the pixel unit 30 located at the center of the block of each color.

(Variation 4)
When the size of the block is further increased, it becomes difficult to connect the pixel units 30 in the block to each other by using only one layer of the wiring layer 72. In such a case, two layers of the wiring layer 72 may be used. For example, a large block is formed by combining a total of nine small blocks of 9 pixels in the row direction by 9 pixels in the column direction, three in the row direction and three in the column direction, as illustrated in FIG. 10. In this case, one layer of the wiring layer 72 is used for wiring (called local wiring) that connects the pixel units 30 in each small block. Then, another layer of the wiring layer 72 is used for wiring (called global wiring) that connects the nine pixel units 30 located at the centers of the nine small blocks. The global wiring, like the local wiring, is wired in a spiral shape starting from the pixel unit 30 located at the center of the large block and connecting the pixel units 30 located at the centers of the small blocks.

According to variant example 4, even if the wiring layout of the block signal lines 60 becomes complicated as the size of the block increases, different layers of the wiring layer 72 are used for the local wiring and the global wiring, so that the number of layers used in the wiring layer 72 can be reduced and the pixel units 30 in the block can be appropriately connected.

In the above explanation, an example has been described in which the imaging element 101 is mounted in a digital camera, but the imaging element 101 may also be mounted in electronic devices other than digital cameras, such as smartphones, tablet terminals, and wearable terminals.

Although various embodiments and modifications have been described above, the present invention is not limited to these. Other embodiments that are conceivable within the scope of the technical idea of the present invention are also included within the scope of the present invention.
For example, although the above-mentioned "日" shaped, "王" shaped, and spiral shaped wiring are exemplified as wiring shapes that are point symmetrical with respect to the pixel unit 30 located at the center of each color block, wiring in an "N" shape, a "Z" shape, or an "H" shape may also be used. Also, although the above-mentioned "日" shaped and "王" shaped wiring are exemplified as wiring shapes that are line symmetrical with respect to the pixel unit 30 located at the center of each color block, wiring in an "H" shape may also be used.

The disclosures of the following priority applications are incorporated herein by reference:
Japanese Patent Application No. 2017-192212 (filed September 29, 2017)

30...Pixel section 30x-1 to 30x-N...First pixel section 60...Block signal lines 61 to 64...Wiring 71...PD layer 72...Wiring layer 73...Color filter 100...Camera body 101...Imaging element 102...Body control section 201...Pixel area 204...Output section 205...Control section 210...Signal lines 301 to 304...Block PD...Photodiode SEL...Selection transistor SF...Amplification transistor Tx...Transfer transistor

Claims (17)

a first block including a plurality of pixels arranged in a first direction and a second direction intersecting the first direction, each of the pixels including a photoelectric conversion unit that converts light from a first filter that transmits light in a first wavelength range into an electric charge ;
a second block that is spatially overlapping with the first block, that is arranged in the first direction and the second direction, and that is configured with a plurality of pixels each including a photoelectric conversion unit that converts light from a second filter that transmits light in a second wavelength range into an electric charge ;
a first signal line electrically connected to the plurality of pixels constituting the first block, the first signal line being used for a binning process using signals output from at least two pixels among the plurality of pixels constituting the first block ;
a signal line electrically connected to the plurality of pixels constituting the second block, the second signal line being formed in a layer different from that of the first signal line, and a binning process being performed using signals output from at least two pixels among the plurality of pixels constituting the second block ;
An imaging element comprising: 2. The imaging device according to claim 1,
the plurality of pixels constituting the first block include a first pixel and a second pixel arranged along the first direction,
the plurality of pixels constituting the second block include a third pixel disposed between the first pixel and the second pixel in the first direction;
Image sensor. 2. The imaging device according to claim 1,
the plurality of pixels constituting the first block include a first pixel and a second pixel arranged along the second direction,
the plurality of pixels constituting the second block include a third pixel disposed between the first pixel and the second pixel in the second direction;
Image sensor. 4. The imaging device according to claim 1,
the plurality of pixels constituting the first block and the plurality of pixels constituting the second block are disposed on a photoelectric conversion layer having a first surface on which light from the first filter and light from the second filter are incident, and a second surface opposite to the first surface;
the first signal line is formed in a first wiring layer disposed on the second surface side of the photoelectric conversion layer,
the second signal line is formed in a second wiring layer disposed on the second surface side of the photoelectric conversion layer;
Image sensor. 5. The imaging device according to claim 4,
the first wiring layer is disposed between the photoelectric conversion layer and the second wiring layer in a direction from the first surface toward the second surface;
Image sensor. 6. The imaging device according to claim 5,
the first signal line is disposed between the photoelectric conversion layer and the second signal line in a direction from the first surface toward the second surface;
Image sensor. 7. The imaging device according to claim 1,
the plurality of pixels constituting the first block each include a selection transistor electrically connected to the first signal line;
the plurality of pixels constituting the second block each include a selection transistor electrically connected to the second signal line;
The selection transistors included in the plurality of pixels constituting the first block are each supplied with an independent control signal;
The selection transistors included in the plurality of pixels constituting the second block are each supplied with an independent control signal.
Image sensor. 8. The imaging device according to claim 7,
the control signal is simultaneously supplied to the selection transistors included in at least two pixels among the plurality of pixels constituting the first block;
the control signal is simultaneously supplied to the selection transistors included in at least two pixels among the plurality of pixels constituting the second block;
Image sensor. 7. The imaging device according to claim 4,
an output section electrically connected to the first signal line and the second signal line;
The photoelectric conversion layer is disposed on a first semiconductor substrate;
The output unit is disposed on a second semiconductor substrate that is stacked together with the first semiconductor substrate.
Image sensor. 10. The imaging device according to claim 9,
a first connection portion that electrically connects the first semiconductor substrate and the second semiconductor substrate;
a second connection portion that electrically connects the first semiconductor substrate and the second semiconductor substrate;
Equipped with
the first signal line is electrically connected to the output portion via the first connection portion,
the second signal line is electrically connected to the output portion via the second connection portion;
Image sensor. The imaging device according to claim 10,
The first connection portion is
a first bond pad disposed on the first semiconductor substrate;
a second bond pad disposed on the second semiconductor substrate;
having
The second connection portion is
a third bond pad disposed on the first semiconductor substrate;
a fourth bond pad disposed on the second semiconductor substrate;
having
the first signal line is electrically connected to the output through the first bond pad and the second bond pad;
the second signal line is electrically connected to the output via the third bond pad and the fourth bond pad;
Image sensor. The imaging device according to any one of claims 9 to 11,
the output unit performs a correlated double sampling process on the signals read out from the pixels constituting the first block and the signals read out from the pixels constituting the second block.
Image sensor. The imaging device according to any one of claims 9 to 12,
the output unit applies a gain to the signals read out from the pixels constituting the first block and the signals read out from the pixels constituting the second block;
Image sensor. The imaging device according to any one of claims 9 to 13,
the output unit converts the signals read out from the pixels constituting the first block and the signals read out from the pixels constituting the second block into digital signals.
Image sensor. An electronic device comprising the imaging device according to claim 1 . 16. The electronic device according to claim 15,
An electronic device comprising a drive control unit that controls driving of the imaging element. 17. The electronic device according to claim 15,
An electronic device equipped with a lens attachment portion for attaching an interchangeable lens.

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