JP7464088B2 - Double-sided polishing method for semiconductor wafers, manufacturing method for polished wafers, and double-sided polishing apparatus for semiconductor wafers - Google Patents

Description

The present invention relates to a method for double-sided polishing of semiconductor wafers, a method for manufacturing polished wafers, and an apparatus for double-sided polishing of semiconductor wafers.

The process for manufacturing semiconductor wafers mainly consists of a single crystal pulling process for producing a single crystal ingot, and a processing process for the produced single crystal ingot. This processing process generally includes a slicing process, lapping process, chamfering process, etching process, polishing process, cleaning process, etc., and by going through these processes, wafers with mirror-finished surfaces are manufactured.

In the polishing process, mechanochemical polishing (CMP) is commonly used, in which the semiconductor wafer and a polishing cloth are rotated and slid relative to one another. CMP combines the mechanical polishing action of the abrasive grains in the polishing liquid with the chemical polishing action of the polishing liquid (alkaline aqueous solution), which is known to produce excellent smoothness. This polishing process involves multiple steps, such as a double-sided polishing process (rough polishing process) in which the front and back sides of the semiconductor wafer are polished simultaneously using a double-sided polishing machine, followed by a finish polishing process in which at least one side of the semiconductor wafer is mirror-finished.

The initial double-sided polishing process (rough polishing process) is carried out with the aim of polishing the semiconductor wafer to the desired thickness, and polishing is carried out using a hard polishing cloth such as polyurethane under conditions where the polishing speed is relatively fast, so as to reduce the variation in the thickness of the polished semiconductor wafer and to flatten it. The final finish polishing process is carried out with the aim of improving the roughness of the semiconductor wafer surface, and one-sided polishing is carried out using a soft polishing cloth such as suede and micro-sized free abrasive grains to reduce the micro-variation in surface roughness on the semiconductor wafer surface, such as nanotopography and haze.

Here, Patent Document 1 proposes that double-sided polishing be performed while supplying a first polishing liquid, and then polishing be performed while supplying a second polishing liquid containing a water-soluble polymer agent, thereby forming a protective film of a water-soluble polymer on the wafer surface and suppressing etching of the wafer surface caused by the alkaline components of the polishing liquid and adhesion of foreign matter.

Patent No. 6747599

Patent Document 1 describes performing a rinse process using pure water after polishing with the second polishing liquid. However, the impact of the rinse conditions on quality has not been fully examined. It has been found that the technology described in Patent Document 1 has a problem in that the pressure of the pure water supplied during the rinse process causes the protective film formed by the second polishing liquid to peel off from the wafer, and the area is etched, resulting in variations in surface roughness (haze).

The present invention aims to provide a method for double-sided polishing of semiconductor wafers, a method for manufacturing polished wafers, and a double-sided polishing apparatus for semiconductor wafers that can reduce the variation in surface roughness of the semiconductor wafers.

The gist and configuration of the present invention are as follows.
(1) A method for polishing a semiconductor wafer, comprising: a double-sided polishing apparatus for polishing a semiconductor wafer, the double-sided polishing apparatus having a carrier plate having one or more holding holes for holding a semiconductor wafer; a platen including an upper platen and a lower platen; and a rotation mechanism for relatively rotating the platen and the carrier plate, the method comprising the steps of: performing the relative rotation while bringing abrasive cloths provided on the upper platen and the lower platen into contact with the semiconductor wafer, thereby simultaneously polishing both sides of the semiconductor wafer, the method comprising the steps of:
a first polishing step in which double-side polishing is performed while supplying a first polishing liquid, which is an alkaline aqueous solution containing abrasive grains, to the polishing cloth from a plurality of liquid supply holes provided in the upper platen;
a second polishing step in which, after the first polishing step, double-side polishing is performed while supplying a second polishing liquid, which is an alkaline aqueous solution containing no abrasive grains and a water-soluble polymer, to the polishing cloth from the liquid supply hole;
a rinsing step of, after the second polishing step, continuing the relative rotation and supplying a rinsing liquid from the liquid supply hole to the polishing cloth to clean the semiconductor wafer,
a second liquid supply hole for supplying the rinsing liquid to the second polishing surface of the semiconductor wafer, the second liquid supply hole being disposed in a position that does not overlap with the semiconductor wafer when viewed from above the platen;

(2) In the rinsing step, the rinsing liquid is supplied from each of the liquid supply holes only when the liquid supply holes are not overlapping with the semiconductor wafer when viewed from above on the platen. The method for double-sided polishing of semiconductor wafers described in (1) above.

(3) After the first polishing step and before the second polishing step,
The method for double-sided polishing of semiconductor wafers described in (1) or (2) above, further comprising a polishing liquid switching step of stopping the supply of the first polishing liquid and starting the supply of the second polishing liquid from the liquid supply hole while keeping the polishing cloths of the upper platen and the lower platen in contact with the semiconductor wafer and continuing the relative rotation.

(4) After the second polishing step and before the rinsing step,
The method for polishing both sides of a semiconductor wafer according to any one of (1) to (3) above, further comprising a rinsing liquid switching step of stopping the supply of the second polishing liquid and starting the supply of the rinsing liquid from the liquid supply hole while keeping the polishing cloth in contact with both sides of the semiconductor wafer and continuing the relative rotation.

(5) A method for double-sided polishing of a semiconductor wafer according to any one of (1) to (4) above, in which the rinsing liquid is pure water.

(6) A method for double-sided polishing of a semiconductor wafer according to any one of (1) to (5) above, in which the supply of the rinsing liquid from the liquid supply hole in the rinsing step is performed by a pressure-feed method.

(7) A method for double-sided polishing of a semiconductor wafer according to any one of (1) to (5) above, in which the supply of the rinsing liquid from the liquid supply hole in the rinsing step is performed by a natural drip method.

(8) A method for producing a polished wafer, comprising carrying out the double-side polishing method for a semiconductor wafer described in any one of (1) to (7) above to produce a polished wafer.

(9) a carrier plate having one or more holding holes for holding a semiconductor wafer;
A surface plate consisting of an upper surface plate and a lower surface plate;
a rotation mechanism that rotates the base plate and the carrier plate relative to each other;
a plurality of liquid supply holes provided in the upper platen for supplying liquid to the semiconductor wafer;
a supply control device that individually controls the supply of liquid from each of the liquid supply holes.

(10) The double-sided polishing apparatus for semiconductor wafers described in (9) above, in which the supply control device controls the supply of rinsing liquid from each of the liquid supply holes only at a timing corresponding to the case where each of the liquid supply holes is in a position that does not overlap with the semiconductor wafer when viewed from above the base plate.

(11) The supply control device includes:
a valve provided in each of the liquid supply units, the valve being switchable between an open state in which liquid is supplied to each of the liquid supply units and a closed state in which the supply of liquid is stopped;
and a control unit that individually switches each of the valves between an open state and a closed state.

The present invention provides a method for double-sided polishing of semiconductor wafers, a method for manufacturing polished wafers, and a double-sided polishing apparatus for semiconductor wafers that can reduce the variation in surface roughness of the semiconductor wafers.

1 is a top view of a double-sided polishing apparatus for semiconductor wafers according to an embodiment of the present invention; 2 is a cross-sectional view taken along line AA' in FIG. 1 is a flowchart of a double-side polishing method for a semiconductor wafer according to one embodiment of the present invention. 1 is a haze map after a conventional double-sided polishing method for a semiconductor wafer is performed. FIG. 1 is a diagram showing a haze distribution after a conventional double-side polishing method for a semiconductor wafer is performed. 5 is a diagram in which the haze map in FIG. 4 and the analysis results of the trajectory of the liquid supply hole are superimposed. 13 is a haze map when pure water is not supplied in the rinsing process. FIG. 13 is a diagram showing a haze distribution when pure water is not supplied in a rinsing process.

The following describes in detail an embodiment of the present invention with reference to the drawings.

<Double-sided polishing machine for semiconductor wafers>
FIG. 1 is a top view of a double-sided polishing apparatus for semiconductor wafers according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view taken along the line A-A' in FIG. 1. As shown in FIGS. 1 and 2, this double-sided polishing apparatus 1 includes a platen 4 having an upper platen 2 and a lower platen 3 facing the upper platen 2, a sun gear 5 provided at the rotation center of the platen 4, and an internal gear 6 provided in an annular shape on the outer periphery of the platen 4. As shown in FIG. 2, polishing cloths 7 are provided (applied) on the opposing surfaces of the upper and lower platens 4, i.e., the lower surface side which is the polishing surface of the upper platen 2 and the upper surface side which is the polishing surface of the lower platen 3. Examples of the polishing cloth 7 include polishing cloths made of nonwoven polyester fabrics and polishing cloths made of polyurethane, and in particular, polishing cloths made of foamed polyurethane, which have excellent mirror finish accuracy for the polished surface of a silicon wafer, can be mentioned. The polishing cloth 7 preferably has a Shore D hardness of 70 to 90 as defined by JIS K 6253-1997/I SO 7619 and a compressibility of 1 to 5%, particularly 2 to 3%.

As shown in Figs. 1 and 2, the device 1 is provided between an upper platen 2 and a lower platen 3, and includes a plurality of carrier plates 9 having one or more (one in the illustrated example) holding holes 8 for holding a semiconductor wafer W. Note that Fig. 1 shows only one of the plurality of carrier plates 9. The number of holding holes 8 may be one or more, and may be, for example, three. In the illustrated example, a semiconductor wafer (a silicon wafer in this embodiment) W is held in the holding hole 8. In addition, the upper platen 2 is provided with a plurality of (three in Fig. 2) liquid supply holes 10 for supplying various polishing liquids and rinsing liquids to the semiconductor wafer W. The liquid supply holes 10 are arranged uniformly (in the illustrated example, eight liquid supply holes 10 are arranged at equal intervals on a circumference centered on one liquid supply hole 10, for a total of nine liquid supply holes 10) in a circular ring-shaped area through which the carrier plate 9 can pass, as viewed from above the platen 4.

Here, this device 1 is a planetary gear type double-sided polishing device that can perform planetary motion of revolution and rotation on the carrier plate 9 by rotating the sun gear 5 and internal gear 6, which are the rotating mechanism. That is, while supplying polishing slurry from multiple liquid supply holes 10, the carrier plate 9 is subjected to planetary motion, and the upper surface plate 2 and the lower surface plate 3 are simultaneously rotated relative to the carrier plate 9. By performing the above relative rotation with the polishing cloth 7 attached to the upper and lower surface plates 4 in contact with the semiconductor wafer W, the polishing cloth 7 can be slid against both sides of the semiconductor wafer W held in the holding holes 8 of the carrier plate 9, thereby polishing both sides of the semiconductor wafer W simultaneously.

The apparatus 1 further includes a supply control device that individually controls the supply of liquid from each liquid supply hole 10. The supply control device is configured to control the supply of rinsing liquid from each liquid supply hole 10 (in a rinsing process described later) only at a timing corresponding to the case where each liquid supply hole 10 is in a position that does not overlap with the semiconductor wafer W when viewed from above the base plate 4. Specifically, the supply control device has a valve 12 that is provided in each liquid supply section (in this example, the liquid supply hole 10 and a hose 11 connected to the liquid supply hole 10 and supplies liquid to the liquid supply hole 10) and can switch between an open state in which liquid is supplied in each liquid supply section and a closed state in which the supply of liquid is stopped, and a control section 13 that individually switches between the open state and the closed state of each valve 12. The control section 13 can be a known processor.

In this embodiment, the control unit 13 is configured to be able to detect the timing when each liquid supply hole 10 is in a position that does not overlap with the semiconductor wafer W when viewed from above the base plate 4. That is, in this example, the control unit 13 detects the rotation speed of the sun gear 5 and internal gear 6, which are the rotation mechanisms, by a measurement unit (not shown). The planetary motion of the carrier plate 9 and the motion of the semiconductor wafer W held in its holding hole 8 are determined by the rotation speed of the sun gear 5 and internal gear 6, which are the rotation mechanisms. In addition, since the upper base plate 2 is rotated by an independent separate drive system (motor, etc.), the motion of the upper base plate 2 is determined by the rotation speed of this separate motor, etc. Therefore, by monitoring both the rotation speed of the sun gear 5 and internal gear 6 and the rotation speed of the separate motor, etc., the control unit 13 can determine the current positional relationship between the carrier plate 9, the semiconductor wafer W, the upper base plate 2, and the liquid supply hole 10 from these rotation speeds, and can determine whether each liquid supply hole 10 is in a position that does not overlap with the semiconductor wafer W when viewed from above the base plate 4.

When the control unit 13 determines that each liquid supply hole 10 does not overlap the semiconductor wafer W when viewed from above the base plate 4, the control unit 13 sets the valve 12 to an open state in which liquid is supplied to each liquid supply unit, and when the control unit 13 determines that each liquid supply hole 10 does not overlap the semiconductor wafer W when viewed from above the base plate 4, the control unit 13 sets the valve 12 to a closed state in which liquid supply is stopped at each liquid supply unit. The valve 12 can be switched to the open state at a timing corresponding to the case in which each liquid supply hole 10 does not overlap the semiconductor wafer W when viewed from above the base plate 4. For example, the valve 12 can be switched to the open state at a timing t1 earlier than the timing at which each liquid supply hole 10 does not overlap the semiconductor wafer W, taking into account the average time t1 until the rinsing liquid reaches the semiconductor wafer W. However, since the relative rotation in the rinsing process described later is slower than that during double-sided polishing, the average time t1 as described above does not necessarily have to be taken into account.

<Method for polishing both sides of semiconductor wafers>
3 is a flow chart of a method for polishing a semiconductor wafer on both sides according to an embodiment of the present invention. The method for polishing a semiconductor wafer on both sides according to the present embodiment can be performed, for example, by using the method for polishing a semiconductor wafer on both sides according to the above embodiment.

As shown in FIG. 3, in the double-sided polishing method of the present embodiment, first, double-sided polishing is performed while supplying a first polishing liquid consisting of an alkaline aqueous solution containing abrasive grains from a plurality of liquid supply holes 10 provided in the upper platen 2 to the polishing cloth 7 (step S101: first polishing process). Next, while the polishing cloth 7 of the upper platen 2 and the lower platen 2 are in contact with the semiconductor wafer W and the relative rotation (between the upper platen 2 and the lower platen 3 and the carrier plate 9) is continued, the supply of the first polishing liquid is stopped and the supply of the second polishing liquid is started from the liquid supply hole 10 (step S102: polishing liquid switching process). Next, double-sided polishing is performed while supplying a second polishing liquid consisting of an alkaline aqueous solution containing no abrasive grains and a water-soluble polymer from the liquid supply hole 10 to the polishing cloth 7 (step S103: second polishing process). Next, while the polishing cloth 7 is in contact with both sides of the semiconductor wafer W and the above-mentioned relative rotation is continued, the supply of the second polishing liquid is stopped and the supply of the rinsing liquid is started from the liquid supply hole 10 (step S104: rinsing liquid switching step). Next, the above-mentioned relative rotation is continued and the semiconductor wafer W is cleaned while the rinsing liquid is supplied from the liquid supply hole 10 to the polishing cloth 7 (step S105: rinsing step).

The first polishing process (step S101) is carried out with the objective of removing a native oxide film of approximately 5 to 20 Å thickness that has formed on the surface of the semiconductor wafer W using a polishing solution containing abrasive grains, and polishing the semiconductor wafer W to approximately the target thickness.

The total polishing amount in the first and second polishing steps is set to a range of approximately 2.5 μm to 10 μm per side. In the first polishing step, double-sided polishing is performed with a polishing amount that is 80% to 99.5% of the total polishing amount in the first and second polishing steps. If the polishing amount in the first polishing step is less than 80% of the total polishing amount, it becomes necessary to perform a large number of second polishing steps with a lower polishing rate to achieve the target thickness, which reduces productivity. On the other hand, if the polishing amount in the first polishing step exceeds 99.5% of the total polishing amount, the polishing allowance in the second polishing step becomes too small, and the effect of suppressing the amount of sagging in the outer periphery of the semiconductor wafer W becomes insufficient.

The second polishing step (step S103) is performed with the aim of suppressing the amount of sagging of the outer periphery of the semiconductor wafer W by slightly polishing both sides of the semiconductor wafer W using a polishing solution that does not contain abrasive grains but contains a water-soluble polymer. Specifically, in the second polishing step, double-sided polishing is performed with a polishing amount of 0.05 μm to 0.5 μm per side. If the polishing amount per side is less than 0.05 μm, the effect of suppressing the amount of sagging of the outer periphery of the semiconductor wafer W becomes insufficient. On the other hand, since the polishing rate is low for a polishing solution that does not contain abrasive grains but contains a water-soluble polymer, productivity is impaired if the polishing amount per side exceeds 0.5 μm.

The first polishing liquid and the second polishing liquid are both preferably adjusted to a pH in the range of 9 to 12. If the pH is less than 9, the etching effect becomes too low, and processing-induced defects such as scratches and marks are likely to occur on the surface of the semiconductor wafer W. If the pH exceeds 12, the solution itself becomes difficult to handle. In addition, it is preferable to use, as the alkaline agent, an alkaline aqueous solution to which any of basic ammonium salts, basic potassium salts, and basic sodium salts has been added, an alkaline carbonate aqueous solution, or an alkaline aqueous solution to which an amine has been added. In addition, an aqueous solution of hydrazine or amines can be used, and from the viewpoint of increasing the polishing rate, it is particularly desirable to use an amine.

In the first polishing liquid, the abrasive grains may be made of silica, alumina, diamond, etc., but it is preferable to use _SiO2 particles for reasons of low cost, dispersibility in the polishing liquid, ease of controlling the grain size of the abrasive grains, etc. The average primary grain size of the abrasive grains may be 30 to 100 nm when measured by the BET method.

In the second polishing liquid, it is preferable to use one or more water-soluble polymers selected from nonionic polymers. Examples include hydroxyethyl cellulose (HEC), polyethylene glycol (PEG), and polypropylene glycol (PPG). The concentration of the water-soluble polymer is preferably 1 ppm or more, more preferably 10 ppm or more, from the viewpoint of sufficiently suppressing the amount of sagging at the outer periphery of the wafer. In addition, from the viewpoint of not significantly reducing the polishing rate and inhibiting productivity, it is preferably 200 ppm or less, more preferably 100 ppm or less.

The polishing rate in the first polishing step (step S101) is preferably 0.1 to 1.0 μm/min, and the polishing rate in the second polishing step (step S103) is preferably 0.03 to 0.5 μm/min.

The rotation speed of the upper and lower platens, the rotation speed of the silicon wafer, the surface pressure, and the supply amount of the polishing liquid may be appropriately set so as to realize the above-mentioned polishing rate. The rotation speed of the upper and lower platens may be in the range of 5 rpm to 40 rpm throughout the first and second polishing steps. The surface pressure may be set in the range of 50 g/cm ² to 300 g/cm ^2. Since the second polishing step uses a polishing liquid that does not contain abrasive grains and has a large frictional resistance, it is desirable to set the surface pressure in the second polishing step 5% to 40% lower than that in the first polishing step.

In this embodiment, the switching from the first polishing process (step S101) to the second polishing process (step S103) is performed by the polishing liquid switching process (step S102) as described above. Specifically, while the polishing cloths 7 of the upper platen 2 and the lower platen 3 are kept in contact with the semiconductor wafer W and the relative rotation is continued, the supply of the first polishing liquid is stopped (using a switching valve or the like, not shown) and the supply of the second polishing liquid is started from the liquid supply hole 10.
Since the second polishing step is performed using the second polishing liquid that does not contain abrasive grains, the frictional resistance between the semiconductor wafer W and the carrier plate 9 and the polishing cloth 7 is likely to increase. Therefore, with regard to the surface pressure applied by the upper and lower surface plates 4 to the front surface of the semiconductor wafer W, it is preferable to perform the second polishing step with a surface pressure lower than that in the first polishing step. This can reliably prevent the carrier plate 9 from vibrating, and suppress the occurrence of micro-scratches on the front and back surfaces of the semiconductor wafer W after polishing.

After the second polishing step (step S103), a rinsing step (step S105) is performed. This rinsing step is performed for the purpose of removing abrasive grains adhering to the semiconductor wafer W and the carrier plate 9. Specifically, the semiconductor wafer W is washed while continuing the above-mentioned relative rotation and supplying a rinsing liquid to the polishing cloth 7 from the liquid supply hole 10. It is preferable to use pure water as the rinsing liquid.
In this embodiment, the switching from the second polishing process (step S103) to the rinsing process (step S105) is performed by the rinsing liquid switching process (step S104) as described above. Specifically, while the polishing cloths 7 are kept in contact with both surfaces of the semiconductor wafer W and the above-mentioned relative rotation is continued, the supply of the second polishing liquid is stopped (using a switching valve or the like, not shown) and the supply of the rinsing liquid is started from the liquid supply hole 10.

Here, in this embodiment, in the rinsing process (step S105), the supply of rinsing liquid from each liquid supply hole 10 is performed only when each liquid supply hole 10 is in a position that does not overlap with the semiconductor wafer W when viewed from above on the base plate 4. As described above, the supply of rinsing liquid from each liquid supply hole 10 may be performed at a timing corresponding to the case where each liquid supply hole 10 is in a position that does not overlap with the semiconductor wafer W when viewed from above on the base plate 4. For example, taking into account the average time t1 for the rinsing liquid to reach the semiconductor wafer W, each liquid supply hole 10 may be switched to the open state at a timing t1 earlier than the timing at which it does not overlap with the semiconductor wafer W. However, as described above, since the relative rotation in the rinsing process (step S105) is slower than that during polishing, the average time t1 as described above does not necessarily have to be taken into account.

<Method of manufacturing polished wafer>
In a method for producing a polished wafer according to one embodiment of the present invention, a polished wafer is produced by carrying out the above-described method for double-side polishing of a semiconductor wafer.

The effects of this embodiment are explained below.

Here, we will explain how the invention was conceived. Figure 4 is a haze map after a conventional double-sided polishing method for semiconductor wafers has been performed. Figure 5 is a diagram showing the haze distribution after a conventional double-sided polishing method for semiconductor wafers has been performed. Figure 6 is a diagram in which the haze map of Figure 4 is superimposed on the analysis results of the trajectory of the liquid supply hole. Figure 7 is a haze map when pure water is not supplied in the rinsing process. Figure 8 is a diagram showing the haze distribution when pure water is not supplied in the rinsing process.

The present inventors have found that when a conventional double-side polishing method for a semiconductor wafer is performed, the surface roughness (haze) of the semiconductor wafer after double-side polishing varies as shown in Figs. 4 and 5. The present inventors have studied the cause of this, and have found that the area where haze is generated largely coincides with the trajectory of the liquid supply hole 10 as shown in Fig. 6. From this, it was inferred that the protective film formed by the second polishing liquid is peeled off from the semiconductor wafer W by the pressure of supplying the rinsing liquid (pure water) in the rinsing step, and the area is etched by the alkaline component contained in the polishing liquid, thereby causing the variation in haze. This is fully supported by the fact that when pure water is not supplied, the haze does not increase even at the position of the trajectory of the liquid supply hole 10 as shown in Figs. 7 and 8.
From the above, the inventors came up with the idea that by adopting a rinsing method in which the supply pressure of the rinsing liquid is not directly applied to the surface of the semiconductor wafer W, the variation in haze can be suppressed.

In the double-sided polishing method for semiconductor wafers of this embodiment, in the rinsing step, the supply of the rinsing liquid from each liquid supply hole 10 is performed only at a timing corresponding to the case where each liquid supply hole 10 is not overlapped with the semiconductor wafer W when viewed from above on the surface plate 4. As a result, compared to the case where the rinsing liquid (pure water) is continuously supplied, the pressure of supplying the rinsing liquid (pure water) can be suppressed from peeling off the protective film formed by the second polishing liquid from the semiconductor wafer W, and etching of the relevant area. As a result, it is possible to suppress the occurrence of a large amount of haze in the relevant area. Therefore, according to the double-sided polishing method for semiconductor wafers of this embodiment, the variation in the surface roughness of the semiconductor wafer can be reduced.
Similarly, since the double-sided polishing apparatus for semiconductor wafers of this embodiment is equipped with a supply control device that individually controls the supply of liquid from each liquid supply hole, the supply control device controls the supply of rinsing liquid from each liquid supply hole only at times (corresponding to cases where) each liquid supply hole is in a position that does not overlap with the semiconductor wafer when viewed from above on the base plate, thereby reducing variation in the surface roughness of the semiconductor wafer.
Similarly, according to the method for producing a polished wafer of this embodiment, the variation in surface roughness of the semiconductor wafer can be reduced.

In the double-sided polishing method of the present disclosure, in the rinsing step (step S105), it is preferable to supply the rinsing liquid from each liquid supply hole 10 only when, as viewed from above on the platen 4, each liquid supply hole 10 is in a position that does not overlap with the semiconductor wafer W. As described above, the relative rotation in the rinsing step (step S105) is slower than that during polishing, and therefore, by starting and stopping the supply at such a timing, the effects of the present invention can be easily obtained.
Similarly, in the double-sided polishing apparatus of the present disclosure, it is preferable that the supply control device controls the supply of rinsing liquid from each liquid supply hole 10 only when each liquid supply hole 10 is in a position that does not overlap with the semiconductor wafer W when viewed from above on the base plate 4.

In the double-sided polishing method disclosed herein, it is preferable to further include the above-mentioned polishing liquid switching step (step S102) after the first polishing step (step S101) and before the second polishing step (step S103). This is because it is possible to suppress vibration of the carrier plate 9 and to suppress the occurrence of micro-scratches on the surface of the semiconductor wafer W. In addition, this is because it is possible to improve throughput.
In the double-sided polishing method of the present disclosure, it is preferable to further include the above-mentioned rinsing liquid switching step (step S104) after the second polishing step (step S103) and before the rinsing step (step S105), because this can improve throughput.

In the double-sided polishing method disclosed herein, the rinsing liquid used in the rinsing process (step S105) is preferably pure water.

In the double-sided polishing method of the present disclosure, the supply of the rinsing liquid from the liquid supply holes 10 in the rinsing step (step S105) is preferably performed by a pressure-feeding method. According to the double-sided polishing method of the present disclosure, the liquid supply holes 10 are closed at the timing when each liquid supply hole 10 overlaps with the semiconductor wafer W in the top view of the base plate 4 (corresponding to the case), so that the rinsing liquid is supplied only from the liquid supply holes 10 (i.e., from a small number of liquid supply holes 10) at the timing when each liquid supply hole 10 does not overlap with the semiconductor wafer W in the top view of the base plate 4 (corresponding to the case). Therefore, by adopting the pressure-feeding method, the shortage of supply of the rinsing liquid caused by the small number of liquid supply holes 10 in the open state can be resolved by increasing the pressure when the rinsing liquid is fed.
On the other hand, in the present disclosure, the supply of the rinsing liquid from the liquid supply hole 10 in the rinsing step (step S105) may be performed by a natural drip method.

In the double-sided polishing apparatus disclosed herein, the supply control device preferably has valves 12 provided in each liquid supply section and capable of switching between an open state in which liquid is supplied to each liquid supply section and a closed state in which the supply of liquid is stopped, and a control section 13 that individually switches each valve 12 between the open state and the closed state. This is because the effects of the present invention can be obtained with a simple configuration.

Although the embodiment of the present invention has been described above, the present invention is not limited to the above embodiment. For example, after the first polishing step (step S101) and before the second polishing step (step S103), the relative rotation may be stopped once without performing the polishing liquid switching step (step S102), and the relative rotation may be restarted after the second polishing liquid is switched to a state in which the second polishing liquid can be supplied. Similarly, after the second polishing step (step S103) and before the rinsing step (step S105), the relative rotation may be stopped once without performing the rinsing liquid switching step (step S104), and the relative rotation may be restarted after the rinsing liquid is switched to a state in which the rinsing liquid can be supplied.
Furthermore, the arrangement of the liquid supply holes 10 is not limited to the example shown in Figures 1 and 2, and can be, for example, a uniform arrangement such as a lattice or staggered arrangement when viewed from above the base plate 4, or a non-uniform arrangement.
Many other variations and modifications are possible.

1: double-sided polishing machine,
2: Upper surface plate,
3: Lower surface plate,
4: Fixed plate,
5: Sun gear,
6: Internal gear,
7: Polishing pad,
8: Retaining hole,
9: carrier plate,
10: liquid supply hole,
11: hose,
12: valve,
13: control unit,
W: Semiconductor wafer

Claims (10)

A method for polishing semiconductor wafers, comprising: a double-sided polishing apparatus for polishing semiconductor wafers, the double-sided polishing apparatus having a carrier plate having one or more holding holes for holding a semiconductor wafer; a platen including an upper platen and a lower platen; and a rotation mechanism for relatively rotating the platen and the carrier plate, the method comprising the steps of: polishing both sides of the semiconductor wafer simultaneously by performing the relative rotation while abrasive cloths provided on the upper platen and the lower platen are in contact with the semiconductor wafer, the method comprising the steps of:
a first polishing step in which double-side polishing is performed while supplying a first polishing liquid, which is an alkaline aqueous solution containing abrasive grains, to the polishing cloth from a plurality of liquid supply holes provided in the upper platen;
a second polishing step in which, after the first polishing step, double-side polishing is performed while supplying a second polishing liquid, which is an alkaline aqueous solution containing no abrasive grains and a water-soluble polymer, to the polishing cloth from the liquid supply hole;
a rinsing step of, after the second polishing step, continuing the relative rotation and supplying a rinsing liquid from the liquid supply hole to the polishing cloth to clean the semiconductor wafer,
a second liquid supply hole for supplying the rinsing liquid to the second polishing surface of the semiconductor wafer, the second liquid supply hole being disposed in a position that does not overlap with the semiconductor wafer when viewed from above the platen; The method for double-sided polishing of semiconductor wafers according to claim 1, wherein in the rinsing step, the rinsing liquid is supplied from each of the liquid supply holes only when each of the liquid supply holes is in a position that does not overlap the semiconductor wafer when viewed from above the platen. After the first polishing step and before the second polishing step,
3. The method for polishing both sides of a semiconductor wafer according to claim 1, further comprising a polishing liquid switching step of stopping the supply of the first polishing liquid and starting the supply of the second polishing liquid from the liquid supply hole while keeping the polishing cloths of the upper platen and the lower platen in contact with the semiconductor wafer and continuing the relative rotation. After the second polishing step and before the rinsing step,
3. The method for polishing both sides of a semiconductor wafer according to claim 1, further comprising a rinsing liquid switching step of stopping the supply of the second polishing liquid and starting the supply of the rinsing liquid from the liquid supply hole while keeping the polishing cloth in contact with both sides of the semiconductor wafer and continuing the relative rotation. The method for double-sided polishing of a semiconductor wafer according to claim 1 or 2, wherein the rinsing liquid is pure water. The method for double-sided polishing of semiconductor wafers according to claim 1 or 2, wherein the supply of the rinsing liquid from the liquid supply hole in the rinsing step is performed by a pressure feed method. The method for double-sided polishing of a semiconductor wafer according to claim 1 or 2, wherein the supply of the rinsing liquid from the liquid supply hole in the rinsing step is performed by a natural drip method. A method for producing a polished wafer, comprising carrying out the double-side polishing method for a semiconductor wafer according to claim 1 or 2 to produce a polished wafer. a carrier plate having one or more holding holes for holding a semiconductor wafer;
A surface plate consisting of an upper surface plate and a lower surface plate;
a rotation mechanism that rotates the base plate and the carrier plate relative to each other;
a plurality of liquid supply holes provided in the upper platen for supplying liquid to the semiconductor wafer;
a supply control device that individually controls the supply of liquid from each of the liquid supply holes ,
a supply control device for controlling the supply of rinsing liquid from each of the liquid supply holes only at a timing corresponding to a case where each of the liquid supply holes is in a position that does not overlap with the semiconductor wafer when viewed from above on the platen, The supply control device includes:
a valve provided in each liquid supply unit, the valve being switchable between an open state in which liquid is supplied to each liquid supply unit and a closed state in which the supply of liquid is stopped;
10. The double-side polishing apparatus for semiconductor wafers according to claim 9 , further comprising a control unit that individually switches each of the valves between an open state and a closed state.

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