JP7339779B2 - Imaging device - Google Patents

Description

The present invention relates to an imaging apparatus and its control method.

2. Description of the Related Art Conventionally, CCD and CMOS sensors have been widely used as imaging elements in imaging apparatuses such as digital cameras. These image pickup devices convert incident light into electric charges using photodiodes, store them, and output them as analog signals of voltage or current. This analog output signal is generally converted into a digital signal at a later stage.

In such an image sensor such as a CCD or CMOS sensor, readout noise caused by a readout circuit is usually superimposed on a photoelectrically converted signal. Since this readout noise does not depend on the amount of incident light, the amount of noise increases relatively in a low-illumination environment where the amount of incident light is very small, and the linearity of the output signal with respect to the amount of incident light deteriorates.

In order to solve this problem, Patent Document 1 discloses a technique of suppressing the influence of readout noise caused by the readout circuit by arranging a source-grounded circuit with a high gain in the pixel instead of the pixel source follower. ing.

On the other hand, in recent years, there has been proposed a photon-counting imaging device that counts photons incident on a photodiode during an exposure period and uses the counted value as a signal value. As a method for realizing photon counting, for example, there is a method using an avalanche photodiode and a counter circuit.

When a reverse bias voltage higher than the breakdown voltage is applied to the avalanche photodiode, carriers generated by incident single photons undergo avalanche multiplication, generating a large current. By counting the pulses generated based on this current with a counter circuit, a signal value corresponding to the number of incident photons can be obtained.

A photon-counting image sensor can handle the number of incident photons directly as a signal value, so there is little effect on the signal due to circuit noise. image can be obtained.

On the other hand, in a photon-counting imaging device, when photons are incident in a short period equal to or less than the pulse width in a high-illuminance environment with a large amount of incident light per unit time, a plurality of pulses may be combined. In this case, the count value counted by the counter circuit decreases with respect to the number of incident photons, and the linearity with respect to the amount of incident light deteriorates.

In order to solve this problem, in Patent Document 2, in a photon counting photodetector, by adding pulses obtained from a plurality of avalanche photodiodes, an output that monotonically increases with an increase in the amount of incident light is disclosed. A resulting configuration is disclosed.

JP 2016-19115 A JP 2014-81253 A

However, as described in Patent Document 1, in order to further reduce noise, in addition to the configuration of Patent Document 1, measures such as setting a band limit in the readout circuit and performing multiple AD conversions are taken. is necessary.

In addition, in the configuration of Patent Document 2, since the outputs of a plurality of avalanche photodiodes are added, the number of output pixels obtained with the same chip size decreases. In addition, when photons are incident on a single avalanche photodiode at a period shorter than the pulse width, a correct output cannot be obtained. Therefore, the linearity of the output with respect to the amount of received light could not be sufficiently improved.

SUMMARY OF THE INVENTION The present invention has been made in view of the problems described above, and an object thereof is to provide an image pickup apparatus capable of improving the linearity of an output signal with respect to the amount of incident light.

An imaging device according to the present invention performs a first operation of generating pixel signals by counting incident photons and a second operation of generating pixel signals by converting incident light into charges and accumulating them. and switching means for switching between the first operation and the second operation for each of the plurality of pixels, wherein the plurality of pixels Each of the pixels includes a first circuit that operates when the first operation is performed, a second circuit that operates when the second operation is performed, and the first circuit or the A counter for counting the output of the second circuit is arranged .

According to the present invention, it is possible to provide an imaging device capable of improving the linearity of the output signal with respect to the amount of incident light.

1 is a block diagram showing the configuration of a digital camera that is a first embodiment of an imaging device of the present invention; FIG. FIG. 2 is a diagram showing the overall configuration of an imaging device according to the first embodiment; 4 is a diagram showing the configuration of a unit pixel according to the first embodiment; FIG. FIG. 4 is a diagram showing operation timings in a SPAD mode in the first embodiment; FIG. 4 is a diagram showing operation timings in an accumulation mode according to the first embodiment; The figure which shows the whole structure of the image pick-up element in 2nd Embodiment. FIG. 10 is a diagram showing the configuration of a unit pixel according to the second embodiment; FIG. 10 is a diagram showing operation timings of low-illuminance pixels when illuminance determination is performed in SPAD mode; FIG. 10 is a diagram showing operation timings of high-illuminance pixels when illuminance determination is performed in SPAD mode; FIG. 7 is a diagram showing operation timings of low-illuminance pixels when illuminance determination is performed in an accumulation mode; FIG. 10 is a diagram showing operation timings of high-illuminance pixels when illuminance determination is performed in an accumulation mode; The figure which shows some imaging elements of the 1st modification of 2nd Embodiment. The figure which shows the structure of the unit pixel of the 2nd modification of 2nd Embodiment. The figure which shows the whole structure of the image pick-up element in 3rd Embodiment. The figure which shows the structure of the unit pixel in 3rd Embodiment. FIG. 11 is an electric potential diagram along line A-A′ of the photoelectric conversion unit according to the third embodiment;

Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. In addition, the following embodiments do not limit the invention according to the scope of claims. Although multiple features are described in the embodiments, not all of these multiple features are essential to the invention, and multiple features may be combined arbitrarily. Furthermore, in the accompanying drawings, the same or similar configurations are denoted by the same reference numerals, and redundant description is omitted.

(First embodiment)
FIG. 1 is a block diagram showing the configuration of a digital camera 100, which is the first embodiment of the imaging apparatus of the present invention.

In FIG. 1 , a lens unit 101 forms an optical image of a subject on an imaging device 105 . A lens unit 101 includes a zoom lens, a focus lens, an aperture mechanism, and the like, and is driven by a lens driving device 102 to perform zoom control, focus control, aperture control, and the like. A mechanical shutter (hereinafter referred to as shutter) 103 is driven by a shutter driving device 104 . The imaging device 105 photoelectrically converts the subject image formed by the lens unit 101 to generate an image signal (pixel signal).

The signal processing circuit 106 performs digital gain processing for increasing the gain, various correction processing, data compression processing, and the like on the image signal output from the image sensor 105 . The memory unit 107 temporarily stores image data. The control unit 108 performs various calculations and controls the entire digital camera 100 . The I/F unit 109 is an interface for recording image data on the recording medium 110 or reading image data from the recording medium 110 . A recording medium 110 is a removable recording medium such as a semiconductor memory for recording or reading image data. The display unit 111 displays various information and captured images.

Next, the operation of the digital camera 100 configured as described above during photographing will be described. When the main power is turned on, the power of the control unit 108 is turned on, and further the power of the imaging circuits such as the signal processing circuit 106 is turned on.

When a release button (not shown) is pressed, a shooting operation is started. When the exposure operation of the image pickup device 105 is completed, the image signal output from the image pickup device 105 is subjected to correction processing and image processing in the signal processing circuit 106 and written to the memory unit 107 according to instructions from the control unit 108 . Data stored in the memory unit 107 is recorded on the recording medium 111 via the I/F unit 109 under the control of the control unit 108 . Alternatively, the image may be processed by inputting directly to a computer or the like via an external I/F section (not shown).

FIG. 2 is a diagram showing the overall configuration of the imaging device 105. As shown in FIG. The image sensor 105 includes a pixel region 200 , a vertical control circuit 202 , a horizontal control circuit 203 , a timing generator (TG) 204 , switches 205 and 206 , a digital output section 207 and a drive control circuit 208 .

Unit pixels 201 are arranged in a matrix in the pixel region 200 . Although a 4×4 pixel arrangement is shown here for the sake of clarity of explanation, more pixels are actually arranged. The unit pixel 201 is controlled by a drive control circuit 208 and can selectively execute either a first drive mode (hereinafter referred to as SPAD mode) or a second drive mode (hereinafter referred to as accumulation mode). .

In the SPAD mode, the unit pixel 201 counts the number of incident photons and outputs it as a digital signal value. In addition, in the accumulation mode, the unit pixel 201 converts incident photons into charges, accumulates them, and outputs them as digital signal values by performing AD conversion. Details of this operation will be described later with reference to FIGS.

The first drive mode has better linearity of the output signal with respect to the amount of incident light at low illuminance than the second drive mode, and the second drive mode has better linearity than the first drive mode. Therefore, the linearity of the output signal with respect to the amount of incident light is good at high illuminance.

The vertical control circuit 202 turns ON/OFF the switch 205 by sending a control signal to each pixel row of the pixel region 200, and selects pixels for which signals are read from the pixels arranged in the pixel region 200 on a row-by-row basis. do.

The horizontal control circuit 203 turns ON/OFF the switch 206 for each pixel column of the pixel region 200 to select pixel signals read out from the pixel region 200 to the column signal lines for each column. Pixel signals selected by the vertical control circuit 202 and the horizontal control circuit 203 are read out to the digital output unit 207 . A digital output unit 207 outputs the signal of the selected pixel to the outside of the image sensor 105 .

TG 204 sends timing control signals to each of vertical control circuit 202 and horizontal control circuit 203 . Note that the TG 204 also sends the timing control signal to the digital output section 207 .

FIG. 3 is a diagram showing the configuration of the unit pixel 201. As shown in FIG. The unit pixel 201 includes a SPAD mode circuit section 301 , an accumulation mode circuit section 302 , a photodiode 303 , a clock switching section 307 , an enable switching section 308 and a counter 313 .

The SPAD mode circuitry 301 comprises a quench resistor 304 , a switch 305 and an inverting buffer 306 . The accumulation mode circuit section 302 includes a reset switch 309 , a switch 310 , a transfer switch 311 and a comparator 312 .

Here, the operation of the unit pixel 201 will be described with reference to FIGS. 4 and 5. FIG.

<SPAD mode>
FIG. 4 is a diagram showing the operation of the unit pixel 201 in SPAD mode. In the SPAD mode, the drive mode control signal MCS is output from the drive control circuit 208 at a low level (hereinafter referred to as L level), thereby turning the switch 305 ON and enabling the SPAD mode circuit section 301 . Further, the drive mode control signal MCS sets the clock switching unit 307 to output the output PLS of the inverting buffer 306 and the enable switching unit 308 to output the signal EN.

At this time, a reverse bias voltage VDDSPAD higher than the breakdown voltage is applied to the photodiode 303 via the quench resistor 304, and the photodiode 303 operates in Geiger mode. On the other hand, since the switch 310 is turned off, the accumulation mode circuit section 302 does not operate.

At time T1 in FIG. 4, the L level of the signal RS is input to the counter 313, and the count value held by the counter 313 is reset. At time T2, the high level (hereinafter referred to as H level) of the signal EN is input to the counter 313, and the counter 313 starts the counting operation, thereby starting the exposure period.

At time T3, photons are incident on the photodiode 303, causing an avalanche multiplication phenomenon and generating an avalanche current. Due to this avalanche current, the cathode terminal voltage Vout of the photodiode 303 connected to the quench resistor 304 begins to drop, and when it falls below the breakdown voltage, the avalanche multiplication phenomenon stops. Then, since recharging is performed via the quench resistor 304 from the power supply applying the reverse bias voltage VDDSPAD, the cathode terminal voltage Vout of the photodiode 303 begins to rise, and recharging is completed at time T4.

The inversion buffer 306 changes its output from L level to H level when the cathode terminal voltage Vout of the photodiode 303 is below the threshold, and from H level to L level when it exceeds the threshold. 4 is pulsed. A counter 313 counts the input pulse-like output PLS of the inverting buffer 306 .

After that, every time a photon is incident on the photodiode 303, the operations from time T3 to T4 are repeated. At time T5, the L level of the signal EN is input to the counter 313, whereby the counter 313 stops the counting operation and the exposure period ends.

<Accumulation mode>
FIG. 5 is a diagram showing the operation of the unit pixel 201 in accumulation mode. In the accumulation mode, the drive control circuit 208 outputs the drive mode control signal MCS at H level, so that the switch 310 is turned on and the accumulation mode circuit section 302 is enabled. The drive mode control signal MCS sets the clock switching unit 307 to output the clock signal CLK and the enable switching unit 308 to output the output COMP of the comparator 312 . On the other hand, since the switch 305 is turned off, the SPAD mode circuit section 301 does not operate.

At time T1 in FIG. 5, the L level of the signal RS is input to the counter 313, and the count value held by the counter 313 is reset. By setting the signal Tx to H level and the signal RES to L level, the photodiode 303 is connected to the bias voltage VDDACC and reset together with the comparator input voltage Vfd.

At time T2, the exposure period is started by the signal RES becoming H level. At time T3, the signal TX becomes H level, so that the charge accumulated in the photodiode 303 is transferred to the inverting node of the comparator 312, and the input voltage Vfd of the comparator 312 becomes a voltage corresponding to the transferred charge.

At this time, due to the change in the input voltage Vfd of the comparator 312, the output signal COMP of the comparator 312 becomes H level, and the counter 313 becomes ready for counting, but since the signal RS is L level, counting is not executed.

At time T4, the reference signal RAMP is input to the comparator 312, and the reference signal falls with a constant slope, thereby starting comparison with the voltage Vfd. In addition, the counter 313 starts the counting operation when the signal RS becomes H level. Since the reference signal RAMP falls below the voltage Vfd at time T5, the output signal COMP of the comparator 312 becomes L level, and the counter 313 stops the counting operation.

In both the SPAD mode and the accumulation mode, after the counter operation is finished, the vertical control circuit 202 and the horizontal control circuit 203 turn on/off the switches 205 and 206 to output the count value of the unit pixel 201 to the digital output section for each row and column. 207.

As described above, the drive control circuit 208 can switch the drive mode of the unit pixels 201 arranged in the pixel region 200 between the SPAD mode and the accumulation mode. In this embodiment, since the drive control circuit 208 collectively controls all the unit pixels 201 arranged in the pixel region 200, the entire pixel region 200 is in a common drive mode.

By switching the drive mode of the pixel region 200 between the SPAD mode and the accumulation mode according to the amount of incident light, it is possible to improve the linearity between the amount of incident light and the output signal.

(Second embodiment)
In the first embodiment, the operation mode of the unit pixel 201 is switched in common for the entire pixel region 200, but in the present embodiment, each unit pixel switches the operation mode separately according to the amount of light incident on the unit pixel. The switching configuration will be described.

FIG. 6 is a diagram showing the overall configuration of the imaging element 105 in the second embodiment. The image pickup device 105 includes a pixel region 600 , a vertical control circuit 602 , a horizontal control circuit 603 , a timing generator (TG) 604 , switches 605 and 606 and a digital output section 607 . It differs from the imaging device 105 of the first embodiment in that the drive control circuit 208 is not present. The operation without the intervention of the drive control circuit 208 is the same as in the first embodiment. Unit pixels 601 are arranged in a matrix in the pixel region 600 .

FIG. 7 is a diagram showing the configuration of a unit pixel 601. As shown in FIG. The unit pixel 601 includes a SPAD mode circuit section 701 , an accumulation mode circuit section 702 , a photodiode 703 , a clock switching section 707 , an enable switching section 708 , a counter 713 and a drive control section 714 .

The SPAD mode circuitry 701 comprises a quench resistor 704 , a switch 705 and an inverting buffer 706 . The accumulation mode circuit section 702 includes a reset switch 709 , a switch 710 , a transfer switch 711 and a comparator 712 .

The drive control unit 714 compares the count value of the counter 713 with a predetermined threshold. If the count value is less than the predetermined threshold value, the amount of incident light is small, so the drive control unit 714 outputs the L level signal MCS to drive the unit pixel 601 in the SPAD mode. Also, if the count value is equal to or greater than the predetermined threshold, the amount of incident light is large, so the drive control unit 714 outputs the H level signal MCS to operate the unit pixel 601 in the accumulation mode.

Here, the operation of the unit pixel 601 will be described with reference to FIGS. 8 to 11. FIG. 8 and 9 are diagrams showing the operation of switching between the SPAD mode and the accumulation mode by determining the amount of incident light in the SPAD mode.

<SPAD mode determination/low illumination>
FIG. 8 shows the operation of the unit pixel 601 when the amount of incident light is small. The operations at times T1 to T4 in FIG. 8 are the same as the operations at times T1 to T4 in FIG. 4 shown in the first embodiment. At time T5, the drive control unit 714 compares the count value of the counter 713 with a predetermined threshold.

As a result of the determination, the count value is less than the predetermined threshold, so the drive control section 714 maintains the output signal MCS at L level and the SPAD mode circuit section 701 remains enabled. The operations from time T3 to T4 are repeated until time T6. At time T6, the L level of the signal EN is input to the counter 713, whereby the counter 713 stops the counting operation and the exposure period ends.

<SPAD mode determination/high illumination>
FIG. 9 shows the operation of the unit pixel 601 when the amount of incident light is large. The operations at times T1 to T5 in FIG. 9 are the same as the operations at times T1 to T5 in FIG. 4 shown in the first embodiment. At time T6, the drive control unit 714 compares the count value of the counter 713 with a predetermined threshold. As a result of the determination, since it is equal to or greater than the threshold, the drive control section 714 enables the accumulation mode circuit section 702 by setting the output signal MCS to H level. The operation from time T6 to T10 after FIG. 9 is the same as the operation from time T1 to T5 in FIG. 5 shown in the first embodiment.

Next, FIGS. 10 and 11 are diagrams showing the operation of switching between the SPAD mode and the accumulation mode by determining the amount of incident light in the accumulation mode.

<Accumulation mode judgment/during low illumination>
FIG. 10 shows the operation of the unit pixel 601 when the amount of incident light is small. The operations at times T1 to T5 in FIG. 10 are the same as the operations at times T1 to T5 in FIG. 5 shown in the first embodiment. At time T6, by setting the signal Tx to H level and the signal RES to L level, the photodiode 303 is connected to the bias voltage VDDACC and reset together with the comparator input voltage Vfd.

At time T7, the drive control unit 714 compares the count value of the counter 713 with a predetermined threshold. As a result of the determination, the count value is less than the predetermined threshold, so the drive control section 714 enables the SPAD mode circuit section 701 by setting the output signal MCS to L level. The operations at times T8 to T12 in FIG. 10 are the same as the operations at times T1 to T5 in FIG. 4 shown in the first embodiment.

<Accumulation mode determination/high illumination>
FIG. 11 shows the operation of the unit pixel 601 when the amount of incident light is small. The operations at times T1 to T5 in FIG. 11 are the same as the operations at times T1 to T5 in FIG. 5 shown in the first embodiment. At time T6, by setting the signal Tx to H level and the signal RES to L level, the photodiode 303 is connected to the bias voltage VDDACC and reset together with the comparator input voltage Vfd.

At time T7, the drive control unit 714 compares the count value of the counter 713 with a predetermined threshold. As a result of the determination, the count value is equal to or greater than the predetermined threshold, so the drive control section 714 maintains the output signal MCS at H level and the accumulation mode circuit section 702 remains enabled. The operations at times T8 to T12 are the same as those at times T1 to T5.

In all modes, after the counter operation is completed, the vertical control circuit 602 and the horizontal control circuit 603 turn ON/OFF the switches 605 and 606 to output the count value of the unit pixel 601 to the digital output unit 607 for each row and column. is output.

In addition, in the accumulation mode, after the exposure period ends, the digital output of the unit pixel 601 is obtained by comparing the voltage corresponding to the charge accumulated in the photodiode 703 by the comparator 712 with the reference signal RAMP. On the other hand, in the SPAD mode, the value held by the counter 713 at the end of the exposure period is the digital output value of the unit pixel 601 . Therefore, the readout time may be shortened by reading out the unit pixel 601 in the SPAD mode first during the comparison period of the unit pixel 601 in the accumulation mode.

As described above, according to the present embodiment, each unit pixel 601 can switch the operation mode according to the amount of light incident thereon.

Note that when the amount of incident light is determined in the SPAD mode, the effective exposure period differs between the low-illuminance unit pixel 601 and the high-illuminance unit pixel 601 . In this case, the counter 713 may be reset when the unit pixel 601 with low illuminance is determined, and the determination period may be excluded from the exposure period. Alternatively, the output of the high-illuminance unit pixel 601 may be corrected by the ratio between the determination period and the effective exposure period (accumulation period).

As a first modification of the present embodiment, it is conceivable that a plurality of unit pixels 601 take a common operation mode. As shown in FIG. 12, the drive control section 714 present in each unit pixel 601 in FIG. 7 may be shared by a plurality of unit pixels. In FIG. 12, four unit pixels 1201 sharing the drive control unit 1202 take the same operation mode.
At this time, the drive control unit 1202 may compare the result of adding and averaging the outputs of the four shared unit pixels 1201 with an adder (not shown) with a predetermined threshold value. In addition, each output of the four shared unit pixels 1201 is compared with a predetermined threshold, and the drive mode is determined based on the magnitude relationship between the number of unit pixels 1201 equal to or greater than the predetermined threshold and the number of unit pixels 1201 less than the predetermined threshold. You may

FIG. 13 shows a second modification in which switching between the SPAD mode and the accumulation mode is determined in the accumulation mode. A different point from FIG. 7 is that the output signal COMP of the comparator 712 is input to the drive control section 714 in addition to the counter 713 . Also, although not shown, a threshold voltage is input instead of the reference signal RAMP input to the comparator 712 at time T4 in FIGS.

If the comparator input voltage Vfd does not exceed the threshold voltage, the output signal COMP of the comparator 712 determines that the illuminance is low and outputs the L level, and if it exceeds the threshold voltage, determines that the illuminance is high and outputs the H level. Then, the drive control unit 714 controls the drive mode based on this. Compared to the case of determining the incident light amount in the accumulation mode of the second embodiment, the determination of the incident light amount is completed immediately in this modified example.

(Third Embodiment)
FIG. 14 is a diagram showing the overall configuration of the imaging element 105 in the third embodiment. The image sensor 105 includes a pixel region 1400, a vertical control circuit 1402, a horizontal control circuit 1403, a timing generator (TG) 1404, a switch 1405, a switch 1406, a digital output section 1407, and a driving voltage control circuit 1408. .

Unit pixels 1401 are arranged in a matrix in a pixel region 1400 . Although a 4×4 pixel arrangement is shown here for the sake of clarity of explanation, more pixels are actually arranged. The unit pixel 1401 operates in the SPAD mode when the voltage supplied from the drive voltage control circuit 1408 is not used, and operates in the accumulation mode when the voltage is used.

In the first and second embodiments, each of the unit pixels 201 and 601 has one photodiode, and by switching the voltage applied to the one photodiode according to the mode, the SPAD mode and the accumulation mode was switching.

In this embodiment, each unit pixel 1401 is provided with two photodiodes, and each photodiode is used independently in the SPAD mode and the accumulation mode.

FIG. 15A is a diagram showing the configuration of a unit pixel 1401. FIG. The unit pixel 1401 includes a SPAD mode circuit section 1501 , an accumulation mode circuit section 1502 , a photoelectric conversion section 1503 , a clock switching section 1507 , an enable switching section 1508 , a counter 1513 and a drive control section 1514 .

SPAD mode circuitry 1501 includes a quench resistor 1504 , a switch 1505 , an inverting buffer 1506 and an avalanche photodiode 1515 . The accumulation mode circuit section 1502 includes a reset switch 1509 , a switch 1510 , a transfer switch 1511 , a comparator 1512 and a photodiode 1516 .

FIG. 15B is a diagram showing the structure of the photoelectric conversion unit 1503. As shown in FIG. The photoelectric conversion section 1503 includes an element isolation region 1517, a P well 1518, a floating diffusion (FD) 1526, a switch 1522, and a switch 1523 in addition to the configuration shown in FIG. 15(a).

The avalanche photodiode 1515 comprises an N-doped region 1519, a P-well 1520 surrounding it, and a slit 1521 in which the P-well 1520 is not partially arranged. Photodiode 1516 comprises an N-doped region 1524 and a P-doped region 1525 .

As for the operation, only points different from the second embodiment will be described. In the second embodiment, the SPAD mode and the accumulation mode are switched by switching the voltage applied to the same photodiode, but in this embodiment, the photodiode itself to be used is switched.

When operating in the SPAD mode, signal MCS is at L level and reverse bias voltage VDDSPAD is applied to N-doped region 1519 of avalanche photodiode 1515 . At this time, the L level signal MCS turns on the switch 1523 , so that the P well 1520 is connected to the same potential as the isolation region 1517 . Therefore, charges generated by incident photons are attracted to the N-doped region 1519 through the slit 1521 . At this time, no voltage is applied to the N-doped region 1524, and if it is filled with electric charges, the electric potential drops and electric charges are no longer attracted.

On the other hand, when operating in the accumulation mode, the signal MCS is at H level and the reverse bias voltage VDDSPAD is not applied to the N-doped region 1519 . Also, the switch 1522 is turned on, and the voltage Vp is applied to the P well 1520 . FIG. 16 shows potentials between A and A' in FIG.

During SPAD mode operation, the P-well 1520 is at the same potential as the element isolation region 1517, and the reverse bias voltage VDDSPAD is applied to the N-doped region 1519, so the potential rises from B to A between AB. On the other hand, in the accumulation mode operation, the voltage Vp is applied to the P-well 1520, so that the potential across the region B-B' of the slit 1521 rises.

By setting the voltage Vp such that the potential across region BB' of slit 1521 is higher than the potential across B'-A', the charge generated during accumulation mode operation is directed to N-doped region 1519 of avalanche photodiode 1515. is attracted to N-doped region 1524 of photodiode 1516 .

As described above, in the configuration in which the photoelectric conversion unit 1503 includes both the avalanche photodiode 1515 and the photodiode 1516, it is possible to switch between the SPAD mode and the accumulation mode.

(Other embodiments)
In addition, the present invention supplies a program that implements one or more functions of the above-described embodiments to a system or apparatus via a network or a storage medium, and one or more processors in the computer of the system or apparatus reads the program. It can also be realized by executing processing. It can also be implemented by a circuit (eg, ASIC) that implements one or more functions.

The invention is not limited to the embodiments described above, and various modifications and variations are possible without departing from the spirit and scope of the invention. Accordingly, the claims are appended to make public the scope of the invention.

100: Digital camera, 101: Lens, 105: Image sensor, 108: Control unit, 200: Pixel region, 201: Unit pixel, 202: Vertical control circuit, 203: Horizontal control circuit, 204: Timing generator, 205, 206: switch, 207: digital output

Claims (12)

A plurality of elements capable of selectively executing a first operation of generating pixel signals by counting incident photons and a second operation of generating pixel signals by converting incident light into charges and accumulating them. pixels of and
switching means for switching between the first operation and the second operation for each of the plurality of pixels;
with
Each of the plurality of pixels includes a first circuit that operates when performing the first operation, a second circuit that operates when performing the second operation, and the first circuit. or a counter for counting the output of the second circuit . 2. The method according to claim 1, wherein the switching unit collectively switches all the pixels of the imaging device to the state of executing the first operation or the state of executing the second operation. imaging device. 2. The imaging apparatus according to claim 1, wherein the switching means switches each of the plurality of pixels individually to a state of executing the first operation or a state of executing the second operation. . 4. The pixel counts the incident photons by counting pulses generated using an avalanche multiplication phenomenon, and performs the first operation. The imaging device according to . 5. The imaging device according to any one of claims 1 to 4, wherein said pixel has one photodiode for performing said first operation and said second operation. 5. The pixel according to any one of claims 1 to 4, wherein the pixel has separate photodiodes for performing the first operation and photodiodes for performing the second operation. imaging device. 7. The method according to any one of claims 1 to 6, wherein the switching unit switches between the first operation and the second operation according to the amount of light incident on the pixel. The imaging device described. The switching means causes the pixel to perform the first operation when the amount of light incident on the pixel is less than a predetermined threshold, and causes the pixel to perform the first operation when the amount of light incident on the pixel is equal to or greater than the predetermined threshold. 8. The image pickup apparatus according to claim 7, wherein the second operation is performed by the image pickup apparatus. 9. The imaging apparatus according to claim 8, wherein said switching means determines a magnitude relationship between the amount of light incident on said pixel and said predetermined threshold based on the signal obtained in said first operation. . When the switching means determines the magnitude relationship between the amount of light incident on the pixel and the predetermined threshold based on the signal obtained in the first operation, the pixel signal of the pixel that performs the second operation. is corrected by a ratio between a determination period for determining the magnitude relationship and an accumulation period for the second operation. When the switching means determines the magnitude relationship between the amount of light incident on the pixel and the predetermined threshold based on the signal obtained in the first operation, the determination period for determining the magnitude relationship is 10. The image pickup apparatus according to claim 9, wherein the pixel is excluded from the exposure period of the pixel for which the first operation is performed. 9. The imaging apparatus according to claim 8, wherein said switching means determines the magnitude relationship between the amount of light incident on said pixel and said predetermined threshold based on the signal obtained in said second operation. .

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