JP7218084B2 - Substrate structure - Google Patents

Description

The present invention relates to substrate structures.

2. Description of the Related Art Conventionally, there has been known a substrate structure in which a plurality of substrates on which electronic components and the like are mounted are stacked. In such a board structure, for example, a board structure is disclosed in which the height and other dimensions of the component to be mounted are taken into consideration, and the unevenness of the component is combined (see, for example, Patent Document 1). ).

JP-A-2-46000

However, in the substrate structure disclosed in Patent Document 1, there is a problem that an electronic component mounted on one substrate is affected by noise generated by another electronic component mounted on the other substrate. be.

SUMMARY OF THE INVENTION An object of the present invention is to provide a substrate structure in which a plurality of substrates are laminated, and which can suppress the influence of noise between electronic components.

In order to solve the above problems, the present invention
a plurality of areas of a first board mounted with a plurality of electronic components, a second board mounted with a plurality of electronic components, and one of the first board and the second board and a second shield member connected to the first shield member and arranged between the first substrate and the second substrate a substrate structure comprising
The first substrate and the second substrate have the plurality of regions, and are arranged such that one substrate overlaps the other substrate,
the tallest electronic component mounted on either one of the first substrate and the second substrate is arranged in a region that does not overlap with the other substrate;
heights of the plurality of electronic components respectively mounted on the first substrate and the second substrate are uneven;
A high electronic component mounted on the first substrate and a low electronic component mounted on the second substrate are arranged to face each other, and a high electronic component mounted on the first substrate is arranged so as to face each other. The low-height electronic component and the high-height electronic component mounted on the second substrate are arranged to face each other,
The second shield member includes a stepped portion for avoiding contact with each electronic component mounted on the first substrate and the second substrate, A first plane portion that matches the height of the tall electronic component mounted on the first substrate, and a second plane portion that matches the height of the short electronic component mounted on the first substrate, characterized by having

According to the present invention, it is possible to suppress the influence of noise between electronic components in a substrate structure in which a plurality of substrates are laminated.

1 is a front view of a smartwatch that is an embodiment of an electronic device having a substrate structure of the present invention; FIG. It is a block diagram showing a functional configuration of a smart watch. (a) is a perspective view showing a state in which the first substrate and the second substrate are unfolded, and (b) is a perspective view showing a state in which the first substrate and the second substrate are folded. be. FIG. 3A is a schematic cross-sectional view of a circuit board showing a state before laminating a second substrate on the first substrate; FIG. (b) is a schematic cross-sectional view of the circuit board showing a state in the middle of laminating the second substrate on the first substrate; (c) is a schematic cross-sectional view of the second substrate on the first substrate; FIG. 3 is a schematic cross-sectional view of a circuit board showing a laminated state; FIG. 2 is a diagram showing a circuit board in which areas having the same function are arranged so as to face each other; (a) and (b) are diagrams showing another example of the connection member, and (c) is a diagram showing another example of the first substrate and the second substrate. It is a figure which shows the other example of a shielding method. It is a figure which shows another example of a shielding method.

Embodiments in which an electronic device having the substrate structure of the present invention is realized as a smart watch will be described below with reference to the drawings.
FIG. 1 is a front view of a smartwatch 100, which is an embodiment of an electronic device having the substrate structure of the present invention.

As shown in FIG. 1( a ), the smartwatch 100 is a wrist-worn electronic device in which the main body 1 can be worn on the user's arm using the band 2 . A body portion 1 of the smart watch 100 includes a frame 3, a display screen 4, a push button switch B, and the like.

The push button switch B is provided on the side surface of the frame 3 and receives a user's push operation. The push button switch B returns to the normal mode from the low power mode or the sleep mode by being pressed.

On the display screen 4, two display portions are laminated. As shown in FIG. 1B, the display screen 12a of the first display section 12 (see FIG. 2) is provided at the bottom, and the display screen 22a of the second display section 22 (see FIG. 2) is provided at the top. is provided. That is, FIG. 1A shows a state in which display is performed by the first display unit 12 and the display screen 22a of the second display unit 22 allows the display by the first display unit 12 to pass through.
Further above the second display section 22, a touch sensor (not shown) is provided, and together with the push button switch B, it is possible to receive a user's operation.

The first display unit 12 has a dot-matrix color liquid crystal display screen, and switches and/or performs in parallel various displays related to various functions according to user input operations and various program operations.
The second display section 22 has a display screen that consumes less power than the first display section 12 and is capable of displaying the time in a simplified manner, and performs, for example, black and white liquid crystal display by a segment method. Alternatively, the display screen 22a of the second display unit 22 may use memory-in-pixel liquid crystal (MIP liquid crystal), PN liquid crystal (Polymer Network), or the like. In addition, the display screen 22a of the second display section 22 can transmit the display contents of the first display section 12 upward without performing any display by applying a predetermined voltage.

FIG. 2 is a block diagram showing the functional configuration of the smartwatch 100 of this embodiment.
The smartwatch 100 includes a main microcomputer 11 (first microcomputer), a first display unit 12, an operation reception unit 13, a first wireless communication controller 14, a sub-microcomputer 21 (second microcomputer), a second It includes a display unit 22, a switch 23, a second wireless communication controller 24, a PMIC 31 (Power Management IC), and the like.

The main microcomputer 11 is a main control unit including a main CPU 111, a RAM 112, a storage unit 113, and the like. The main microcomputer 11 receives power supply from the power supply under the control of the PMIC 31 and controls the operation of each unit such as the first display unit 12, the operation reception unit 13 and the first wireless communication controller .

The main CPU 111 performs various kinds of arithmetic processing and centrally controls the operation of the smartwatch 100 in a normal operating state.
The RAM 112 provides a working memory space to the main CPU 111 and stores temporary data. The RAM 112 stores and holds time information counted by the main CPU 111 based on a clock signal (not shown). Hereinafter, the description of "time" may mean "date and time" including a date part.
The storage unit 113 is a non-volatile memory such as a flash memory that stores control programs executed by the main CPU 111, setting data, and the like.

The display operation of the first display unit 12 is mainly controlled by the main microcomputer 11 (main CPU 111 (see FIG. 2)), but display control is also performed by the sub-microcomputer 21 (sub CPU 211 (see FIG. 2)). It is possible.

The operation reception unit 13 includes the above-described push button switch B and touch sensor, receives user's input operation, converts the operation content into an electric signal, and outputs the electric signal to the main CPU 111 .

The first wireless communication controller 14 is a controller for performing wireless communication with an external electronic device. Examples of wireless communication standards include, but are not limited to, short-range wireless communication such as Bluetooth (registered trademark), and wireless LAN (IEEE802.11). The main microcomputer 11 (main CPU 111 ) can acquire necessary information, programs, update data thereof, and the like from the outside via the first wireless communication controller 14 . Examples of external electronic devices to be connected for communication include smart phones, mobile phones, tablet terminals, and PDAs (Personal Digital Assistants). Of these, in smartphones and mobile phones in particular, time information is synchronized when connected to a base station to maintain time accuracy. When communicating with a smart phone or a mobile phone, the main CPU 111 can acquire time information from these external devices and correct the counted time based on the acquired time information.

In addition, the first wireless communication controller 14 may have a satellite radio wave reception function, and captures radio waves from positioning satellites, here, at least radio waves from satellites related to GNSS (Global Navigation Satellite System) (GNSS satellites). , can be received and demodulated to obtain time and perform positioning. The satellite radio wave reception function has an antenna (not shown), receives radio waves in the L1 band (1.57542 GHz for GNSS satellites) under the control of the main microcomputer 11 (main CPU 111), and performs inverse spectrum spreading. , acquires the navigation message, decodes it, and outputs it in a predetermined format.
Note that the satellite radio wave reception function may be configured to receive radio waves from positioning satellites of a system other than the GNSS system and perform time acquisition and positioning.

The sub-microcomputer 21 includes a sub-CPU 211, an RTC 212 (real-time clock), and the like. The sub-microcomputer 21 receives power from the power supply under the control of the PMIC 31 to operate, and mainly controls the operation of the second display section 22 .

The sub CPU 211 performs various arithmetic processing and controls the operation of the sub microcomputer 21 . The sub CPU 211 consumes less power than the main CPU 111 and accordingly may have lower power than the main CPU 111 . The sub-CPU 211 operates only when, for example, it detects the timing of periodic predetermined operations or when an input from the main CPU 111 or the switch 23 is detected. It's fine.

It is preferable that the RTC 212 is a normal device that keeps time and consumes low power.

As described above, the second display section 22 consumes less power than the first display section 12, and is used to display the time during the display operation. When MIP liquid crystal is used for the display screen, the sub CPU 211 can reduce the update frequency of the display content, so that the standby state can be set during the update interval.

The switch 23 is an on-switch that receives a predetermined user operation for restarting the main microcomputer 11 when the main microcomputer 11 is in a hibernation state. The switch 23 may be provided exclusively, or may be used together with the push button switch B.

The second wireless communication controller 24 is a controller for performing wireless communication with an external electronic device. Examples of wireless communication standards include, but are not limited to, short-range wireless communication such as Bluetooth (registered trademark), and wireless LAN (IEEE802.11). The sub-microcomputer 21 (sub-CPU 211 ) can acquire necessary information, programs, update data thereof, and the like from the outside via the second wireless communication controller 24 . Examples of external electronic devices to be connected for communication include smart phones, mobile phones, tablet terminals, and PDAs (Personal Digital Assistants). Of these, in smartphones and mobile phones in particular, time information is synchronized when connected to a base station to maintain time accuracy. When communicating with a smart phone or a mobile phone, the sub CPU 211 can acquire time information from these external devices and correct the counted time based on the acquired time information.

In addition, the second wireless communication controller 24 may have a satellite radio wave reception function, and captures radio waves from positioning satellites, here, at least radio waves from satellites related to GNSS (Global Navigation Satellite System) (GNSS satellites). , can be received and demodulated to obtain time and perform positioning. The satellite radio wave reception function has an antenna (not shown), receives radio waves in the L1 band (1.57542 GHz for GNSS satellites) based on the control of the sub microcomputer 21 (sub CPU 211), and performs reverse spectrum spreading. acquires and decodes navigation messages and outputs them in a specified format.
Note that the satellite radio wave reception function may be configured to receive radio waves from positioning satellites of a system other than the GNSS system and perform time acquisition and positioning.

The PMIC 31 controls power supply from the power supply to the main microcomputer 11 and the sub-microcomputer 21 . The PMIC 31 includes, for example, a switch for enabling/disabling power output to the main microcomputer 11 and the sub-microcomputer 21, a DC/DC converter for adjusting the output voltage, etc., and supplies appropriate power when the main microcomputer 11 and the sub-microcomputer 21 operate. supply these.

Next, the board structure of the circuit board C incorporated in the frame 3 of the main body 1 will be described.
FIG. 3(a) is a perspective view showing a state in which the first board C1 and the second board C2 constituting the circuit board C are developed, and FIG. 3(b) shows the first board C1 and the second board C2. 2 is a perspective view showing a state in which the substrate C2 of No. 2 is folded.

As shown in FIG. 3A, the circuit board C of the present embodiment includes a substantially circular first board C1, a substantially semicircular second board C2, and the first board C1 and the second board C2. and a connection member C3 for electrically connecting the substrate C2 of. The surface area of the second substrate C2 is approximately half the surface area of the first substrate C1.

The first substrate C1 is composed of, for example, a rigid substrate. As shown in FIG. 3A, the first substrate C1 is roughly divided into three regions R1, R2 and R3. In the region R1, for example, an electronic component e1 (see FIG. 4) that constitutes the main microcomputer 11 described above is mounted, and a shield cover SC1 (first shield cover SC1) for shielding noise by covering the electronic component e1 is mounted. shield member) is provided. Further, in the region R2, for example, electronic components (not shown) constituting the first wireless communication controller 14 described above are mounted, and a shield cover SC2 (first shield member) is provided in the same manner as in the region R1. there is

In addition, electronic components e2 and e3 (see FIG. 4) constituting the PMIC 31 described above, for example, are mounted in the region R3. In the area R3, a shield wall SW (first shield member) for blocking noise is provided around the area R3, and a shield plate SB (second shield member) covering the upper side of the electronic components mounted in the area R3 is provided. shield member) is provided. As shown in FIG. 4A, the shield plate SB is provided not at the edge of the shield wall SW, but in the middle thereof, and the shield wall SW and the shield plate SB form a recess D above the shield plate SB. ing.

The second board C2 is formed of a rigid board similarly to the first board C1, and is mounted with electronic components e4 and e5 (see FIG. 4) constituting the above-described sub-microcomputer 21, for example. As shown in FIG. 3(b), the second substrate C2 is folded over the first substrate C1 so that the electronic components e4, e5, etc., constituting the sub-microcomputer 21 are housed in the recess D. , and is laminated on the first substrate C1.

The connection member C3 is made of a flexible substrate, and can be bent as shown in FIG. 3(b).

Next, the procedure for laminating the first substrate C1 and the second substrate C2 will be described with reference to FIG.
FIG. 4(a) is a schematic sectional view of the circuit board C showing a state before laminating the second board C2 on the first board C1. FIG. 4(b) is a schematic cross-sectional view of the circuit board C showing a state in which the second board C2 is being laminated on the first board C1. FIG. 4(c) is a schematic sectional view of the circuit board C showing a state in which the second board C2 is laminated on the first board C1.

As shown in FIG. 4A, in a state before laminating the second substrate C2 on the first substrate C1, that is, in a state in which the first substrate C1 and the second substrate C2 are unfolded, The electronic components e1, e2 and e3 mounted on the first board C1 and the electronic components e4 and e5 mounted on the second board C2 are all arranged on the same side. Here, the heights of the electronic components e2 and e3 mounted on the first substrate C1 are different (non-uniform), and the shield plate SB is positioned at the height of the electronic component e2 via the stepped portion SB2. and a second flat portion SB3 that matches the height of the electronic component e3.

When laminating the second substrate C2 on the first substrate C1, the second substrate C2 is folded over the first substrate C1 as shown in FIG. 4(b). Then, as shown in FIG. 4(c), the second substrate C2 is mounted on the first substrate C1 so that the electronic components e4 and e5 mounted on the second substrate C2 are accommodated in the recesses D. to laminate. Here, the electronic components e4 and e5 mounted on the second board C2 are mounted on the first board C1 when the second board C2 is stacked on the first board C1. An electronic component e2 with a high height and an electronic component e5 with a low height mounted on the second substrate C2 are arranged to face each other, and an electronic component e3 with a low height mounted on the first substrate C1 and the second A tall electronic component e4 mounted on the substrate C2 is arranged to face the electronic component e4. Further, the electronic component e1 (the tallest electronic component) mounted on the first board C1 is arranged in the region R1 where the second board C2 of the first board C1 does not overlap. In addition, clearances are provided between the first substrate C1 and the shield plate SB and between the second substrate C2 and the shield plate SB to allow the shield plate SB to escape.
It should be noted that the high electronic component e2 mounted on the first substrate C1 may be arranged so as to face the area of the second substrate C2 on which no electronic component is mounted. . In addition, a tall electronic component e4 mounted on the second substrate C2 may be arranged so as to face the area of the first substrate C1 on which no electronic component is mounted. .

As described above, the smart watch 100 of this embodiment includes a first substrate C1 on which a plurality of electronic components e1, e2, and e3 are mounted, a second substrate C2 on which a plurality of electronic components e4 and e5 are mounted, A circuit board C including shield covers SC1, SC2 and a shield wall SW (first shield member) is incorporated, and the first board C1 has a plurality of regions R1, R2, R3, The electronic components e1, e2, and e3 mounted on the first substrate C1 are arranged in the regions R1, R2, and R3 of the first substrate C1, and the second substrate C2 overlaps the first substrate C1. Shield covers SC1, SC2 and shield walls SW are arranged so as to surround each of the plurality of regions R1, R2, R3 of the first substrate C1, so that each region R1 of the first substrate C1 , R2, and R3.

Further, the circuit board C is provided with a shield plate SB (second shield member), and the shield plate SB is arranged between the first board C1 and the second board C2. It is also possible to suppress the influence of noise between the electronic components mounted on C1 and the electronic components mounted on the second substrate C2.

In addition, since the shield plate SB has a stepped portion SB2 for avoiding contact with each electronic component mounted on the first substrate C1 and the second substrate C2, the second substrate on the first substrate C1 The bulkiness of the circuit board C when C2 is stacked can be suppressed as much as possible, and damage due to contact of the shield plate SB with each electronic component can be suppressed.

In addition, since clearances are provided between the first substrate C1 and the shield plate SB and between the second substrate C2 and the shield plate SB to allow the shield plate SB to escape, the first substrate Damage due to contact of the shield plate SB with each electronic component mounted on C1 and the second substrate C2 can be further suppressed.

A plurality of regions R1, R2, and R3 of the first substrate C1 are regions divided by function, and electronic components e1, e2, and e3 corresponding to each function are arranged in each region. Therefore, the influence of noise between electronic components in each region can be suppressed.

Further, the heights of the plurality of electronic components e1 to e5 mounted on the first board C1 and the second board C2 are not uniform, and the height of the electronic component e2 mounted on the first board C1 is not uniform. and the low electronic component e5 mounted on the second substrate C2 are arranged to face each other, and the low electronic component e3 mounted on the first substrate C1 and the second substrate C2 Since the high electronic component e4 mounted on the first board C1 is arranged so as to face the second board C2, the bulk of the circuit board C is minimized when the second board C2 is laminated on the first board C1. can be suppressed.

Although the embodiments of the present invention have been described above, the present invention is not limited to such embodiments, and it goes without saying that various modifications are possible without departing from the scope of the invention.

For example, in the above embodiment, when the first substrate C1 and the second substrate C2 are arranged so that the first substrate C1 and the second substrate C2 overlap, as shown in FIG. The regions having the same function may be arranged so as to face each other. FIG. 5(a) is a plan view of the circuit board C in which the first board C1 and the second board C2 are unfolded. FIG. 5(b) is a schematic cross-sectional view of FIG. 5(a). FIG. 5(c) is a schematic cross-sectional view of the circuit board C in which the second board C2 is laminated on the first board C1.

As shown in FIGS. 5A and 5B, the left area R11 of the first substrate C1 and the right area R21 of the second substrate C2 are provided with, for example, the above-described main microcomputer 11, sub-microcomputer 21, and PMIC 31. This is the area where the electronic components that make up the Further, the central region R12 of the first substrate C1 and the central region R22 of the second substrate C2 are regions where electronic components constituting the above-described first wireless communication controller 14 are mounted, for example. Further, the right region R13 of the first substrate C1 and the left region R23 of the second substrate C2 are regions where electronic components constituting the above-described second wireless communication controller 24 are mounted, for example. Shield walls SW are provided around the regions R11, R12, and R13 of the first substrate C1.

As a result, as shown in FIG. 5C, when the second substrate C2 is laminated on the first substrate C1, the region R11 of the first substrate C1 and the region R21 of the second substrate C2 are separated from each other. The region R12 of the first substrate C1 faces the region R22 of the second substrate C2, and the region R13 of the first substrate C1 faces the region R23 of the second substrate C2. It will happen. That is, the electronic components constituting the main microcomputer 11, the sub-microcomputer 21, and the PMIC 31 described above, the electronic components constituting the first wireless communication controller 14, and the electronic components constituting the second wireless communication controller 24 are each shielded. Since they are arranged in the same space separated by the wall SW, the electronic components mounted on the first board C1 and the second board C2 do not need to be provided with the shield plate SB as in the above embodiment. It is also possible to suppress the influence of noise between mounted electronic components.

Further, in the above embodiment, the connection member C3 is explained as being configured by a flexible substrate, but it is sufficient if the first substrate C1 and the second substrate C2 can be electrically connected, and the flexible substrate is sufficient. It is not limited to substrates. For example, as shown in FIG. 6A, the connection member C3 may be configured by a board-to-board connector. Moreover, as shown in FIG. 6B, the connection member C3 may be configured by a spring connector.

Further, in the above embodiment, the first substrate C1 and the second substrate C2 are described as being composed of rigid substrates. As shown in c), the first substrate C1, the second substrate C2, and the connection member C3 may be configured by an integrated flexible substrate.

Further, in the above embodiment, the shield wall SW (first shield member) and the shield plate SB (second shield member) were described as separate members, but the shield wall and the shield plate are integrated into one unit. It may be a member.

In the above embodiment, the shield cover SC1 covers the electronic components e1 constituting the main microcomputer 11 mounted on the region R1 of the first substrate C1, and constitutes the first wireless communication controller 14 mounted on the region R2. A shielding method is adopted in which the electronic parts (not shown) to be connected are covered with the shield cover SC2, and the electronic parts e2 and e3 constituting the PMIC 31 mounted in the area 3 are covered with the shield wall SW and the shield plate SB. The shielding method is not limited to the above method. Another example of the shielding method will be described below with reference to FIGS. 7 and 8. FIG. 7(a) to (d) and FIGS. 8(a) and (b) are schematic cross sections passing through the regions R1 and R3 of the first substrate C1, as in FIGS. 4(a) to (c). It is a diagram.

For example, as shown in FIG. 7A, after covering the upper surface and side surfaces of the electronic component e1 mounted on the region R1 of the first substrate C1 with a synthetic resin sr1, the entire synthetic resin sr1 is coated with an electromagnetic shielding material. vapor deposition vd1 may be applied. Although not shown, the top and side surfaces of the electronic components mounted in the region R2 are also covered with a synthetic resin, and then the entirety of the synthetic resin is vapor-deposited for electromagnetic wave shielding. As for the electronic components e2 and e3 mounted in the region 3, instead of providing the shield plate SB of the above embodiment, the upper and side surfaces of the electronic components e2 and e3 are covered with a synthetic resin sr2, and then the synthetic resin sr2 is applied. An electromagnetic wave shielding vapor deposition vd2 may be applied to the upper surface of . Note that the shield wall SW is provided around the region R3 as in the above embodiment.

Moreover, as another shielding method, for example, as shown in FIG. , the vapor deposition vd3 for electromagnetic wave shielding may be applied not only to the upper surface of the synthetic resin sr2 but also to the side surfaces thereof. As for the electronic component e1 mounted in the region R1 and the electronic component (not shown) mounted in the region R2, as described in the example of FIG. After covering, the entirety of the synthetic resin is vapor-deposited for electromagnetic wave shielding.

As another shielding method, for example, as shown in FIG. 7C, the top and side surfaces of the electronic components e4 and e5 mounted on the second substrate C2 may be covered with a synthetic resin sr3. Further, as shown in FIG. 7(d), after covering the top and side surfaces of the electronic components e4 and e5 with a synthetic resin sr3, the entirety of the synthetic resin sr3 is vapor-deposited vd4 for electromagnetic wave shielding. Also good. Note that the electronic component e1 mounted on the region R1 of the first substrate C1, the electronic component (not shown) mounted on the region R2, and the electronic components e2 and e3 mounted on the region R3 are shown in FIG. , (b), the top and side surfaces of the electronic component are covered with a synthetic resin, and then the entirety of the synthetic resin is vapor-deposited for electromagnetic wave shielding.

As another shielding method, for example, as shown in FIG. 8A, a shield wall SW is formed around the electronic component e1 in the region R1 of the first substrate C1 without providing the shield cover SC1 in the region R1 of the first substrate C1. is provided, and the second substrate C2 is extended (extended), and no electronic component is mounted on the portion facing the electronic component e1 mounted on the region R1 of the first substrate C1, and an electronic component is mounted on the back surface thereof. By mounting the component e6 and laminating the first substrate C1 and the second substrate C2 as shown in FIG. 8B, the shield wall SW and the second substrate C2 (second substrate C2 extension) may form a shield case of region R1. Thereby, the second substrate C2 can also function as a shield member arranged between the first substrate C1 and the second substrate C2.

As another shielding method, for example, after the electronic parts are covered with a drawn PET film, the PET film may be subjected to vapor deposition for electromagnetic wave shielding.

Although the embodiments of the present invention have been described above, the scope of the present invention is not limited to the above-described embodiments, and includes the scope of the invention described in the claims and equivalents thereof.
The invention described in the scope of claims originally attached to the application form of this application is additionally described below. The claim numbers in the appendix are as in the claims originally attached to the filing of this application.
[Appendix]
<Claim 1>
a first board on which a plurality of electronic components are mounted;
a second board on which a plurality of electronic components are mounted;
a shield member;
A substrate structure comprising:
The first substrate and the second substrate are arranged such that one substrate overlaps the other substrate, and electronic components mounted on the first substrate and electronic components mounted on the second substrate are arranged. are arranged so that the electronic components facing each other,
The substrate structure, wherein the shield member is arranged between the first substrate and the second substrate.
<Claim 2>
a first board on which a plurality of electronic components are mounted;
a second board on which a plurality of electronic components are mounted;
a first shield member;
A substrate structure comprising:
The first substrate and the second substrate are
It has a plurality of regions, the electronic components mounted on the first substrate are arranged in the regions of the first substrate, and the electronic components mounted on the second substrate are arranged on the second substrate. placed in the area,
one substrate is arranged to overlap the other substrate,
The first shield member is
A substrate structure, wherein the substrate structure is arranged so as to surround each of the plurality of regions of one of the first substrate and the second substrate.
<Claim 3>
comprising a second shield member;
3. The substrate structure according to claim 2, wherein said second shield member is arranged between said first substrate and said second substrate.
<Claim 4>
4. The substrate structure according to claim 3, wherein the second shield member has a stepped portion for avoiding contact with electronic components mounted on the first substrate and the second substrate. .
<Claim 5>
A clearance is provided between the first substrate and the second shield member and between the second substrate and the second shield member to allow the second shield member to escape. 5. The substrate structure according to claim 3 or 4, characterized by:
<Claim 6>
The plurality of regions according to any one of claims 2 to 5, wherein the plurality of regions are regions divided by function, and electronic components corresponding to each function are arranged in each region. substrate structure.
<Claim 7>
The first substrate and the second substrate are arranged so that regions having the same function face each other when the first substrate and the second substrate are arranged so as to overlap each other. The substrate structure according to claim 6, characterized in that:
<Claim 8>
heights of the plurality of electronic components respectively mounted on the first substrate and the second substrate are uneven;
A high electronic component mounted on the first substrate and a low electronic component mounted on the second substrate are arranged to face each other, or mounted on the first substrate The tall electronic component and the area of the second substrate on which the electronic component is not mounted are arranged so as to face each other.
In addition, the short electronic component mounted on the first substrate and the high electronic component mounted on the second substrate are arranged to face each other, or the first substrate A region where the electronic component is not mounted and the high electronic component mounted on the second substrate are arranged so as to face each other.
The substrate structure according to any one of claims 1 to 7, characterized in that:
<Claim 9>
A substrate structure according to any one of claims 1 to 8, wherein said second substrate has a smaller surface area than said first substrate.
<Claim 10>
10. The substrate structure of claim 9, wherein the surface area of said second substrate is approximately half the surface area of said first substrate.
<Claim 11>
11. The substrate structure of claim 10, wherein said first substrate is substantially circular and said second substrate is substantially semi-circular.

100 smart watch 1 main unit 2 band 3 frame 4 display screen 11 main microcomputer 12 display unit 13 operation reception unit 14 first wireless communication controller 21 sub-microcomputer 22 display unit 23 switch 24 second wireless communication controller 31 PMIC
B Button switch C Circuit board C1 First board C2 Second board D Concave portions e1 to e5 Electronic component SB Shield plate SB1 First plane portion SB2 Stepped portion SB3 Second plane portion SC1 Shield cover SC2 Shield cover SW Shield wall

Claims (7)

a plurality of areas of a first board mounted with a plurality of electronic components, a second board mounted with a plurality of electronic components, and one of the first board and the second board and a second shield member connected to the first shield member and arranged between the first substrate and the second substrate a substrate structure comprising
The first substrate and the second substrate have the plurality of regions, and are arranged such that one substrate overlaps the other substrate,
the tallest electronic component mounted on either one of the first substrate and the second substrate is arranged in a region that does not overlap with the other substrate;
heights of the plurality of electronic components respectively mounted on the first substrate and the second substrate are uneven;
A high electronic component mounted on the first substrate and a low electronic component mounted on the second substrate are arranged to face each other, and a high electronic component mounted on the first substrate is arranged so as to face each other. The low-height electronic component and the high-height electronic component mounted on the second substrate are arranged to face each other,
The second shield member includes a stepped portion for avoiding contact with each electronic component mounted on the first substrate and the second substrate, A first plane portion that matches the height of the tall electronic component mounted on the first substrate, and a second plane portion that matches the height of the short electronic component mounted on the first substrate, A substrate structure comprising : A clearance is provided between the first substrate and the second shield member and between the second substrate and the second shield member to allow the second shield member to escape. The substrate structure of claim 1, characterized by: 3. The substrate structure according to claim 1, wherein the plurality of regions are regions divided by function, and electronic components corresponding to each function are arranged in each region. The substrate structure according to any one of claims 1 to 3 , wherein said second substrate has a smaller surface area than said first substrate. 5. The substrate structure of claim 4 , wherein the surface area of said second substrate is approximately half the surface area of said first substrate. 6. The substrate structure of claim 5 , wherein said first substrate is substantially circular and said second substrate is substantially semi-circular. The substrate structure according to any one of claims 1 to 6 , wherein the tallest electronic component is covered with a shield cover.

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