JP7216139B2 - 回路基板の製造方法 - Google Patents
回路基板の製造方法 Download PDFInfo
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- JP7216139B2 JP7216139B2 JP2021071250A JP2021071250A JP7216139B2 JP 7216139 B2 JP7216139 B2 JP 7216139B2 JP 2021071250 A JP2021071250 A JP 2021071250A JP 2021071250 A JP2021071250 A JP 2021071250A JP 7216139 B2 JP7216139 B2 JP 7216139B2
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- 238000004519 manufacturing process Methods 0.000 title claims description 59
- 229910052751 metal Inorganic materials 0.000 claims description 260
- 239000002184 metal Substances 0.000 claims description 260
- 239000000463 material Substances 0.000 claims description 99
- 239000011888 foil Substances 0.000 claims description 38
- 238000005530 etching Methods 0.000 claims description 26
- 239000000758 substrate Substances 0.000 claims description 19
- 230000007423 decrease Effects 0.000 claims description 4
- 238000007788 roughening Methods 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 2
- 230000003746 surface roughness Effects 0.000 claims 2
- 239000010410 layer Substances 0.000 description 207
- 229920005989 resin Polymers 0.000 description 34
- 239000011347 resin Substances 0.000 description 34
- 238000000034 method Methods 0.000 description 28
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 10
- 238000010030 laminating Methods 0.000 description 9
- 229920001187 thermosetting polymer Polymers 0.000 description 8
- 238000003475 lamination Methods 0.000 description 7
- 239000012790 adhesive layer Substances 0.000 description 6
- 239000011230 binding agent Substances 0.000 description 6
- 239000011889 copper foil Substances 0.000 description 6
- 229920005992 thermoplastic resin Polymers 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- 239000003822 epoxy resin Substances 0.000 description 5
- 229910052759 nickel Inorganic materials 0.000 description 5
- 229920000647 polyepoxide Polymers 0.000 description 5
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 4
- 239000011231 conductive filler Substances 0.000 description 4
- 238000010276 construction Methods 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 230000032798 delamination Effects 0.000 description 4
- 150000002739 metals Chemical class 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 3
- 230000006835 compression Effects 0.000 description 3
- 238000007906 compression Methods 0.000 description 3
- 238000009826 distribution Methods 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- JYEUMXHLPRZUAT-UHFFFAOYSA-N 1,2,3-triazine Chemical compound C1=CN=NN=C1 JYEUMXHLPRZUAT-UHFFFAOYSA-N 0.000 description 2
- XQUPVDVFXZDTLT-UHFFFAOYSA-N 1-[4-[[4-(2,5-dioxopyrrol-1-yl)phenyl]methyl]phenyl]pyrrole-2,5-dione Chemical compound O=C1C=CC(=O)N1C(C=C1)=CC=C1CC1=CC=C(N2C(C=CC2=O)=O)C=C1 XQUPVDVFXZDTLT-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052797 bismuth Inorganic materials 0.000 description 2
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 239000002923 metal particle Substances 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 229920003192 poly(bis maleimide) Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000009719 polyimide resin Substances 0.000 description 2
- 229920001955 polyphenylene ether Polymers 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- 239000011135 tin Substances 0.000 description 2
- 239000000470 constituent Substances 0.000 description 1
- 239000011162 core material Substances 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000000523 sample Substances 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 239000002759 woven fabric Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
- H05K3/4655—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern by using a laminate characterized by the insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09509—Blind vias, i.e. vias having one side closed
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09827—Tapered, e.g. tapered hole, via or groove
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/061—Lamination of previously made multilayered subassemblies
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
- H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
- H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
図1に回路基板20の概略断面図を示す。本実施形態における回路基板20は、第1絶縁基材22と、第2絶縁基材24が交互に接着層無しで積層されて構成されている。第1絶縁基材22の第1表面22aには、第1金属層26がパターン状に形成されており、第1金属層26は第1絶縁基材22内に埋没している。最下位層の第1絶縁基材22の第1表面22aには、第5金属層66がパターン状に形成されており、第5金属層66は第1絶縁基材22から露出している。第1表面22aと反対側の第2表面22bには、第2金属層28がパターン状に形成されており、第2金属層28は第1絶縁基材22からは露出しており、第2絶縁基材24内に埋没している。
次に、図2~図25に基づいて回路基板の製造方法について説明する。まず、図2に示すように、符号58は、第1金属箔40の一の表面に第3金属層56と第4金属層57とを順に有する3層金属58である。
電子機器は、上述した回路基板20と電子部品(不図示)とを有し、さらに必要に応じてその他の部材を有する。例えば、電子機器としては、スマートフォン、タブレット型携帯端末、コンピュータなどが挙げられる。
22 第1絶縁基材
22a 第1表面
22b 第2表面
24 第2絶縁基材
24a 第1表面
24b 第2表面
26 第1金属層
28 第2金属層
30 貫通孔
32 第1導電性ペースト
34 貫通孔
36 第2導電性ペースト
40 第1金属箔
42 樹脂フィルム
50 第2金属箔
52 ドライフィルム
53 フォトマスク
54 樹脂フィルム
56 第3金属層
57 第4金属層
58 3層金属
60 単位構成体
61 単位構成体
62 表面用金属層
63 フォトマスク
64 ドライフィルム
65 第5金属箔
66 第5金属層
Claims (4)
- 第1金属箔の第1絶縁基材が積層される表面と反対側の面に、前記第1金属箔と異なる金属を含有する第3金属層と、第4金属層とを順に有し、第1絶縁基材が積層される方向から前記第1金属箔をエッチングすることによりパターン状に形成された第1金属層を製造する工程と、
第1絶縁基材が積層される方向からエッチングすることにより前記第3金属層の一部を除去する工程と、
第1表面にパターン状に形成された前記第1金属層が設けられ、第2表面にパターン状に形成された第2金属層が設けられ、前記第1金属層と前記第2金属層との間に形成された第1貫通孔内に前記第1金属層と前記第2金属層とを接続する第1導電性ペーストが充填された硬化済みの第1絶縁基材を製造する工程と、
エッチングすることにより前記第4金属層の全部を除去する工程と、
エッチングすることにより前記第3金属層の全部を除去する工程と、
前記第1絶縁基材と、前記第1絶縁基材の前記第2表面側に配置されて、前記第2金属層と連通する第2貫通孔内に前記第2金属層と接続する第2導電性ペーストが充填された半硬化状の第2絶縁基材と、を有する単位構成体を製造する工程と、
複数の前記単位構成体のうちの一の単位構成体における前記第1絶縁基材と、他の単位構成体における前記第2絶縁基材とを互いに接合し、前記複数の単位構成体を積層する工程と、を含むことを特徴とする回路基板の製造方法。 - 前記第1絶縁基材が積層される前記第1金属層の表面と、前記第1絶縁基材が積層される前記第4金属層の表面と、の算術平均粗さ(Ra)が、1.0μm~2.0μmとなるように前記第1金属層の表面と前記第4金属層の表面と、を粗面化処理する工程と、
前記第2絶縁基材を積層する前記第1金属層の表面と、前記第2絶縁基材を積層する前記第2金属層の表面と、の算術平均粗さ(Ra)が、1.0μm~2.0μmとなるように前記第1金属層の表面と、前記第2金属層の表面とを粗面化処理する工程と、を含むことを特徴とする請求項1記載の回路基板の製造方法。 - 前記第1金属層は、前記第1絶縁基材の前記第1表面側から前記第2表面側に向けて小径となる台形形状に形成され、
前記第2金属層は、前記第2絶縁基材の前記第1表面側から前記第2表面側に向けて小径となる台形形状に形成されることを特徴とする請求項1又は請求項2記載の回路基板の製造方法。 - 前記単位構成体を製造する工程において、前記単位構成体における前記第1金属層は、前記第1絶縁基材に埋没しており、前記単位構成体における前記第2金属層は、前記第2絶縁基材に埋没していることを特徴とする請求項1~請求項3のうちのいずれか1項記載の回路基板の製造方法。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2021071250A JP7216139B2 (ja) | 2021-04-20 | 2021-04-20 | 回路基板の製造方法 |
PCT/JP2022/005608 WO2022224557A1 (ja) | 2021-04-20 | 2022-02-14 | 回路基板、回路基板の製造方法及び電子機器 |
CN202280028973.9A CN117178638A (zh) | 2021-04-20 | 2022-02-14 | 电路基板、电路基板的制造方法以及电子设备 |
US18/285,910 US20240188216A1 (en) | 2021-04-20 | 2022-02-14 | Circuit board, method for manufacturing circuit board, and electronic device |
KR1020237030737A KR20230142604A (ko) | 2021-04-20 | 2022-02-14 | 회로 기판, 회로 기판의 제조 방법 및 전자 기기 |
TW111108795A TW202249555A (zh) | 2021-04-20 | 2022-03-10 | 電路基板、電路基板之製造方法及電子機器 |
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JP2021071250A JP7216139B2 (ja) | 2021-04-20 | 2021-04-20 | 回路基板の製造方法 |
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JP2022165765A JP2022165765A (ja) | 2022-11-01 |
JP7216139B2 true JP7216139B2 (ja) | 2023-01-31 |
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US (1) | US20240188216A1 (ja) |
JP (1) | JP7216139B2 (ja) |
KR (1) | KR20230142604A (ja) |
CN (1) | CN117178638A (ja) |
TW (1) | TW202249555A (ja) |
WO (1) | WO2022224557A1 (ja) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003008225A (ja) | 2001-06-26 | 2003-01-10 | Kyocera Corp | 多層配線基板およびその製造方法 |
JP2004128170A (ja) | 2002-10-01 | 2004-04-22 | Fujikura Ltd | 多層配線基板、多層配線基板用基材およびその製造方法 |
JP2006210524A (ja) | 2005-01-26 | 2006-08-10 | Matsushita Electric Ind Co Ltd | 多層回路基板及びその製造方法 |
JP2010161298A (ja) | 2009-01-09 | 2010-07-22 | Denso Corp | 導電ペーストの充填方法及び多層基板の製造方法 |
JP2017054964A (ja) | 2015-09-10 | 2017-03-16 | 株式会社デンソー | プリント基板の製造方法 |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2004158671A (ja) | 2002-11-07 | 2004-06-03 | Eito Kogyo:Kk | 多層基板およびその製造方法 |
JP4626225B2 (ja) | 2004-08-27 | 2011-02-02 | パナソニック電工株式会社 | 多層プリント配線板用銅張り積層板、多層プリント配線板及び多層プリント配線板の製造方法 |
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2021
- 2021-04-20 JP JP2021071250A patent/JP7216139B2/ja active Active
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2022
- 2022-02-14 WO PCT/JP2022/005608 patent/WO2022224557A1/ja active Application Filing
- 2022-02-14 KR KR1020237030737A patent/KR20230142604A/ko unknown
- 2022-02-14 US US18/285,910 patent/US20240188216A1/en active Pending
- 2022-02-14 CN CN202280028973.9A patent/CN117178638A/zh active Pending
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Publication number | Priority date | Publication date | Assignee | Title |
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JP2003008225A (ja) | 2001-06-26 | 2003-01-10 | Kyocera Corp | 多層配線基板およびその製造方法 |
JP2004128170A (ja) | 2002-10-01 | 2004-04-22 | Fujikura Ltd | 多層配線基板、多層配線基板用基材およびその製造方法 |
JP2006210524A (ja) | 2005-01-26 | 2006-08-10 | Matsushita Electric Ind Co Ltd | 多層回路基板及びその製造方法 |
JP2010161298A (ja) | 2009-01-09 | 2010-07-22 | Denso Corp | 導電ペーストの充填方法及び多層基板の製造方法 |
JP2017054964A (ja) | 2015-09-10 | 2017-03-16 | 株式会社デンソー | プリント基板の製造方法 |
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US20240188216A1 (en) | 2024-06-06 |
WO2022224557A1 (ja) | 2022-10-27 |
TW202249555A (zh) | 2022-12-16 |
CN117178638A (zh) | 2023-12-05 |
KR20230142604A (ko) | 2023-10-11 |
JP2022165765A (ja) | 2022-11-01 |
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