JP7143602B2 - Receiving device, receiving method - Google Patents

Description

The present invention relates to reception technology, and more particularly to a receiving apparatus and receiving method for receiving FSK signals.

In digital wireless communication, for example, frequency shift keying (FSK) is used. In such digital wireless communication, in order to remove the influence of DC (Direct Current) offset, etc., DC offset information etc. are extracted from the detected signal, and the reference frame synchronization word is corrected based on that information. Correlation processing is executed (see, for example, Patent Document 1).

JP-A-2008-28961

In order to improve reception characteristics, it is necessary to reduce not only the influence of DC offset but also the influence of frequency offset, and it is necessary to appropriately set the amplification factor when amplifying the received signal. On the other hand, if the processing is complicated by these, the circuit scale is increased and the cost is increased.

SUMMARY OF THE INVENTION The present invention has been made in view of such circumstances, and an object of the present invention is to provide a technique for improving reception characteristics while suppressing complication of processing.

In order to solve the above problems, a receiver according to one aspect of the present invention is a receiver having (1) a preparation mode and (2) a reception mode, comprising: a signal generator; a mixer that outputs an intermediate frequency signal, a PLL demodulator that performs PLL demodulation on the intermediate frequency signal from the mixer, an amplifier that amplifies the signal from the PLL demodulator, and an amplification factor of the amplifier and a FSK demodulator for performing FSK demodulation on the signal from the amplifier. (1) In the preparation mode, the signal generator maximizes at a frequency deviation determined based on the signal of the 0th frequency (f0) corresponding to the center frequency in the intermediate frequency band and the protocol of the signal received by the receiver. It outputs a signal of a first frequency (f1>f0) of frequencies and a signal of a second frequency (f2<f0) whose frequency is minimized by the frequency deviation determined based on the protocol of the signal received by the receiving device. , the mixer outputs a signal of the 0th frequency (f0), a signal of the first frequency (f1>f0), and a signal of the second frequency (f2<f0) from the signal generator, While detecting the 0th voltage in the case of the 0th frequency (f0), the first voltage in the case of the first frequency (f1), the second voltage in the case of the second frequency (f2), the first voltage and the second voltage Based on the theoretical value determined based on the protocol for the voltage, the amplification factor is derived, and (2) in the receive mode, the signal generator outputs a local oscillation signal, and the mixer outputs the local oscillation signal from the signal generator. Based on the oscillation signal and the radio frequency signal from the antenna, an intermediate frequency signal is output. performs FSK demodulation using the 0th voltage detected in the detector.

Another aspect of the invention is a receiving method. This method includes a signal generator, a mixer connected to the signal generator and an antenna and outputting an intermediate frequency signal, a PLL demodulator for performing PLL demodulation on the intermediate frequency signal from the mixer, and a PLL demodulator. (1) a preparation mode and ( 2) a receiving method in a receiving device having a receiving mode, wherein: (1) in the preparation mode, a signal generator receives a signal of the 0th frequency (f0) corresponding to the center frequency in a band of intermediate frequencies; The signal of the first frequency (f1>f0), which is the maximum frequency at the frequency shift determined based on the protocol of the signal to be received, and the minimum at the frequency shift determined based on the protocol of the signal received by the receiving device outputting a signal of a second frequency (f2<f0) of the frequency, a mixer outputting a signal of a 0th frequency (f0) from the signal generator, a signal of a first frequency (f1>f0), a step of outputting a signal of two frequencies (f2<f0); and a detection unit detecting the 0th voltage in the case of the 0th frequency (f0) and the first voltage in the case of the first frequency (f1). , a step of calculating an amplification factor based on a second voltage at a second frequency (f2) and theoretical values determined based on a protocol for the first voltage and the second voltage; (2) receiving mode; wherein the signal generator outputs a local oscillation signal; and the mixer outputs an intermediate frequency signal based on the local oscillation signal from the signal generator and the radio frequency signal from the antenna; , the amplification unit amplifies the signal from the PLL demodulation unit by the amplification factor detected by the detection unit; and the FSK demodulation unit performing FSK demodulation using the 0th voltage detected by the detection unit. And prepare.

Any combination of the above constituent elements, and any conversion of expressions of the present invention into methods, devices, systems, recording media, computer programs, etc. are also effective as embodiments of the present invention.

According to the present invention, reception characteristics can be improved while suppressing complication of processing.

1 is a diagram showing the configuration of a wireless device according to an embodiment; FIG. 2 is a diagram showing a signal demodulated in the PLL demodulator of FIG. 1; FIG. FIG. 2 is a diagram showing characteristics of the PLL demodulator in FIG. 1; 2 is a diagram showing moving average processing in an AFC unit in FIG. 1; FIG. 5(a) and 5(b) are diagrams showing another moving average process in the AFC section in FIG. 1. FIG. 2 is a flow chart showing a reception procedure by the wireless device of FIG. 1;

Before specifically describing the present invention, an overview will be given first. An embodiment of the present invention relates to a receiver that receives a signal whose carrier frequency is changed according to data. Such a modulation method is called FM (Frequency Modulation) in analog modulation, and FSK in digital modulation. In addition, these are sometimes referred to as FM as a higher-level concept. The term FM is used herein to refer only to analog modulation, and the term FM is used to combine analog and digital modulation. As a conventional inexpensive receiver, an inexpensive IC (Integrated Circuit) that implements the PLL demodulation scheme is used. On the other hand, in order to improve reception characteristics, a receiver is required to reproduce the carrier wave of the received signal using a baseband signal demodulated from the received signal, and quadrature-detect the received signal using the carrier wave. However, the processing for that becomes complicated, and expensive AD converters, DSPs (Digital Signal Processors), dedicated ICs, etc. that can convert intermediate frequency (IF) signals to AD (Analog-to-Digital) at high speed are required. It is said that

Further, when a radio apparatus is applied to digital modulation, in order to demodulate multi-valued FSK, it is necessary to know or adjust the demodulation level corresponding to the modulation level of multi-valued FSK instead of simple detection of AC components. There is When using DSP, dedicated IC, the demodulation level is obtained in these. However, when using an inexpensive IC that executes the PLL demodulation method without using these, in the production line, a reference signal is received from the signal generator, its amplitude is measured, stored, and used. The demodulation level at the time of reception is calculated from the results saved at that time. Since a signal generator separate from the wireless device is used in the production line, it takes time and effort, and it is not possible to deal with changes such as changes over time, changes in temperature, and variations in calibration performed for each IC. .

An object of the present embodiment is to realize a radio apparatus compatible with multilevel FSK using an inexpensive IC that executes a PLL demodulation method without using an expensive DSP. Another object of the present invention is to easily obtain the amplification factor of an amplifier suitable for an inexpensive IC that executes a PLL demodulation method in order to obtain a demodulation level corresponding to multilevel FSK.

FIG. 1 shows the configuration of a wireless device 100. As shown in FIG. The wireless device 100 includes a microphone 10, an audio processing unit 12, a signal generator 14, a transmission/reception switching unit 16, a PA (Power Amplifier) 18, a transmission filter 20, an antenna switching unit 22, an antenna 24, a reception filter 26, an LNA (Low Noise amplifier) 28 , mixer 30 , IF filter 32 , PLL demodulation section 34 , reception processing section 36 and speaker 38 . The audio processing section 12 includes an AD section 40 , a generation section 42 and a DA section 44 . The signal generator 14 includes a reference signal generator 50 , a comparator 52 , a loop filter 54 , a VCO 56 and a frequency divider 58 . The PLL demodulator 34 includes an amplifier 60 , a comparator 62 , an LPF 64 and a VCO 66 . The reception processing section 36 includes an AD section 72 , an amplification section 70 , a detection section 74 , an FSK demodulation section 76 , a DA section 78 , an AFC section 80 and a DA section 82 . Here, the configuration of radio apparatus 100 is divided into (1) transmission mode, (2) basic operation in reception mode, (3) preparation mode for AFC, (4) preparation mode for setting gain, and (5) Description will be made in the order of reception mode. Among these, (2) basic operation of the reception mode, (3) preparation mode for AFC, (4) preparation mode for setting the amplification factor, and (5) reception mode are performed in the reception device of the wireless device 100. can be said to be executed.

(1) Transmission mode Microphone 10 captures sound. The AD unit 40 converts the captured voice into digital data, and the generation unit 42 performs mapping and digital filtering on the digital data to generate FSK modulated waveform data. The DA section 44 converts the FSK modulated waveform data into an analog modulated signal. The signal generator 14 is composed of a reference signal generator 50, a comparator 52, a loop filter 54, a VCO 56, and a frequency divider 58, and generates a carrier wave signal of a transmission frequency, that is, a local oscillation signal by the PLL method. In the VCO 56, the modulation signal is superimposed on the frequency control voltage output from the loop filter 54 to perform modulation. The modulated transmission signal is amplified to a required level by the PA 18 through the transmission/reception switching unit 16, and after unnecessary signals such as harmonics are reduced by the transmission filter 20, is transmitted through the antenna switching unit 22 and the antenna 24. sent.

(2) Basic operation of reception mode In the reception mode, the antenna switching unit 22 is set to the reception side, and the signal received by the antenna 24 is attenuated by the reception filter 26 for out-of-band signals, and is amplified by the LNA 28 for low noise. Input to the mixer 30 . In the reception mode, the signal generator 14 used in the transmission mode generates a local oscillation signal having a frequency that is the difference or sum of the reception frequency and the IF, and inputs it to the mixer 30 by switching the transmission/reception switching section 16 . A mixer 30 is connected to the signal generator 14 and the antenna 24 and outputs an IF signal by multiplying the local oscillation signal and the received signal. The IF signal has components outside the IF band reduced by the IF filter 32 and is input to the PLL demodulator 34 .

The PLL demodulator 34 performs PLL demodulation on the IF signal from the mixer 30 . A baseband signal subjected to PLL demodulation is shown as in FIG. FIG. 2 shows a signal obtained by demodulating the multilevel FSK signal demodulated by the PLL demodulator 34. FIG. Here, it is assumed that the multi-level FSK modulation is 4-level FSK modulation. Demodulation of multilevel FSK modulation is determined from the voltage level of the demodulated baseband signal. Return to FIG. The AD section 72 generates digital baseband waveform data by performing analog/digital conversion on the signal demodulated by the PLL demodulation section 34 . The amplification section 70 amplifies the signal of the digital baseband waveform data from the AD section 72 . The amplification factor of the amplification section 70 will be described later.

The FSK demodulator 76 performs FSK demodulation on the digital baseband waveform data amplified by the amplifier 70 . That is, the FSK demodulator 76 samples the voltage value of the digital baseband waveform data at the timing of the data clock of the FSK data reproduced from the digital baseband waveform, and reproduces the data from the voltage value at that time. In the case of 4-value FSK modulation, 2-bit data is assigned to each voltage for demodulation levels indicated by four voltages as shown in FIG. It is determined which demodulation level of the four symbol values the point is close to. Audio data is reproduced from the reproduced data, and the audio data is converted into an analog signal by the DA section 78 and then output from the speaker 38 as received audio.

Problems in such a reception mode will be described below. FIG. 3 shows the characteristics of the PLL demodulator 34. As shown in FIG. In the PLL demodulation, the voltage of the difference in frequency and phase between the output signal of the VCO 66 in the PLL demodulator 34 and the input signal is output as a demodulated signal. If the output center frequency of the VCO 66 deviates from the center frequency f0 of the input signal B due to IC variations or temperature drift, it is output as a DC offset. Similarly, when the center frequency f0 of the input signal B is different from the center frequency of the VCO 66 due to the frequency offset from the transmission side, the output signal C also has a DC offset. When this signal is used as a multilevel FSK demodulated signal for data determination, a signal such as that shown in FIG. 2 can be detected, but its amplitude and DC offset vary, and the demodulation level cannot be set to an optimum level, resulting in data determination errors. .

Here, in the output signal C from the PLL demodulator 34, the free-run center frequency of the VCO 66 deviates from the set IF due to IC variations and temperature, and the deviation is output as a DC offset. Even if the frequency of the VCO 66 does not deviate, if the frequency adjustment on the transmitting side deviates, a DC offset is similarly output. The slope of the input frequency versus output voltage of the PLL demodulator 34 also varies due to IC variations and temperature. In the case of analog FM, the DC offset does not become a problem if the DC is cut by a capacitor or the like, and even if the slope of the input frequency vs. the output voltage changes slightly, the volume of the demodulated voice changes only slightly. However, in the case of FSK modulation, the demodulation level for each symbol value fluctuates if the baseband signal shown in FIG. 2 has a DC offset or variations in the slope of the input frequency vs. the output voltage.

In addition, when a digital modulated signal is received at a sufficient level and data can be determined at the Nyquist point in FIG. be either The voltage value for each symbol value is uniquely determined by the characteristics of the input frequency versus the output voltage of the PLL demodulator 34, the DC offset, the degree of modulation determined by the digital radio modulation standard, and the specifications of the waveform shaping filter. Here, the amplification factor of the amplifier 70 should also be set so as to approach the voltage value for each symbol value.

(3) Preparation mode for AFC In the preparation mode, the signal generator 14 generates an IF CW (Continuous Wave) signal, switches the transmission/reception switching unit 16, and performs PLL demodulation via the mixer 30 and the IF filter 32. Output to unit 34 . The frequency at this time is the 0th frequency (f0) in the IF band. Therefore, the PLL demodulator 34 outputs a DC voltage proportional to the difference between the free-running frequency of the VCO 66 in the PLL demodulator 34 and the 0th frequency (f0) of the signal output from the signal generator 14 . This DC voltage is a DC offset due to the difference between the free-run center frequency of the VCO 66 inside the PLL demodulator 34 and the set IF due to IC variations and temperature. The detector 74 measures this and stores it as a basic DC offset voltage Offset0. Note that the basic DC offset voltage Offset0 is also called the 0th voltage for the 0th frequency (f0). The FSK demodulator 76, which will be described later, can cancel the DC offset caused by the variation in the PLL demodulator 34 by subtracting the 0th voltage from the demodulation level. Also, if the DC offset is canceled appropriately, it is possible to cancel the DC offset due to temperature.

The signal generator 14 outputs a CW signal of IF+Δf, the detector 74 measures the demodulated output voltage of the PLL demodulator 34, and stores this voltage as Offset1. Here, IF+Δf is called the first frequency (f1>f0) and Offset1 is called the first voltage for the first frequency (f1). The first frequency (f1) is also within the IF band. Further, the signal generator 14 outputs a CW signal of IF-Δf, the detector 74 measures the demodulated output voltage of the PLL demodulator 34, and stores this voltage as Offset2. Here, IF-Δf is called the second frequency (f2<f0) and Offset1 is called the second voltage for the second frequency (f2). The second frequency (f2) is also within the IF band. If the maximum deviation frequency of digital modulation is used, the value of Δf can also be used for determination based on the demodulation level during digital demodulation. That is, the signal generator 14 outputs several types of CW signals with frequencies slightly shifted from the 0th frequency (f0), and the detector 74 measures the DC voltage output from the PLL demodulator 34 for each frequency. .

The detector 74 calculates the slope of the input frequency versus the output voltage of the PLL demodulator 34, that is, the voltage change per unit frequency. Specifically, the detector 74 calculates the voltage variation Δf _coeff of the demodulated output per unit frequency.
Δf _coeff =(Offset1−Offset2)/(2×Δf)
The amount of voltage change Δf _coeff of the demodulated output per unit frequency is the amount of deviation generated in the PLL demodulator 34, and is used to calculate the correction value when correcting the frequency offset. Note that the amount of voltage change Δf _coeff of the demodulated output per unit frequency may be used to determine the demodulation level during FSK demodulation.

(4) Preparation Mode for Setting Amplification In the preparation mode, the detector 74 sets the initial value G _design as the amplification of the amplifier 70 . (3) As in the preparation mode for AFC, the signal generator 14 generates the CW signal of the 0th frequency (f0), the CW signal of the first frequency (f1>f0), and the CW signal of the 1st frequency (f1>f0) in the IF band. A CW signal with a frequency (f2<f0) is output. Further, the mixer 30 outputs the CW signal of the 0th frequency (f0) from the signal generator 14, the CW signal of the first frequency (f1>f0), and the CW signal of the second frequency (f2<f0). do. Furthermore, the detection unit 74 measures the 0th voltage for the 0th frequency (f0), the first voltage for the first frequency (f1), and the second voltage for the second frequency (f2). These processes may be executed in common with (3) the preparation mode for AFC.

Here, the first frequency (f1) is set to correspond to the highest frequency among the signals output from the mixer 30 in (2) reception mode, and the second frequency (f2) is set to (2) In receive mode, it is set to correspond to the lowest frequency of the signals output from mixer 30 . In the case of 4-value FSK modulation, since it takes 4 values of -3, -1, +1, +3, the first frequency (f1) indicates a frequency corresponding to +3 level, and the second frequency (f2) is It indicates the frequency corresponding to -3 level. In the following, when the first voltage is indicated as L(+3) and the second voltage is indicated as L(-3), their design values are indicated as D(+3) and D(-3), respectively. Here, theoretical values are used as design values.

The detector 74 derives the amplification factor of the amplifier 70 from L(+3), L(-3), D(+3), and D(-3) as follows.
Amplification = G _design × {D(+3)-D(-3)}/{L(+3)-L(-3)}
The derived amplification factor is set in the amplification section 70 .
Note that since the FSK frequency shift differs depending on the protocol, the above-described processing is executed for each protocol when a plurality of protocols are supported.

(5) Reception Mode The amplification section 70 amplifies the signal of the digital baseband waveform data from the AD section 72 by the amplification factor detected by the detection section 74 . The AFC section 80 acquires an average voltage (DVavg) corresponding to the center frequency of the demodulated signal from the digital baseband waveform data amplified by the amplification section 70 . In digital modulation, as shown in FIG. 4, a non-modulated preamble signal or a preamble signal with a fixed pattern is usually transmitted first for synchronization. In the case of non-modulation, the average voltage (DVavg) corresponding to the center frequency can be easily obtained by averaging all the values measured during the period in which the non-modulation signal is transmitted. Even in the case of the "10101010" pattern, the voltage corresponding to the frequency when the data is 1 is obtained by averaging the sampling values at the timing of either 1 or 0 in that period. Also, by measuring the same number of times when the data is 1 and when the data is 0 and averaging the measurement results, an average voltage (DVavg) corresponding to the center frequency is obtained.

Here, an example of applying this AFC function to an analog wireless device will be described. Also in the case of an analog radio, the AFC unit 80 obtains an average voltage (DVavg) corresponding to the center frequency of the demodulated signal by performing a moving average on the digital baseband waveform data amplified by the amplifier unit 70 . 5(a)-(b) are used here to explain the moving average time. 5(a) and 5(b) show another moving average process in the AFC section 80. FIG. FIG. 5(a) shows the temporal change of the baseband waveform data amplified by the amplifier 70. FIG. The moving average interval 200 is set to 1 second or more in order to sufficiently smooth the voice signal, which is baseband waveform data. FIG. 5(b) shows the case of using tone squelch such as CTCSS. When tone squelch such as CTCSS is used, the frequency and waveform of the demodulated signal are known in advance. The data for the period is averaged. In the case of an analog radio, it is necessary to make the averaging time longer than that of a digital radio, but the AFC can improve the reception performance. Return to FIG.

The AFC unit 80 obtains the voltage caused by the frequency offset by subtracting the 0th voltage Offset0 from the average voltage (DVavg). This corresponds to detecting the amount of deviation. Further, the AFC unit 80 divides the voltage caused by the frequency offset by the voltage change amount Δf _coeff of the demodulated output per unit frequency to calculate the frequency offset f _TXoffset as follows.
f _TXoffset = (DVavg-Offset0)/Δf _coeff
That is, the AFC unit 80 detects the frequency offset based on the voltage of the signal from the PLL demodulator 34 and the 0th voltage and voltage change detected by the detector 74 . Furthermore, the AFC section 80 causes the signal generator 14 to correct the detected frequency offset.

The frequency offset detected by the AFC section 80 is converted into a voltage by the DA section 82, and the frequency of the reference signal generating section 50 of the signal generator 14 that generates the local oscillation signal is adjusted. Specifically, instead of the frequency of the local oscillation signal set in the signal generator 14 at the time of reception, the frequency obtained by subtracting the frequency offset from the frequency of the local oscillation signal is reset in the reference signal generator 50 . As a result, the frequency offset with respect to the transmitting side and the frequency offset due to the Doppler effect accompanying movement of the wireless device 100 are corrected. Also, an IF signal with a small frequency offset is input to the PLL demodulator 34 via the IF filter 32 and demodulated. Therefore, waveform distortion and imbalance in resistance to adjacent interference are corrected. As a result, reception performance is improved.

When the signal generator 14 is corrected as a frequency setting, the frequency offset is corrected with respect to the reception local frequency f _LO set in the signal generator 14, so that the signal generator 14 outputs f _LO -f The frequency is corrected by resetting the _TXoffset . Further, when the correction is performed by changing the frequency of the reference signal generator 50, the frequency control voltage of the reference signal generator 50 and its frequency change amount are recognized in advance. Thus, by offsetting the control voltage of the reference signal generator 50 by the frequency obtained by dividing f _TXoffset by the division ratio when setting f _LO in the signal generator 14, the output frequency of the signal generator 14 is set to f _TXoffset The frequency is corrected so that it is shifted by

The FSK demodulator 76 uses the 0th voltage detected by the detector 74 to perform FSK demodulation. Note that Δf _coeff may also be used.

This configuration can be implemented in terms of hardware by the CPU, memory, and other LSIs of any computer, and in terms of software, it is implemented by programs loaded in the memory. It depicts the function blocks to be used. Therefore, those skilled in the art will understand that these functional blocks can be realized in various forms by hardware only, software only, or a combination thereof.

The operation of the wireless device 100 configured as above will be described. FIG. 6 is a flow chart showing a reception procedure by radio apparatus 100. As shown in FIG. The detector 74 measures the 0th voltage, the first voltage, and the second voltage (S10). The detection unit 74 calculates the amplification factor (S12) and calculates the voltage change (S14). An amplification factor is set in the amplification unit 70 (S16). The AFC unit 80 derives the moving averaged voltage (S18) and detects the frequency offset (S20). The AFC unit 80 corrects the frequency offset (S22) and returns to step 18.

According to this embodiment, in the preparation mode, the signal generator outputs an intermediate frequency signal, and in the reception mode, the signal generator outputs a local oscillation signal, so that calibration and reception can be performed by one signal generator. and Further, in the preparation mode, the amount of deviation is detected for the signal from the PLL demodulator, and in the reception mode, the detected deviation amount is used to detect the frequency offset, so that the detection accuracy of the frequency offset can be improved. Further, in the preparation mode, the amount of deviation is detected for the signal from the PLL demodulator, and in the reception mode, the detected deviation amount is used to perform FSK demodulation, so that the demodulation accuracy can be improved. Further, since the frequency offset is corrected while executing calibration and reception by one signal generator, reception characteristics can be improved while suppressing complication of processing. Moreover, since the signal of the first frequency (f1) and the signal of the second frequency (f2) are output and the voltage change per unit frequency is detected based on the voltages corresponding to these signals, the processing can be simplified.

Also, a receiving apparatus using 4-value FSK modulation/demodulation can be realized by the PLL demodulator without using expensive AD converters, DSPs, and dedicated ICs. Also, the receiver can be realized with a simple circuit configuration equivalent to that of the PLL demodulator. Further, since the demodulation level of the multilevel FSK demodulated signal is corrected, variations in ambient temperature and IC can be corrected. In addition, since data determination is performed accurately, a receiver with a low error rate, that is, a highly sensitive receiver can be realized. Also, since the detected frequency offset is corrected, a highly sensitive digital radio system can be configured. Further, since the signal of the 0th frequency to the second frequency is generated by the signal generator and input to the PLL demodulator using the leakage of the mixer, the isolation from the receiving system can be increased. Also, since the isolation from the receiving system is high, it is possible to prevent signals of the 0th frequency to the second frequency from being unnecessarily radiated from the antenna. In addition, unlike the adjustment at the time of shipment from the factory, it is performed when there is a large temperature change or when the power is turned on, so it can follow changes in the ambient temperature and changes over time. Moreover, since it can be realized by a signal generator and software, it is possible to suppress an increase in manufacturing cost.

Further, since the amplification factor is detected in the preparation mode and the FSK demodulation is performed using the detected amplification factor in the reception mode, reception accuracy can be improved. Further, since the amplification factor is detected while executing calibration and reception by one signal generator, reception characteristics can be improved while suppressing complication of processing. The first frequency (f1) is the highest frequency of the signal output from the mixer and the second frequency (f2) is the lowest frequency of the signal output from the mixer so that the received Amplification suitable for the signal can be set. Moreover, even if a PLL demodulator is used, the amplification factor is adjusted at each startup, so multilevel FSK demodulation can be accurately performed without using an expensive DSP or dedicated IC. In addition, since the amplification factor is adjusted at each start-up, it is possible to reduce the adjustment man-hours on the production line. In addition, in the preparation mode, the signal generator generates an intermediate frequency signal, which is input to the PLL demodulator 34 using the leakage between the input and output of the mixer, and the amount of deviation is measured. can prevent intermediate frequency signals from leaking out of the antenna and interfering with other radio equipment.

The present invention has been described above based on the examples. It should be understood by those skilled in the art that this embodiment is merely an example, and that various modifications can be made to combinations of each component and each treatment process, and such modifications are within the scope of the present invention. .

In the radio apparatus 100 according to the embodiment, the amplifier section 70 sets a variable gain and the AFC section 80 corrects the frequency offset. However, not limited to this, for example, one of the functions may be omitted. According to this modification, the configuration of the wireless device 100 can be simplified.

In this embodiment, processing is executed in the order of (3) AFC preparation mode and (4) preparation mode for gain setting. However, the process is not limited to this, and for example, the processes may be executed in order of (4) preparation mode for setting gain and (3) preparation mode for AFC. Alternatively, (4) a preparation mode for gain setting and (3) a preparation mode for AFC may be executed in parallel. According to this modification, the degree of freedom of processing can be improved.

In this embodiment, the frequency of the reference signal generator 50 is variable in order to correct the frequency of the local oscillation signal. However, the present invention is not limited to this, and for example, the signal generator 14 may be configured such that the frequency can be set with sufficient resolution, such as a decimal point division method. In this way, the frequency can be corrected not by controlling the frequency of the signal generator 14 but by setting the frequency dividing ratio of the frequency divider 58 of the signal generator 14 . According to this modification, the frequency is digitally corrected, the frequency of the reference oscillator 4 is fixed, and the DA section 82 is not required, so that the circuit configuration can be simplified. Also, the cost of the wireless device 100 can be reduced.

In this embodiment, the detector 74 adjusts the demodulation level in the preparation mode. However, not limited to this, for example, when the frequency offset is small, the frequency of the local oscillation signal is not corrected, and the detection unit 74 adjusts the demodulation level while reflecting the DC offset corresponding to the frequency error on the transmission side measured during reception. may be adjusted. This modification eliminates the need for correcting the frequency of the local oscillation signal, thereby simplifying the process.

In the present embodiment, in the VCO 56 of the signal generator 14, other than a voltage-controlled varactor diode is used. However, the present invention is not limited to this, and for example, modulation may be performed by separately providing a variable capacitance diode for modulation and inputting a modulation signal to the element. Further, when the signal generator 14 has a delta-sigma modulation circuit with a fractional frequency division method, modulation may be performed by sequentially inputting frequency shift data of the modulation signal to the delta-sigma modulator. . According to this modified example, the degree of freedom in configuration can be improved.

In this embodiment, one signal generator 14 is shared for transmission and reception, but separate signal generators 14 may be used for transmission and reception. According to this modified example, the degree of freedom in configuration can be improved.

In this embodiment, the detector 74 measures a first voltage with a frequency corresponding to +3 level and a second voltage with a frequency corresponding to -3 level. However, the present invention is not limited to this. For example, the detection unit 74 may measure only one side and multiply it by calculation, or may calculate the difference in FSK shift for each protocol. According to this modified example, the degree of freedom in configuration can be improved.

In this embodiment, the detector 74 uses a theoretical value as a design value when detecting the amplification factor. However, it is not limited to this, and for example, it may be set so as to be "theoretical value×coefficient" so as to obtain the best amplitude obtained from the reception error rate characteristics or the like at the design stage. According to this modified example, the degree of freedom in configuration can be improved.

In this example, the preparation mode is running at start-up. However, the present invention is not limited to this. For example, if the wireless device 100 is capable of temperature measurement, temperature change may be used as a trigger to perform readjustment. You may perform readjustment as . According to this modification, fluctuations in the PLL demodulator can be followed.

10 microphone 12 audio processor 14 signal generator 16 transmission/reception switching unit 18 PA 20 transmission filter 22 antenna switching unit 24 antenna 26 reception filter 28 LNA 30 mixer 32 IF filter 34 PLL demodulation section 36 reception processing section 38 speaker 40 AD section 42 generation section 44 DA section 50 reference signal generation section 52 comparison section 54 loop filter 56 VCO 58 frequency division section 60 amplification section 62 comparison Section 64 LPF 66 VCO 70 Amplification Section 72 AD Section 74 Detection Section 76 FSK Demodulation Section 78 DA Section 80 AFC Section 82 DA Section 100 Wireless Device.

Claims (3)

A receiving device having (1) a ready mode and (2) a receiving mode,
a signal generator;
a mixer connected to the signal generator and the antenna and outputting an intermediate frequency signal;
a PLL demodulator that performs PLL demodulation on the intermediate frequency signal from the mixer;
an amplifier that amplifies the signal from the PLL demodulator;
a detection unit that detects the amplification factor of the amplification unit;
An FSK demodulator that performs FSK demodulation on the signal from the amplifier,
(1) In preparation mode,
The signal generator generates a signal of the 0th frequency (f0) corresponding to the center frequency in the intermediate frequency band, and a first frequency that is the maximum frequency in the frequency deviation determined based on the protocol of the signal received by the receiving device. outputting a signal of (f1>f0) and a signal of a second frequency (f2<f0) that is the minimum frequency in the frequency shift determined based on the protocol of the signal received by the receiving device;
The mixer outputs a signal of the 0th frequency (f0) from the signal generator, a signal of the first frequency (f1>f0), and a signal of the second frequency (f2<f0),
The detection unit detects a 0th voltage at a 0th frequency (f0), a first voltage at the first frequency (f1), a second voltage at a second frequency (f2), Deriving an amplification factor based on theoretical values determined based on the protocol for the first voltage and the second voltage,
(2) in receive mode,
The signal generator outputs a local oscillation signal,
The mixer outputs an intermediate frequency signal based on the local oscillation signal from the signal generator and the radio frequency signal from the antenna,
The amplification unit amplifies the signal from the PLL demodulation unit with the amplification factor detected by the detection unit,
The receiving apparatus, wherein the FSK demodulator uses the 0th voltage detected by the detector to perform FSK demodulation. (1) In preparation mode,
The first frequency (f1) of the signal output from the signal generator is a frequency at which the symbol value in 4-level FSK modulation is a demodulation level indicating +3,
2. The receiving apparatus according to claim 1, wherein the second frequency (f2) of the signal output from the signal generator is a frequency at which a symbol value in 4-level FSK modulation is a demodulation level indicating -3. . a signal generator, a mixer connected to the signal generator and an antenna and outputting an intermediate frequency signal, a PLL demodulator for performing PLL demodulation on the intermediate frequency signal from the mixer, and the PLL demodulator. (1) preparation mode and (2) A receiving method in a receiving device having a receiving mode,
(1) In preparation mode,
The signal generator generates a signal of the 0th frequency (f0) corresponding to the center frequency in the intermediate frequency band, and the first frequency of the maximum frequency in the frequency shift determined based on the protocol of the signal received by the receiving device. a step of outputting a signal of (f1>f0) and a signal of a second frequency (f2<f0) that is the minimum frequency in the frequency shift determined based on the protocol of the signal received by the receiving device;
the mixer outputting a signal of the 0th frequency (f0) from the signal generator, a signal of the first frequency (f1>f0) and a signal of the second frequency (f2<f0); ,
The detection unit detects a 0th voltage at a 0th frequency (f0), a first voltage at a first frequency (f1), a second voltage at a second frequency (f2), calculating an amplification factor based on theoretical values determined based on the protocol for the first voltage and the second voltage;
(2) in receive mode,
the signal generator outputting a local oscillation signal;
the mixer outputting an intermediate frequency signal based on the local oscillation signal from the signal generator and the radio frequency signal from the antenna;
a step in which the amplification unit amplifies the signal from the PLL demodulation unit by the amplification factor detected by the detection unit;
the FSK demodulator performing FSK demodulation using the 0th voltage detected by the detector;
A reception method characterized by comprising:

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