JP7095462B2 - Gate drive circuit and power converter - Google Patents

Description

The present invention relates to a gate drive circuit and a power converter.

Conventionally, a gate drive circuit and a power conversion device including a gate wiring connected to a gate terminal of a switching unit are known (see, for example, Patent Document 1).

The above-mentioned Patent Document 1 discloses a power conversion device including a signal line connected to a switching element. This power conversion device includes a bridge circuit, a drive circuit, and a signal line connecting the bridge circuit and the drive circuit. Each phase of the bridge circuit is provided with two series circuits including two switching elements connected in series to each other at the power output terminal (connection point). These two series circuits are connected in parallel by connecting the power output terminals to each other. The drive circuit consists of a switching element on the upper arm side of one of the two series circuits (hereinafter referred to as "first element") and a switching element on the upper arm side of the other series circuit (hereinafter referred to as "first element"). Hereinafter, it is configured to output the same drive signal to the “second element”). The signal line is a signal line connecting the drive circuit and the first element (hereinafter referred to as "first signal line") and a signal line connecting the drive circuit and the second element (hereinafter referred to as "first signal line"). It is referred to as a "second signal line"). The first signal line and the second signal line have the same wiring length and cross-sectional area of the wiring, or an inductor is placed in the middle of either the first signal line or the second signal line. ing. As a result, in this power conversion device, the first signal line and the second signal line have the same inductance, so that the switching element malfunctions and the switching element is damaged due to the occurrence of voltage vibration in the signal line. It is suppressed.

Japanese Patent No. 5559265

In the power conversion device of Patent Document 1, the wiring length of the first signal line and the wiring length of the second signal line are the same in order to suppress the malfunction of the switching element due to the occurrence of voltage vibration in the signal line. And make the cross-sectional area of the wiring of the first signal line and the cross-sectional area of the wiring of the second signal line the same, or in the middle of either the first signal line or the second signal line. The inductor is placed.

Here, it is conceivable to configure the power conversion device as in Patent Document 1 in a smaller size. However, in this miniaturized power conversion device, the position where the first signal line and the second signal line are routed may be limited due to the small internal space of the power conversion device, and , It may be difficult to place a relatively large inductor. In such a case, it is difficult to make the wiring length or cross-sectional area of the first signal line and the second signal line the same, and the first signal line or the second signal line is in the middle of the second signal line. It may be difficult to arrange a relatively large inductor such that the inductance of the first signal line and the inductance of the second signal line are the same. That is, in the gate drive circuit, the inductance of the first signal line and the inductance of the second signal line may not be the same due to the structure of the power conversion device. In this case, due to the difference between the inductance of the first signal line and the inductance of the second signal line, the operation timing of the switching element to which the first signal line is connected and the second signal line are connected. There is an inconvenience that the operation timing of the switching element is deviated. As a result, the current flowing through the switching element that turns on first or the switching element that turns off later is concentrated, and in the switching element where the current is concentrated, the power loss increases and the heat generation increases, or due to a large current cutoff. It is considered that the switching element is liable to be damaged due to the generation of the surge voltage.

Therefore, in the conventional power conversion device (gate drive circuit) as described above, the first signal line (gate wiring) connected to a plurality of switching elements (switching units) connected in parallel (or directly) to each other. When the inductance and the inductance of the second signal line (gate wiring) cannot be made the same, there is a problem that the switching element is easily damaged.

The present invention has been made to solve the above-mentioned problems, and one object of the present invention is to connect a plurality of gate wirings connected to a plurality of switching portions connected in parallel or in series with each other. It is an object of the present invention to provide a gate drive circuit and a power conversion device capable of suppressing damage to a switching unit even when the inductances cannot be made the same.

In order to achieve the above object, the inventor of the present application uses an RLC series circuit including a resistance value R, an inductance L, and a capacitance (electric capacity) C in the gate drive circuit (drive signal transmission unit including the gate wiring). By capturing and capturing the drive of the gate drive signal as the pulse voltage drive of this RLC series circuit, the following configuration was found. That is, the gate drive circuit according to the first aspect of the present invention is turned on and off based on the gate drive signal input to the gate terminal, and is connected to the gate terminals of a plurality of switching units connected in parallel or in series with each other. A plurality of drive signal transmission units including a plurality of gate wirings having different inductances and a signal input unit for inputting an input pulse signal to each of the plurality of gate wirings are provided, and the plurality of drive signal transmission units may be present. By adjusting at least one of the resistance value, capacitance, and inductance of at least one drive signal transmission unit, the resonance frequencies are substantially equal to each other and the attenuation coefficients are approximately equal to each other. It is configured to be equal. In the present specification, "the resonance frequencies are substantially equal to each other and the attenuation coefficients are substantially equal to each other" means that the resonance frequencies are equal to each other and the attenuation coefficients are equal to each other, and the resonance frequency is the resonance frequency. It is described as including the fact that the values are close to each other (for example, the value having an error rate of 20% or less) and the attenuation coefficients are close to each other (for example, the value having an error rate of 30% or less). .. The "error rate" is the difference between one resonance frequency (attenuation coefficient) and another resonance frequency (attenuation coefficient), and one resonance frequency (attenuation coefficient) and another resonance frequency (attenuation coefficient). It is described as meaning the value divided by the sum of values of.

In the gate drive circuit according to the first aspect of the present invention, as described above, at least one of the resistance value R, the capacitance C, and the inductance L of at least one drive signal transmission unit among the plurality of drive signal transmission units. By adjusting one, a plurality of drive signal transmission units are configured so that the resonance frequencies ω become substantially equal to each other and the attenuation coefficients ξ become substantially equal to each other. As a result, the voltages vo (t) input to the gate terminals of the plurality of switching units, which are determined by the resonance frequency ω and the attenuation coefficient ξ, are substantially the same, so that the operation timings of the plurality of switching units are substantially the same. be able to. Therefore, it is possible to prevent the current from concentrating on a part of the switching units among the plurality of switching units. As a result, it is possible to suppress the increase in heat generation in the switching section where the current is concentrated, and it is also possible to suppress the generation of surge voltage due to the large current interruption, so that the switching section is suppressed from being damaged. can do. Therefore, even when the inductances of the plurality of gate wirings connected to the plurality of switching portions connected in parallel or connected in series cannot be made the same, it is possible to prevent the switching portions from being damaged. In the specification of the present application, "the operation timing is substantially the same" means that not only the change start time of the voltage value of the gate drive signal is the same, but also the falling waveform or the falling waveform is substantially the same waveform. It is described as meaning that.

In the gate drive circuit according to the first aspect, preferably, the plurality of gate wirings are configured so that the inductances of the plurality of gate wirings are different from each other because the wiring lengths of the plurality of gate wirings are different from each other. By adjusting the capacitance of at least one drive signal transmission unit of the plurality of drive signal transmission units, the resonance frequencies of the plurality of drive signal transmission units are substantially equal to each other, and the attenuation coefficients are substantially equal to each other. It is configured as follows. With this configuration, the resonance frequency ω (= {1 / (√LC)}) and the attenuation coefficient ξ (= R / 2 × √C / √L) include the component of the capacitance C. By adjusting the capacitance C, the gate drive circuit can be easily configured so that the resonance frequencies ω of the plurality of drive signal transmission units and the attenuation coefficients ξ are substantially equal to each other. As a result, even when the wiring lengths of the plurality of gate wirings are different from each other and the inductances L are different from each other, it is possible to easily prevent the switching portion from being damaged.

In this case, preferably, the plurality of drive signal transmission units have substantially equal resonance frequencies due to the adjustment of the resistance value and the capacitance of at least one drive signal transmission unit among the plurality of drive signal transmission units. At the same time, the attenuation coefficients are configured to be substantially equal to each other. With this configuration, after adjusting the resonance frequency ω by adjusting the capacitance C, a plurality of drive signals are adjusted by adjusting the component of the resistance value R not included in the resonance frequency ω but included in the attenuation coefficient ξ. The gate drive circuit can be more easily configured so that the resonance frequencies ω of the transmission unit and the attenuation coefficients ξ are substantially equal to each other.

In the gate drive circuit in which the capacitance is adjusted, preferably, the input side parasitic capacitor of the switching unit and the input side parasitic capacitor are separated from each other in at least one drive signal transmission unit among the plurality of drive signal transmission units. In addition to being provided with an additional capacitor configured in, the multiple drive signal transmission units have substantially equal resonance frequencies due to the adjusted capacitance combined by the input side parasitic capacitor and the additional capacitor. , The attenuation coefficients are configured to be substantially equal to each other. With this configuration, the capacitance of the additional capacitor is adjusted in the drive signal transmission section as compared to the case where the semiconductor device itself included in the switching section is reconfigured (designed) in order to adjust the capacitance of the input side parasitic capacitor. By doing so, the capacitance of the drive signal transmission unit (combined capacitance) can be easily adjusted.

In the gate drive circuit in which the capacitance is adjusted, preferably, at least one drive signal transmission unit among the plurality of drive signal transmission units is a plurality of semiconductors of a plurality of switching units provided with a plurality of semiconductor elements. Including the input side parasitic capacitor of the element, the plurality of drive signal transmission units have the resonance frequencies substantially equal to each other and are attenuated by adjusting the combined capacitance of the input side parasitic capacitors of the plurality of semiconductor elements. The coefficients are configured to be approximately equal to each other. With this configuration, the capacitance (combined capacitance) of the drive signal transmission unit can be easily adjusted by adjusting the number of a plurality of semiconductor elements (semiconductor chips).

In the gate drive circuit according to the first aspect, preferably, in the plurality of drive signal transmission units, the resonance frequencies of the plurality of drive signal transmission units are substantially equal to each other, and the attenuation coefficients of the plurality of drive signal transmission units are substantially equal to each other. By being configured to be equal, it is configured to transmit a gate drive signal having substantially the same voltage rising waveform or substantially the same voltage falling waveform to each of the plurality of switching units. With this configuration, a gate drive signal having substantially the same voltage rising waveform or substantially the same voltage falling waveform is transmitted to each of the plurality of switching units, so that the operation timing of the plurality of switching units can be easily set. Can be aligned. As a result, it is possible to further prevent the switching unit from being damaged.

The power conversion device according to the second aspect of the present invention is turned on and off based on the gate drive signal input to the gate terminal, and is connected to a plurality of switching units connected in parallel or in series with each other and the gate terminal of the switching unit. The plurality of drive signal transmission units include a plurality of drive signal transmission units having different inductances from each other, and a signal input unit for inputting an input pulse signal to each of the plurality of gate wiring units. By adjusting at least one of the resistance value, capacitance, and inductance of at least one drive signal transmission unit among the plurality of drive signal transmission units, the resonance frequencies are substantially equal to each other and the attenuation coefficient is increased. It is configured to be approximately equal to each other.

In the power conversion device according to the second aspect of the present invention, by configuring as described above, the power conversion device is connected to a plurality of switching units connected in parallel or in series with each other, similarly to the gate drive circuit according to the first aspect. It is possible to provide a power conversion device capable of suppressing damage to the switching unit even when the inductances of the plurality of gate wirings cannot be made the same.

According to the present invention, as described above, the switching unit is damaged even when the inductances of the plurality of gate wirings connected to the plurality of switching units connected in parallel or in series with each other cannot be made the same. It can be suppressed.

It is a block diagram which shows the whole structure of the power conversion apparatus (gate drive circuit) by 1st Embodiment of this invention. It is a circuit diagram for demonstrating the structure of the power conversion apparatus (gate drive circuit) by 1st Embodiment of this invention. It is a circuit diagram for demonstrating the structure of the 1st drive signal transmission part, the 2nd drive signal transmission part, the 1st switching part and the 2nd switching part by 1st Embodiment of this invention. FIG. 3 is an equivalent circuit diagram of (a) a first drive signal transmission unit and (b) a second drive signal transmission unit according to the first embodiment of the present invention. It is a figure for demonstrating the example before (a) adjustment and (b) adjustment of the resistance value and capacitance of the gate drive circuit by 1st Embodiment of this invention. It is a figure for demonstrating the voltage rise waveform (turn-on waveform) and voltage fall waveform (turn-off waveform) of the gate drive signal of the gate drive circuit by 1st Embodiment of this invention. It is a figure for demonstrating the voltage rise waveform (turn-on waveform) and voltage fall waveform (turn-off waveform) of the gate drive signal of the gate drive circuit by the comparative example. It is a circuit diagram which shows the structure of the gate drive circuit of the 2nd Embodiment of this invention. 2 is an equivalent circuit diagram of (a) a first drive signal transmission unit and (b) a second drive signal transmission unit according to a second embodiment of the present invention. It is a figure for demonstrating the example before (a) adjustment and (b) adjustment of the resistance value and capacitance of the gate drive circuit by 2nd Embodiment of this invention. It is a figure which shows the structure of the power conversion apparatus by the modification of 1st and 2nd Embodiment of this invention.

Hereinafter, embodiments embodying the present invention will be described with reference to the drawings.

[First Embodiment]
(Configuration of power converter)
The configuration of the power conversion device 100 (gate drive circuit 1) according to the first embodiment will be described with reference to FIGS. 1 to 4.

As shown in FIG. 1, the power conversion device 100 includes a gate drive circuit 1 and a bridge circuit 2. In the first embodiment, the power conversion device 100 is configured as a power conversion device (power supply device) for, for example, an uninterruptible power supply, a grid interconnection, and a railroad vehicle. The gate drive circuit 1 is configured to input gate drive signals Gs (see FIG. 2) to each of a plurality of switching units 30 provided in the bridge circuit 2. The gate drive circuit 1 includes a plurality of drive signal transmission units 10 (hereinafter referred to as “transmission unit 10”) and a gate drive unit 20 (hereinafter referred to as “GDU 20”). The GDU 20 is an example of the "signal input unit" in the claims.

As shown in FIG. 2, the bridge circuit 2 is configured as, for example, a three-phase (U-phase, V-phase, and W-phase) bridge circuit 2U, 2V, and 2W. Here, since the bridge circuits 2U, 2V, and 2W are configured in the same manner as each other, the bridge circuit 2U will be described below, and the description of the bridge circuits 2V and 2W will be omitted in the following description.

The bridge circuit 2U is provided with an upper arm portion 2a and a lower arm portion 2b. The upper arm portion 2a is provided with a plurality (for example, two) switching portions 30 which are connected to the positive electrode terminal Tp, the power output side terminals To are connected to each other, and are connected in parallel to each other. .. The lower arm portion 2b is provided with a plurality (for example, two) switching portions 30 which are connected to the negative electrode terminal Tn and the power output side terminals To are connected to each other and are connected in parallel to each other. .. The upper arm portion 2a and the lower arm portion 2b are connected (series connection) between the positive electrode terminal Tp and the negative electrode terminal Tn via the power output side terminal To. Further, in the following description, since the upper arm portion 2a and the lower arm portion 2b are configured in the same manner as each other, only the upper arm portion 2a will be described, and the description of the lower arm portion 2b will be omitted.

As shown in FIG. 3, in the first embodiment, the upper arm portion 2a includes two switching portions 30 each configured as a semiconductor module. The switching unit 30 includes, for example, a semiconductor device 31 such as a field effect transistor (FET) or an insulated gate bipolar transistor (IGBT). Preferably, the semiconductor device 31 is configured as a semiconductor element (SiC- MOSFET) containing silicon carbide (SiC). Here, one of the two switching units 30 is referred to as a first switching unit 30a, and the other is referred to as a second switching unit 30b.

Further, the gate terminal Ga of the first switching unit 30a is connected to the GDU 20 via a first drive signal transmission unit 10a (hereinafter, referred to as “first transmission unit 10a”) described later. Further, the gate terminal Gb of the second switching unit 30b is connected to the GDU 20 via a second drive signal transmission unit 10b (hereinafter, referred to as “second transmission unit 10b”) described later. The first switching unit 30a includes a drain terminal Da connected to the positive electrode terminal Tp and a source terminal Sa connected to the power output side terminal To. The second switching unit 30b includes a drain terminal Db connected to the positive electrode terminal Tp and a source terminal Sb connected to the power output side terminal To. The first switching unit 30a is configured to be turned on and off based on the gate drive signal Gs input to the gate terminal Ga. Further, the second switching unit 30b is configured to be turned on and off based on the gate drive signal Gs input to the gate terminal Gb. In addition, "on / off" is described as meaning an operation of switching between a state of conducting and a state of disconnecting between the drain terminal Da (or Db) and the source terminal Sa (or Sb).

(Structure of gate drive circuit)
As shown in FIG. 1, each transmission unit 10 of the gate drive circuit 1 has a function of transmitting the gate drive signal Gs from the GDU 20 to each switching unit 30. The GDU 20 is configured to input an input pulse signal vi (see FIG. 2) to the gate wirings 11a and 11b of each of the plurality of transmission units 10.

The plurality of transmission units 10 are provided in the gate drive circuit 1 in the same number as the plurality of switching units 30. As shown in FIG. 3, among a plurality of transmission units 10, the transmission unit 10 connected to the first switching unit 30a is referred to as the first transmission unit 10a, and the transmission unit 10 connected to the second switching unit 30b is the second transmission unit 10. The transmission unit 10b. The first transmission unit 10a includes a gate wiring 11a which is connected to the gate terminal Ga and has an inductance L1. Further, the second transmission unit 10b includes a gate wiring 11b which is connected to the gate terminal Gb and has an inductance L2.

Further, in the first embodiment, the gate wiring 11a and the gate wiring 11b have the inductance L1 of the gate wiring 11a and the gate because the wiring length A1 of the gate wiring 11a and the wiring length A2 of the gate wiring 11b are different from each other. The wiring 11b is configured to have a size different from that of the inductance L2. Further, the first transmission unit 10a is provided with a signal line 11c for connecting the source terminal Sa and the terminal 22 of the GDU 20. The second transmission unit 10b is provided with a signal line 11d that connects the source terminal Sb and the terminal 22 of the GDU 20.

FIG. 4A shows an equivalent circuit of the first transmission unit 10a, and FIG. 4B shows an equivalent circuit of the second transmission unit 10b. Here, in the first embodiment, the first transmission unit 10a and the second transmission unit 10b have a resistance value R1 or R2, a capacitance C1 or C2, of at least one of the first transmission unit 10a and the second transmission unit 10b. By adjusting at least one of the inductances L1 and L2, the resonance frequencies ω1 and ω2 are substantially equal to each other, and the attenuation coefficients ξ1 and ξ2 are substantially equal to each other.

Specifically, as shown in FIGS. 3 and 4A, the first transmission unit 10a includes a gate wiring 11a, a gate resistance 12a, and an input-side parasitic capacitor of the first switching unit 30a (semiconductor device 31). Including 31a. That is, the first transmission unit 10a can be represented as an equivalent circuit of an RLC series circuit having a resistance value R1, an inductance L1, and a capacitance C1. Here, the resistance value R1 is the resistance value of the entire first transmission unit 10a including the resistance value of the gate resistance 12a and the resistance value of the gate wiring 11a. The inductance L1 is the inductance of the entire first transmission unit 10a including the inductance of the gate wiring 11a. The capacitance C1 is the capacitance of the entire first transmission unit 10a including the capacitance C11 of the input side parasitic capacitor 31a of the first switching unit 30a.

ここで、伝達関数Ｇ（ｓ）を２次振動系の伝達関数とし、伝達部１０の共振周波数をωとし、減衰係数（ダンピングファクタ）をξとすると、以下の式（２）および（３）が成立する。

これにより、ゲート駆動信号Ｇｓの立上り波形としての電圧ｖｏ（ｔ）は、オン時のゲート電圧をＶｇｓｏｎとし、オフ時のゲート電圧をＶｇｓｏｆｆとした場合、以下の式（４）および（５）として表すことができる。

したがって、上記式（３）のＲにＲ１、ＣにＣ１、および、ＬにＬ１を代入すると、共振周波数ω１および減衰係数ξ１は、以下の式（６）となる。

Here, the voltage waveform vo (t) of the gate drive signal Gs in the transmission unit 10 holds the following equation (1) in the RLC series circuit including the resistance value R, the inductance L, and the capacitance C. The voltage of the input pulse signal vi is vi (t) (Vi (s) after Laplace transform), and the voltage between the gate terminal and the source terminal of the switching unit 30 is vo (t) (Vo (s) after Laplace transform). Let the transfer function be G (s).

Here, assuming that the transfer function G (s) is the transfer function of the secondary vibration system, the resonance frequency of the transmission unit 10 is ω, and the damping coefficient (damping factor) is ξ, the following equations (2) and (3) are used. Is established.

As a result, the voltage vo (t) as the rising waveform of the gate drive signal Gs is as the following equations (4) and (5) when the gate voltage when on is Vgson and the gate voltage when off is Vgoff. Can be represented.

Therefore, when R1 is substituted for R, C1 is substituted for C, and L1 is substituted for L in the above equation (3), the resonance frequency ω1 and the attenuation coefficient ξ1 become the following equation (6).

Here, as shown in FIG. 3, in the first embodiment, the second transmission unit 10b includes the gate wiring 11b, the gate resistance 12b, and the input side parasitic capacitor 31a of the second switching unit 30b (semiconductor device 31). , The additional capacitor 13 configured separately from the input side parasitic capacitor 31a. For example, the additional capacitor 13 is connected in parallel to the input side parasitic capacitor 31a. Here, as shown in FIG. 4B, the second transmission unit 10b is represented as an equivalent circuit of an RLC series circuit having a resistance value R2, an inductance L2, and a capacitance C2, similarly to the first transmission unit 10a. Can be done. That is, when R2 is substituted for R, C2 is substituted for C, and L2 is substituted for L in the above equation (3), the resonance frequency ω2 and the attenuation coefficient ξ2 become the following equation (7).

Here, in the first embodiment, in the gate drive circuit 1, the capacitance C2 of the second transmission unit 10b is adjusted (preferably, both the resistance value R2 and the capacitance C2 of the second transmission unit 10b are adjusted). The resonance frequencies ω1 and ω2 are substantially equal to each other, and the attenuation coefficients ξ1 and ξ2 are substantially equal to each other. "The resonance frequencies ω1 and ω2 are substantially equal to each other" means that, for example, the resonance frequencies ω1 and ω2 are within the range shown in the following equation (8), and "attenuation coefficients ξ1 and ξ2 and""Is approximately equal to each other" means, for example, that the damping coefficients ξ1 and ξ2 are within the range shown in the following equation (9). That is, if the resonance frequencies ω1 and ω2 are within the range shown in the following equation (8) and the attenuation coefficients ξ1 and ξ2 are within the range shown in the following equation (9), the first switching unit 30a and Concentration of the current in one of the second switching units 30b is suppressed.

Specifically, as shown in FIG. 4, in the gate drive circuit 1, the capacitance C2 is adjusted (set) based on the difference between the inductance L1 and the inductance L2 so that the resonance frequencies ω1 and ω2 are substantially equal to each other. Has been done. In the first embodiment, the capacitance C2 is a capacitance (C21 + C22) in which the capacitance C21 of the input side parasitic capacitor 31a and the capacitance C22 of the additional capacitor 13 are combined. Further, in the gate drive circuit 1 of the first embodiment, the input side parasitic capacitor 31a and the additional capacitor 13 are combined so that the resonance frequencies ω1 and ω2 are substantially equal to each other and the attenuation coefficients ξ1 and ξ2 are substantially equal to each other. The adjusted capacitance C2 is adjusted. The additional capacitor 13 may be configured as a capacitor having a fixed capacitance or a capacitor having a variable capacitance in order to adjust the capacitance C22 (combined capacitance C2).

Further, in the gate drive circuit 1, the value of the resistance value R2 is adjusted (set) so that the attenuation coefficients ξ1 and ξ2 are substantially equal to each other. For example, in the gate drive circuit 1, the resistance value R1 (for example, the resistance value of the gate resistance 12a) and the resistance value R2 (for example, the resistance value of the gate resistance 12b) are set to different values. The gate resistors 12a and 12b are not limited to being configured as resistors having a fixed resistance value, and the resistance value of the gate resistance 12a and the resistance value of the gate resistance 12b can be set to different values. It may be composed of variable resistors, or the number of resistors may be changed.

The GDU 20 includes, for example, an oscillator, a CPU (Central Processing Unit), and the like. Then, as shown in FIG. 2, the first transmission unit 10a and the second transmission unit 10b are connected to the pulse output unit 21 of the GDU 20. Then, as shown in FIG. 4, the GDU 20 is configured to input the same input pulse signal vi (rectangular signal) from the pulse output unit 21 to each of the first transmission unit 10a and the second transmission unit 10b. ..

As a result, as shown in FIG. 6, the first transmission unit 10a and the second transmission unit 10b are configured so that the resonance frequencies ω1 and ω2 are substantially equal to each other and the attenuation coefficients ξ1 and ξ2 are substantially equal to each other. Therefore, each of the first switching unit 30a and the second switching unit 30b has a gate drive having substantially the same voltage rising waveform (turn-on waveform) and substantially the same voltage falling waveform (turn-off waveform). It is configured to transmit the signal Gs. That is, the gate drive circuit 1 is configured so that the operation timing of the first switching unit 30a and the operation timing of the second switching unit 30b substantially match.

(Comparison result between the gate drive circuit according to the first embodiment and the gate drive circuit according to the comparative example)
Next, with reference to FIGS. 5 to 7, the comparison result between the gate drive circuit 1 according to the first embodiment (example after adjustment) and the gate drive circuit according to the comparative example (example before adjustment) is specifically described. A numerical example will be shown and described. The configuration of the gate drive circuit according to the comparative example does not mean the prior art, but is a configuration showing the state before the resistance value R2 and the capacitance C2 of the gate drive circuit 1 according to the first embodiment are adjusted. ..

As shown in FIG. 5A, in the first drive signal transmission section of the gate drive circuit (gate drive circuit before adjustment) according to the comparative example, the resistance value R1c is 5Ω, the inductance L1c is 0.5μH, and the capacitance C1c is 15nF. It is assumed that the resonance frequency ω1c is 11.5 MHz and the attenuation coefficient ξ1c is 0.43. Further, in the second drive signal transmission section of the gate drive circuit (gate drive circuit before adjustment) according to the comparative example, the resistance value R2c is 5Ω, the inductance L2c is 0.25μH, the capacitance C2c is 15nF, and the resonance frequency ω2c is 16.3MHz. , And the attenuation coefficient ξ2c is 0.61. That is, in the gate drive circuit according to the comparative example, the magnitudes of the inductance, the resonance frequency, and the attenuation coefficient are different between the first drive signal transmission unit and the second drive signal transmission unit.

As shown in FIG. 5B, in the first transmission unit 10a of the gate drive circuit 1 according to the first embodiment, the resistance value R1 is 5Ω, the inductance L1 is 0.5μH, the capacitance C1 is 15nF, and the resonance frequency ω1 is 11. It is assumed that 5.5 MHz and the attenuation coefficient ξ1 are 0.43. Here, in the second transmission unit 10b, the resistance value R2 is 2.5Ω adjusted (decreased) by the adjustment amount Ra (2.5Ω) from R2c which is 5Ω, the inductance L2 is 0.25μH, and the capacitance. C2 is 30 nF adjusted (increased) from C21 (C2c) which is 15 nF to be adjusted C22 (capacitance C22 of the additional capacitor 13), the resonance frequency ω2 is 11.5 MHz, and the attenuation coefficient ξ2 is 0. It is .43. That is, in the gate drive circuit 1 according to the first embodiment, ω1 = ω2 and ξ1 = ξ2.

FIG. 6 shows waveforms (turn-on waveforms and turn-off waveforms) showing the gate voltage vo (t) at the gate terminals Ga and G2 in the gate drive circuit 1 according to the first embodiment, and FIG. 7 shows the gate drive according to a comparative example. A waveform (turn-on waveform and turn-off waveform) indicating the gate voltage vo (t) at the gate terminal in the circuit is shown.

In the gate drive circuit according to the comparative example, the gate voltage vo (t) (solid line) via the first drive signal transmission unit and the gate voltage vo (t) (dot line) via the second drive signal transmission unit match. It was found that the operation timing of the first switching unit connected to the first drive signal transmission unit and the operation timing of the second switching unit connected to the second drive signal transmission unit deviate from each other. For example, in the example shown in FIG. 7, the operation timing of the first switching unit and the operation timing of the second switching unit deviate from each other during the period of Δt until the predetermined voltage value Vt is reached.

In the gate drive circuit 1 according to the first embodiment, the gate voltage vo (t) via the first transmission unit 10a and the gate voltage vo (t) via the second transmission unit 10b match, and the first transmission occurs. It was found that the operation timing of the first switching unit 30a connected to the unit 10a and the operation timing of the second switching unit 30b connected to the second transmission unit 10b coincide with each other. In FIG. 6, the waveform shown by one solid line is shown for each of the turn-on waveform and the turn-off waveform, but the waveform of the gate voltage vo (t) via the first transmission unit 10a and the second transmission unit 10b are shown. It shows that the waveform of the gate voltage vo (t) via the wave matches.

[Effect of the first embodiment]
In the first embodiment, the following effects can be obtained.

In the first embodiment, as described above, at least one of the resistance value R, the capacitance C, and the inductance L of the second transmission unit 10b is adjusted so that the resonance frequencies ω become substantially equal to each other. The first transmission unit 10a and the second transmission unit 10b are configured so that the attenuation coefficients ξ are substantially equal to each other. As a result, the voltages vo (t) input to the gate terminal Ga of the first switching unit 30a and the gate terminal Gb of the second switching unit 30b, which are determined by the resonance frequencies ω1 and ω2 and the attenuation coefficients ξ1 and ξ2 (FIG. 7) are substantially the same, so that the operation timings of the first switching unit 30a and the second switching unit 30b can be substantially the same. Therefore, it is possible to prevent the current from concentrating on one of the first switching unit 30a and the second switching unit 30b. As a result, it is possible to suppress an increase in heat generation in the switching unit 30 in which the current is concentrated, and it is possible to suppress the generation of a surge voltage due to a large current cutoff, so that the switching unit 30 is damaged. Can be suppressed. Therefore, even when the inductances L1 and L12 of the plurality of gate wirings 11a and 11b connected to the first switching unit 30a and the second switching unit 30b connected in parallel or serially to each other cannot be made the same. It is possible to prevent the switching unit 30 from being damaged.

Further, in the first embodiment, as described above, the gate wirings 11a and 11b are configured such that the inductances L1 and L2 are different from each other because the wiring lengths A1 and A2 are different from each other. By adjusting the capacitance C2 of the second transmission unit 10b, the gate drive circuit 1 is configured so that the resonance frequencies ω1 and ω2 are substantially equal to each other and the attenuation coefficients ξ1 and ξ2 are substantially equal to each other. As a result, as in the above equations (6) and (7), the resonance frequency ω2 and the attenuation coefficient ξ2 contain the component of the capacitance C2. Therefore, by adjusting the capacitance C2, the first transmission unit The gate drive circuit 1 can be easily configured so that the resonance frequencies ω1 and ω2 of the 10a and the second transmission unit 10b and the attenuation coefficients ξ1 and ξ2 are substantially equal to each other. As a result, even when the wiring length A1 of the gate wiring 11a and the wiring length A2 of the gate wiring 11b are different from each other and the inductances L1 and L2 are different from each other, it is possible to easily suppress damage to the switching unit 30. can.

Further, in the first embodiment, the resonance frequencies ω1 and ω2 are made substantially equal to each other by adjusting the resistance value R2 and the capacitance C2 of the second transmission unit 10b as described above, and the attenuation coefficients ξ1 and ξ2 are set. The gate drive circuit 1 is configured so as to be substantially equal to each other. As a result, after adjusting the resonance frequencies ω1 and ω2 by adjusting the capacitance C2 as in the above equations (6) and (7), the resistance value R2 not included in the resonance frequency ω2 but included in the attenuation coefficient ξ2. By adjusting the components of, the gate drive circuit 1 is more easily configured so that the resonance frequencies ω1 and ω2 of the first transmission unit 10a and the second transmission unit 10b and the attenuation coefficients ξ1 and ξ2 are substantially equal to each other. can do.

Further, in the first embodiment, as described above, the second transmission unit 10b includes the input side parasitic capacitor 31a of the second switching unit 30b and the additional capacitor 13 configured separately from the input side parasitic capacitor 31a. Is provided. Then, the resonance frequencies ω1 and ω2 and the attenuation coefficients ξ1 and ξ2 are substantially equal to each other by adjusting the capacitance C2 synthesized by the input side parasitic capacitor 31a and the additional capacitor 13 in the second transmission unit 10b. To configure. As a result, as compared with the case where the semiconductor device 31 itself included in the switching unit 30 is reconfigured (designed) in the first transmission unit 10a or the second transmission unit 10b in order to adjust the capacitance C2 of the input side parasitic capacitor 31a. By adjusting the capacitance C22 of the additional capacitor 13, the capacitance C2 (combined capacitance) of the transmission unit 10 can be easily adjusted.

Further, in the first embodiment, as described above, the first transmission unit 10a and the second transmission unit 10b are configured so that the resonance frequencies ω1 and ω2 and the attenuation coefficients ξ1 and ξ2 are substantially equal to each other. Each of the first switching unit 30a and the second switching unit 30b is configured to transmit a gate drive signal Gs having substantially the same voltage rising waveform or substantially the same voltage falling waveform. With this configuration, a plurality of gate drive signals Gs having substantially the same voltage rising waveform or substantially the same voltage falling waveform are transmitted to each of the first switching unit 30a and the second switching unit 30b. The operation timing of the switching unit 30 can be easily aligned. As a result, it is possible to further prevent the switching unit 30 from being damaged.

[Second Embodiment]
Next, the configuration of the power conversion device 200 of the second embodiment will be described with reference to FIGS. 1, 8 and 9. In the power conversion device 200 according to the second embodiment, the number of semiconductor elements 231 (number of semiconductor chips) is different from that of the first embodiment in which the capacitance C2 is adjusted by providing the additional capacitor 13 in the second transmission unit 10b. The capacitances C102a and C102b are adjusted by adjusting. The same configuration as that of the first embodiment is shown with the same reference numerals in the drawings, and the description thereof will be omitted.

As shown in FIG. 1, in the second embodiment, the power conversion device 200 includes a gate drive circuit 201 and a bridge circuit 202. Further, the gate drive circuit 201 includes a first drive signal transmission unit 210a (hereinafter referred to as "first transmission unit 210a") and a second drive signal transmission unit 210b (hereinafter referred to as "second transmission unit 210b"). including. As shown in FIG. 8, the bridge circuit 202 is configured as one semiconductor module including a first switching unit 230a and a second switching unit 230b. The first switching unit 230a and the second switching unit 230b are each configured as a semiconductor chip group provided with a plurality of semiconductor elements 231 (semiconductor chips). Each semiconductor element 231 is composed of a switching element (for example, MOSFET or the like).

The plurality of semiconductor elements 231 constituting the first switching unit 230a are connected to the gate wiring 211a of the first transmission unit 210a. A plurality of semiconductor elements 231 constituting the second switching unit 230b are connected to the gate wiring 211b of the second transmission unit 210b. That is, the gate drive signals Gs are input to the plurality of semiconductor elements 231 constituting the first switching unit 230a at substantially the same operation timing. Further, gate drive signals Gs are input to the plurality of semiconductor elements 231 constituting the second switching unit 230b at substantially the same operation timing.

Here, in the second embodiment, the first transmission unit 210a includes the input side parasitic capacitor 231a of the N1 semiconductor element 231 of the first switching unit 230a provided with the plurality of semiconductor elements 231 and the second transmission. The unit 210b includes an input-side parasitic capacitor 231a of N2 semiconductor elements 231 of the second switching unit 230b provided with a plurality of semiconductor elements 231. In the first transmission unit 210a and the second transmission unit 210b, the resonance frequencies ω11 and ω12 are abbreviated to each other because the combined capacitances C102a and C102b of the input side parasitic capacitors 231a of the plurality of semiconductor elements 231 are adjusted. It is configured so that the attenuation coefficients ξ1 and ξ2 are substantially equal to each other as well as being equal to each other.

Specifically, the number N1 of the semiconductor elements 231 included in the first switching unit 230a and the number N2 of the semiconductor elements 231 included in the second switching unit 230b are different from each other. Further, the capacitance of the input side parasitic capacitor 231a of the semiconductor element 231 is C102. As a result, as shown in FIG. 9, the combined capacitance C102a between the input side parasitic capacitors 231a of the N1 semiconductor element 231 of the first transmission unit 210a is the N2 semiconductor element 231 of the second transmission unit 210b. The value is different from the combined capacitance C102b of the input-side parasitic capacitors 231a.

Here, in the second embodiment, the capacitance C102a and the second transmission unit of the first transmission unit 210a are adjusted by adjusting at least one of the number N1 and the number N2 (for example, both the number N1 and N2). At least one of the 210b capacitances C102b (eg, both the capacitances C102a and C102b) is adjusted.

Further, as shown in FIG. 9, the first transmission unit 210a is an RLC series circuit composed of a resistance value R11, an inductance L11, and a capacitance C102a. The second transmission unit 210b is an RLC series circuit composed of a resistance value R12, an inductance L12, and a capacitance C102b.

Then, in the gate drive circuit 201, at least one of the resistance values R11 and R12 and at least one of the capacitances C102a and C102b are adjusted so that the resonance frequency ω11 of the first transmission unit 210a and the resonance frequency ω11 of the second transmission unit 210b are adjusted. The resonance frequency ω12 is substantially equal to each other, and the attenuation coefficient ξ11 of the first transmission unit 210a and the attenuation coefficient ξ12 of the second transmission unit 210b are substantially equal to each other. Further, the other configurations of the second embodiment are the same as the configurations of the first embodiment.

(Example of adjusting the resistance value and capacitance of the gate drive circuit according to the second embodiment)
Next, with reference to FIG. 10, an example of adjusting the resistance value R11 of the gate drive circuit 201 and the capacitances C102a and C102b according to the second embodiment will be described.

FIG. 10A shows numerical examples such as the resistance value of the gate drive circuit 201 before adjustment, and FIG. 10B shows the resistance value and the like of the gate drive circuit 201 after adjustment (second embodiment). A numerical example of is shown. For example, the resistance value R11c of the first transmission unit 210a before adjustment and the resistance value R12c of the second transmission unit 210b before adjustment are set to 3Ω. Further, the inductance L11c of the first transmission unit 210a before adjustment is 0.04 μH, and the inductance L12c of the second transmission unit 210b before adjustment is 0.02 μH. The capacitance C11c of the first transmission unit 210a before adjustment and the capacitance C12c of the second transmission unit 210b before adjustment are 9nF. In this case, the resonance frequency ω11c of the first transmission unit 210a before adjustment is 52.7 MHz, and the resonance frequency ω12c of the second transmission unit 210b before adjustment is 74.5 MHz (values different from each other). Further, the attenuation coefficient ξ11c of the first transmission unit 210a before adjustment is 0.71, and the attenuation coefficient ξ12c of the second transmission unit 210b before adjustment is 1.01 (values different from each other).

Then, for example, by adjusting the resistance values from R11c to R11, the capacitances C11c to C102a, and the capacitances C12c to C102b, respectively, the resonance frequency ω11 of the first transmission unit 210a and the resonance frequency ω12 of the second transmission unit 210b are adjusted. Are substantially equal to each other, and the attenuation coefficient ξ11 of the first transmission unit 210a and the attenuation coefficient ξ12 of the second transmission unit 210b are substantially equal to each other.

Specifically, the resistance value R11 of the adjusted first transmission unit 210a is 6Ω. The resistance value R12 of the second transmission unit 210b after adjustment is 3Ω. The adjusted inductance L11 of the first transmission unit 210a is 0.04 μH, and the adjusted inductance L12 of the second transmission unit 210b is 0.02 μH. The adjusted capacitance C102a of the first drive signal transmission unit 210a becomes 6nF by setting the number of semiconductor elements 231 to N1. The adjusted capacitance C102b of the second transmission unit 210b becomes 12nF by setting the number of semiconductor elements 231 to N2. As a result, the resonance frequency ω11 of the adjusted first transmission unit 210a and the resonance frequency ω12 of the adjusted second transmission unit 210b both become 64.5 MHz, and the attenuation coefficient ξ11 of the adjusted first transmission unit 210a and the adjustment The attenuation coefficient ξ12 of the second transmission unit 210b after that is 1.16.

[Effect of the second embodiment]
In the second embodiment, the following effects can be obtained.

In the second embodiment, as described above, the first transmission unit 210a includes the input side parasitic capacitor 231a of the N1 semiconductor element 231 in the first switching unit 230a. The second transmission unit 210b includes an input-side parasitic capacitor 231a of N2 semiconductor elements 231 in the second switching unit 230b. Resonance frequencies ω11 and ω12 are abbreviated to each other by adjusting the combined capacitances C102a and C102b of the input-side parasitic capacitors 231a of the plurality of semiconductor elements 231 in the first transmission unit 210a and the second transmission unit 210b. It is configured so that the attenuation coefficients ξ11 and ξ12 are substantially equal to each other while being equal to each other. Thereby, the capacitances C102a and C102b can be easily adjusted by adjusting the number N11 and the number N12 of the plurality of semiconductor elements 231 (semiconductor chips). The other effects of the second embodiment are the same as the effects of the first embodiment.

[Modification example]
It should be noted that the embodiments disclosed this time are exemplary in all respects and are not considered to be restrictive. The scope of the present invention is shown by the scope of claims rather than the description of the above-described embodiment, and further includes all modifications (modifications) within the meaning and scope equivalent to the scope of claims.

For example, in the first and second embodiments, the first switching unit and the second switching unit whose operation timings are aligned are connected in parallel with each other, but the present invention is not limited to this. That is, like the power conversion device 300 of the modified example shown in FIG. 11, the first switching unit 330a connected to the gate wiring 11a of the first transmission unit 10a and the gate wiring 11b of the second transmission unit 10b are connected. The second switching unit 330b may be connected in series with each other between the positive electrode terminal Tp and the power output side terminal To. Such a power conversion device 300 can be applied to, for example, a power conversion device connected to a high-voltage power system such as for a power generation facility and a substation facility. Therefore, for example, even if the number of a plurality of switching units (first switching unit 330a and second switching unit 330b) connected in series is increased, the operation timing of the switching units can be easily aligned.

Further, in the first and second embodiments, the resonance frequency of the first drive signal transmission unit and the resonance frequency of the second drive signal transmission unit are adjusted by adjusting the resistance value, the capacitance, and the resistance value and the capacitance of the inductance. An example has been shown in which the resonance frequency is made substantially equal and the attenuation coefficient of the first drive signal transmission unit is made substantially equal to the attenuation coefficient of the second drive signal transmission unit, but the present invention is not limited to this. That is, by adjusting at least one of the resistance value, the capacitance, and the inductance (for example, only the capacitance, only the inductance, all of the resistance value, the capacitance, and the inductance), the resonance frequency of the first drive signal transmission unit is used. And the resonance frequency of the second drive signal transmission unit may be substantially equal, and the attenuation coefficient of the first drive signal transmission unit and the attenuation coefficient of the second drive signal transmission unit may be substantially equal to each other.

Further, in the first and second embodiments, an example is shown in which the inductances of the plurality of gate wirings are configured to be different from each other because the wiring lengths of the plurality of gate wirings are different from each other. Not limited. That is, the present invention may be applied even when the inductances of the plurality of gate wirings are different from each other because the cross-sectional areas of the plurality of gate wirings are different from each other.

Further, in the first embodiment, as shown in FIG. 4, an example in which the additional capacitor is provided in the second drive signal transmission unit so as to be connected in parallel to the input side parasitic capacitor is shown, but the present invention is limited to this. do not have. That is, the additional capacitor may be provided in the first drive signal transmission unit or the second drive signal transmission unit so as to be connected in series to the input side parasitic capacitor.

Further, in the second embodiment, an example in which both the number of input-side parasitic capacitors (N1) of the first drive signal transmission unit and the number of input-side parasitic capacitors (N2) of the second drive signal transmission unit are adjusted. However, the present invention is not limited to this. That is, only one of N1 and N2 may be adjusted.

Further, in the above embodiment, an example in which the switching unit (semiconductor device) is composed of a SiC- MOSFET or an IGBT is shown, but the present invention is not limited to this. That is, a semiconductor element other than the SiC- MOSFET and the IGBT (for example, Si-PWM) may be used.

1,201 Gate drive circuit 10 Drive signal transmission unit 10a, 210a First drive signal transmission unit 10b, 210b Second drive signal transmission unit 11a, 11b, 211a, 211b Gate wiring 13 Additional capacitor 20 GDU (signal input unit)
30 Switching unit 31a, 231a Input side parasitic capacitor 30a, 230a First switching unit 30b, 230b Second switching unit 100, 200, 300 Power converter 231 Semiconductor element Ga, Gb Gate terminal

Claims (7)

A plurality of drives including a plurality of gate wirings connected to the gate terminal of a plurality of switching units connected in parallel or in series with each other and having different inductances while being turned on / off based on a gate drive signal input to the gate terminal. Signal transduction unit and
Each of the plurality of gate wirings is provided with a signal input unit for inputting an input pulse signal.
The plurality of drive signal transmission units resonate due to adjustment of at least one of the resistance value, capacitance, and inductance of at least one of the plurality of drive signal transmission units. A gate drive circuit configured so that the frequencies are approximately equal to each other and the attenuation coefficients are approximately equal to each other. The plurality of gate wirings are configured such that the inductances of the plurality of gate wirings are different from each other because the wiring lengths of the plurality of gate wirings are different from each other.
The plurality of drive signal transmission units have the resonance frequencies substantially equal to each other and the attenuation due to the adjustment of the capacitance of at least one of the plurality of drive signal transmission units. The gate drive circuit according to claim 1, wherein the coefficients are configured to be substantially equal to each other. The plurality of drive signal transmission units have the resonance frequencies substantially equal to each other due to the adjustment of the resistance value and the capacitance of at least one of the plurality of drive signal transmission units. The gate drive circuit according to claim 2, wherein the attenuation coefficients are configured to be substantially equal to each other. At least one of the plurality of drive signal transmission units, the drive signal transmission unit is provided with an input-side parasitic capacitor of the switching unit and an additional capacitor configured separately from the input-side parasitic capacitor. Ori,
In the plurality of drive signal transmission units, the resonance frequencies are substantially equal to each other and the attenuation coefficients are substantially equal to each other due to the adjustment of the capacitance synthesized by the input side parasitic capacitor and the additional capacitor. The gate drive circuit according to claim 2 or 3, which is configured to be. At least one of the plurality of drive signal transmission units includes an input-side parasitic capacitor of the plurality of semiconductor elements of the plurality of switching units provided with the plurality of semiconductor elements.
In the plurality of drive signal transmission units, the resonance frequencies of the plurality of semiconductor elements are adjusted to be substantially equal to each other by adjusting the combined capacitance of the input-side parasitic capacitors of the plurality of semiconductor elements, and the attenuation coefficients of the plurality of semiconductor elements are mutually equal to each other. The gate drive circuit according to claim 2 or 3, which is configured to be substantially equal. The plurality of drive signal transmission units are configured such that the resonance frequencies of the plurality of drive signal transmission units are substantially equal to each other and the attenuation coefficients of the plurality of drive signal transmission units are substantially equal to each other. 1 of any one of claims 1 to 5, wherein the gate drive signal having substantially the same voltage rising waveform or substantially the same voltage falling waveform is transmitted to each of the plurality of switching units. The gate drive circuit described in the section. Multiple switching units connected in parallel or in series with each other while turning on and off based on the gate drive signal input to the gate terminal.
A plurality of drive signal transmission units connected to the gate terminal of the switching unit and including a plurality of gate wirings having different inductances from each other.
Each of the plurality of gate wirings is provided with a signal input unit for inputting an input pulse signal.
The plurality of drive signal transmission units resonate due to the adjustment of at least one of the resistance value, the capacitance, and the inductance of at least one of the plurality of drive signal transmission units. A power converter configured such that the frequencies are approximately equal to each other and the attenuation coefficients are approximately equal to each other.

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