JP6984727B2 - Power converter and motor system - Google Patents

Description

The present invention relates to a power conversion device that converts electric power from a DC power source into alternating current and supplies power to an electric motor such as a motor generator, and an electric motor system using this power conversion device.

For example, an electric motor system for driving a motor generator used in a hybrid vehicle or the like is provided with a power conversion device that converts electric power from a DC power source into alternating current and supplies electric power to the electric motor. In this power conversion device, semiconductor switching elements such as MOSFETs (metric silicon field effect transistors) are switched at high frequencies to improve the controllability of the motor and reduce the size of the device. On the other hand, when the semiconductor switching element is switched at a high frequency, there is a problem that the efficiency of the power conversion device is lowered due to the increase in the switching loss.

In order to solve this problem, an electric motor system has been proposed in which an additional circuit is provided between the DC power supply and the inverter circuit and a soft switching function is provided to suppress switching loss when the inverter main circuit element is turned on (for example). Patent Document 1). Further, according to this technique, by using the resonance principle, the voltage change rate dV / dt at the time of switching becomes gentle, and therefore the effect of reducing the generated noise can be expected.

Japanese Unexamined Patent Publication No. 2000-262066

However, in the invention disclosed in Patent Document 1, since the inverter circuit is disconnected from the DC power supply during the soft switching operation period, it is necessary to pass a large current equivalent to the motor current to the LC resonance circuit, and an additional LC resonance circuit is required. There is a problem that the efficiency of the power conversion device is reduced due to the increase in size and loss. Further, since the period during which the main circuit voltage becomes zero voltage increases according to the load power, there is a problem that the effective voltage output by the inverter decreases, and therefore the output performance of the motor decreases.

The present invention has been made to solve the above problems, and an object of the present invention is to provide a power conversion device and a motor system that realizes miniaturization and loss reduction of an additional circuit.

In the power conversion device according to the present invention, one end is connected to a DC power supply to cut off the input from the DC power supply, and one end is connected to the other end of the power cutoff circuit to convert the power from the DC power supply into AC power. The inverter circuit includes an inverter circuit for conversion and a control unit for controlling the inverter circuit and the power supply cutoff circuit, and the inverter circuit is a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series. The control unit has multiple legs connected in parallel to each other, and the control unit controls the lower arm of at least one of the multiple legs during the power supply cutoff period in which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit. A first operation mode in which the switching element is turned on, a second operation mode in which the switching elements of the upper arm and the lower arm of at least one leg of the plurality of legs are turned on at the same time, and at least one leg among the plurality of legs. The inverter circuit and the power supply cutoff circuit are controlled using the third operation mode in which the switching element of the upper arm is turned on, and in the first operation mode, the switching element of the lower arm is turned on so as to return the current to the lower arm. Then, in the third operation mode, the switching element of the upper arm is turned on so as to return the current to the upper arm, and the control unit moves from the first operation mode to the third operation mode or from the third operation mode to the first operation. In the case of transitioning to the mode, a second operation mode is provided between the first operation mode and the third operation mode, and the power cutoff period is periodically repeated.
Further, in the power conversion device according to the present invention, one end is connected to a DC power supply to cut off the input from the DC power supply, and one end is connected to the other end of the power supply cutoff circuit to exchange power from the DC power supply. The inverter circuit includes an inverter circuit that converts electric power and a control unit that controls the inverter circuit and the power supply cutoff circuit. The inverter circuit consists of a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series. It has a plurality of legs connected in parallel to each other, and the control unit has a plurality of legs among the plurality of legs during a period in which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit repeatedly periodically or intermittently. A first operation mode in which the switching element of the lower arm of at least one leg is turned on, and a second operation mode in which the switching elements of the upper arm and the lower arm of at least one leg of the plurality of legs are turned on at the same time. The inverter circuit and the power supply cutoff circuit are controlled by using the third operation mode in which the switching element of the upper arm of at least one leg is turned on, and the current is returned to the lower arm in the first operation mode. The switching element of the lower arm is turned on, and in the third operation mode, the switching element of the upper arm is turned on so as to return the current to the upper arm, and the control unit changes from the first operation mode to the third operation mode, or When transitioning from the third operation mode to the first operation mode, a second operation mode is provided between the first operation mode and the third operation mode, and the transition to the second operation mode is performed when the carrier signal is reset. , Is characterized.
Further, in the power conversion device according to the present invention, one end is connected to a DC power supply to cut off the input from the DC power supply, and one end is connected to the other end of the power supply cutoff circuit to exchange power from the DC power supply. The inverter circuit includes an inverter circuit that converts electric power and a control unit that controls the inverter circuit and the power supply cutoff circuit. The inverter circuit consists of a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series. It has a plurality of legs connected in parallel to each other, and the control unit has a plurality of legs among the plurality of legs during a period in which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit repeatedly periodically or intermittently. A first operation mode in which the switching element of the lower arm of at least one leg is turned on, and a second operation mode in which the switching elements of the upper arm and the lower arm of at least one leg of the plurality of legs are turned on at the same time. The inverter circuit and the power supply cutoff circuit are controlled by using the third operation mode in which the switching element of the upper arm of at least one leg is turned on, and the current is returned to the lower arm in the first operation mode. The switching element of the lower arm is turned on, and in the third operation mode, the switching element of the upper arm is turned on so as to return the current to the upper arm, and the control unit changes from the first operation mode to the third operation mode, or When transitioning from the third operation mode to the first operation mode, a second operation mode is provided between the first operation mode and the third operation mode, and the voltage of the positive current bus is reduced to zero voltage. do.
Further, in the power conversion device according to the present invention, one end is connected to a DC power supply to cut off the input from the DC power supply, and one end is connected to the other end of the power cutoff circuit to exchange power from the DC power supply. The inverter circuit includes an inverter circuit that converts electric power and a control unit that controls the inverter circuit and the power cutoff circuit. The inverter circuit consists of a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series. There are multiple legs connected in parallel to each other, and the control unit is out of the multiple legs during a period in which the power cutoff circuit cuts off the DC power supply and the inverter circuit, and is repeated periodically or intermittently. A first operation mode in which the switching element of the lower arm of at least one leg is turned on, and a second operation mode in which the switching elements of the upper arm and the lower arm of at least one leg of the plurality of legs are turned on at the same time. The inverter circuit and the power cutoff circuit are controlled by using the third operation mode in which the switching element of the upper arm of at least one leg is turned on, and the current is returned to the lower arm in the first operation mode. The switching element of the lower arm is turned on, and in the third operation mode, the switching element of the upper arm is turned on so as to return the current to the upper arm, and the control unit changes from the first operation mode to the third operation mode, or When transitioning from the third operation mode to the first operation mode, a second operation mode is provided between the first operation mode and the third operation mode, and the DC power supply and the inverter circuit cut off by the power cutoff circuit are cut off. The period is characterized in that all power supply to the inverter circuit is cut off.
Further, in the power conversion device according to the present invention, one end is connected to a power supply cutoff circuit to cut off the input from the DC power supply, and one end is connected to the other end of the power cutoff circuit to exchange power from the DC power supply. The inverter circuit includes an inverter circuit that converts electric power and a control unit that controls the inverter circuit and the power cutoff circuit. The inverter circuit consists of a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series. There are multiple legs connected in parallel to each other, and the control unit is out of the multiple legs during a period in which the power cutoff circuit cuts off the DC power supply and the inverter circuit, and is repeated periodically or intermittently. A first operation mode in which the switching element of the lower arm of at least one leg is turned on, and a second operation mode in which the switching elements of the upper arm and the lower arm of at least one leg of the plurality of legs are turned on at the same time. The inverter circuit and the power cutoff circuit are controlled by using the third operation mode in which the switching element of the upper arm of at least one leg is turned on, and the current is returned to the lower arm in the first operation mode. The switching element of the lower arm is turned on, and in the third operation mode, the switching element of the upper arm is turned on so as to return the current to the upper arm, and the control unit changes from the first operation mode to the third operation mode, or When transitioning from the third operation mode to the first operation mode, a second operation mode is provided between the first operation mode and the third operation mode, and an inverter circuit is provided between the power cutoff circuit and the inverter circuit. It is characterized in that it does not include a power storage device that supplies power.
Further, in the power conversion device according to the present invention, one end is connected to a DC power supply to cut off the input from the DC power supply, and one end is connected to the other end of the power cutoff circuit to exchange power from the DC power supply. The inverter circuit includes an inverter circuit that converts electric power and a control unit that controls the inverter circuit and the power supply cutoff circuit. The inverter circuit consists of a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series. It has a plurality of legs connected in parallel to each other, and the control unit is under at least one leg among the plurality of legs during the power supply cutoff period in which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit. A first operation mode in which the switching element of the arm is turned on, a second operation mode in which the switching elements of the upper arm and the lower arm of at least one leg of the plurality of legs are turned on at the same time, and at least one of the plurality of legs. A third operation mode in which the switching element of the upper arm of one leg is turned on, and an inverter circuit and a power supply cutoff circuit are controlled by using, and in the first operation mode, the switching element of the lower arm so as to return a current to the lower arm. Is turned on, and in the third operation mode, the switching element of the upper arm is turned on so as to return the current to the upper arm, and the control unit changes from the first operation mode to the third operation mode, or from the third operation mode to the third. When transitioning to one operation mode, a second operation mode is provided between the first operation mode and the third operation mode, and the period during which the DC power from the DC power supply is converted to AC power or the AC power from the electric motor is DC. It is characterized in that the power cutoff period is intermittently repeated during the power conversion period.
Further, in the power conversion device according to the present invention, one end is connected to a DC power supply to cut off the input from the DC power supply, and one end is connected to the other end of the power supply cutoff circuit to exchange power from the DC power supply. The inverter circuit includes an inverter circuit that converts electric power and a control unit that controls the inverter circuit and the power supply cutoff circuit. The inverter circuit consists of a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series. It has a plurality of legs connected in parallel to each other, and the control unit controls the lower arm of at least one of the plurality of legs during the period in which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit. A first operation mode in which the switching element is turned on, a second operation mode in which the switching elements of the upper arm and the lower arm of at least one leg of the plurality of legs are turned on at the same time, and at least one leg among the plurality of legs. The inverter circuit and the power supply cutoff circuit are controlled using the third operation mode in which the switching element of the upper arm is turned on, and in the first operation mode, the switching element of the lower arm is turned on so as to return the current to the lower arm. Then, in the third operation mode, the switching element of the upper arm is turned on so as to return the current to the upper arm, and the control unit moves from the first operation mode to the third operation mode or from the third operation mode to the first operation. In the case of transitioning to the mode, a second operation mode is provided between the first operation mode and the third operation mode, and the control unit shifts to the second operation mode with the power cutoff circuit turned off, and the first operation mode is provided. When transitioning from the operation mode to the third operation mode, the power cutoff circuit is turned off during the first operation mode and the power supply cutoff circuit is turned on during the third operation mode, or from the third operation mode. In the case of transitioning to the first operation mode, the power supply cutoff circuit is turned off during the third operation mode, and the power supply cutoff circuit is turned on during the first operation mode.
Further, in the power conversion device according to the present invention, one end is connected to a power supply cutoff circuit to cut off the input from the DC power supply, and one end is connected to the other end of the power supply cutoff circuit to exchange power from the DC power supply. The inverter circuit includes an inverter circuit that converts electric power and a control unit that controls the inverter circuit and the power supply cutoff circuit. The inverter circuit consists of a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series. It has a plurality of legs connected in parallel to each other, and the control unit controls the lower arm of at least one of the plurality of legs during the period in which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit. A first operation mode in which the switching element is turned on, a second operation mode in which the switching elements of the upper arm and the lower arm of at least one leg of the plurality of legs are turned on at the same time, and at least one leg among the plurality of legs. The inverter circuit and the power supply cutoff circuit are controlled using the third operation mode in which the switching element of the upper arm is turned on, and in the first operation mode, the switching element of the lower arm is turned on so as to return the current to the lower arm. Then, in the third operation mode, the switching element of the upper arm is turned on so as to return the current to the upper arm, and the control unit moves from the first operation mode to the third operation mode or from the third operation mode to the first operation. In the case of transitioning to the mode, a second operation mode is provided between the first operation mode and the third operation mode, and the control unit controls the inverter circuit by PWM control using a saw-wave carrier signal and a sinusoidal signal. However, in the second operation mode, the control unit further includes a fixed delay circuit that adds a predetermined delay to the signal generated by comparing and determining the sawwave carrier signal and the sinusoidal wave signal. It is a feature.
Further, in the power conversion device according to the present invention, one end is connected to a DC power supply to cut off the input from the DC power supply, and one end is connected to the other end of the power cutoff circuit to exchange power from the DC power supply. The inverter circuit includes an inverter circuit that converts electric power and a control unit that controls the inverter circuit and the power supply cutoff circuit. The inverter circuit consists of a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series. It has a plurality of legs connected in parallel to each other, and the control unit controls the lower arm of at least one of the plurality of legs during the period in which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit. A first operation mode in which the switching element is turned on, a second operation mode in which the switching elements of the upper arm and the lower arm of at least one leg of the plurality of legs are turned on at the same time, and at least one leg among the plurality of legs. The inverter circuit and the power supply cutoff circuit are controlled using the third operation mode in which the switching element of the upper arm is turned on, and in the first operation mode, the switching element of the lower arm is turned on so as to return the current to the lower arm. Then, in the third operation mode, the switching element of the upper arm is turned on so as to return the current to the upper arm, and the control unit moves from the first operation mode to the third operation mode or from the third operation mode to the first operation. In the case of transitioning to the mode, a second operation mode is provided between the first operation mode and the third operation mode, and the control unit uses the DC power supply and the inverter circuit as the power supply cutoff circuit based on the voltage value of the DC power supply. It is characterized by controlling the period for shutting off and the period for turning on the upper arm and the lower arm at the same time.
Further, in the power conversion device according to the present invention, one end is connected to a DC power supply to cut off the input from the DC power supply, and one end is connected to the other end of the power cutoff circuit to exchange power from the DC power supply. The inverter circuit includes an inverter circuit that converts electric power and a control unit that controls the inverter circuit and the power supply cutoff circuit, and the inverter circuit consists of a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series. It has a plurality of legs connected in parallel to each other, and the control unit controls the lower arm of at least one of the plurality of legs during the period in which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit. A first operation mode in which the switching element is turned on, a second operation mode in which the switching elements of the upper arm and the lower arm of at least one leg of the plurality of legs are turned on at the same time, and at least one leg among the plurality of legs. The inverter circuit and the power supply cutoff circuit are controlled using the third operation mode in which the switching element of the upper arm is turned on, and in the first operation mode, the switching element of the lower arm is turned on so as to return the current to the lower arm. Then, in the third operation mode, the switching element of the upper arm is turned on so as to return the current to the upper arm, and the control unit moves from the first operation mode to the third operation mode or from the third operation mode to the first operation. In the case of transitioning to the mode, a second operation mode is provided between the first operation mode and the third operation mode, and the control unit supplies power based on at least one control signal among the control signals for controlling the inverter circuit. It is characterized in that the cutoff circuit controls the timing of reconnecting the DC power supply and the inverter circuit.

Further, the electric motor system according to the present invention is characterized by including the above-mentioned power conversion device, a DC power supply, and an electric motor connected to the power conversion device.

According to the power conversion device and the motor system according to the present invention, it is possible to reduce the switching loss without using a resonance circuit.

It is a block diagram of the power conversion apparatus and the electric motor system of Embodiment 1 of this invention. It is an internal block diagram of the control part which concerns on the power conversion apparatus of Embodiment 1 of this invention. It is a time chart for operation explanation which concerns on the power conversion apparatus of Embodiment 1 of this invention. It is a partially enlarged view of the time chart for operation explanation which concerns on the power conversion apparatus of Embodiment 1 of this invention. It is a low loss switching operation explanatory diagram which concerns on the power conversion apparatus of Embodiment 1 of this invention. It is a schematic diagram for explaining the low loss switching operation which concerns on the power conversion apparatus of Embodiment 1 of this invention. It is operation | movement explanatory drawing of the comparative example which concerns on the power conversion apparatus of Embodiment 1 of this invention. It is a time chart for explaining the low loss switching operation which concerns on the power conversion apparatus of Embodiment 1 of this invention. It is an internal block diagram of the control part which concerns on the power conversion apparatus of Embodiment 2 of this invention. It is a block diagram of the power conversion apparatus and the electric motor system of Embodiment 3 of this invention. It is a block diagram which shows the structure of the power conversion apparatus and the electric motor system of Embodiment 4 of this invention. It is an internal block diagram of the control part which concerns on the power conversion apparatus of Embodiment 4 of this invention. It is an internal block diagram of the control part which concerns on the power conversion apparatus of Embodiment 5 of this invention.

Embodiment 1.
The power conversion device and the electric motor system according to the first embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing an overall configuration of the power conversion device and the electric motor system shown in the first embodiment. FIG. 2 is an internal block diagram of a control unit included in the power conversion device. 3 and 4 are time charts for explaining the operation of the power conversion device. FIG. 5 is an explanatory diagram of a low loss switching operation of the power conversion device. FIG. 6 is a schematic diagram for explaining the low loss switching operation of the power conversion device. FIG. 7 is an operation explanatory diagram of a comparative example. FIG. 8 is a time chart for explaining low-loss switching operation for one phase of the inverter of the power conversion device.

First, the overall configuration of the power conversion device and the electric motor system according to the first embodiment will be described with reference to FIG. The motor system shown in the first embodiment includes a motor drive device 1000 and a motor 130. The motor drive device 1000 includes a power conversion device 100 and a power storage device 120 which is a DC power source. Further, the power conversion device 100 includes a power supply cutoff circuit 10, an inverter circuit 20, and a control unit 30.

The motor drive device 1000 controls the motor 130. Here, the electric motor 130 is a load to which AC power is input / output, and is, for example, a motor or a motor generator. When the motor 130 is a motor, the motor drive device 1000 converts the power supplied from the power storage device 120 such as a lithium ion battery, a nickel hydrogen battery, or a capacitor, which is a DC power source, into AC by the power conversion device 100. , The converted electric power drives the electric motor 130, which is a motor.

The power conversion device 100 has a power cutoff circuit 10 having one end connected to the power storage device 120 and the other end connected to the inverter circuit 20 to cut off the input from the power storage device 120 to the inverter circuit 20, and one end to the power cutoff circuit. It includes an inverter circuit 20 that is connected to 10 and converts the input power from the power storage device 120 into AC power to supply power to the electric motor 130, and a control unit 30 that controls the power cutoff circuit 10 and the inverter circuit 20. .. The positive electrode bus 27 of the inverter circuit 20 is connected to the positive terminal of the power storage device 120 via the power cutoff circuit 10, and the negative electrode bus 28 is connected to the negative terminal of the power storage device 120 via the power supply cutoff circuit 10.

The electric motor system of the first embodiment can also be applied when the electric motor 130 operates as a generator. In this case, the electric motor 130 operating as a generator converts the power into AC power, and the power conversion device 100 converts the AC power into DC power and supplies the power to the power storage device 120 via the power cutoff circuit 10. .. That is, the electric motor system of the first embodiment can realize a small-sized and low-loss electric motor system regardless of the direction of the electric power transmitted by the power conversion device 100.

Next, the circuit configuration of each part of the power conversion device 100 will be described with reference to FIGS. 1 and 2. First, the power cutoff circuit 10 will be described.
The power cutoff circuit 10 plays a role of shutting off the inverter circuit 20 and the power storage device 120, and in the present embodiment, the switching unit 11 is provided on the positive electrode bus 17. The switching unit 11 includes a switching element 11a, and when the switching element 11a is turned off, the power storage device 120 as a DC power source and the inverter circuit 20 can be cut off. Although the configuration using the switching element is shown as the power supply cutoff circuit 10, the present invention is not limited to this, and a relay element or the like provided for the purpose of protection in the event of an abnormality such as the inverter circuit 20 may be used.

In this embodiment, the drain terminal of the switching element 11a and the cathode terminal of the antiparallel diode 11b are connected to the power storage device 120. Further, the other end of the switching unit 11 (the source terminal of the switching element 11a and the anode terminal of the antiparallel diode 11b) is connected to the positive electrode bus 17. In the power conversion device shown in the present embodiment, the configuration in which the switching unit 11 is provided on the positive electrode bus 17 side is shown, but the present invention is not limited to this, and the configuration is not limited to this, or the configuration is provided on the negative electrode bus 18 side, or the positive electrode bus 17 and It may be configured to be provided on both of the negative electrode bus 18.

In this embodiment, it is assumed that a MOSFET is used as the switching element. Further, in the first embodiment, the example in which the switching unit is composed of the switching element and the antiparallel diode is shown, but the antiparallel diode can be replaced by the parasitic diode of the switching element. Further, instead of the MOSFET, an IGBT (integrated gate bipolar transistor) or other switching element may be applied. Further, the switching element is not limited to the silicon single element semiconductor, and a compound semiconductor to which silicon carbide, gallium nitride or the like is applied can also be applied.

Next, the inverter circuit 20 will be described.
The inverter circuit 20 is a three-phase inverter to which PWM (Pulse Width Modulation) control is applied, and two arms having switching elements are connected in series to form a leg, and the three legs are connected in parallel to each other. .. Here, of the two arms connected in series, the arm on the positive electrode bus 17 side is referred to as an upper arm, and the arm on the negative electrode bus 18 side is referred to as a lower arm. In FIG. 1, the inverter circuit 20 has first to third upper arms 21, 23, 25 and first to third lower arms 22, 24, 26. The first upper arm 21 and the first lower arm 22 form the first leg, the second upper arm 23 and the second lower arm 24 form the second leg, and the third upper arm 25 and the third lower arm. 26 constitutes the third leg. Further, each arm includes a switching element and an antiparallel diode. For example, the first upper arm 21 includes a switching element 21a and an antiparallel diode 21b.

The drain terminal of the switching element 21a is connected to the positive electrode bus 17, and the source terminal of the switching element 21a is connected in series with the drain terminal of the switching element 22a. Further, the source terminal of the switching element 22a is connected to the negative electrode bus 18. Similarly, the drain terminals of the switching element 23a and the switching element 25a are connected to the positive electrode bus 17, and the source terminals are connected in series with the drain terminals of the switching element 24a and the switching element 26a, respectively. Further, the source terminals of the switching element 24a and the switching element 26a are connected to the negative electrode bus 18.

In the present embodiment, the first leg consisting of the first upper arm 21 and the first lower arm 22 is the U phase, and the second leg consisting of the second upper arm 23 and the second lower arm 24 is the V phase, the third. The third leg, which consists of the upper arm 25 and the third lower arm 26, corresponds to the W phase. The connection point between the first upper arm 21 and the first lower arm 22 is connected to the U-phase terminal 130a of the motor 130, and the connection point between the second upper arm 23 and the second lower arm 24 is the connection point of the motor 130. It is connected to the V-phase terminal 130b. Further, the connection point between the third upper arm 25 and the third lower arm 26 is connected to the W phase terminal 130c of the motor 130.

In the present embodiment, a case where a three-phase inverter is used as the inverter circuit 20 will be described, but the present invention is not limited to this, and a two-phase inverter or a multi-phase inverter having four or more phases may be used. That is, the present invention can be applied when the number of legs constituting the inverter circuit is two or more.

Next, the control unit 30 will be described.
The control unit 30 includes a reference signal generation circuit 40, a sawtooth wave carrier generation circuit 50, a control signal generation circuit 60, and a gate drive circuit unit 70. The reference signal generation circuit 40 includes a sinusoidal signal generation source 41 and phase shifters 42a and 42b. The control signal generation circuit 60 includes comparators 61a to 61e, inverting circuits 62a to 62c, fixed delay circuits 63a to 63c, and an adder circuit 64. The gate drive circuit unit 70 includes gate drive circuits 70a to 70g.

Here, the interface of the control signal between the control unit 30, the power cutoff circuit 10, the inverter circuit 20, and the motor 130 will be described. The gate control signal 30a of the control unit 30 is connected to the gate terminal of the switching element 11a. Further, the gate control signals 30b to 30g are connected to the respective gate terminals of the switching elements 21a to 26a. Here, the control signal given to the gate terminal of each switching element is given with reference to the source terminal of each switching element, and there is actually a connection wiring with each source terminal. In No. 1, the illustration is omitted.

Next, the control and circuit operation of the control unit 30 will be described. FIG. 2 is an internal block diagram of the control unit 30, and describes a method of generating gate control signals 30b to 30g of the switching elements 21a to 26a.
Generally, it is known that the PWM control of the inverter is realized by using the carrier signal and the reference signal. In the power conversion device and the electric motor system shown in the present embodiment, an example in which the sawtooth wave carrier signal 50a is generated by the sawtooth wave carrier generation circuit 50 as a carrier signal is shown. Further, as a reference signal, an example in which a sine wave is generated by the sine wave signal generation source 41 in the reference signal generation circuit 40 is shown. Based on this reference signal, the phase shifters 42a and 42b generate + 2 / 3π and + 4 / 3π phase-shifted signals. In the present embodiment, the sine wave reference signals 40a, 40b, and 40c are used when generating U-phase, V-phase, and W-phase gate control signals of the motor 130, respectively.

As shown in FIG. 2, the control unit 30 compares and determines the sawtooth carrier signal 50a and the sine wave reference signals 40a to 40c by the comparators 61a to 61c, respectively, and controls the upper arm and the lower arm of each phase. Generated. For example, the gate control signal 30b of the switching element 21a of the first upper arm 21 of the U phase (first leg) is generated by amplifying the output of the comparator 61a by the gate drive circuit 70b. On the other hand, in the gate control signal 30c of the switching element 22a of the first lower arm 22 of the U phase (first leg), the output of the comparator 61a is logically inverted by the inverting circuit 62a, and this signal is logically inverted by the fixed delay circuit 63a for a predetermined time. It is generated by adding a delay of the above and amplifying it by the gate drive circuit 70c. The same applies to the V phase (second leg) and the W phase (third leg). As a result, the gate control signals 30b to 30g of FIG. 3, which will be described later, are generated. The predetermined time to be delayed by the fixed delay circuits 63a to 63c is the charge of the parasitic input capacitance and output capacitance of the switching unit 11, the upper arms 21, 23, 25 of each phase, and the lower arms 22, 24, 26 of each phase. Determined from the time constant of discharge.

On the other hand, the gate control signal 30a of the switching element 11a of the power supply cutoff circuit 10 is generated based on the comparison determination result of the reference signals Vref1 and Vref2 and the sawtooth wave carrier signal 50a by the comparators 61d and 61e. Specifically, the comparator 61d determines a state in which the sawtooth wave carrier signal 50a is larger than the positive reference signal Vref1. On the other hand, the comparator 61e determines a state in which the sawtooth wave carrier signal 50a is smaller than the negative reference signal Vref2. The outputs of the comparator 61d and the comparator 61e are added by the adder circuit 64. As a result, the output of the adder circuit 64 is in the H state in the period before and after the point where the value of the sawtooth carrier signal 50a is reset (the point where the differential value becomes discontinuous). The output of the adder circuit 64 is amplified by the gate drive circuit 70a to generate a gate control signal 30a.

The gate drive circuits 70a to 70g of the gate drive circuit unit 70 are provided with an isolated interface and an isolated power supply because the source potentials of the switching elements driven by the gate drive circuits 70a to 70g are different from each other.

Next, the operation of the power supply cutoff circuit 10 of the power conversion device 100 shown in the present embodiment will be described with reference to FIG.
FIG. 3 is a time chart for explaining the operation of the power supply cutoff circuit in the power conversion device shown in the present embodiment, and schematically shows a signal waveform. In FIG. 3, the sine wave reference signals 40a to 40c indicate the sine wave reference signals corresponding to the U phase, the V phase, and the W phase. The gate control signal 30a is a gate control signal of the switching element 11a. The gate control signals 30b to 30g indicate gate control signals of the switching elements 21a to 26a of the upper arm and the lower arm of each leg. Further, Vbus is the voltage of the positive electrode bus 17. Further, R represents a reset of the sawtooth carrier signal 50a.

As shown in FIG. 3, the switching element 11a of the power supply cutoff circuit 10 is kept on for the switching of the switching elements 21a to 26a during the rising period of the sawtooth carrier signal 50a. Therefore, the power cutoff operation is not performed during this period. Further, in order to prevent a short circuit between the switching element of the upper arm and the switching element of the lower arm (for example, 21a and 22a) connected in series, the fixed delay circuits 63a to 63c provide a dead time for a predetermined period (hereinafter referred to as a positive dead time). Is secured. The circuit operation during the rising period of the sawtooth wave carrier signal 50a is the same as that of the conventional general three-phase inverter control.

On the other hand, by adopting the sawtooth wave carrier signal 50a, all of the switching elements 21a to 26a are switched to operate when the sawtooth wave is reset, but the period before and after that (power cutoff period Pr in FIG. 3) is used as the power supply. The switching element 11a of the cutoff circuit 10 is set as the off period.

As described above, the power cutoff period Pr is generated by adding the period in which the sawtooth wave carrier signal 50a is larger than the positive reference signal Vref1 and the period in which the sawtooth wave carrier signal 50a is smaller than the negative reference signal Vref2 by the addition circuit 64. By switching the switching elements 21a to 26a of the inverter circuit 20 during this power supply cutoff period Pr, low loss switching of three phases can be realized.

Next, the features of the power cutoff circuit 10 of the present embodiment and their effects will be described with reference to FIGS. 4 to 8.
FIG. 4 is an easy-to-understand enlargement of the range A shown by the one-point diagonal line centering on the power cutoff period Pr shown in FIG. Further, the current paths of the inverter circuit 20 in the period before and after the power cutoff period Pr shown in FIG. 4 are shown in FIGS. 5 (a) and 5 (b), respectively. By adopting a carrier signal having a reset shape (a shape in which the sign of the signal is immediately inverted) like a sawtooth wave, the upper arm recirculation from the lower arm recirculation mode (FIG. 5A) when the carrier signal is reset. It can be controlled to transition to the mode (FIG. 5 (b)). Further, the fixed delay circuits 63a to 63c provide a period (hereinafter, negative dead time) in which the switching elements (for example, 21a and 22a) of the upper arm and the lower arm of the inverter circuit 20 are simultaneously turned on during the power supply cutoff period Pr. By providing this negative dead time, the voltage Vbus of the positive electrode bus 17 can be reduced to zero voltage, and a low loss switching operation can be realized.

The transition of the recirculation current from FIG. 5 (a) to FIG. 5 (b) will be described with reference to FIG. 6, which is a schematic diagram for explaining the low loss switching operation. FIG. 6 is a schematic diagram for explaining the low loss switching operation in an easy-to-understand manner, and the reference numerals are omitted. 6 (a) to 6 (c) are diagrams showing the transition from FIG. 5 (a) to FIG. 5 (b), and FIG. 6 (d) corresponds to FIG. 5 (b).

FIG. 6A is a state in which the switching element 11a of the switching unit 11 is turned off from the state of FIG. 5A. Here, the state shown in FIG. 6A is referred to as a first operation mode. The first operation mode is the state before batch switching, and is the state of the lower arm return mode as in FIG. 5A. That is, the switching elements 22a, 24a, 26a of the lower arm of each phase are in the on state (the switching elements 21a, 23a, 25a of the upper arm of each phase are in the off state), as shown in FIG. 6A. In addition, it is a recirculation mode in which a current is recirculated between the lower arms 22, 24, 26 of each phase in the ON state of the inverter circuit 20 and the motor 130. Here, in FIG. 5A, the switching element 11a is turned off, but the drain-source voltage thereof does not increase, and therefore the parasitic capacitance maintains the discharged state. That is, the switching element 11a is turned off at zero current.

FIG. 6B shows a state in which the switching elements 21a, 23a, 25a of the upper arm of each phase are turned on from the state of FIG. 6A. Here, the state shown in FIG. 6B is referred to as a second operation mode. In the second operation mode, the switching elements 21a to 26a of the upper arm and the lower arm of all the phases of the inverter circuit 20 are turned on at the same time. Here, the path of the current that charges and discharges the parasitic capacitance of the switching portion shown by the broken line in the figure is shown by the dotted line. That is, since the upper arms 21, 23, 25 of each phase that were in the off state in the first operation mode are charged with the parasitic capacitance, the charge of these parasitic capacitances is discharged by the on operation. It will be. At the stage where the upper and lower arms are turned on at the same time in FIG. 6 (b), the dotted charging path in FIG. 6 (b) is formed in the parasitic capacitance of the switching unit 11, so that the voltage Vbus of the positive electrode bus 17 becomes zero voltage. descend. At this time, the switching elements 21a, 23a, 25a of the upper arm of each phase turn on with a zero current, and the current returns to the upper arm and the lower arm of each phase.

Next, FIG. 6 (c) shows a state in which the switching elements 22a, 24a, 26a of the lower arm are turned off from the state of FIG. 6 (b). Here, the state shown in FIG. 6C is referred to as a third operation mode. In the third operation mode, the switching elements 21a, 23a, and 25a of the upper arms of each phase of the inverter circuit 20 are turned on at the same time, and the current flows back through the upper arms of each phase. Here, at the stage when the switching elements 22a, 24a, 26a of the lower arm of each phase are turned off, the voltage Vbus of the positive electrode bus 17 is at zero voltage, so that the switching elements 22a, 24a, 26a of the lower arm of each phase are Switch at zero voltage. After that, when the switching element 11a is turned on (FIG. 6 (d)), the parasitic capacitance of the switching unit 11 is discharged along the dotted line path in the figure, while the lower arms 22, 24, 26 of each phase are the dotted line in the figure. As a result, the voltage Vbus of the positive electrode bus 17 rises. At this timing, the reflux current of the inverter circuit completely shifts from the lower arm to the upper arm. Even in the on operation of the switching element 11a, the switching element 11a turns on with a zero current.

As described above, since the switching operation of each element of FIGS. 6A to 6D switches to zero current or zero voltage, low loss switching can be realized. Here, in the conventional soft switching technique, the voltage Vbus of the positive electrode bus 17 is increased and decreased by the resonance principle. On the other hand, in the present invention, the voltage Vbus of the positive electrode bus 17 is lowered by the simultaneous on operation of the upper arm and the lower arm of the inverter circuit in the second operation mode, and the reconnection operation of the switching unit 11 (on operation of the switching element 11a). The difference is that it raises Vbus. This eliminates the need for a resonance circuit and makes it possible to reduce the size of the circuit. Further, in the conventional soft switching technology, the drop period of Vbus has to be increased depending on the load power (for example, 10 μs), whereas in the present invention, it can be made sufficiently small regardless of the resonance period (for example, 1 μs). Less than), therefore, the deterioration of the output performance of the motor due to the decrease of the effective output voltage of the inverter can be suppressed.

In the above, the case where the switching elements 22a, 24a, 26a of the lower arm of each phase are all turned on in the first operation mode is shown, but it is not always necessary to turn on all of them. For example, in the example shown in FIG. 6A, even when the switching element 24a is turned off, reflux can be performed via the antiparallel diode 24b connected in antiparallel to the switching element 24a. The same applies to the second operation mode and the third operation mode. In the second operation mode, the switching elements 21a, 23a, 25a of the upper arm of each phase and the switching elements 22a, 24a, 26a of the lower arm of each phase are used. , It doesn't have to be all on. Further, even in the third operation mode, it is not always necessary to turn on all the switching elements 21a, 23a, 25a of the upper arm of each phase.

Here, the reason why it is necessary to provide a negative dead time for turning on the upper arm and the lower arm of each phase when realizing the low loss switching operation will be described with reference to FIG. 7, which is a comparative example.
FIG. 7 shows an inverter in a state where a general positive dead time period is provided when transitioning from FIG. 5 (a) to FIG. 5 (b), that is, in a state where all the switching elements 21a to 26a of the inverter circuit are turned off. It is a figure which shows the current path of a circuit. In this case, the load current flows through the antiparallel diode of the inverter circuit 20. As a result, the load current is regenerated to the power supply via the antiparallel diode 11b of the switching unit 11. That is, even if the switching element 11a is in the off state, the voltage Vbus of the positive electrode bus 17 rises during the positive dead time period when transitioning from FIG. 5 (a) to FIG. 5 (b), and therefore zero voltage switching. Operation cannot be realized. Therefore, when a general positive dead time period is provided, a large-scale resonance is performed in order to pass the load current during the positive dead time period in the resonance circuit in order to realize the soft switching operation. You need to add a circuit.

Further, the operation of the power cutoff circuit 10 of the present embodiment will be described with reference to FIG. 1 with reference to FIG. FIG. 8 is a diagram schematically showing a low loss switching waveform in the power supply cutoff period Pr of FIG. 4 by taking the U phase as an example.
In FIG. 8, the gate control signals 30b and 30c are gate control signals of the switching elements 21a and 22a of the upper arm and the lower arm of the U phase. The gate control signal 30a is a gate control signal of the switching element 11a. Further, Vbus is the voltage of the positive electrode bus 17. Ia (dashed line) is the current flowing through the antiparallel diode 21b of the U-phase upper arm (first upper arm 21), and Vka (solid line) is the voltage between the terminals of the antiparallel diode 21b of the U-phase upper arm. Id (dashed line) is the current flowing through the switching element 22a of the U-phase lower arm (first lower arm 22), and Vds (solid line) is the voltage between the source and drain of the switching element 22a of the U-phase lower arm. .. Further, "HS" indicates normal switching, and "SS" indicates low loss switching.

During this power cutoff period Pr, the switching element 22a of the U-phase lower arm transitions from on to off. Along with this, the antiparallel diode 21b of the U-phase upper arm transitions from off to on, and all the current Ia flows to the antiparallel diode 21b. In FIG. 8, the transition from on to off of the switching element 22a of the U-phase lower arm corresponds to the change of on to off of the gate control signal 30c (gate control signal of the switching element 22a of the U-phase lower arm). Since this low-loss switching is switching in a state where the voltage Vbus of the positive electrode bus 17 is a zero voltage as described above, zero-voltage switching in which no switching loss occurs can be realized.

The normal switching (HS) is switching when a general positive dead time period is provided, and specifically, switching from off to on of the switching element 22a of the U-phase lower arm. Here, the change in the current (Ia) flowing through the antiparallel diode 21b of the U-phase upper arm and the terminal voltage (Vka) of the antiparallel diode 21b of the U-phase upper arm is changed from the off of the switching element 22a of the U-phase lower arm. This indicates that the antiparallel diode 21b of the U-phase upper arm transitions from on to off as it transitions to on.

As described above, the power conversion device and the electric motor system shown in the present embodiment can reduce the loss of the inverter operation at the time of resetting the sawtooth wave carrier signal and suppress the switching loss generated in the power supply cutoff circuit 10. The switching of the inverter that occurs when the sawtooth carrier signal is reset is 1/2 of the total number of times. Therefore, in the first embodiment, the switching loss of the inverter circuit 20 can be reduced to 1/2. On the other hand, the loss generated in the power cutoff circuit 10 is mainly the conduction loss of the switching element 11a, but this conduction loss can be further reduced by parallelizing the switching element 11a.

As described above, in the power conversion device and the electric motor system shown in the first embodiment, the inverter is changed from the lower arm recirculation mode to the upper arm recirculation mode by adopting a carrier signal having a reset shape such as a saw wave carrier signal. A transition operation mode is provided, and at this timing, the switching element 11a of the power supply cutoff circuit is turned off and a negative dead time period is provided for the control of the upper and lower arms of the inverter to prevent the power storage device 120 from regenerating and reduce the resonance current. It realizes low loss switching without flowing.

Therefore, the carrier signal applied in the first embodiment is not limited to the sawtooth wave shape, and can be applied to all carrier signals that provide an operation mode for transitioning from the lower arm reflux to the upper arm reflux.

Further, in the first embodiment, it is fixed as a means to give a positive dead time to the switching during the period in which the sawtooth carrier signal rises and to give a negative dead time to the switching at the time of resetting the sawtooth carrier signal. The configuration using the delay circuits 63a to 63c is illustrated. However, it is not limited to this. Further, in the first embodiment, the case of transitioning from the lower arm reflux to the upper arm reflux is illustrated, but the transition from the upper arm reflux to the lower arm reflux is performed by exchanging the + input and the − input of the comparators 61a to 61c. You may.

In the first embodiment, a power storage device is assumed as a DC power source. However, it may be a direct current power source obtained by converting AC power into direct current by an inverter. Further, it may be a photovoltaic power generation device, a fuel cell, or a generator capable of direct current output.

Further, in the first embodiment, the application of the low loss switching (negative dead time) of the power conversion device 100 has been described with an example of the direction in which the current flows from the power storage device 120 to the electric motor 130. However, the low loss switching (negative dead time) of the power converter 100 can be similarly applied even in the case where a current flows from the electric motor 130 as a generator to the power storage device 120. That is, a power conversion device that realizes loss reduction without adding a resonance circuit by applying low loss switching (negative dead time) regardless of the direction of the current flowing through the power conversion device 100, and the use thereof. The electric power system that was used can be configured.

As described above, the power conversion device and the electric motor system according to the first embodiment are a power supply cutoff unit connected between the DC power supply and the inverter circuit, and a control unit for controlling the inverter circuit and the power supply cutoff unit. The control unit turns on the switching element of the lower arm of at least one of the plurality of legs during the period in which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit. One operation mode, a second operation mode in which the switching elements of the upper arm and the lower arm of at least one leg among the plurality of legs are turned on at the same time, and the switching element of the upper arm of at least one leg among the plurality of legs. By controlling the inverter circuit and the power supply cutoff circuit using the third operation mode to be turned on, the circuit can be miniaturized and the loss can be reduced. Further, it is possible to suppress a decrease in the effective output voltage due to an increase in the zero voltage period of the inverter output, and thus suppress a decrease in the output characteristics of the motor.

Embodiment 2.
Compared with the power conversion device and the electric machine system of the first embodiment, the power conversion device and the electric power system of the second embodiment have a delay time of a gate control signal of a switching element of an upper arm and a lower arm of an inverter circuit and a power supply cutoff circuit. The configuration is such that the period for disconnecting the power storage device and the inverter circuit is reduced, and therefore the zero voltage period of the inverter output is shortened. The configuration of the power conversion device and the motor system according to the second embodiment is the same as that shown in FIG. 1, and the description thereof will be omitted.

Hereinafter, the power conversion device of the second embodiment will be described focusing on the difference from the first embodiment based on FIG. 9, which is an internal block diagram of the control unit. In FIG. 9, the same or corresponding parts as those in FIG. 2 of the first embodiment are designated by the same reference numerals. In order to distinguish it from the first embodiment, the power conversion device 200, the control unit 230, and the control signal generation circuit 260 are used.

First, the configuration of the control unit 230 of the power conversion device 200 will be described with reference to FIG.
The difference in configuration between the control unit 230 of the second embodiment and the control unit 30 of the first embodiment is the control signal generation circuit 260. In the control signal generation circuit 260, the fixed delay circuits 63a to 63c of the control signal generation circuit 60 of the first embodiment are used as variable delay circuits 263a to 263c, and a power supply voltage detection circuit 51 and a cutoff period adjustment circuit are added.

Compared with the control signal generation method according to the first embodiment shown in FIG. 2, in the control unit 230 shown in FIG. 9, the variable delay circuits 263a to 263c are the voltage detection values of the power storage device 120 detected by the power supply voltage detection circuit 51. The delay time is varied according to 51a. Further, the cutoff period adjusting circuit 66 adjusts the reference voltages of the comparators 61d and 61e according to the voltage detection value 51a. As a result, in the first embodiment, a predetermined delay time and power cutoff period are given, whereas in the second embodiment, the delay time can be optimized according to the voltage value of the power storage device. That is, the parasitic capacitance of the switching unit 11, the first to third upper arms 21, 23, 25 and the first to third lower arms 22, 24, 26 changes according to the voltage value of the power storage device. , The delay time is given in consideration of the change in the rising and falling times of the voltage Vbus of the positive electrode bus 17. As a result, since the dead time can be minimized, there is an effect that the decrease in power conversion efficiency due to the addition of the dead time can be suppressed.

In the second embodiment, the configuration in which the power supply voltage detection circuit 51 is used as a method for detecting the state of the power storage device 120 is exemplified, but a method for detecting the current value supplied from the power storage device 120 may also be used. In this case, as the input signal of the power supply voltage detection circuit, the measured value of the current flowing through the positive electrode bus 17 acquired by using a current transformer or the like can be used.

In the second embodiment, the configuration and operation other than the control signal generation circuit 260 are the same as those in the first embodiment, and thus the description thereof will be omitted.

As described above, in the power conversion device and the electric motor system according to the second embodiment, the delay time and the power supply cutoff period of the gate control signals of the switching elements of the upper arm and the lower arm of the power conversion device shown in the first embodiment. Is configured to be changed according to the state of the power storage device. Therefore, the power conversion device of the second embodiment and the electric motor system using the same can realize the loss reduction as in the first embodiment and without using the resonance circuit. Further, there is an effect that the decrease in power conversion efficiency due to the addition of dead time and the decrease in the effective output voltage of the inverter can be suppressed.

Embodiment 3.
In the power conversion device and the electric motor system according to the third embodiment, the delay time of the gate control signal of the switching element of the switching element of the upper arm and the lower arm of the inverter circuit and the delay time of the gate control signal are the same as those of the power conversion device and the electric motor system shown in the second embodiment. The power supply cutoff circuit reduces the period during which the power storage device and the inverter circuit are cut off, and shortens the zero voltage period of the inverter output. The configuration of the power conversion device and the motor system according to the third embodiment is the same as that shown in FIG. 1, and the description thereof will be omitted.

Hereinafter, the power conversion device of the third embodiment will be described focusing on the difference from the second embodiment based on FIG. 10, which is an internal block diagram of the control unit. In FIG. 10, the same or corresponding portions as those in FIG. 9 of the second embodiment are designated by the same reference numerals. In order to distinguish it from the second embodiment, the power conversion device 300, the control unit 330, and the control signal generation circuit 360 are used.

First, the configuration of the control unit 330 of the power conversion device 300 will be described with reference to FIG. The difference in the configuration between the control unit 330 of the third embodiment and the control unit 230 of the second embodiment is that the power supply voltage detection circuit 51 is deleted and the control signal generation circuit 360 is configured.

Compared with the control signal generation method according to the second embodiment shown in FIG. 9, in FIG. 10, the variable delay circuits 263a to 263c determine the output voltage of the gate drive circuit 70a for driving the switching element 11a. The delay time is variable according to the output voltage of. Further, the cutoff period adjusting circuit 66 adjusts the reference voltages of the comparators 61d and 61e according to the output voltage of the gate determination circuit 267b for determining the output voltage of the gate driving circuit 70g for driving the switching element 26a. As a result, in the second embodiment, the delay time is optimized according to the voltage value of the power storage device, whereas in the third embodiment, the timing at which the gates of the switching elements 11a and 26a are completely turned off is detected and the delay is delayed. You can optimize the time. Specifically, as soon as the power storage device 120 and the inverter circuit 20 are cut off, the upper arms 21, 23, 25 and the lower arms 22, 24, 26 of the inverter circuit 20 are simultaneously turned on, and the upper arm of the inverter circuit 20 is turned on. As soon as the simultaneous ON state of the arms 21, 23, 25 and the lower arms 22, 24, 26 is released, the power storage device 120 and the inverter circuit 20 are adjusted to be reconnected. As a result, since the dead time can be minimized, there is an effect that the decrease in power conversion efficiency due to the addition of the dead time can be suppressed.

In the third embodiment, an example of determining the gate voltage of the switching element 26a as a method of detecting the timing at which the upper arms 21, 23, 25 and the lower arms 22, 24, 26 of the inverter circuit are released from the simultaneous ON state is determined. However, a method of determining the gate voltage of other lower arm switching elements or a method of determining the gate voltage of all lower arm switching elements may be used.

In the third embodiment, the configuration and operation other than the control signal generation circuit 360 are the same as those in the first embodiment, and thus the description thereof will be omitted.

As described above, in the power conversion device of the third embodiment, the delay time and the power supply cutoff period of the gate control signal of the switching element of the upper arm and the lower arm of the power conversion device of the first embodiment are set to the gate of the switching element. The configuration is optimized according to the discharge time. Therefore, the power conversion device of the third embodiment and the electric motor system using the same can realize the loss reduction as in the first embodiment and without using the resonance circuit. Further, there is an effect that the decrease in power conversion efficiency due to the addition of dead time and the decrease in the effective output voltage of the inverter can be suppressed.

Embodiment 4.
The power conversion device and the electric motor system of the fourth embodiment have two groups of X group and Y group of the inverter circuit and the electric motor of the power conversion device and the electric motor system of the first embodiment.

Hereinafter, regarding the power conversion device and the motor system of the fourth embodiment, based on FIG. 11 which is a block diagram showing the configuration of the power conversion device and the motor system, and FIG. 12 which is an internal block diagram of the control unit of the power conversion device. , The difference from the first embodiment will be mainly described. In FIGS. 11 and 12, the same or corresponding portions as those in FIGS. 1 and 2 of the first embodiment are designated by the same reference numerals. In order to distinguish it from the first embodiment, the motor system 4000, the power conversion device 400, the inverter circuits 420X and 420Y, the control unit 430, the reference signal generation circuit 440, and the control signal generation circuit 460 are used. Further, in FIG. 12, the gate drive circuit unit is omitted in order to simplify the drawing.

First, the overall configuration of the motor system 4000 and the power conversion device 400 of the fourth embodiment will be described with reference to FIG.
The electric power system 4000 converts the electric power supplied from the power storage device 120 into alternating current by the power conversion device 400, and drives the two electric motors 130X and 130Y which are motors with the converted electric power. The power conversion device 400 includes inverter circuits 420X and 420Y that supply electric power to the two electric powers 130X and 130Y, which are loads, and a power supply cutoff circuit 10 connected between the inverter circuits 420X and 420Y and the power storage device 120, respectively. It includes a power cutoff circuit 10 and a control unit 430 that controls the inverter circuits 420X and 420Y. Hereinafter, the motor 130X and the inverter circuit 420X, and the motor 130Y and the inverter circuit 420Y will be referred to as a group X and a group Y, respectively.

Since the configurations and operations of the power cutoff circuit 10 and the inverter circuits 420X and 420Y are the same as those of the power cutoff circuit and the inverter circuit 20 shown in the first embodiment, the description thereof will be omitted.

Next, the control unit 430 will be described.
The control unit 430 includes a reference signal generation circuit 440, a sawtooth wave carrier generation circuit 50, a control signal generation circuit 460, and a gate drive circuit unit (not shown). In the reference signal generation circuit 440, phase shifters 443a to 443c are added for the inverter circuit 420Y to the reference signal generation circuit 40 of the first embodiment. The sine wave reference signals 40aY, 40bY, and 40cY for the inverter circuit 420Y correspond to the U phase, V phase, and W phase of the inverter circuit 420Y (that is, the electric motor 130Y), respectively. The phase shifter 443a shifts the phase by θ with respect to the reference signal generated by the sine wave signal generation source 41. Therefore, the phases of the sine wave reference signals 40aY, 40bY, and 40cY are phase-shifted with respect to the sine wave reference signals 40aX, 40bX, and 40cX for the inverter circuit 420X (that is, the electric motor 130X).

The control signal generation circuit 460 has a configuration corresponding to two inverter circuits 420X and 420Y with respect to the control signal generation circuit 60 of the first embodiment. Each configuration and operation is the same as that of the first embodiment. That is, the control signal generation circuit 460 includes comparators 61aX to 61cX, inverting circuits 62aX to 62cX, and fixed delay circuits 63aX to 63cX corresponding to the inverter circuit 420X. Further, the control signal generation circuit 460 includes comparators 61aY to 61cY, inverting circuits 62aY to 62cY, and fixed delay circuits 63aY to 63cY corresponding to the inverter circuit 420Y.

When the two groups of motors (130X, 130Y) are driven by the two groups of inverter circuits (420X, 420Y), the sine wave reference signals of each phase of the two groups of inverter circuits are given in different phases to the power storage device 120. It is common to disperse the generated ripple current. In the fourth embodiment, the phase difference is θ. On the other hand, as the sawtooth wave carrier signal 50a, the same signal is used in the X group and the Y group. By using the same carrier signal, the X group and the Y group are switched at the same time when the sawtooth carrier signal is reset, so that the gate control signal of the power supply cutoff circuit can be generated in the same manner as in FIG. That is, it is possible to suppress an increase in the operating frequency of the power cutoff circuit and suppress an increase in the control load.

In the fourth embodiment, since the inverter circuits 420X and 420Y and the motors 130X and 130Y have a two-group configuration, the total output torque of the motor can be improved. Further, by designing one electric motor mainly for driving and the other electric motor mainly for power generation, both the driving and power generation functions can be optimally realized.

In the fourth embodiment, an example in which the inverter circuit and the motor have a two-group configuration is shown, but the same can be applied to a multi-group configuration having a three-group configuration or more.

As described above, the power conversion device and the electric motor system of the fourth embodiment have the inverter circuit and the electric motor of the power conversion device and the electric motor system of the first embodiment in two groups of X group and Y group. .. Therefore, the power conversion device of the fourth embodiment and the electric motor system using the same can realize the miniaturization and loss reduction of the circuit to be added as in the first embodiment. Furthermore, it is possible to improve the total output torque of the motor and optimize both the drive and power generation functions.

Embodiment 5.
The power conversion device and the motor system of the fifth embodiment are configured to provide a phase difference φ in the sawwave carrier signals of the two groups of inverter circuits with respect to the power conversion device and the motor system of the fourth embodiment. ..

Hereinafter, the power conversion device and the electric motor system of the fifth embodiment will be described focusing on the differences from the fourth embodiment based on FIG. 13, which is an internal block diagram of the power conversion device. In FIG. 13, the same or corresponding portions as those in FIG. 12 of the fourth embodiment are designated by the same reference numerals. In order to distinguish it from the fourth embodiment, the power conversion device 500, the control unit 530, and the control signal generation circuit 560 are used. In FIG. 13, the gate drive circuit unit is omitted in order to simplify the drawing.

First, the overall configuration of the electric motor system and the power conversion device 500 of the fifth embodiment is the same as that of the electric motor system 4000 and the power conversion device 400 of the fourth embodiment. That is, the electric motor system converts the electric power supplied from the power storage device 120 into alternating current by the electric power conversion device 500, and drives the two electric motors which are motors with the converted electric power.

Next, the control unit 530 will be described.
The difference from the control unit 430 of the fourth embodiment is the control signal generation circuit 560. First, the difference in configuration will be described. In the control signal generation circuit 560, a phase shifter 565 and an addition circuit 566 are added to the control signal generation circuit 460 of the fourth embodiment. The phase shifter 565 shifts the sawtooth carrier signal 50a generated by the sawtooth carrier generation circuit 50 by the phase difference φ and uses it as the sawtooth carrier signal (50aX) for the X group. Further, in the adder circuit 566, the sawtooth wave carrier signal 50a (50aY) and the sawtooth wave carrier signal (50aX) for the X group shifted by the phase difference φ are added, and the outputs thereof are input to the comparators 61d and 61e. ing.
In FIG. 13, the signal is the same as the sawtooth carrier signal 50a, but is described as the sawtooth carrier signal 50aY in order to clarify the correspondence with the sawtooth carrier signal 50aX.

Next, the operation of the power conversion device 500 will be described focusing on the difference from the power conversion device 400 of the fourth embodiment.
The phase difference φ is given for the purpose of dispersing the ripple current and noise generated in the power storage device 120. In this case, since the reset timings of the sawtooth wave carrier signal 50aX and the sawtooth wave carrier signal 50aY of the X group and the Y group of the inverter circuit are different, it is necessary to operate the power supply cutoff circuit at both reset timings. Therefore, in the fifth embodiment, the sawtooth wave carrier signal 50aX and the sawtooth wave carrier signal 50aY are added by the adder circuit 566 and input to the comparators 61d and 61e. Therefore, the operating frequency of the power supply cutoff circuit 10 is double that of the power conversion device shown in the fourth embodiment, and the loss of the power supply cutoff circuit 10 is also doubled.

In the conventional method, the loss of the resonance circuit becomes a problem, and it is considered necessary to take measures such as providing resonance circuits individually for the inverter circuits X group and Y group, for example.
On the other hand, in the motor system of the fifth embodiment, the same power cutoff circuit can be applied to the inverter circuits X group and Y group that switch at different timings by deleting the resonance circuit.

Since the configuration and operation of the control unit 530 of the fifth embodiment other than the control signal generation circuit 560 are the same as those of the fourth embodiment, the description thereof will be omitted.

In the fifth embodiment, an example in which the inverter circuit and the electric motor have a two-group configuration is shown, but even in a multi-group configuration having a three-group configuration or more, the sine wave reference signal and the sawtooth carrier signal of each group can be used. It can be easily applied by giving a phase difference.

As described above, in the power conversion device and the motor system of the fifth embodiment, the phase difference φ is provided in the saw wave carrier signal of the two groups of inverter circuits with respect to the power conversion device and the motor system of the fourth embodiment. It is a composition. Therefore, the power conversion device of the fifth embodiment and the electric motor system using the same can realize the miniaturization and loss reduction of the LC resonance circuit to be added as in the first embodiment. Further, it is possible to improve the total output torque of the motor and optimize both the drive and power generation functions, and to disperse the ripple current and noise generated in the power storage device.

In the present invention, each embodiment can be freely combined, and the embodiments can be appropriately modified or omitted within the scope of the invention.

10 Power supply cutoff circuit, 11 Switching unit, 11a switching element, 11b anti-parallel diode, 17 positive positive bus, 18 negative negative bus, 20 inverter circuit, 21 first upper arm, 21a switching element, 21b anti-parallel diode, 22 first lower arm , 22a switching element, 22b anti-parallel diode, 23 second upper arm, 23a switching element, 23b anti-parallel diode, 24 second lower arm, 24a switching element, 24b anti-parallel diode, 25 third upper arm, 25a switching element, 25b anti-parallel diode, 26 third lower arm, 26a switching element, 26b anti-parallel diode, 27 positive electrode bus, 28 negative negative bus, 30 control unit, 30a to g gate control signal, 40 reference signal generation circuit, 40a to c sinusoidal wave. Reference signal, 40aX to cX sine wave reference signal, 40aY to cY sine wave reference signal, 41 sine wave signal source, 42a phase shifter, 42b phase shifter, 50 saw wave carrier generation circuit, 51 power supply voltage detection circuit, 51a voltage detection Value, 60 control signal generation circuit, 61a to e comparator, 62a to c inverting circuit, 63a to c fixed delay circuit, 64 adder circuit, 66 cutoff period adjustment circuit, 70a to g gate drive circuit, 100 power converter, 120 power storage device, 130 electric motor, 130a U-phase terminal, 130b V-phase terminal, 130c W-phase terminal, 200 power converter, 230 control unit, 260 control signal generation circuit, 263a to c variable delay circuit, 267a gate judgment circuit, 267b Gate judgment circuit, 300 power conversion device, 330 control unit, 360 control signal generation circuit, 400 power conversion device, 420X inverter circuit, 420Y inverter circuit, 430 control unit, 440 reference signal generation circuit, 443a to c phase shifter, 460 control Signal generation circuit, 500 power converter, 530 control unit, 560 control signal generation circuit, 565 phase shifter, 566 adder circuit, 1000 diode drive device, 4000 diode system

Claims (17)

A power cutoff circuit whose one end is connected to a DC power supply and cuts off the input from the DC power supply,
An inverter circuit in which one end is connected to the other end of the power cutoff circuit and the power from the DC power supply is converted into AC power.
A control unit that controls the inverter circuit and the power cutoff circuit,
Equipped with
The inverter circuit is a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series, and has a plurality of legs connected in parallel to each other.
The control unit is used during a power cutoff period in which the power cutoff circuit cuts off the DC power supply and the inverter circuit.
A first operation mode in which the switching element of the lower arm of at least one of the plurality of legs is turned on, and
A second operation mode in which the switching elements of the upper arm and the lower arm of at least one of the plurality of legs are turned on at the same time.
The inverter circuit and the power supply cutoff circuit are controlled by using a third operation mode in which the switching element of the upper arm of at least one of the plurality of legs is turned on.
In the first operation mode, the switching element of the lower arm is turned on so as to return a current to the lower arm.
In the third operation mode, the switching element of the upper arm is turned on so as to return a current to the upper arm.
The control unit has the first operation mode and the third operation mode in the case of transitioning from the first operation mode to the third operation mode or from the third operation mode to the first operation mode. The second operation mode is provided between them.
A power conversion device characterized by periodically repeating the power cutoff period. A power cutoff circuit whose one end is connected to a DC power supply and cuts off the input from the DC power supply,
An inverter circuit in which one end is connected to the other end of the power cutoff circuit and the power from the DC power supply is converted into AC power.
A control unit that controls the inverter circuit and the power cutoff circuit,
Equipped with
The inverter circuit is a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series, and has a plurality of legs connected in parallel to each other.
The control unit is used during a period in which the power cutoff circuit cuts off the DC power supply and the inverter circuit, and is repeated periodically or intermittently.
A first operation mode in which the switching element of the lower arm of at least one of the plurality of legs is turned on, and
A second operation mode in which the switching elements of the upper arm and the lower arm of at least one of the plurality of legs are turned on at the same time.
The inverter circuit and the power supply cutoff circuit are controlled by using a third operation mode in which the switching element of the upper arm of at least one of the plurality of legs is turned on.
In the first operation mode, the switching element of the lower arm is turned on so as to return a current to the lower arm.
In the third operation mode, the switching element of the upper arm is turned on so as to return a current to the upper arm.
The control unit has the first operation mode and the third operation mode in the case of transitioning from the first operation mode to the third operation mode or from the third operation mode to the first operation mode. A power conversion device characterized in that the second operation mode is provided between them, and the transition to the second operation mode is performed when the carrier signal is reset. A power cutoff circuit whose one end is connected to a DC power supply and cuts off the input from the DC power supply,
An inverter circuit in which one end is connected to the other end of the power cutoff circuit and the power from the DC power supply is converted into AC power.
A control unit that controls the inverter circuit and the power cutoff circuit,
Equipped with
The inverter circuit is a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series, and has a plurality of legs connected in parallel to each other.
The control unit is used during a period in which the power cutoff circuit cuts off the DC power supply and the inverter circuit, and is repeated periodically or intermittently.
A first operation mode in which the switching element of the lower arm of at least one of the plurality of legs is turned on, and
A second operation mode in which the switching elements of the upper arm and the lower arm of at least one of the plurality of legs are turned on at the same time.
The inverter circuit and the power supply cutoff circuit are controlled by using a third operation mode in which the switching element of the upper arm of at least one of the plurality of legs is turned on.
In the first operation mode, the switching element of the lower arm is turned on so as to return a current to the lower arm.
In the third operation mode, the switching element of the upper arm is turned on so as to return a current to the upper arm.
The control unit has the first operation mode and the third operation mode in the case of transitioning from the first operation mode to the third operation mode or from the third operation mode to the first operation mode. A power conversion device characterized in that the second operation mode is provided between them to reduce the voltage of the positive electrode bus to zero voltage. The control unit is characterized in that the second operation mode is provided between the first operation mode and the third operation mode to reduce the voltage of the positive electrode bus to zero voltage and perform a switching operation. 3. The power conversion device according to 3. A power cutoff circuit whose one end is connected to a DC power supply and cuts off the input from the DC power supply,
An inverter circuit in which one end is connected to the other end of the power cutoff circuit and the power from the DC power supply is converted into AC power.
A control unit that controls the inverter circuit and the power cutoff circuit,
Equipped with
The inverter circuit is a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series, and has a plurality of legs connected in parallel to each other.
The control unit is used during a period in which the power cutoff circuit cuts off the DC power supply and the inverter circuit, and is repeated periodically or intermittently.
A first operation mode in which the switching element of the lower arm of at least one of the plurality of legs is turned on, and
A second operation mode in which the switching elements of the upper arm and the lower arm of at least one of the plurality of legs are turned on at the same time.
The inverter circuit and the power supply cutoff circuit are controlled by using a third operation mode in which the switching element of the upper arm of at least one of the plurality of legs is turned on.
In the first operation mode, the switching element of the lower arm is turned on so as to return a current to the lower arm.
In the third operation mode, the switching element of the upper arm is turned on so as to return a current to the upper arm.
The control unit has the first operation mode and the third operation mode in the case of transitioning from the first operation mode to the third operation mode or from the third operation mode to the first operation mode. The second operation mode is provided between them.
A power conversion device, characterized in that the period for disconnecting the DC power supply and the inverter circuit cut off by the power supply cutoff circuit is a period during which all power supply to the inverter circuit is cut off. A power cutoff circuit whose one end is connected to a DC power supply and cuts off the input from the DC power supply,
An inverter circuit in which one end is connected to the other end of the power cutoff circuit and the power from the DC power supply is converted into AC power.
A control unit that controls the inverter circuit and the power cutoff circuit,
Equipped with
The inverter circuit is a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series, and has a plurality of legs connected in parallel to each other.
The control unit is used during a period in which the power cutoff circuit cuts off the DC power supply and the inverter circuit, and is repeated periodically or intermittently.
A first operation mode in which the switching element of the lower arm of at least one of the plurality of legs is turned on, and
A second operation mode in which the switching elements of the upper arm and the lower arm of at least one of the plurality of legs are turned on at the same time.
The inverter circuit and the power supply cutoff circuit are controlled by using a third operation mode in which the switching element of the upper arm of at least one of the plurality of legs is turned on.
In the first operation mode, the switching element of the lower arm is turned on so as to return a current to the lower arm.
In the third operation mode, the switching element of the upper arm is turned on so as to return a current to the upper arm.
The control unit has the first operation mode and the third operation mode in the case of transitioning from the first operation mode to the third operation mode or from the third operation mode to the first operation mode. The second operation mode is provided between them.
A power conversion device characterized in that a power storage device for supplying power to the inverter circuit is not included between the power supply cutoff circuit and the inverter circuit. A power cutoff circuit whose one end is connected to a DC power supply and cuts off the input from the DC power supply,
An inverter circuit in which one end is connected to the other end of the power cutoff circuit and the power from the DC power supply is converted into AC power.
A control unit that controls the inverter circuit and the power cutoff circuit,
Equipped with
The inverter circuit is a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series, and has a plurality of legs connected in parallel to each other.
The control unit is used during a power cutoff period in which the power cutoff circuit cuts off the DC power supply and the inverter circuit.
A first operation mode in which the switching element of the lower arm of at least one of the plurality of legs is turned on, and
A second operation mode in which the switching elements of the upper arm and the lower arm of at least one of the plurality of legs are turned on at the same time.
The inverter circuit and the power supply cutoff circuit are controlled by using a third operation mode in which the switching element of the upper arm of at least one of the plurality of legs is turned on.
In the first operation mode, the switching element of the lower arm is turned on so as to return a current to the lower arm.
In the third operation mode, the switching element of the upper arm is turned on so as to return a current to the upper arm.
The control unit has the first operation mode and the third operation mode in the case of transitioning from the first operation mode to the third operation mode or from the third operation mode to the first operation mode. The second operation mode is provided between them.
A power conversion device characterized in that the power cutoff period is intermittently repeated during a period of converting DC power from the DC power source to AC power or a period of converting AC power from an electric motor to DC power. In the first operation mode, the control unit turns on the lower arms of all the legs among the plurality of legs.
In the second operation mode, the switching elements of the upper arm and the lower arm of all the legs among the plurality of legs are turned on at the same time.
In the third operation mode, turning on the upper arm of all the legs among the plurality of legs.
The power conversion device according to any one of claims 1 to 7. The power conversion device according to any one of claims 1 to 8, wherein the control unit shifts to the second operation mode with the power supply cutoff circuit turned off. A power cutoff circuit whose one end is connected to a DC power supply and cuts off the input from the DC power supply,
An inverter circuit in which one end is connected to the other end of the power cutoff circuit and the power from the DC power supply is converted into AC power.
A control unit that controls the inverter circuit and the power cutoff circuit,
Equipped with
The inverter circuit is a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series, and has a plurality of legs connected in parallel to each other.
The control unit is used during a period in which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit.
A first operation mode in which the switching element of the lower arm of at least one of the plurality of legs is turned on, and
A second operation mode in which the switching elements of the upper arm and the lower arm of at least one of the plurality of legs are turned on at the same time.
The inverter circuit and the power supply cutoff circuit are controlled by using a third operation mode in which the switching element of the upper arm of at least one of the plurality of legs is turned on.
In the first operation mode, the switching element of the lower arm is turned on so as to return a current to the lower arm.
In the third operation mode, the switching element of the upper arm is turned on so as to return a current to the upper arm.
The control unit has the first operation mode and the third operation mode in the case of transitioning from the first operation mode to the third operation mode or from the third operation mode to the first operation mode. The second operation mode is provided between them.
The control unit shifts to the second operation mode with the power cutoff circuit turned off.
When transitioning from the first operation mode to the third operation mode, the power cutoff circuit is turned off during the first operation mode and the power cutoff circuit is turned on during the third operation mode. ,
Alternatively, in the case of transitioning from the third operation mode to the first operation mode, the power cutoff circuit is turned off during the third operation mode and the power cutoff circuit is turned on during the first operation mode. To do,
A power conversion device characterized by. A power cutoff circuit whose one end is connected to a DC power supply and cuts off the input from the DC power supply,
An inverter circuit in which one end is connected to the other end of the power cutoff circuit and the power from the DC power supply is converted into AC power.
A control unit that controls the inverter circuit and the power cutoff circuit,
Equipped with
The inverter circuit is a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series, and has a plurality of legs connected in parallel to each other.
The control unit is used during a period in which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit.
A first operation mode in which the switching element of the lower arm of at least one of the plurality of legs is turned on, and
A second operation mode in which the switching elements of the upper arm and the lower arm of at least one of the plurality of legs are turned on at the same time.
The inverter circuit and the power supply cutoff circuit are controlled by using a third operation mode in which the switching element of the upper arm of at least one of the plurality of legs is turned on.
In the first operation mode, the switching element of the lower arm is turned on so as to return a current to the lower arm.
In the third operation mode, the switching element of the upper arm is turned on so as to return a current to the upper arm.
The control unit has the first operation mode and the third operation mode in the case of transitioning from the first operation mode to the third operation mode or from the third operation mode to the first operation mode. The second operation mode is provided between them.
The control unit controls the inverter circuit by PWM control using a sawtooth carrier signal and a sine wave signal.
The control unit further includes a fixed delay circuit that adds a predetermined delay to the signal generated by comparing and determining the sawtooth carrier signal and the sine wave signal in the second operation mode.
A power conversion device characterized by. The control unit controls the second operation mode so as to have a predetermined time.
The power conversion device according to any one of claims 1 to 11. The control unit controls so that the period during which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit is a predetermined time determined in advance.
The power conversion device according to any one of claims 1 to 12. A power cutoff circuit whose one end is connected to a DC power supply and cuts off the input from the DC power supply,
An inverter circuit in which one end is connected to the other end of the power cutoff circuit and the power from the DC power supply is converted into AC power.
A control unit that controls the inverter circuit and the power cutoff circuit,
Equipped with
The inverter circuit is a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series, and has a plurality of legs connected in parallel to each other.
The control unit is used during a period in which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit.
A first operation mode in which the switching element of the lower arm of at least one of the plurality of legs is turned on, and
A second operation mode in which the switching elements of the upper arm and the lower arm of at least one of the plurality of legs are turned on at the same time.
The inverter circuit and the power supply cutoff circuit are controlled by using a third operation mode in which the switching element of the upper arm of at least one of the plurality of legs is turned on.
In the first operation mode, the switching element of the lower arm is turned on so as to return a current to the lower arm.
In the third operation mode, the switching element of the upper arm is turned on so as to return a current to the upper arm.
The control unit has the first operation mode and the third operation mode in the case of transitioning from the first operation mode to the third operation mode or from the third operation mode to the first operation mode. The second operation mode is provided between them.
Based on the voltage value of the DC power supply, the control unit controls a period during which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit and a period during which the upper arm and the lower arm are turned on at the same time.
A power conversion device characterized by. The control unit adjusts the timing of simultaneously turning on the upper arm and the lower arm based on the control signal of the power cutoff circuit.
The power conversion device according to any one of claims 1 to 14. A power cutoff circuit whose one end is connected to a DC power supply and cuts off the input from the DC power supply,
An inverter circuit in which one end is connected to the other end of the power cutoff circuit and the power from the DC power supply is converted into AC power.
A control unit that controls the inverter circuit and the power cutoff circuit,
Equipped with
The inverter circuit is a plurality of legs in which an upper arm having a switching element and a lower arm having a switching element are connected in series, and has a plurality of legs connected in parallel to each other.
The control unit is used during a period in which the power supply cutoff circuit cuts off the DC power supply and the inverter circuit.
A first operation mode in which the switching element of the lower arm of at least one of the plurality of legs is turned on, and
A second operation mode in which the switching elements of the upper arm and the lower arm of at least one of the plurality of legs are turned on at the same time.
The inverter circuit and the power supply cutoff circuit are controlled by using a third operation mode in which the switching element of the upper arm of at least one of the plurality of legs is turned on.
In the first operation mode, the switching element of the lower arm is turned on so as to return a current to the lower arm.
In the third operation mode, the switching element of the upper arm is turned on so as to return a current to the upper arm.
The control unit has the first operation mode and the third operation mode in the case of transitioning from the first operation mode to the third operation mode or from the third operation mode to the first operation mode. The second operation mode is provided between them.
The control unit controls the timing at which the power cutoff circuit reconnects the DC power supply and the inverter circuit based on at least one control signal among the control signals for controlling the inverter circuit.
A power conversion device characterized by. The power conversion device according to any one of claims 1 to 16.
With the DC power supply
The motor connected to the power converter and
An electric motor system characterized by being equipped with.

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