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JP6816776B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP6816776B2
JP6816776B2 JP2018561757A JP2018561757A JP6816776B2 JP 6816776 B2 JP6816776 B2 JP 6816776B2 JP 2018561757 A JP2018561757 A JP 2018561757A JP 2018561757 A JP2018561757 A JP 2018561757A JP 6816776 B2 JP6816776 B2 JP 6816776B2
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Prior art keywords
semiconductor device
electrode
electrodes
plating
electrode layer
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JP2018561757A
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JPWO2018131144A1 (ja
Inventor
洋輔 中田
洋輔 中田
真哉 赤尾
真哉 赤尾
原田　健司
健司 原田
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Description

本発明は、半導体装置及びその製造方法に関する。
半導体基板の両面にめっき法で同時に電極を形成する半導体装置の製造方法が開示されている（例えば、特許文献１参照）。また、均一な動作を実現するため、半導体基板の表面の電極は、ゲート配線によって櫛歯上に分断される（例えば、特許文献２参照）。一方、半導体基板の裏面の電極は、半導体基板と同形状のものが一般的である。
日本特開２００７−５３６８号公報 日本特開２００３−９２４０６号公報
従来の半導体装置は、半導体基板の表面と裏面とで電極の形状が異なる。このため、湿式めっき法で半導体基板の両面に同質のめっき電極を形成すると、表面と裏面でめっき電極の膜応力に差異が発生する。この結果、半導体基板が表面側に凸に反り、半導体装置の組み立て時の歩留まりを下げ、組み立て後の熱抵抗が不均一になるなどの問題があった。
本発明は、上述のような課題を解決するためになされたもので、その目的は組み立て時の歩留まりと組み立て後の熱抵抗の均一性を改善することができる半導体装置及びその製造方法を得るものである。
本発明に係る半導体装置は、互いに対向する表面及び裏面を持つ半導体基板と、前記半導体基板の前記表面に形成されたゲート配線と、前記半導体基板の前記表面に形成され、前記ゲート配線により互いに分割された第１及び第２の表面電極と、前記ゲート配線を覆う絶縁膜と、前記ゲート配線を跨いで前記絶縁膜及び前記第１及び第２の表面電極の上に形成された電極層と、前記電極層の上に形成された第１のめっき電極と、前記半導体基板の前記裏面に形成された裏面電極と、前記裏面電極の上に形成された第２のめっき電極と、前記第１のめっき電極に第１の接合材により接合されたリードフレームと、前記第２のめっき電極に第２の接合材により接合された導体基板と、前記半導体基板、前記リードフレーム及び前記導体基板の少なくとも一部を被覆する封止材とを備え、前記第１の接合材は前記ゲート配線を避けた領域に形成されていることを特徴とする。
本発明では、ゲート配線により互いに分割された第１及び第２の表面電極の上に電極層が形成され、電極層と裏面電極の上にそれぞれ第１及び第２のめっき電極が形成されている。これにより、半導体基板の両面の電極形状が近付くため、両面の電極の膜応力差が低減され、半導体基板の反りが低減される。これにより、半導体装置の組み立て時の歩留まりと組み立て後の熱抵抗の均一性を改善することができる。
本発明の実施の形態１に係る半導体装置を示す平面図である。 図１のＩ−ＩＩに沿った断面図である。 本発明の実施の形態１に係る半導体装置を用いた半導体パッケージを示す平面図である。 図３のＩ−ＩＩに沿った断面図である。 比較例に係る半導体装置を示す平面図である。 図５のＩ−ＩＩに沿った断面図である。 本発明の実施の形態２に係る半導体装置を示す断面図である。
本発明の実施の形態に係る半導体装置及びその製造方法について図面を参照して説明する。同じ又は対応する構成要素には同じ符号を付し、説明の繰り返しを省略する場合がある。
実施の形態１．
図１は、本発明の実施の形態１に係る半導体装置を示す平面図である。図２は図１のＩ−ＩＩに沿った断面図である。この半導体装置は、ＩＧＢＴ又はＭＯＳＦＥＴなどの電力用半導体装置である。
半導体基板１は互いに対向する表面及び裏面を持つ。ゲート配線２及び表面電極３，４が半導体基板１の表面に形成されている。半導体装置を均一に動作させるために、表面電極３，４はゲート配線２により互いに分割され、部分的に接続されている。ゲート配線２は、制御用ワイヤを打つパッド５を有する。
半導体装置の耐圧保持のために、半導体基板１の終端領域に複数の終端構造配線６が形成されている。終端構造配線６は、例えば、ガードリングなどの耐圧保持構造であり、複数本の配線からなる。ゲート配線２、表面電極３，４、終端構造配線６は、例えば、アルミを主たる材料でスパッタ法などの気相堆積法で一様に成膜され、写真製版工程とエッチング工程によりそれぞれ分断され所望の形状にパターニングされる。
絶縁膜７がゲート配線２を覆っている。絶縁膜７は、例えばシリコン窒化膜を主たる材料として形成することができる。絶縁膜７は、例えば、シリコン窒化膜を堆積後に、写真製版工程とエッチング工程を経ることで、所望の形状にパターニングされる。電極層８がゲート配線２を跨いで絶縁膜７及び表面電極３，４の上に形成されている。
裏面電極９が半導体基板１の裏面に形成されている。裏面電極９は半導体基板１の外形と同寸である。めっき電極１０が電極層８の上に形成され、めっき電極１１が裏面電極９の上に形成されている。めっき電極１０，１１の厚みと材質は互いに同じである。
図３は、本発明の実施の形態１に係る半導体装置を用いた半導体パッケージを示す平面図である。図４は、図３のＩ−ＩＩに沿った断面図である。リードフレーム１２がめっき電極１０に接合材１３により接合され、電気的・機械的に接続されている。導体基板１４がめっき電極１１に接合材１５により接合され、電気的・機械的に接続されている。接合材１３，１５は例えばスズを主たる材料としたはんだであり、これにより容易に接合することができる。パッド５と外部信号端子が例えばアルミを主たる材料としたワイヤにより接続されている。
接合材１３はゲート配線２を避けた領域に形成されている。このため、冷熱サイクル時に接合材１３からの応力がゲート配線２に加わり、ゲート配線２が損傷を受けて周辺電極とショートするのを防止することができる。一方、半導体基板１の裏面の接合材１５は極力大きくするため、半導体基板１と同等の形状で形成されている。これにより、半導体装置からの発熱を効率的に導体基板１４に放熱することができる。
被覆膜１６がめっき電極１０のはんだ接合領域の外周を被覆している。このため、めっき電極１０の上面において想定以上にはんだが濡れ広がるのを抑制することができる。この結果、他の部材とのショートを防止し、歩留まりと信頼性を向上することができる。被覆膜１６はポリイミドを含む材料であれば、はんだ濡れを確実に阻害することができる。被覆膜１６はめっき電極１０上にポリイミド前駆体溶液を所望の形状に描画塗布後にキュアすることで形成することができる。
封止材１７が半導体基板１、接合材１３，１５、リードフレーム１２及び導体基板１４等の少なくとも一部を被覆する。これにより、電気的損失を低減し、信頼性の高い半導体装置を実現できる。封止材１７は、例えばポッティングレジン又はトランスファーモールド樹脂である。
続いて、本実施の形態に係る半導体装置の製造方法を説明する。半導体基板１の表面に、ゲート配線２と、ゲート配線２により互いに分割された表面電極３，４とを形成する。ゲート配線２を覆う絶縁膜７を形成する。ゲート配線２を跨いで絶縁膜７及び表面電極３，４の上に電極層８を形成する。半導体基板１の裏面に裏面電極９を形成する。
電極層８の上にめっき電極１０、ゲート配線２の開口された部分にパッド５を、裏面電極９にめっき電極１１をそれぞれ湿式めっき法により形成する。これらを同時に形成することで、めっき工程のプロセスコストを抑えることができる。また、同時に形成するため、めっき電極１０，１１とパッド５の厚みと材質は互いに同じである。
めっき電極１０，１１とパッド５は、例えばニッケルを主たる材料からなり、ジンケート処理を用いたプロセスで形成することができる。はんだ接合後においてもめっき電極１０，１１が残存していることが望ましいため、めっき電極１０，１１の厚みは１μｍ以上であることが望ましい。めっき工程のプロセスコスト増を抑え、かつダイシング工程の歩留まりを確保するため、めっき電極１０，１１の厚みは１０μｍ以下であることが望ましい。
電極層８は例えばアルミを主たる材料で形成することができる。ゲート配線２と電極層８をアルミなど同一の材料で形成する場合、ゲート配線２のパッド５がエッチングされることを防止するために、アルミをエッチングするプロセス以外で電極層８をパターニングすることが望ましい。例えば、電極層形成領域に開口を有する有機レジスト膜越しにスパッタ法などで電極層８を気相的に堆積した後、有機レジストを溶解する剥離液を吹き付けることで、有機レジスト上の電極層８のみを選択的に除去するリフトオフ法により電極層８をパターニングする。または、電極層形成領域に開口を有するマスク越しに電極層８をスパッタ法などで気相的に堆積することで電極層８をパターニングしてもよい。これにより、容易にパターニングでき、表面電極３，４へのダメージを低減することができる。
また、ポリイミド前駆体溶液をめっき電極１０の上に吐出描画することでパターンを形成し、キュアすることで被覆膜１６を形成する。これにより、写真製版なしで被覆膜１６を容易にパターニングすることができる。
続いて、本実施の形態の効果を比較例と比較して説明する。図５は、比較例に係る半導体装置を示す平面図である。図６は図５のＩ−ＩＩに沿った断面図である。比較例は、半導体基板１の表面のめっき電極１０ａ，１０ｂと裏面のめっき電極１１の形状が異なる。このため、半導体基板１が表面側に凸に反り、半導体装置の組み立て時の歩留まりを下げ、組み立て後の熱抵抗が不均一になるなどの問題がある。
一方、本実施の形態では、ゲート配線２により互いに分割された表面電極３，４の上に電極層８が形成され、電極層８と裏面電極９の上にそれぞれめっき電極１０，１１が形成されている。これにより、半導体基板１の両面の電極形状が近付くため、両面の電極の膜応力差が低減され、半導体基板の反りが低減される。これにより、半導体装置の組み立て時の歩留まりと組み立て後の熱抵抗の均一性を改善することができる。
終端構造配線６は、表面電極３，４と同一プロセスで形成され、エッチング等の加工プロセスでパターニングされるため、表面電極３，４と同じ厚みを持つ。従って、表面電極３，４を厚膜化すると終端構造配線６も厚膜化される。終端構造配線６が厚くなると、封止材等から受ける応力が大きくなるため、信頼性が低下する。そこで、電極層８を終端領域に形成しないことで、終端構造配線６が必要以上に厚膜化されることを回避することができる。
また、終端構造配線６は電界分担を担い大電流を通電しないため厚膜化して抵抗値を下げる必要がない。一方、表面電極３，４は大電流の通電に対応し、はんだの膨張収縮により発生する応力を緩和するため、できるだけ厚膜化することが望ましい。本実施の形態により終端構造配線６の厚みを抑えつつ、電極の厚みを厚くできるので、より信頼性の高い半導体装置を形成することができる。例えば表面電極３，４と終端構造配線６の厚みが１．５μｍ以下で、表面電極３，４と電極層８の合計厚みが３μｍ以上となるように設計する。
絶縁膜７は表面電極３，４と電極層８との間にも設けられている。このため、半導体装置が外部から応力を受けた場合でも配線クラック等の損傷が表面電極３，４まで到達するのを防止することができる。
絶縁膜７には複数の貫通孔が設けられ、複数の貫通孔を通じて表面電極３，４と電極層８とが機械的及び電気的に接続されている。一方、ゲート配線２のパッド５上において絶縁膜７に開口が設けられている。ゲート配線２の他の部分は絶縁膜７で被覆され、ゲート配線２と表面電極３，４との絶縁性が確保されている。
絶縁膜７は複数の終端構造配線６を覆って、複数の終端構造配線６間の電界分布を均等にしている。即ち、絶縁膜７は、終端領域を保護する保護膜が動作セル領域まで延展したものである。このように絶縁膜７と保護膜を共通化することで、追加の加工プロセスなく、絶縁膜７を形成することができる。
表面電極３，４及び終端構造配線６の厚みは電極層８の厚みより薄い。これにより、終端構造の信頼性を確保しながら、はんだ接合性及びワイヤボンディング性に寄与する動作セル上の電極厚みを確保することができ、信頼性及び生産性を向上することができる。
表面電極３，４及び裏面電極９はアルミを含む材料で形成されている。このため、半導体装置の電極として容易に形成・加工でき、通電時の電気的抵抗も低く、機械的に安定な接合界面を形成することができる。
電極層８はアルミを含む材料で形成されている。このため、めっき電極１０を容易に形成でき、通電時の電気的抵抗も低く、アルミを含む材料で形成された表面電極３，４と機械的に安定な接合界面を得ることができる。また、裏面電極９と同質の材料となるため湿式めっき法で容易にめっき電極１０，１１を形成することができる。また、絶縁膜７は窒化ケイ素を含む。窒化ケイ素は保護膜として機能し、かつ表面電極３，４のアルミとも相性がよいので、電気的及び機械的に安定な構造を得ることができる。
めっき電極１０，１１はニッケル又は銅を含むため、はんだと容易に接合し、電気的・機械的に安定な接合界面を形成することができる。また、めっき電極１０，１１の最表面に金を含む材料が形成されていることが望ましい。これにより、はんだと接合するまでに、下地のはんだ接合用電極が酸化されてはんだ濡れ性が低下するのを防止することができる。
また、導体基板１４をめっき電極１１に、Ａｇを主たる材料とした微粒子を焼結して接合してもよい。ただし、Ａｇを主たる材料で構成する微粒子を焼結して接合する場合、半導体基板１を加圧して接合することが一般的である。しかし、半導体基板１が外圧で曲げられたときに発生する応力又は外部治具との摩擦で半導体基板１に損傷が発生する場合がある。これに対して、本実施の形態では、半導体基板１が反るのを解消できるので、加圧時の半導体基板１に発生する損傷を低減することができる。
実施の形態２．
図６は、本発明の実施の形態２に係る半導体装置を示す断面図である。絶縁膜７の上に有機膜１８が形成されている。これにより、冷熱サイクル時の応力によってゲート配線２が表面電極３，４又は電極層８とショートするのを防止できる。
有機膜１８は絶縁膜７と同等の形状で、かつ絶縁膜７をオーバーラップすることが望ましい。写真製版時のハレーションと重ね合わせ精度を考慮して、オーバーラップ量は１０μｍ以上確保することが望ましい。そして、有機膜１８がポリイミドを含むものであれば、半導体装置の絶縁膜として容易に形成・加工できる。
なお、半導体基板１は、珪素によって形成されたものに限らず、珪素に比べてバンドギャップが大きいワイドバンドギャップ半導体によって形成されたものでもよい。ワイドバンドギャップ半導体は、例えば、炭化珪素、窒化ガリウム系材料、又はダイヤモンドである。このようなワイドバンドギャップ半導体基板によって形成された半導体装置は、耐電圧性と許容電流密度が高いため、小型化できる。この小型化された素子を用いることで、この装置を組み込んだ半導体モジュールも小型化できる。また、装置の耐熱性が高いため、ヒートシンクの放熱フィンを小型化できるので、半導体モジュールを更に小型化できる。また、素子の電力損失が低く高効率であるため、半導体モジュールを高効率化できる。
１ 半導体基板、２ ゲート配線、３，４ 表面電極、５ パッド、６ 終端構造配線、７ 絶縁膜、８ 電極層、９ 裏面電極、１０，１１ めっき電極、１２ リードフレーム、１３，１５ 接合材、１４ 導体基板、１６ 被覆膜、１７ 封止材、１８ 有機膜

Claims (18)

  1. 互いに対向する表面及び裏面を持つ半導体基板と、
    前記半導体基板の前記表面に形成されたゲート配線と、
    前記半導体基板の前記表面に形成され、前記ゲート配線により互いに分割された第１及び第２の表面電極と、
    前記ゲート配線を覆う絶縁膜と、
    前記ゲート配線を跨いで前記絶縁膜及び前記第１及び第２の表面電極の上に形成された電極層と、
    前記半導体基板の前記裏面に形成された裏面電極と、
    前記電極層の上に形成された第１のめっき電極と、
    前記裏面電極の上に形成された第２のめっき電極と、
    前記第１のめっき電極に第１の接合材により接合されたリードフレームと、
    前記第２のめっき電極に第２の接合材により接合された導体基板と、
    前記半導体基板、前記リードフレーム及び前記導体基板の少なくとも一部を被覆する封止材とを備え、
    前記第１の接合材は前記ゲート配線を避けた領域に形成されていることを特徴とする半導体装置。
  2. 前記第１及び第２のめっき電極の厚みと材質は互いに同じであることを特徴とする請求項１に記載の半導体装置。
  3. 前記第１及び第２のめっき電極の厚みは１μｍ以上、１０μｍ以下であることを特徴とする請求項１又は２に記載の半導体装置。
  4. 前記絶縁膜は前記第１及び第２の表面電極と前記電極層との間にも設けられ、
    前記絶縁膜には複数の貫通孔が設けられ、
    前記複数の貫通孔を通じて前記第１及び第２の表面電極と前記電極層とが機械的及び電気的に接続されていることを特徴とする請求項１〜３の何れか１項に記載の半導体装置。
  5. 前記絶縁膜は、終端領域を保護する保護膜が動作セル領域まで延展したものであることを特徴とする請求項１〜４の何れか１項に記載の半導体装置。
  6. 終端領域において前記半導体基板の前記表面に形成され、前記第１及び第２の表面電極と同じ厚みを持つ終端構造配線を備え、
    前記電極層は前記終端領域に形成されていないことを特徴とする請求項１〜５の何れか１項に記載の半導体装置。
  7. 前記第１及び第２の表面電極及び前記終端構造配線の厚みは前記電極層の厚みより薄いことを特徴とする請求項６に記載の半導体装置。
  8. 前記第１及び第２の接合材はスズを含むことを特徴とする請求項１〜７の何れか１項に記載の半導体装置。
  9. 前記第１のめっき電極のはんだ接合領域の外周を被覆する被覆膜を備えることを特徴とする請求項１〜８の何れか１項に記載の半導体装置。
  10. 前記被覆膜はポリイミドを含むことを特徴とする請求項９に記載の半導体装置。
  11. 前記絶縁膜の上に形成された有機膜を更に備えることを特徴とする請求項１〜１０の何れか１項に記載の半導体装置。
  12. 前記有機膜はポリイミドを含むことを特徴とする請求項１１に記載の半導体装置。
  13. 前記第１及び第２の表面電極及び前記裏面電極はアルミを含む材料で形成されていることを特徴とする請求項１〜１２の何れか１項に記載の半導体装置。
  14. 前記電極層はアルミを含む材料で形成されていることを特徴とする請求項１〜１３の何れか１項に記載の半導体装置。
  15. 前記絶縁膜は窒化ケイ素を含むことを特徴とする請求項１〜１４の何れか１項に記載の半導体装置。
  16. 前記第１及び第２のめっき電極はニッケル又は銅を含むことを特徴とする請求項１〜１５の何れか１項に記載の半導体装置。
  17. 前記第１及び第２のめっき電極の最表面に金を含む材料が形成されていることを特徴とする請求項１〜１６の何れか１項に記載の半導体装置。
  18. 前記半導体基板はワイドバンドギャップ半導体によって形成されていることを特徴とする請求項１〜１７の何れか１項に記載の半導体装置。
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