JP6766761B2 - Semiconductor device - Google Patents

Description

The techniques disclosed herein relate to semiconductor devices used in power supply circuits.

Semiconductor elements used in power supply circuits such as inverter circuits generate heat according to the magnitude of the flowing current, and may be damaged if the temperature rise exceeds the limit. Therefore, Patent Document 1 discloses an inverter device that suppresses the current flowing through each semiconductor element by connecting two semiconductor elements in parallel.

Japanese Unexamined Patent Publication No. 2012-075279

When a plurality of semiconductor elements are connected in parallel, if the resistance components of each element (for example, the on-resistance of the switching element) are different from each other, the current is concentrated on the element having a small resistance component and the current is unbalanced. It will occur. Therefore, a method has been used in which the resistance component of each element is measured in advance and elements having the same resistance component are connected in parallel to suppress the current imbalance between the elements.

However, when such a method is used, problems such as an increase in the number of steps and a mistake in the step of sorting semiconductor elements according to the resistance component occur. The present specification provides a technique for suppressing current imbalance in a plurality of semiconductor elements connected in parallel with respect to a semiconductor device that can be used in a power supply circuit.

The semiconductor device disclosed in the present specification includes a plurality of semiconductor elements connected in parallel, a plurality of resistance elements each connected in series to the plurality of semiconductor elements, and each having a negative temperature characteristic. It includes a heat transfer member that thermally connects a plurality of resistance elements to each other and is electrically insulated from the plurality of resistance elements.

In the above configuration, the resistance element is directly connected to each semiconductor element, whereby the variation in the resistance component existing in the plurality of semiconductor elements is alleviated. In addition, the plurality of resistance elements each have a negative temperature characteristic and are thermally connected to each other. According to such a configuration, a resistance element connected to a semiconductor element having a large flowing current (that is, a semiconductor element having a small resistance component) is connected to a semiconductor element having a small flowing current (that is, a semiconductor element having a large resistance component). Heat is transferred to the resistance element via the heat transfer member. As a result, the resistance value of the resistance element connected to the semiconductor element with a small flowing current decreases, and the resistance value of the resistance element connected to the semiconductor element with a large flowing current increases, thereby suppressing the current imbalance flowing through each element. Will be done.

Details and further improvements to the techniques disclosed herein will be described in the "Modes for Carrying Out the Invention" section below.

The circuit structure of the semiconductor device 10 is shown. The configuration of the resistance unit 18 is schematically shown. It is a graph which shows an example of the negative temperature characteristic of a resistance element 14a, 14b. It is a graph which shows an example of the relationship between the current of a semiconductor element and the on-voltage. It is a figure to help understanding of the simulation of the semiconductor device 10. It is a table which shows the simulation result of the semiconductor device 10. The structure of the semiconductor device 100 is schematically shown. The circuit structure of the semiconductor device 100 is shown.

The semiconductor device 10 of the first embodiment will be described with reference to the drawings. The semiconductor device 10 can be used as a switching circuit for controlling current supply / interruption in a power supply circuit such as a DC / DC converter circuit or an inverter circuit. FIG. 1 shows the circuit structure of the semiconductor device 10. As shown in FIG. 1, the semiconductor device 10 includes a plurality of semiconductor elements 12a and 12b and a resistance unit 18.

The plurality of semiconductor elements 12a and 12b are connected in parallel with each other. Each of the semiconductor elements 12a and 12b is a power semiconductor element. The power semiconductor element referred to here includes, for example, a diode, a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), and an IGBT (Insulated Gate Bipolar Transistor) or other switching element. Further, the semiconductor material used for the semiconductor elements 12a and 12b is not particularly limited, and may be a nitride semiconductor such as silicon (Si), silicon carbide (SiC), or gallium nitride (GaN).

The resistance unit 18 will be described with reference to FIGS. 2 and 3. FIG. 2 schematically shows the configuration of the resistance unit 18. The resistance unit 18 has a plurality of resistance elements 14a and 14b and a heat transfer member 16. The plurality of resistance elements 14a and 14b are connected in series to the plurality of semiconductor elements 12a and 12b, respectively. That is, one of the plurality of resistance elements 14a and 14b is connected in series to each of the plurality of semiconductor elements 12a and 12b. Each of the resistance elements 14a and 14b has a negative temperature characteristic. FIG. 3 shows an example of the negative temperature characteristics of the resistance elements 14a and 14b. As shown in FIG. 3, the higher the temperature of the resistance elements 14a and 14b, the lower the resistance value of the resistance elements 14a and 14b.

The heat transfer member 16 is electrically insulated from the respective resistance elements 14a and 14b, and is thermally connected to the plurality of resistance elements 14a and 14b. In this embodiment, a plurality of resistance elements 14a and 14b are arranged in the heat transfer member 16 and are integrally held by a single heat transfer member 16. The material constituting the heat transfer member 16 is not particularly limited, but a material having excellent thermal conductivity such as metal is preferable, and although it is an example, a material such as solder having excellent workability is more preferable. That is, the material constituting the heat transfer member 16 may have conductivity. In this case, each resistance element 14b may be covered with an insulating material. On the other hand, when each resistance element 14b is not covered with an insulating material, the heat transfer member 16 may be made of an insulating material. The heat transfer member 16 is also electrically insulated from the lead wires extending from the respective resistance elements 14a and 14b.

The heat transfer member 16 in this embodiment is in contact with the resistance elements 14a and 14b, respectively. However, the heat transfer member 16 does not necessarily have to be in contact with the respective resistance elements 14a and 14b. If the heat transfer member 16 is sufficiently close to the respective resistance elements 14a and 14b, the plurality of resistance elements 14a and 14b are thermally connected via the heat transfer member 16. The arrows in FIG. 2 show an image in which the heat generated in the resistance elements 14a and 14b by energization is transferred through the heat transfer member 16.

Here, the semiconductor device 10 of the present embodiment includes two semiconductor elements 12a and 12b and two resistance elements 14a and 14b, but the number of semiconductor elements and resistance elements is not particularly limited, and for example, three or more. The semiconductor element and the resistance element of the above may be provided. Hereinafter, one of the two semiconductor elements 12a and 12b will be referred to as a first semiconductor element 12a, and the other will be referred to as a second semiconductor element 12b. The resistance element 14a connected to the first semiconductor element 12a is referred to as a first resistance element 14a, and the resistance element 14b connected to the second semiconductor element 12b is referred to as a second resistance element 14b.

If the resistance components of the plurality of semiconductor elements 12a and 12b connected in parallel are different from each other, the current is concentrated on the element having the smaller resistance component, resulting in current imbalance. In this regard, in the semiconductor device 10 of the present embodiment, the plurality of resistance elements 14a and 14b are connected in series to the plurality of semiconductor elements 12a and 12b, and the respective resistance elements 14a and 14b have negative temperatures. It has characteristics and is thermally connected to each other via a heat transfer member 16. For example, it is assumed that the current flowing through the first semiconductor element 12a is larger than that of the second semiconductor element 12b. In this case, heat is transferred from the first resistance element 14a connected to the first semiconductor element 12a to the second resistance element 14b connected to the second semiconductor element 12b via the heat transfer member 16. As a result, the temperature of the first resistance element 14a decreases and the resistance value of the first resistance element 14a increases, while the temperature of the second resistance element 14b increases and the resistance value of the second resistance element 14b increases. descend. The resistance value of the second resistance element 14b connected to the second semiconductor element 12b having a small flowing current decreases, and the resistance value of the first resistance element 14a connected to the first semiconductor element 12a having a large flowing current increases. The current imbalance flowing through the semiconductor elements 12a and 12b is suppressed.

With reference to FIGS. 4 to 6, variations in resistance components existing in the semiconductor elements 12a and 12b and current imbalance caused by the variations will be described. Hereinafter, as an index indicating the resistance component existing in the semiconductor elements 12a and 12b, the voltage generated in the semiconductor element when a current is passed is defined as the on-voltage. FIG. 4 is a graph showing an example of the relationship between the current and the on-voltage of the two semiconductor elements 12a and 12b. In this case, the straight line A indicates the on-voltage of the first semiconductor element 12a, and the straight line B indicates the on-voltage of the second semiconductor element 12b. That is, the on-voltage of the second semiconductor element 12b is higher than the on-voltage of the first semiconductor element 12a. Assuming that the resistance unit 18 does not exist, it is assumed that a current of at least 200 amperes is passed through the respective semiconductor elements 12a and 12b. In this case, a current of 230 amperes flows through the first semiconductor element 12a (straight line A), and a current of 200 amperes flows through the second semiconductor element 12b (straight line B). That is, a current imbalance occurs in a width of 30 A. In this case, it is necessary to adopt a semiconductor element capable of energizing a current of 230 amperes (that is, a rated current of 230 amperes or more) for the semiconductor elements 12a and 12b.

On the other hand, in the semiconductor device 10 of the present embodiment, even if the resistance component varies among the plurality of semiconductor elements 12a and 12b, the current imbalance is suppressed by the presence of the resistance unit 18. .. An example thereof will be described below. As shown in FIG. 5, the current flowing through the first semiconductor element 12a and the first resistance element 14a is I1, the current flowing through the second semiconductor element 12b and the second resistance element 14b is I2, and the voltage of the first resistance element 14a is V1. , The voltage of the second resistance element 14b is V2, the voltage of the first semiconductor element 12a is V3, the voltage of the second semiconductor element 12b is V4, the resistance of the first resistance element 14a is R1, and the resistance of the second resistance element 14b is R2. And. Each of the resistance elements 14a and 14b has a negative temperature characteristic shown in FIG. FIG. 6 shows the result of simulating the operation of the semiconductor device 10 with the voltage applied to the semiconductor device 10 being 2.5 V. From the results of FIG. 6, the current flowing through each semiconductor element is 218 amps (I1) in the first semiconductor element 12a having the lower on-voltage, and 200 amps (I2) in the second semiconductor element 12b having the higher on-voltage. ), And it is confirmed that the width of the current imbalance is suppressed. Therefore, for each of the semiconductor elements 12a and 12b, a semiconductor element capable of energizing a current of 218 amperes (that is, a rated current of 218 amperes or more) may be adopted. Compared with the case where the resistance unit 18 does not exist, the semiconductor elements 12a and 12b can employ semiconductor elements having a small rated current, so that the semiconductor device 10 can be downsized and the manufacturing cost can be reduced. ..

The semiconductor device 100 of the second embodiment will be described with reference to FIGS. 7 and 8. FIG. 7 schematically shows the semiconductor device 100. FIG. 8 is a circuit diagram showing the structure of the semiconductor device 100. The semiconductor device 100 includes two power modules 110a and 110b connected in parallel to each other. Each of the two power modules 110a and 110b includes resin molds 117a and 117b. The terminals protruding from the resin molds 117a and 117b are connected to the P terminal 113a, the O terminal 113b, and the N terminal 113c, respectively. Further, the wiring connecting the two power modules 110a and 110b may be bus bar wiring or the like.

Each of the two power modules 110a and 110b includes upper semiconductor elements 112a and 112b and lower semiconductor elements 115a and 115b. The upper semiconductor elements 112a and 112b are sealed in a resin mold 117a, and electrically connect or disconnect between the P terminal 113a and the O terminal 113b. The lower semiconductor elements 115a and 115b are sealed in a resin mold 117b, and electrically connect or disconnect between the O terminal 113b and the N terminal 113c. For example, each of the semiconductor elements 112a, 115a, 112b, 115b may be a MOSFET or an IGBT. The same semiconductor element is adopted for all the semiconductor elements 112a, 115a, 112b, 115b, but not necessarily limited to.

Each of the two power modules 110a and 110b further includes signal terminal groups 120a and 120b. Each of the signal terminal groups 120a and 120b has conductivity and is made of a metal material such as copper. The signal terminal groups 120a and 120b project from the resin molds 117a and 170b and are electrically connected to the semiconductor elements 112a, 115a, 112b and 115b in the resin molds 117a and 117b, respectively. For example, the signal terminal group 120a includes gate signal terminals 120g connected to the gates of the semiconductor elements 112a, 115a, 112b, 115b.

A resistor unit 118 is connected to the P terminal 113a of the two power modules 110a and 110b. The resistance unit 118 includes a plurality of resistance elements 114a and 114b and a heat transfer member 116 as in the first embodiment. The plurality of resistance elements 114a and 114b are connected in series to the plurality of upper semiconductor elements 112a and 112b, respectively. Each of the resistance elements 114a and 114b has a negative temperature characteristic. The heat transfer member 116 thermally connects the plurality of resistance elements 114a and 114b to each other and is electrically insulated from the plurality of resistance elements 114a and 114b. With such a configuration, even if the resistance component varies among the plurality of upper semiconductor elements 112a and 112b, the presence of the resistance unit 118 causes a current ane between the plurality of upper semiconductor elements 112a and 112b. The balance is suppressed. As another embodiment, the resistance unit 118 may be separately provided in the N terminal 113c in place of or in addition to the P terminal 113a of the power modules 110a and 110b.

Although some specific examples have been described in detail above, these are merely examples and do not limit the scope of claims. The techniques described in the claims include various modifications and modifications of the specific examples illustrated above. The technical elements described herein or in the drawings exhibit their technical usefulness alone or in various combinations.

10, 100: Semiconductor devices 12a, 12b, 112a, 112b: Semiconductor elements 14a, 14b, 114a, 114b: Resistance elements 16, 116: Heat transfer members 18, 118: Resistance units 110a, 110b: Power module 113a: P terminal 113b : O terminal 113c: N terminal 117a, 117b: Resin mold 120a, 120b: Signal terminal group

Claims (1)

With multiple semiconductor elements connected in parallel,
A plurality of resistance elements, each of which is connected in series to the plurality of semiconductor elements and each has a negative temperature characteristic,
A heat transfer member that thermally connects the plurality of resistance elements to each other and is electrically insulated from the plurality of resistance elements.
A semiconductor device equipped with.

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