JP6626697B2 - Wiring board and method of manufacturing the same - Google Patents

Description

  The present invention relates to a wiring board for a composite board on which another electric board is mounted on the upper surface, and a method for manufacturing the same.

  2. Description of the Related Art In recent years, as electronic devices typified by portable game machines and communication devices have become smaller and more sophisticated, wiring boards used therein have also been required to be smaller and more sophisticated. To meet such demands, there is a composite substrate called a so-called PoP (Package on Package) in which another electric substrate is mounted on the upper surface of a wiring substrate on which a semiconductor element such as a semiconductor integrated circuit element is mounted.

An example of such a conventional wiring board for a composite board will be described with reference to FIG.
The conventional wiring board B includes a laminated portion 21, a semiconductor element S, a capacitor E, and a mold resin R.

The laminated portion 21 includes a plurality of insulating layers 22 having a plurality of through holes 22a and a wiring conductor 23.
The wiring conductor 23 is formed on the surface of the insulating layer 22 and in the through hole 22a.
An electrode of the semiconductor element S or an electrode of the capacitor E is connected to a part of the wiring conductor 23 formed on the upper surface of the laminated portion 21 via, for example, solder. The semiconductor element S is electrically connected to the capacitor E via the wiring conductor 23. When a transient ground and power supply potential change occurs in the semiconductor element S, a charge is supplied from the capacitor E to the semiconductor element S, thereby suppressing the transient ground and power supply potential fluctuation. Thereby, the semiconductor element S operates stably. In order to supply the electric charge from the capacitor E to the semiconductor element S favorably, it is important to reduce the electric resistance of the wiring conductor 23 connecting the two.
A part of the wiring conductor 23 formed on the lower surface of the laminated portion 21 functions as an external connection pad 24 connected to an external circuit board.
A molding resin R that covers the wiring conductor 23, the semiconductor element S, and the capacitor E is formed on the upper surface of the laminated portion 21.
In the mold resin R, a through-hole 25 having the wiring conductor 23 formed on the upper surface of the laminated portion 21 as a bottom surface is formed. A wiring conductor 26 is formed on the upper surface of the mold resin R and in the through hole 25.
A part of the wiring conductor 26 formed on the upper surface of the mold resin R functions as a board connection pad connected to an electrode of another electric board (not shown).
Thus, the semiconductor element S operates by transmitting and receiving an electric signal between another electric board (not shown) and the wiring board B.

By the way, in the conventional wiring board B, since the semiconductor element S is covered with the mold resin R and there is no material having excellent heat conductivity around the semiconductor element S, heat generated when the semiconductor element S is operated is reduced. It cannot efficiently radiate heat to the outside.
Then, in order to efficiently radiate the heat generated from the semiconductor element S to the outside, it is conceivable to arrange a substance having excellent heat conduction such as copper near the semiconductor element S. However, in this case, since the capacitor E cannot be arranged near the semiconductor element S, the length of the wiring conductor 23 connecting between the two becomes long. As a result, the electric resistance of the wiring conductor 23 connecting the capacitor E and the semiconductor element S increases, and it becomes impossible to supply the electric charge from the capacitor E to the semiconductor element S in a satisfactory manner.

Japanese Patent No. 3575478

  The present invention efficiently dissipates heat generated during operation of a semiconductor element, and satisfactorily supplies electric charge to the semiconductor element when there is a transient ground and power supply potential fluctuation in the semiconductor element. It is an object of the present invention to provide a wiring board which is hardly broken and can operate stably and a method for manufacturing the same.

The wiring board according to the present invention is formed by laminating a plurality of insulating layers, and has a laminated portion having a power supply wiring conductor, a grounding wiring conductor, and a signal wiring conductor on its surface and inside, and a top central portion of the laminated portion. A semiconductor element mounted on the substrate and connected to a part of each wiring conductor, a cavity in which a semiconductor element is housed in the center portion, and a frame-shaped substrate arranged on the upper surface of the laminated portion; A frame-like substrate having a dielectric constant of 30 to 3000 and a thickness of 5 to 30 μm. It has a three-layer structure in which conductor layers each having a thickness of 50 to 150 μm are laminated on the upper and lower surfaces, and the end surfaces of the conductor layers on the upper and lower surfaces are exposed on the inner peripheral side surface facing the cavity and the outer peripheral side surface in the frame-shaped substrate. And at the same time A power supply conductor pattern connected to the power supply wiring conductor, a grounding conductor pattern connected to the grounding wiring conductor, and a signal conductor pattern connected to the signal wiring conductor. The predetermined conductor patterns on the upper and lower surfaces are electrically connected to each other via through conductors filled in through holes provided in the dielectric layer, and a part of the conductor patterns on the upper surface is A substrate connection pad for connecting to the substrate is formed, and a part of the conductor pattern for the power supply and a part of the conductor pattern for the ground form a capacitor electrode facing each other with the dielectric layer interposed therebetween. It is characterized by having.

  The method of manufacturing a wiring board according to the present invention comprises laminating metal foils on upper and lower surfaces of a dielectric layer having a relative dielectric constant of 30 to 3000 and a thickness of 5 to 30 μm, and forming a cavity forming region and an outer peripheral portion in a central portion. Preparing a substrate material having a wiring forming region surrounding the cavity forming region; forming a plurality of through holes in the wiring forming region; and forming metal plating on the upper and lower surfaces of the metal foil and the through holes. Depositing a layer, forming a through conductor formed of a metal plating layer in the through hole, and forming a conductive layer having a thickness of 50 to 150 μm formed of a metal foil and a metal plating layer on the upper and lower surfaces of the dielectric layer; Forming an etching resist on the surface of the layer to cover a portion corresponding to a predetermined pattern in the wiring formation region, and etching a conductive layer exposed on a non-covered portion of the etching resist. By removing the notch, the conductor pattern for power supply, the conductor pattern for grounding, and the conductor pattern for signal are electrically connected to the conductor layers on the upper and lower surfaces of the wiring formation area, respectively. And a part of the conductor pattern for the power supply and a part of the conductor pattern for the ground are formed to be the capacitor electrodes facing each other with the dielectric layer interposed therebetween, and the conductor layer in the cavity forming region is removed. Performing a step of forming a cavity by hollowing out a dielectric layer in a cavity forming region to obtain a frame-shaped substrate, and placing a frame-shaped substrate on an adhesive sheet and inserting a semiconductor element into the cavity. And cover the cavity on the upper surface of the frame-shaped substrate and expose a part of the conductor pattern as a substrate connection pad for connecting to another substrate. Forming an insulating portion having an opening, removing the adhesive sheet from the frame-shaped substrate, and laminating a plurality of insulating layers on the lower surface of the frame-shaped substrate, and connecting to the conductor pattern for power supply on the surface and inside A power supply wiring conductor, a grounding wiring conductor connected to the grounding conductor pattern, and a step of forming a laminated portion having a signal wiring conductor connected to the signal conductor pattern, Is performed.

According to the wiring board of the present invention, in the frame-shaped substrate having a cavity for accommodating a semiconductor element, a thick conductor layer having a thickness of 50 to 150 μm is formed on upper and lower surfaces of a dielectric layer having a thickness of 5 to 30 μm. With this thick conductor layer, heat generated from the semiconductor element can be efficiently radiated to the outside of the wiring board, and the semiconductor element can be prevented from being broken.
Further, a part of the conductor layer includes a power supply conductor pattern each connected to a power supply wiring conductor and a grounding conductor pattern connected to a grounding wiring conductor. A part of the conductive pattern and a part of the grounding conductive pattern form capacitor electrodes facing each other with the dielectric layer interposed therebetween and are connected to the adjacent semiconductor element. The semiconductor element can be operated stably by the capacitor function of the frame-shaped substrate.

According to the method for manufacturing a wiring board of the present invention, a frame-shaped substrate having a cavity for accommodating a semiconductor element is formed by laminating a conductor layer having a thickness of 50 to 150 μm on the upper and lower surfaces of a dielectric layer having a thickness of 5 to 30 μm. As a result, the wiring board can efficiently provide heat to the outside through the thick conductor layer.
In addition, a part of the conductor layer is formed such that a part of a power supply conductor pattern and a part of a ground conductor pattern become capacitor electrodes facing each other with a dielectric layer interposed therebetween, and a semiconductor element and a capacitor are formed. The electrodes are connected via power supply and ground wiring conductors. With this capacitor function, it is possible to provide a wiring board capable of stably operating a semiconductor element.
Semiconductor element

FIG. 1 is a schematic sectional view showing an example of an embodiment of a wiring board of the present invention. FIGS. 2A to 2G are schematic cross-sectional views of a main part in each step for explaining an example of an embodiment in a manufacturing method of the present invention. 3 (h) to 3 (l) are schematic cross-sectional views of essential parts in each step for explaining an example of an embodiment in a manufacturing method of the present invention. FIG. 4 is a schematic sectional view showing an example of an embodiment of a conventional wiring board.

First, an example of a wiring board A of the present invention will be described with reference to FIG.
The wiring board A includes a laminated section 1, a frame-shaped substrate 2, a semiconductor element S, and an insulating section 3.

In the laminated portion 1, a plurality of insulating layers 1a each having a plurality of through holes 4 are laminated. A wiring conductor 5 is formed on the surface and inside of the laminated portion 1 and in the through hole 4. The wiring conductor 5 includes a power supply wiring conductor 5a, a grounding wiring conductor 5b, and a signal wiring conductor 5c. A part of the wiring conductor 5 formed on the lower surface of the laminated portion 1 functions as an external connection pad 6 connected to an external circuit board.
The insulating layer 1a is made of an electric insulating material containing a thermosetting resin such as an epoxy resin or a polyimide resin, and has a thickness of about 20 to 50 μm.
The wiring conductor 5 is formed of a good conductive metal such as copper by, for example, a well-known plating method.

The frame-shaped substrate 2 has a conductor layer 10 formed by sequentially laminating a metal foil 8 and a metal plating layer 9 on the upper and lower surfaces of a dielectric layer 7, respectively.
The frame-shaped substrate 2 has a cavity C formed therein for accommodating the semiconductor element S in the center.
The conductor layer 10 is connected to the power supply conductor pattern 10a connected to the power supply wiring conductor 5a, the grounding conductor pattern 10b connected to the grounding wiring conductor 5b, and the signal wiring conductor 5c. Signal conductor pattern 10c. The conductor pattern 10a for power supply and the conductor pattern 10b for ground form a capacitor electrode T facing each other with the dielectric layer 7 interposed therebetween.
A part of each of the conductor patterns 10a, 10b, and 10c on the upper surface includes a board connection pad 11 for connecting to an electrode of another electric board.
The frame-shaped substrate 2 has a plurality of through holes 12. In the through hole 12, a through conductor 12a formed of a part of the metal plating layer 9 is attached. The predetermined conductor patterns 10a, 10b, and 10c on the upper and lower surfaces of the dielectric layer 7 are connected to each other via the through conductor 12a.
The dielectric layer 7 is made of, for example, an epoxy resin, barium titanate, or aluminum oxide. The thickness of the dielectric layer 7 is about 5 to 30 μm. The dielectric constant of the dielectric layer 7 is about 30 to 3000.
The metal foil 8 is made of, for example, a copper foil. The metal plating layer 9 is formed by, for example, copper plating by a well-known plating method. The thickness of the conductor layer 10 including the metal foil 8 and the metal plating layer 9 is about 50 to 150 μm.

  The semiconductor element S is mounted on the center of the upper surface of the stacked unit 1 and is housed in the cavity C of the frame-shaped substrate 2. The semiconductor element S is electrically connected to the power supply wiring conductor 5a, the grounding wiring conductor 5b, and the signal wiring conductor 5c formed on the capacitor electrode T and the laminated portion 1.

The insulating part 3 is formed on the upper surface of the frame-shaped substrate 2 so as to cover the cavity C.
The insulating part 3 has an opening 3 a exposing the substrate connection pad 11.
The insulating part 3 is made of an electric insulating material containing a thermosetting resin such as an epoxy resin or a polyimide resin, and has a thickness of about 20 to 50 μm.

Thus, according to the wiring board A of the present invention, the frame-shaped substrate 2 in which the cavity C for housing the semiconductor element S is formed at the center.
The frame-shaped substrate 2 has a thick conductor layer 10 having a thickness of 50 to 150 μm on the upper and lower surfaces of a dielectric layer 7 having a thickness of 5 to 30 μm. Heat generated from the semiconductor element S can be efficiently radiated to the outside of the wiring board A via the thick conductor layer 10. Thereby, the semiconductor element S can be effectively prevented from being broken by heat.
A part of the conductor layer 10 includes a power supply conductor pattern 10a connected to the power supply wiring conductor 5a and a grounding conductor pattern 10b connected to the grounding wiring conductor 5b. A part of the conductor pattern 10a for the power supply and a part of the conductor pattern 10b for the ground form a capacitor electrode T facing each other with the dielectric layer 7 interposed therebetween and are connected to the adjacent semiconductor element S. . When a transient ground and power supply potential change occurs in the semiconductor element S, a charge is supplied from the capacitor electrode T to the semiconductor element S, thereby suppressing the transient ground and power supply potential fluctuation. Thereby, the semiconductor element S can be operated stably.

  Next, an example of the manufacturing method of the present invention will be described with reference to FIGS. Note that the same members as those of the wiring board A shown in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted.

First, as shown in FIG. 2A, a metal foil 8 is laminated on the upper and lower surfaces of a dielectric layer 7 having a relative dielectric constant of 30 to 3000 and a thickness of 5 to 30 μm, and a cavity is formed in the center. A substrate material 2P having a region X and a wiring forming region Y surrounding the cavity forming region X on the outer periphery is prepared.
The substrate material 2P is formed, for example, by arranging copper foil on the upper and lower surfaces of an epoxy-based resin layer and pressing while heating with a flat pressing device.

Next, as shown in FIG. 2B, a plurality of through holes 12 are formed in the wiring forming area Y of the substrate material 2P.
The diameter of the through hole 12 is about 50 to 100 μm, and is formed by, for example, drilling, laser processing, or blasting.

Next, as shown in FIG. 2C, a metal plating layer 9 is deposited on the upper and lower surfaces of the substrate material 2P and in the through holes 12. As a result, a through conductor 12a made of the metal plating layer 9 is formed in the through hole 12, and a conductor layer 10 made of the metal foil 8 and the metal plating layer 9 is formed on the upper and lower surfaces of the dielectric layer 7. The thickness of the conductor layer 10 is about 50 to 150 μm.
The metal plating layer 9 is formed of a good conductive metal such as copper by a well-known plating method, for example.

  Next, as shown in FIG. 2D, an etching resist R is formed on the surface of the conductor layer 10 so as to cover a portion corresponding to a predetermined pattern in the wiring formation region Y.

Next, as shown in FIG. 2E, after the conductor layer 10 exposed to the uncovered portion of the etching resist R is removed by etching, the etching resist R is removed. As a result, the conductor layer 10 in the cavity formation region X is removed, and the conductor patterns 10a for power supply, the conductor pattern 10b for ground, and the conductor pattern for signal are provided in the conductor layers 10 on the upper and lower surfaces of the wiring formation region Y, respectively. A predetermined conductor pattern is electrically connected to each other by a through conductor 12a, and a part of the power supply conductor pattern 10a and a part of the grounding conductor pattern 10b sandwich the dielectric layer 7 therebetween. It is formed so as to be the opposite capacitor electrode T.
Some of the conductor patterns 10a, 10b, and 10c on the upper surface include board connection pads 11 that are connected to electrodes of another electric board.

Next, as shown in FIG. 2F, a cavity C is formed by hollowing out the dielectric layer 7 in the cavity forming region X.
The cavity C is formed by, for example, laser processing.

  Next, as shown in FIG. 2 (g), the substrate material 2P having the conductor layer 10 formed on the upper and lower surfaces is placed on the adhesive sheet N, and the electrodes are placed on the adhesive sheet N exposed in the cavity C. The semiconductor element S is inserted.

  Next, as shown in FIG. 3H, the insulating portion 3 is formed on the upper side of the substrate material 2P. In the insulating part 3, an opening 3a exposing the substrate connection pad 11 is formed by, for example, laser processing. Part of the insulating portion 3 enters the cavity C and adheres to the semiconductor element S. Thereby, the semiconductor element S is fixed at a predetermined position in the cavity C. In order to form the insulating portion 3, a method of laminating an uncured resin sheet for the insulating portion 3 on the upper surface of the substrate material 2P and performing a heat treatment while pressing from above is adopted. The insulating part 3 is made of an electric insulating material containing a thermosetting resin such as an epoxy resin or a polyimide resin, and has a thickness of about 20 to 50 μm.

  Next, as shown in FIG. 3 (i), after peeling off the pressure-sensitive adhesive sheet N, an insulating layer 1P is formed below the substrate material 2P. Part of the insulating layer 1P enters the cavity C and adheres to the semiconductor element S. Thereby, the semiconductor element S is sealed in the cavity C. The insulating layer 1P is made of an electric insulating material containing a thermosetting resin such as an epoxy resin or a polyimide resin, and has a thickness of about 20 to 50 μm.

Next, as shown in FIG. 3J, a plurality of through holes 4 are formed in the insulating layer 1P.
The through hole 4 has the bottom surface of the conductor layer 10 on the lower surface and the electrode of the semiconductor element S, and has a diameter of about 20 to 100 μm.

Next, as shown in FIG. 3 (k), a wiring conductor 5 is attached to the surface of the insulating layer 1P and the inside of the through hole 4. The wiring conductor 5 is connected to the power supply wiring conductor 5a connected to the power supply conductor pattern 10a, the grounding wiring conductor 5b connected to the grounding conductor pattern 10b, and the signal conductor pattern 10c. And a signal wiring conductor 5c.
The wiring conductor 5 is formed of a good conductive metal such as copper by a well-known semi-additive method, for example.

  Finally, as shown in FIG. 3 (l), another insulating layer 1P and another wiring conductor 5 are formed on the surface of the insulating layer 1P and the surface of the wiring conductor 5, thereby having the external connection pad 6 on the lower surface. The laminated part 1 is formed. Thus, the wiring board A as shown in FIG. 1 is formed.

As described above, according to the method for manufacturing a wiring board of the present invention, the frame-shaped substrate 2 having the cavity C for accommodating the semiconductor element S is placed on the upper and lower surfaces of the dielectric layer 7 having a thickness of 5 to 30 μm by 50 to 50 μm. Since the conductor layer 10 having a thickness of 150 μm is formed of a laminated material, it is possible to provide the wiring board A capable of efficiently radiating heat generated from the semiconductor element S to the outside.
Further, a part of the conductor layer 10 is formed such that a part of the conductor pattern 10a for power supply and a part of the conductor pattern 10b for ground become a capacitor electrode T opposed to each other with the dielectric layer 7 interposed therebetween. The semiconductor element S and the capacitor electrode T are connected via power supply and ground wiring conductors 5a and 5b. When a transient ground and power supply potential change occurs in the semiconductor element S, a charge is supplied from the capacitor electrode T to the semiconductor element S, thereby suppressing the transient ground and power supply potential fluctuation. Accordingly, it is possible to provide the wiring board A that can operate the semiconductor element S stably.

REFERENCE SIGNS LIST 1 laminated portion 1P insulating layer 2 frame-shaped substrate 3 insulating portion 5a power supply wiring conductor 5b grounding wiring conductor 5c signal wiring conductor 7 dielectric layer 10 conductor layer 10a power supply conductor pattern 10b grounding conductor pattern 10c Signal conductor pattern 11 Board connection pad 12 Through hole 12a Through conductor A Wiring board C Cavity S Semiconductor element T Capacitor electrode

Claims (2)

A plurality of insulating layers are stacked, a stacked portion having a power supply wiring conductor, a grounding wiring conductor, and a signal wiring conductor on the surface and inside, and a mounting portion mounted on a central portion of an upper surface of the stacked portion. A semiconductor element connected to a part of each wiring conductor, a cavity in which a cavity for accommodating the semiconductor element is formed in a central portion, and a frame-shaped substrate disposed on an upper surface of the laminated portion; and an upper surface of the frame-shaped substrate. An insulating portion formed so as to cover the cavity, wherein the frame-shaped substrate has a dielectric constant of 30 to 3000 and a thickness of 5 to 30 μm. It has a three-layer structure in which conductor layers each having a thickness of 50 to 150 μm are laminated on upper and lower surfaces, and the end surfaces of the upper and lower conductor layers are formed on the inner peripheral side surface facing the cavity in the frame-shaped substrate, and on the outer peripheral surface. Exposed on the side And a power supply conductor pattern each connected to the power supply wiring conductor, a grounding conductor pattern connected to the grounding wiring conductor, and a signal connection connected to the signal wiring conductor. The predetermined conductor patterns on the upper and lower surfaces are electrically connected to each other via a through conductor filled in a through hole provided in the dielectric layer, and the conductor on the upper surface is provided. A part of the pattern forms a substrate connection pad for connecting to another substrate, and a part of the power supply conductor pattern and a part of the grounding conductor pattern sandwich the dielectric layer. A wiring substrate, wherein opposed capacitor electrodes are formed in the wiring substrate. A metal foil is laminated on the upper and lower surfaces of a dielectric layer having a relative dielectric constant of 30 to 3000 and a thickness of 5 to 30 μm, and a wiring is formed in a central portion and a cavity surrounding the cavity forming region in a peripheral portion. Preparing a substrate material having a region,
Forming a plurality of through holes in the wiring formation region;
A metal plating layer is deposited on the upper and lower surfaces of the metal foil and in the through-hole, a through conductor formed of the metal plating layer is formed in the through-hole, and the metal foil is formed on upper and lower surfaces of the dielectric layer. And forming a conductor layer having a thickness of 50 to 150 μm comprising the metal plating layer,
Forming an etching resist on the surface of the conductor layer to cover a portion corresponding to a predetermined pattern in the wiring formation region;
The conductor layer exposed on the uncovered portion of the etching resist is removed by etching, so that a conductor pattern for power, a conductor pattern for ground, and a signal A predetermined conductor pattern is electrically connected to each other by the through conductor, and a part of the conductor pattern for power supply and a part of the conductor pattern for ground form the dielectric layer. Forming a capacitor electrode facing the sandwich, and removing the conductor layer in the cavity forming region,
Obtaining a frame-shaped substrate by hollowing out the dielectric layer in the cavity forming region to form a cavity;
A step of placing the frame-shaped substrate on an adhesive sheet and inserting a semiconductor element into the cavity,
Forming an insulating portion having an opening on the upper surface of the frame-shaped substrate, the opening covering the cavity and exposing a part of the conductive pattern as a substrate connection pad for connecting to another substrate;
A plurality of insulating layers on the lower surface side are laminated on the lower surface of the frame-shaped substrate while removing the pressure-sensitive adhesive sheet from the frame-shaped substrate. A wiring conductor, a grounding wiring conductor connected to the grounding conductor pattern, and a step of forming a laminated portion having a signal wiring conductor connected to the signal conductor pattern,
A method of manufacturing a wiring board.

Images