JP6602981B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP6602981B2 JP6602981B2 JP2018535446A JP2018535446A JP6602981B2 JP 6602981 B2 JP6602981 B2 JP 6602981B2 JP 2018535446 A JP2018535446 A JP 2018535446A JP 2018535446 A JP2018535446 A JP 2018535446A JP 6602981 B2 JP6602981 B2 JP 6602981B2
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- 239000004065 semiconductor Substances 0.000 title claims description 109
- 239000000758 substrate Substances 0.000 claims description 54
- 238000007789 sealing Methods 0.000 claims description 52
- 230000000644 propagated effect Effects 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 12
- 230000001902 propagating effect Effects 0.000 claims description 2
- 239000002184 metal Substances 0.000 description 32
- 229910052751 metal Inorganic materials 0.000 description 32
- 238000004519 manufacturing process Methods 0.000 description 11
- 238000000034 method Methods 0.000 description 7
- 229910000679 solder Inorganic materials 0.000 description 6
- 239000000919 ceramic Substances 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 230000005855 radiation Effects 0.000 description 3
- 239000006071 cream Substances 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 238000007792 addition Methods 0.000 description 1
- 230000002730 additional effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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Description
放熱体に取り付けられる半導体装置であって、
第1の主電極および第2の主電極を有する発熱電子部品と、
前記発熱電子部品を封止する封止部と、
前記封止部に封止された第1のインナーリード部、および前記封止部から露出した第1のアウターリード部を有する第1のリード部材と、
前記第2の主電極に電気的に接続され、前記封止部に封止された第2のインナーリード部、および前記封止部から露出した第2のアウターリード部を有する第2のリード部材と、を備え、
前記第1のインナーリード部は、前記第1のアウターリード部から伝播する熱を前記放熱体に逃がす放熱端部と、前記放熱端部および前記第1のアウターリード部の間に位置し且つ前記発熱電子部品の前記第1の主電極に電気的に接続される電気接続部とを有することを特徴とする。
第1の主面および前記第1の主面と反対側の第2の主面を有する絶縁性熱伝導基材と、前記第1の主面に形成された部品実装ランド部と、を有する絶縁基板をさらに備え、
前記第2のリード部材の前記第2のインナーリード部は、前記部品実装ランド部に電気的に接続されていてもよい。
前記絶縁基板は、前記絶縁性熱伝導基材の前記第1の主面に形成され、前記部品実装ランド部から電気的に分離された孤立ランド部をさらに有し、
前記第1のインナーリード部の前記放熱端部は、前記孤立ランド部に電気的に接続され、
前記第1の主電極と前記第1のインナーリード部の前記電気接続部とは、金属ワイヤーにより、前記孤立ランド部を介さずに電気的に接続されていてもよい。
前記絶縁基板は、前記絶縁性熱伝導基材の前記第1の主面に形成され、前記部品実装ランド部から電気的に分離された孤立ランド部をさらに有し、
前記第1のインナーリード部の前記放熱端部は、前記孤立ランド部に電気的に接続され、
前記第1の主電極と前記第1のインナーリード部の前記電気接続部とは、接続子により、前記孤立ランド部を介さずに電気的に接続されていてもよい。
前記絶縁基板は、前記絶縁性熱伝導基材の前記第1の主面に形成され、前記部品実装ランド部から電気的に分離された孤立ランド部をさらに有し、
前記第1のインナーリード部の前記放熱端部は、前記孤立ランド部に電気的に接続され、
前記第1のインナーリード部は、前記電気接続部から延在し且つ前記発熱電子部品の前記第1の主電極に電気的に接続する延在接続部を有してもよい。
前記第1のインナーリード部の前記放熱端部は、前記封止部から露出した露出面を含んでもよい。
前記絶縁基板は、前記絶縁性熱伝導基材の前記第2の主面に形成された露出導電部をさらに有し、前記露出導電部は、前記封止部から露出し前記放熱体と接する露出面を含んでもよい。
前記第1のインナーリード部の前記放熱端部は、前記封止部から露出した露出面を含み、
前記第2のインナーリード部は部品実装部を有しており、前記発熱電子部品は、前記第2の主電極が前記部品実装部に電気的に接続されるように前記部品実装部の上に実装されているようにしてもよい。
前記部品実装部は、前記封止部から露出した露出面を含み、
前記第1のインナーリード部の前記放熱端部の露出面および前記部品実装部の露出面を被覆するように前記封止部に貼着された絶縁シートをさらに備えてもよい。
前記第1の主電極と前記第1のインナーリード部とは、金属ワイヤーにより電気的に接続されていてもよい。
前記第1の主電極と前記第1のインナーリード部とは、接続子により電気的に接続されていてもよい。
前記第1のインナーリード部は、前記電気接続部から延在し且つ前記発熱電子部品の前記第1の主電極に電気的に接続される延在接続部を有してもよい。
前記発熱電子部品は、ゲート電極をさらに有する半導体スイッチング素子であってもよい。
前記第1の主電極および前記ゲート電極は前記発熱電子部品の上面に設けられ、前記第2の主電極は前記発熱電子部品の下面に設けられていてもよい。
前記第1のリード部材および前記第2のリード部材のうち、一方のリード部材がバッテリーに電気的に接続され、他方のリード部材がウィンカースイッチに電気的に接続されてもよい。
第1の実施形態に係る半導体装置1について図1および図2を参照して説明する。
よって、第1の実施形態によれば、半導体装置1の低コスト化を図りつつ、外部装置から半導体装置1の内部に伝播する熱を放熱体に効率的に放熱することができる。
上記の半導体装置1の製造方法について、図3A〜図3Fを参照して説明する。
第2の実施形態に係る半導体装置1について図4を参照して説明する。第2の実施形態では、金属ワイヤー2に代えて接続子70を用いる。以下、第1の実施形態との相違点を中心に第2の実施形態について説明する。
第3の実施形態に係る半導体装置1について図5を参照して説明する。第3の実施形態では、金属ワイヤー2ではなく、リード部材40が主電極21に直接接続される。以下、第1の実施形態との相違点を中心に第3の実施形態について説明する。
第4の実施形態に係る半導体装置1について図6を参照して説明する。第4の実施形態では、インナーリード部が絶縁基板を介さずに、放熱体に直接接続される。以下、第1の実施形態との相違点を中心に第4の実施形態について説明する。
第5の実施形態に係る半導体装置1について図7および図8を参照して説明する。第5の実施形態では、絶縁基板を用いず、発熱電子部品はインナーリード部の上に実装される。以下、第1の実施形態との相違点を中心に第5の実施形態について説明する。
2,3 金属ワイヤー
10,10N 絶縁基板
11 絶縁性熱伝導基材
11a,11b 主面
12 部品実装ランド部
13 孤立ランド部
15 露出導電部
20 発熱電子部品
21,22 主電極
23 ゲート電極
30 封止部
40,40M,40N,50,50N,60 リード部材
41,41M,41N,51,51N インナーリード部
41a 延在接続部
41c 放熱端部
41d 電気接続部
41e 垂直延在部
42,52 アウターリード部
42a,52a 固定用孔
41c1,53a 露出面
53 部品実装部
70 接続子
80 絶縁シート
100 リードフレーム
110 枠部
120 タイバー
130 位置決め孔
141,142,151,152 リードフレーム端子部
160 リードフレームゲート端子部
Claims (6)
- 放熱体に取り付けられる半導体装置であって、
第1の主電極および第2の主電極を有する発熱電子部品と、
前記発熱電子部品を封止する封止部と、
前記封止部に封止された第1のインナーリード部、および前記封止部から露出した第1のアウターリード部を有する第1のリード部材と、
前記第2の主電極に電気的に接続され、前記封止部に封止された第2のインナーリード部、および前記封止部から露出した第2のアウターリード部を有する第2のリード部材と、
第1の主面および前記第1の主面と反対側の第2の主面を有する絶縁性熱伝導基材、前記第1の主面に形成され、前記第2のインナーリード部が電気的に接続された部品実装ランド部、および、前記第1の主面に形成され、前記部品実装ランド部から電気的に分離された孤立ランド部を有する絶縁基板と、
を備え、
前記第1のインナーリード部は、
前記孤立ランド部に電気的に接続され、前記第1のアウターリード部から伝播する熱を前記放熱体に逃がす放熱端部と、
前記放熱端部および前記第1のアウターリード部の間に位置し且つ前記発熱電子部品の前記第1の主電極に電気的に接続される電気接続部と、
前記電気接続部から延在し且つ前記発熱電子部品の前記第1の主電極に電気的に接続する延在接続部と、
を有することを特徴とする半導体装置。 - 放熱体に取り付けられる半導体装置であって、
第1の主電極および第2の主電極を有する発熱電子部品と、
前記発熱電子部品を封止する封止部と、
前記封止部に封止された第1のインナーリード部、および前記封止部から露出した第1のアウターリード部を有する第1のリード部材と、
前記第2の主電極に電気的に接続され、前記封止部に封止された第2のインナーリード部、および前記封止部から露出した第2のアウターリード部を有する第2のリード部材と、
を備え、
前記第1のインナーリード部は、前記第1のアウターリード部から伝播する熱を前記放熱体に逃がす放熱端部と、前記放熱端部および前記第1のアウターリード部の間に位置し且つ前記発熱電子部品の前記第1の主電極に電気的に接続される電気接続部とを有し、
前記第1のインナーリード部の前記放熱端部は、前記封止部から露出した露出面を含むことを特徴とする半導体装置。 - 前記絶縁基板は、前記絶縁性熱伝導基材の前記第2の主面に形成された露出導電部をさらに有し、前記露出導電部は、前記封止部から露出し前記放熱体と接する露出面を含むことを特徴とする請求項1に記載の半導体装置。
- 前記発熱電子部品は、ゲート電極をさらに有する半導体スイッチング素子であることを特徴とする請求項1に記載の半導体装置。
- 前記第1の主電極および前記ゲート電極は前記発熱電子部品の上面に設けられ、前記第2の主電極は前記発熱電子部品の下面に設けられていることを特徴とする請求項13に記載の半導体装置。
- 前記第1のリード部材および前記第2のリード部材のうち、一方のリード部材がバッテリーに電気的に接続され、他方のリード部材がウィンカースイッチに電気的に接続されることを特徴とする請求項13に記載の半導体装置。
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