JP6651720B2 - Imaging device and imaging device - Google Patents

Description

  The present invention relates to an imaging device and an imaging device.

2. Description of the Related Art There is an imaging device that illuminates with modulated illumination light and locks in reflected light to capture an image of an imaging target (for example, see Patent Document 1).
Patent Document 1 JP 2012-205217 A

  When the area of the imaging device is enlarged, the control signal may be attenuated in the device, and the imaging quality may be degraded.

  According to a first aspect of the present invention, a plurality of light receiving elements for individually outputting electric charges in accordance with the intensity of light reception, and an electric signal corresponding to the electric charges are provided around at least a part of the plurality of light receiving elements. A plurality of light receiving elements are arranged on a first substrate, and the amplifier is stacked on the first substrate. An imaging element arranged on the second substrate is provided.

  According to a second aspect of the present invention, there is provided an imaging apparatus including the above-described imaging element and an optical system that forms an image of an imaging target on the imaging element.

  The above summary of the present invention is not an exhaustive listing of all features of the present invention. Sub-combinations of these features can also be inventions.

FIG. 2 is a schematic diagram illustrating an electrical structure of an imaging element. FIG. 2 is a schematic exploded perspective view of the image sensor 101. FIG. 3 is a diagram mainly showing an electrical structure of the pixel circuit 110. FIG. 3 is a diagram mainly showing an electrical structure of an amplifier circuit 230. FIG. 2 is a partial cross-sectional view of the image sensor 101. FIG. 2 is a schematic diagram of an imaging device. 4 is a timing chart illustrating an operation of the image sensor 101. FIG. 2 is a diagram illustrating a layout of an image sensor 101. FIG. 2 is a diagram showing a layout of an image sensor 102. FIG. 3 is a diagram illustrating a layout of an image sensor 103. FIG. 3 is a diagram illustrating a layout of an image sensor 104. FIG. 3 is a schematic diagram showing a layout of an amplifier circuit 230. FIG. 3 is a schematic diagram showing a layout of an amplifier circuit 230. FIG. 2 is a diagram illustrating a layout of an image sensor 105. FIG. 3 is a diagram illustrating a layout of an image sensor. FIG. 9 is a schematic diagram showing another structure of the pixel circuit 400. FIG. 3 is a circuit diagram showing an electrical structure of the pixel circuit 400. 6 is a timing chart illustrating an operation of the imaging device 300. 6 is a timing chart illustrating another operation of the imaging device 300. 13 is a timing chart illustrating still another operation of the imaging device 300.

  Hereinafter, the present invention will be described through embodiments of the present invention. The following embodiments do not limit the invention according to the claims. Not all combinations of features described in the following embodiments are necessarily essential to the solution of the invention.

  FIG. 1 is a schematic diagram illustrating an electrical structure of the image sensor 101. The image sensor 101 includes a first substrate 100 and a second substrate 200 stacked on each other.

  The first substrate 100 has a plurality of pixel circuits 110 arranged in a matrix and forms a pixel array. Each of the pixel circuits 110 has a light receiving element such as a photodiode and a capacitor formed by a diffusion region or the like. Accordingly, each of the pixel circuits 110 generates a charge corresponding to the light intensity of the received light and accumulates the charge in the capacitor.

  The second substrate 200 includes a vertical drive circuit 212, a horizontal drive circuit 214, and a readout circuit 220 as a control circuit that supplies a control signal to the pixel circuit 110. Note that in the following description, the vertical drive circuit 212 and the horizontal drive circuit 214 may be collectively referred to as a pixel drive circuit 210.

  In the image sensor 101, a vertical drive circuit 212 is arranged along one side of an array of a pixel array formed by the pixel circuits 110. Further, a horizontal drive circuit 214 and a readout circuit 220 are arranged along a side orthogonal to a side where the vertical drive circuit 212 is arranged in parallel.

  The vertical drive circuit 212 is connected to each row of the pixel circuits 110 through a plurality of signal lines arranged horizontally in the drawing. The vertical drive circuit 212 has a shift register, and sequentially supplies a control signal to each row of the pixel circuits 110 through a plurality of connected signal lines. Thus, the pixel circuits 110 are sequentially selectively scanned in the vertical direction on a row-by-row basis.

  The readout circuit 220 includes a load transistor, a column selection transistor, and the like, and is connected to the pixel circuit 110 for each column. The horizontal drive circuit 214 includes a shift register and is connected to a column selection transistor in the read circuit 220. The horizontal drive circuit 214 supplies a control signal to the column selection transistor of the readout circuit 220 to sequentially drive the column selection transistors, thereby sequentially selectively scanning the pixel circuits 110 for each column through the readout circuit 220.

  In the row selected and driven by the vertical drive circuit 212, the pixel circuit 110 selectively driven by the horizontal drive circuit 214 outputs a voltage signal corresponding to the charge stored in each capacitor to the readout circuit 220. Since the vertical drive circuit 212, the horizontal drive circuit 214, and the readout circuit 220 operate synchronously according to a clock signal supplied from the outside, the two-dimensional distribution of the light intensity of the light received by the image sensor 101 is detected. It is possible to generate an image.

  FIG. 2 is a schematic exploded perspective view of the image sensor 101. FIG. The imaging element 101 has a structure in which a first substrate 100 and a second substrate 200 are stacked.

  The first substrate 100 has a pixel array formed by the pixel circuits 110 as shown in FIG. The second substrate 200 includes a plurality of amplifier circuits 230 in addition to the vertical drive circuit 212, the horizontal drive circuit 214, and the readout circuit 220 that appear in FIG. In addition, as the amplifier circuit 230, for example, a repeater, an operational amplifier, or the like in which a pair of inverter elements are connected in series can be exemplified.

  The plurality of amplifier circuits 230 on the second substrate 200 are located inside the region where the pixel circuits 110 are arranged on the first substrate 100 in the direction of the surface on which the pixel circuits 110 are arranged, and And when the second substrate 200 is stacked, it is arranged in a region overlapping with the pixel array. Further, similarly to the pixel circuit 110, the plurality of amplifier circuits 230 are arranged in a matrix on the second substrate 200.

  When the first substrate 100 and the second substrate 200 are stacked, each of the pixel circuits 110 on the first substrate is individually connected to the vertical drive circuit 212 and the horizontal drive circuit 214 via the amplifier circuit 230. Is done. Each of the amplifier circuits 230 individually amplifies the control signals supplied from the vertical drive circuit 212 and the horizontal drive circuit 214, and retransmits the control signals to the pixel circuit 110.

  Accordingly, the control signal supplied to each of the pixel circuits 110 in the image sensor 101 has a high signal level regardless of the distance between one of the vertical drive circuit 212 and the horizontal drive circuit 214 and the discrimination pixel circuit 110. Supplied. Therefore, even if the image sensor 101 has a large size or a large number of pixels, all the pixel circuits 110 are reliably driven.

  Note that in the illustrated example, the peripheral circuits including the vertical drive circuit 212, the horizontal drive circuit 214, and the readout circuit 220 are arranged on the first substrate 100 in the direction of the surface on which the pixel circuits 110 are arranged. Are arranged outside the designated area. However, since the first substrate 100 and the second substrate 200 are stacked, even if the circuit elements of the second substrate 200 are arranged in the same region as the pixel circuit 110, light is not incident on the pixel circuit 110. There is no hindrance.

  In the image sensor 101, all peripheral circuits other than the pixel circuit 110 are arranged on the second substrate 200. Therefore, the light receiving area of the first substrate 100 can be increased, and thus the imaging element 101 having high light receiving sensitivity can be formed.

  FIG. 3 is a circuit diagram showing an electrical structure of one pixel circuit 110. Each of the pixel circuits 110 has a pair of peripheral circuits 120 formed symmetrically with respect to a single light receiving element 111. Each of the peripheral circuits 120 includes a capacitor 113 and a plurality of transistors. The transistors of the peripheral circuit 120 include a read transistor 112, a reset transistor 114, an amplification transistor 115, and a selection transistor 116.

  In each of the peripheral circuits 120, the light receiving element 111 is formed by a photoelectric conversion element such as a photodiode formed on the first substrate 100, and generates a charge according to the light intensity of the received light. The capacitor 113 is formed in the floating diffusion layer formed on the first substrate 100 and is connected to the light receiving element 111 via the read transistor 112.

  When the read transistor 112 is turned on by receiving the read signals TX1 and TX2, the charge generated by the light receiving element 111 is accumulated in the capacitor 113 through the read transistor 112. The change in the potential generated at one end of the capacitor 113 is detected and output by a source follower formed by the amplification transistor 115.

  The source of the amplification transistor 115 is connected to the current source 117 when the selection transistor 116 receives the selection signal SEL and becomes conductive. As described above, in the peripheral circuit 120, the timing for transferring the charge of the light receiving element 111 to the peripheral circuit 120 and the transmission of the electric signal from the peripheral circuit 120 to the external circuit are controlled by the control signals such as the read signals TX1, TX2 and the selection signal SEL. Is controlled.

  Note that, in the image sensor 101, the read circuit 220 detects a source follower detection output in a state where the capacitor 113 is reset by the reset transistor 114 that has received the reset signal RST, and the read transistor 112 conducts to cause a potential difference to the capacitor 113. And outputs the difference from the detection output of the source follower in the case where the error occurs. Therefore, the fixed pattern noise generated in the first substrate 100 is removed from the signal output to the outside.

  The illustrated pixel circuit 110 forms a pixel array when disposed on the first substrate 100. Here, one of the peripheral circuits 120 surrounded by a dotted line in the drawing can be arranged on the second substrate 200, and the area allocated to the light receiving element 111 on the first substrate 100 can be enlarged. Thereby, the light receiving sensitivity and the dynamic range of the image sensor 101 can be improved.

  Further, in the illustrated pixel circuit 110, the light receiving element 111 is disposed on the first substrate 100, and all elements other than the light receiving element 111 are disposed on the second substrate 200, as indicated by the dashed line A in the figure. Alternatively, part of the peripheral circuit 120 may be provided on the second substrate 200. In this case, since the light receiving element 111 that receives the incident light is separated from other elements, a light-blocking layer may be provided between the first substrate 100 and the second substrate 200.

  Accordingly, stray light in the image sensor 101 and crosstalk between the devices can be reduced, and signal quality in the image sensor 101 can be improved. Further, in this embodiment, an example in which all the light receiving elements 111 are arranged on the first substrate 100 has been described, but some light receiving elements 111 may be arranged on the second substrate 200. In this case, the light receiving element 111 disposed on the first substrate 100 and the light receiving element 111 disposed on the second substrate 200 may have different roles.

  FIG. 4 is a diagram illustrating a structure of a repeater circuit as an example of the amplifier circuit 230. The illustrated amplifier circuit 230 includes a complementary gate 240 having a two-stage structure.

  Each complementary gate 240 receives an input signal at a common input node 233 of each of p-channel transistor 231 and n-channel transistor 232 connected in cascade between a voltage source and a reference voltage.

  When the potential of input node 233 is equal to the reference voltage, p-channel transistor 231 is turned on and n-channel transistor 232 is turned off. Thus, the output voltage at output node 234 coupled to the source of p-channel transistor 231 and the drain of n-channel transistor 232 is equal to the voltage source voltage. Conversely, when the potential of input node 233 is equal to the voltage source voltage, p-channel transistor 231 is turned off and n-channel transistor 232 is turned on. Therefore, the output voltage of output node 234 becomes equal to the reference potential.

  In other words, in each of the complementary gates 240, the potential of the input node 233 and the potential of the output node 234 are inverted. Therefore, the amplifier circuit 230 to which the two-stage complementary gate 240 is coupled outputs the output signal of the reference potential or the voltage source voltage following the transition of the input signal.

  Note that since the amplifier circuit 230 processes an electric signal, the amplifier circuit 230 may be provided on the second substrate 200. This prevents the presence of the amplifier circuit 230 from pressing on the area of the light receiving element 111 in the first substrate 100.

  In the case where a circuit on the first substrate 100 and a circuit on the second substrate 200 are coupled, a part of the amplifier circuit 230 may be formed on the first substrate 100 side. For example, one of the two complementary gates 240, or each or one of the p-channel transistor 231 and the n-channel transistor 232 of each complementary gate 240 may be formed on the second substrate 200. Thereby, signal loss at the joint between the first substrate 100 and the second substrate 200 is compensated.

  FIG. 5 is a partial cross-sectional view of the image sensor 101. As illustrated, the image sensor 101 is formed by stacking a first substrate 100 and a second substrate 200.

  The first substrate 100 includes a pixel circuit 110 including a light receiving element 111, a readout transistor 112, a capacitor 113, a reset transistor 114, an amplification transistor 115, and a selection transistor 116 formed over a base substrate 150. The second substrate 200 has an amplifier circuit 230 formed by the complementary gate 240.

  Each of the first substrate 100 and the second substrate 200 has connection pads 160 and 260 on the layer farthest from the base substrates 150 and 250. Thus, the first substrate 100 and the second substrate 200 are stacked with the base substrates 150 and 250 facing outside, and form an electrically integrated circuit.

  Note that the base substrate 150 of the first substrate 100 is thinned by mechanical chemical polishing or the like, and the light receiving element 111 receives light through the base substrate 150. Thus, the image sensor 101 is of a so-called back-illuminated type.

  In the first substrate 100, a light-blocking layer 130 for blocking incident light may be provided between a layer including the light-receiving element 111 and another layer. Thereby, stray light in the image sensor 101 can be suppressed, and the image quality of the image sensor 101 can be improved.

  FIG. 6 is a schematic diagram of an imaging device 300 including the imaging element 101. The imaging device 300 includes an optical system 310, a housing 320, and an irradiation unit 330.

  The optical system 310 is mounted on the front surface facing the imaging target 390 in the housing 320 housing the imaging device 101. When the optical system 310 is focused on the imaging target 390, an image of the imaging target is formed on the pixel array on the first substrate 100 of the imaging element 101. Therefore, an image of the imaging target 390 can be captured by recording the electric signal output by the imaging element 101.

  Note that the imaging includes at least one of a still image recording operation and a moving image recording operation of the imaging target 390. However, the recorded image is not limited to a light image in the visible light band, and includes an image of a heat distribution by an image in an infrared band, an image of an internal structure in a terahertz band, and the like.

  The irradiating unit 330 irradiates the modulated light 331 whose intensity has been modulated at a predetermined modulation frequency toward the imaging target 390. The modulated light 331 applied to the imaging target 390 is reflected by the imaging target 390, and then enters the imaging device 101 of the imaging device 300 as reflected light 332.

  Note that, in the environment where the illustrated imaging target 390 is placed, the imaging target 390 is illuminated by illumination light or the like emitted from the lighting fixture 380 in the room. In addition, when the image of the imaging target 390 by the imaging device 300 is in the daytime, sunlight is also directly or indirectly applied to the imaging target 390. Therefore, in the imaging device 300, a natural light component such as sunlight, which is different from the component of the modulated light 331 emitted from the irradiation unit 330, also enters the imaging device 101 as the background light 381.

  Also, the sunlight that may be included in the background light component may fluctuate constantly, even though the period is longer than the modulation frequency of the modulated light component. The background light 381 may periodically fluctuate depending on the frequency of the AC power supply. Further, when there is a moving object around the imaging target 390, the intensity of light applied to the imaging target 390 fluctuates even if it is not a light source. For this reason, if both the modulation component and the background light component enter the image sensor 101, the detection accuracy of the reflected light 332 may be affected.

  In the imaging device 300, when the imaging device 101 receives the reflected light 332 of the modulated light 331 emitted from the irradiation unit 330, the imaging device 101 emits the modulated light 331 from the irradiation unit 330 until the imaging device 101 receives the reflected light 332. Measure the time. Thereby, the distance between the imaging target 390 and the imaging element 101 can be calculated. Further, the imaging device 300 can focus the optical system 310 according to the calculated distance.

  Further, the image sensor 101 has a pixel array including a large number of pixel circuits 110, and a process of converting the reflected light 332 into an electric signal is executed for each pixel. Therefore, the imaging device 300 can be used as an image sensor that can obtain distance information for each pixel, or as a monitoring camera, a sensor of an autopilot device, or the like.

  FIG. 7 is a timing chart illustrating a distance detecting operation by the image sensor 101 using the image pickup apparatus 300. When the imaging device 300 is used, the irradiation unit 330 irradiates the modulated light 331 toward the imaging target 390. The modulated light 331 applied to the imaging target 390 is reflected by the imaging target 390 and received by the imaging device 101 as reflected light 332.

  As shown at the top of FIG. 7, the modulated light 331 is modulated at a predetermined constant modulation frequency. The reflected light 332 received by the imaging element 101 is, as shown in the second row from the top in FIG. 7, the time required to propagate from the irradiation section 330 to the imaging target 390 and from the imaging target 390 to the imaging element 101. , The phase of the modulated light 331 is shifted.

On the other hand, in the image sensor 101, as shown in the lower two stages of FIG. 7, the readout signals TX1 and TX2 synchronized with the modulated light 331 and inverted with respect to each other are supplied to the pixel circuit 110. Therefore, a part x of the signal pulse of the reflected light 332 is output from the one output _Vout1 of the pixel circuit while the one readout signal TX1 is at the high level.

Another part y of the signal pulse of the reflected light 332 is output from the other output _Vout2 of the pixel circuit while the other readout signal TX2 is at a high level. In other words, the phase shift of the reflected light 332 with respect to the modulated light 331 can be detected by comparing the output V _out1 and the output V _out2 . Therefore, the distance between the imaging device 300 and the imaging target 390 can be calculated based on the detected shift amount of the phase shift.

  FIG. 8 is a diagram illustrating a layout of the image sensor 101. In FIG. 8, solid lines indicate the second substrate 200 and the readout circuit 220, the pixel driving circuit 210, the amplifier circuit 230, and the current source 117 provided on the second substrate 200. In FIG. 8, dotted lines indicate the first substrate 100 and the pixel circuits 110 provided on the first substrate 100.

  As shown in the figure, in the image sensor 101, one amplifier circuit 230 corresponding to each of the plurality of pixel circuits 110 is arranged, and each of the plurality of pixel circuits is individually supplied with a control signal. Is also good. In this case, the layout of the pixel circuit 110 on the first substrate 100 and the layout of the amplifier circuit 230 on the second substrate 200 are aligned, and the pixel circuit 110 and the amplifier circuit 230 are connected at short distances by the connection pads 160 and 260. it can.

  Thereby, regardless of the number of pixels and the area of the image sensor 101, the signal level of the control signal can be amplified for any of the plurality of pixel circuits 110, and the same for any of the plurality of pixel circuits 110. A signal level control signal can be supplied. Therefore, the modulation frequency of the modulated light 331 can be increased, so that the time resolution can be increased and the distance measurement accuracy can be improved.

  FIG. 9 is a diagram illustrating a layout of the image sensor 102. In the image sensor 102, the second substrate 200 includes a pair of pixel driving circuits 210. The pair of pixel driving circuits 210 are disposed at symmetric positions on the second substrate 200 so as to sandwich the amplifier circuit 230 disposed corresponding to the pixel circuit 110 of the first substrate 100. Are driven in half each. As a result, the load of the pixel driving circuit 210 and the transmission distance of the control signal are reduced by half, and the driving timing of the pixel circuit 110 can be controlled more accurately.

  FIG. 10 is a diagram illustrating a layout of the image sensor 103. In the image sensor 103, on the second substrate 200, two groups of amplifying circuits 230 are arranged with a single pixel driving circuit 210 arranged substantially at the center. Thereby, while the control signal is supplied to the amplifier circuit 230 by the single pixel driving circuit 210, the transmission distance of the control signal can be reduced to approximately half of the layout shown in FIG. 8, and the driving timing of the pixel circuit 110 can be further reduced. Can be controlled accurately.

  In the drawing, the layout of the pixel circuit 110 on the first substrate 100 and the layout of the amplifier circuit 230 on the second substrate 200 are aligned. However, the layout of the second substrate 200 may be changed to a layout in which the pixel circuits 110 on the first substrate 100 are arranged at equal intervals, with the layout shown in the drawing. In this case, the wiring connected to the amplifying circuit 230 differs for each pixel circuit 110. However, the distance between the amplifying circuit 230 and the pixel circuit 110 is shorter than the entire image sensor 101, so that the wiring length is different. The signal delay due to is negligible.

  FIG. 11 is a diagram illustrating a layout of the image sensor 104. In the image sensor 104, the second substrate 200 is provided with half the number of the amplifier circuits 230 of the pixel circuits 110 in the first substrate 100. That is, one amplifier circuit 230 is provided for the plurality of pixel circuits 110. Therefore, the amplifier circuit 230 supplies a control signal to each of the two pixel circuits 110. As a result, by reducing the number of elements of the second substrate 200, an improvement in yield can be expected, and manufacturing costs can be reduced by laying.

  FIG. 12 is a schematic diagram showing another layout of the amplifier circuit 230. As illustrated in FIG. 11, when a single amplifier circuit 230 supplies a control signal to a plurality of pixel circuits 110, the amplifier circuits 230 may be staggered in adjacent rows or columns of the pixel circuits 110. Good. As a result, an improvement in yield can be expected by reducing the mounting density on the second substrate 200, and the production cost can be reduced by laying.

  FIG. 13 is a schematic diagram showing another layout of the amplifier circuit 230. As shown in FIG. 11, when a single amplifier circuit 230 supplies a control signal to a plurality of pixel circuits 110, the number of amplifier circuits 230 and the number of pixel circuits 110 are not limited to 1: 2. For example, as shown, by setting the number of the amplifier circuits 230 and the number of the pixel circuits 110 to 1: 4, the mounting density of the second substrate can be further reduced.

  FIG. 14 is a diagram illustrating a layout of the image sensor 105. In the imaging element 105, the second substrate 200 includes a plurality of read circuits 220 provided corresponding to each of the pixel circuits 110 on the first substrate 100 and forming a part of the peripheral circuit 120. The plurality of readout circuits 220 operate in synchronization with the pixel driving circuit 210 by a common clock signal. Thus, the quality of the signal read from the pixel circuit 110 can be kept constant regardless of the increase in the number of pixels, the area, and the like of the image sensor 105. Note that the read circuit 220 may be provided so as to be partly separated from the first substrate 100 and another part separately to the second substrate 200.

  In the image sensor 105, an amplifier circuit 230 is also provided on the path of the clock signal supplied to the read circuit 220. Accordingly, in the readout circuit 220 of the imaging element 105 in which the number of pixels, the area, and the like are increased, the synchronization accuracy of the plurality of readout circuits 220 is improved, and the quality of a signal output from the imaging element 105 can be improved.

  FIG. 15 is a diagram illustrating a layout of the image sensor 106. The imaging element 106 has a structure in which a single output of the pixel driving circuit 210 is commonly connected to all the pixel circuits 110 in the imaging element 105 shown in FIG. Thus, all the pixel circuits 110 receive the control signal at the same time. Further, since the pixel circuit 110 includes the readout circuit 220 individually, the output of each of the pixel circuits 110 can be individually processed by controlling the readout timing with a common clock signal. With such a structure, the structure of the pixel driving circuit can be simplified. Note that the read circuit 220 may be provided so as to be partly separated from the first substrate 100 and another part separately to the second substrate 200.

  Further, in the image sensor 106, an amplifier circuit 230 is provided on a path of a control signal supplied to the readout circuit 220. Accordingly, in the readout circuit 220 of the image sensor 106 in which the number of pixels, the area, and the like are increased, control accuracy by a clock signal can be improved, and the quality of a signal output from the image sensor 105 can be improved.

  Note that the imaging elements 101 to 106 have a structure in which the first substrate 100 and the second substrate 200 are stacked. However, it is needless to say that each of the first substrate 100 and the second substrate 200 may have a further laminated structure so that the number of layers of the entire image pickup device may be increased. Thus, for example, part or all of the pixel drive circuit 210 and the readout circuit 220 may be provided on another substrate, and the image pickup devices 101 to 106 may have a structure of three or more layers.

  FIG. 16 is a schematic diagram showing another structure of the pixel circuit 400. The pixel circuit 400 includes five read-out transistors 421, 422, 423, 424, and 425 that form a part of a peripheral circuit and five capacitive elements 431, 432, 433, and 434, for a single light-receiving element 410. 435.

  The light receiving element 410 is formed by a photodiode, the read transistors 421 to 425 are formed by CMOS transistors, and the capacitors 431 to 435 are formed as floating diffusion layers, whereby the pixel circuit 400 is formed on a common substrate by a common process. it can.

  FIG. 17 is a circuit diagram showing an electrical structure of the pixel circuit 400. Each of the capacitors 431, 432, 433, 434, and 435 outputs light received by the light receiving element 410 when the corresponding read transistor 421, 422, 423, 424, 425 receives the read signal TX1 to TX5 and conducts. The charges generated corresponding to the light intensity are individually stored. Therefore, by supplying the read signals TX1 to TX5 at different timings to the read transistors 421, 422, 423, 424, and 425, five output signals can be obtained with one light receiving element 410.

  Further, by sequentially supplying the next read signals TX1 to TX5 before each of the read transistors 421, 422, 423, 424, and 425 is saturated, the capacitance of the five capacitive elements 431, 432, 433, 434, and 435 is reduced. In addition, the dynamic range of the pixel circuit 400 can be expanded by using the capacitor as a large capacitor. As described above, the pixel circuit 400 can be used as a plurality of small-capacity pixel circuits or a single large-capacity pixel.

  FIG. 18 is a timing chart illustrating the operation of the imaging device 300 including the pixel circuit 400. This pixel circuit has a high-precision distance measurement period, a wide range distance measurement period, and a background light detection period during one detection cycle.

  In the high-precision distance measurement period, the irradiation unit 330 irradiates the imaging target 390 with the modulated light 331 having a short pulse p modulated by a high modulation frequency. Thereby, the imaging device 300 can detect the distance from the imaging device 300 to the imaging target 390 with high accuracy as described with reference to FIG.

  In this case, the pixel circuit 400 uses five capacitive elements 431 to 435 individually. This makes it possible to compensate for the reading speed of the reading circuit 220 and measure the distance to the imaging target with a short pulse length p with high accuracy.

  Next, in the wide range ranging period, the irradiation unit 330 measures the distance to the imaging target 390 using the modulated light 331 having the pulse length q longer than the pulse length p. In this case, the charges generated by the light receiving element 410 are sequentially accumulated in the five capacitance elements 431 to 435 of the pixel circuit 400, so that the saturation of the capacitance elements 431 to 435 can be prevented. Accordingly, the distance to the imaging target 390 can be measured although the measurement accuracy is reduced.

  Thus, by referring to the distance measured during the wide range ranging period, it is possible to calculate the number of cycles of the phase shift detected during the high accuracy ranging period. Therefore, even when the distance from the imaging device 300 to the imaging target 390 is long, the distance can be detected with high accuracy. For example, when the pulse length p is 3.3 ns and the pulse length q is 330 ns, the precision in the high precision ranging period is 1 cm or less, the maximum ranging range is 1 m, and the precision in the wide ranging range is 1 m or less, and the maximum distance measurement range is 100 m.

  Further, the imaging device 300 detects the intensity of light received by the imaging element 101 in a state where the irradiation unit 330 is not irradiating the modulated light 331 during the background light detection period. Thereby, the imaging device 300 can measure the intensity of the background light 381 with respect to the imaging target 390. When the intensity of the background light 381 is measured, the light is sequentially accumulated in the five capacitors 431 to 435 of the pixel circuit 400, so that strong light such as sunlight can saturate the capacitors 431 to 435.

  By subtracting the light intensity of the background light detected in this way from the light intensity of the reflected light 332 received by the image sensor 101 when the irradiation unit 330 irradiates the modulated light 331, the effect of the background light is eliminated, and Accurate ranging becomes possible. In addition, when the imaging target 390 is imaged by the imaging element 101, a high-quality image is obtained. As described above, by amplifying the control signal by the amplifier circuit 230, the modulation frequency of the modulated light 331 can be increased, so that the time resolution can be increased and the removal rate of the background light included in the low-frequency component can be reduced. Can be raised.

  FIG. 19 is a timing chart illustrating another operation of the imaging device 300 including the pixel circuit 400. The imaging device used here further has another set of a capacitor and a readout transistor. Thus, six types of reflected light 332 can be processed using a single pixel circuit 400.

  The illustrated operation has a charge discharging period in addition to the operation illustrated in FIG. As a result, the sixth capacitor not used for distance measurement or imaging is connected to the light receiving element 410, and the electric charge accumulated in the light receiving element 410 is sufficiently discharged before the next measurement cycle is started. Thereby, the accuracy of measurement or imaging using the pulse of the next cycle can be improved.

  FIG. 20 is a timing chart illustrating still another operation of the pixel circuit 400. In the wide range distance measurement period in the illustrated operation, while the pulse length p of the modulated light 331 generated by the irradiation unit 330 is kept short, charges generated in the light receiving element 410 by a plurality of pulses are collectively accumulated in the capacitor. , A long pulse of modulated light 331. As a result, without changing the modulation frequency of the irradiation unit 330, the distance measurement operation including the high-precision distance measurement period and the wide-range distance measurement period is performed.

  In the figure, eight pulses of the modulated light 331 are shown as the long-period modulated light 331. However, by sequentially accumulating charges in the plurality of capacitors 431 to 435 included in the pixel circuit 400, more charges, for example, charges generated by the modulated light 331 of several hundred pulses are accumulated, and the charge is accumulated in the wide range measurement period. Ranging can be performed.

  As described above, the present invention has been described using the embodiments, but the technical scope of the present invention is not limited to the scope described in the above embodiments. It is apparent to those skilled in the art that various changes or improvements can be made to the above embodiment. It is apparent from the description of the appended claims that embodiments with such changes or improvements can be included in the technical scope of the present invention.

  In the above-described embodiment, among the plurality of amplifier circuits 230, the gain of the control signal may be increased stepwise as the distance from the vertical drive circuit 212 or the horizontal drive circuit 214 increases. The amplification factor of the control signal may be increased stepwise as the distance from both of the drive circuits 214 increases. Further, the second substrate 200 may be divided into a plurality of regions according to the distance from the vertical drive circuit 212 and the horizontal drive circuit 214, and the amplification factor may be changed for each of the plurality of regions.

  Further, an amplification circuit 230 is provided for the pixel circuit 110 in which the signal intensity from the vertical drive circuit 212 or the horizontal drive circuit 214 is smaller than a predetermined value, and the pixel circuit 110 for which the signal intensity indicates a predetermined value is provided. Need not be provided with the amplifier circuit 230. For example, the amplifier circuit 230 is not provided for the pixel circuit 110 arranged close to the vertical drive circuit 212 or the horizontal drive circuit 214. As a result, by reducing the number of elements of the second substrate 200, an improvement in yield can be expected, and manufacturing costs can be reduced by laying.

  The order of execution of processes such as operations, procedures, steps, and steps in the apparatuses, systems, programs, and methods shown in the claims, the description, and the drawings is particularly “before” or “before”. It should be noted that the output can be realized in any order as long as the output of the previous process is not used in the subsequent process. Even if the operation flow in the claims, the specification, and the drawings is described using “first”, “next”, or the like for convenience, it means that it is essential to implement in this order. Not something.

100 first substrate, 101, 102, 103, 104, 105, 106 image sensor, 110, 400 pixel circuit, 111, 410 light receiving element, 112, 421, 422, 423, 424, 425 readout transistor, 113, 431, 432, 433, 434, 435 Capacitance element, 114 reset transistor, 115 amplifying transistor, 116 selection transistor, 117 current source, 120 peripheral circuit, 130 light shielding layer, 150, 250 base substrate, 160, 260 connection pad, 200 second Substrate, 210 pixel drive circuit, 212 vertical drive circuit, 214 horizontal drive circuit, 220 readout circuit, 230 amplifier circuit, 231 p-channel transistor, 232 n-channel transistor, 233 input node, 234 output node, 240 Auxiliary gate, 300 imaging apparatus, 310 an optical system, 320 housing, 330 irradiating unit, 331 modulated light 332 reflected light 380 lighting fixture, 381 the background light, 390 imaging target

Claims (15)

A plurality of light-receiving elements that individually output charges according to the intensity of light reception;
A peripheral circuit that outputs an electric signal corresponding to the electric charge output from at least a part of the plurality of light receiving elements,
An amplifier circuit for amplifying a control signal for controlling the peripheral circuit and supplying the amplified signal to the peripheral circuit,
The plurality of light receiving elements are arranged on a first substrate,
The amplifier circuit has a plurality of complementary gates connected sequentially,
Each of the plurality of complementary gates has a p-channel transistor and an n-channel transistor connected in cascade between a voltage source and a reference voltage and receiving an input signal at a control terminal, respectively .
The plurality of complementary gates include a complementary gate disposed on the first substrate, and a complementary gate disposed on a second substrate stacked on the first substrate, or
One of the p-channel transistor and the n-channel transistor of the plurality of complementary gates is disposed on the first substrate, and the other of the p-channel transistor and the n-channel transistor is disposed on the second substrate. It has been <br/> imaging device. A plurality of peripheral circuits are provided;
The imaging device according to claim 1, wherein a plurality of the amplifier circuits are provided corresponding to each of the plurality of peripheral circuits. A plurality of peripheral circuits are provided;
The imaging device according to claim 1, wherein the amplification circuit is provided corresponding to a peripheral circuit group formed by two or more peripheral circuits of the plurality of peripheral circuits.   4. The imaging device according to claim 2, wherein the amplification circuit is arranged so as to at least partially overlap a region where the plurality of light receiving elements and the peripheral circuit are provided. 5. A control circuit for generating the control signal and supplying the control signal to the plurality of amplifier circuits;
The imaging device according to claim 4, wherein at least a part of the control circuit is arranged in a region outside a region where the plurality of light receiving elements and the plurality of peripheral circuits are arranged.   At least a part of the control circuit is disposed between a region where one of the light receiving elements and one of the peripheral circuits are arranged, and a region where another of the light receiving elements and the other peripheral circuit are arranged. 6. The imaging device according to claim 5, wherein a control signal is supplied to the one peripheral circuit and the other peripheral circuit.   The imaging device according to claim 5, wherein at least a part of the control circuit is provided on the second substrate.   The image sensor according to claim 5, wherein at least a part of the control circuit is provided on a third substrate stacked on the second substrate.   9. The imaging device according to claim 1, wherein the control signal includes a control signal for controlling timing of transferring charges of the plurality of light receiving elements to the peripheral circuit. 10.   The imaging device according to claim 1, wherein the control signal includes a control signal that controls a timing of outputting an electric signal from the peripheral circuit. When the plurality of light receiving elements receive the reflected light reflected by the detection target, the modulated light having been intensity-modulated at a predetermined modulation frequency, and detects a phase shift of the reflected light with respect to the modulated light, and detects the phase shift. The image sensor according to any one of claims 1 to 10, which performs a detection operation of detecting a distance to the detection target based on a shift amount of the phase shift . The modulated light is first modulation light having a first pulse width set in advance, the first occurred at a different time than the modulated light, said wider than the first pulse width second pulse The imaging device according to claim 11, further comprising a second modulated light having a width. A first accumulation unit that has a plurality of capacitance elements, and stores electric charge in any of the plurality of capacitance elements using the control signal based on a modulation frequency of the first modulation light ; The imaging apparatus according to claim 12, further comprising: a second storage unit configured to store electric charges in a plurality of capacitive elements of the plurality of capacitive elements using the control signal based on a modulation frequency of the second modulated light. element.   A light-shielding layer disposed between the first substrate and another substrate stacked on the first substrate, the light-shielding layer intercepting light propagating from the first substrate to the other substrate. 14. The imaging device according to any one of 1 to 13.   An imaging apparatus comprising: the imaging device according to claim 1; and an optical system that forms an image of an imaging target on the imaging device.

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