JP6564219B2 - Crystalline silicon solar cell, manufacturing method thereof, and solar cell module - Google Patents

Description

  The present invention relates to a crystalline silicon solar cell and a method for manufacturing the same. Furthermore, the present invention relates to a solar cell module.

  In a solar cell, power generation is performed by taking out carriers (electrons and holes) generated by light irradiation to a photoelectric conversion unit having a semiconductor junction or the like to an external circuit. In order to efficiently extract carriers generated in the photoelectric conversion unit to an external circuit, a collector electrode is provided on the photoelectric conversion unit of the solar cell. For example, in a crystalline silicon solar cell using a single crystal silicon substrate or a polycrystalline silicon substrate, a collector electrode made of a thin metal is provided on the light receiving surface. In a heterojunction solar cell having an amorphous silicon layer and a transparent electrode layer on a crystalline silicon substrate, a collector electrode is provided on the transparent electrode layer.

  The collector electrode of a solar cell is generally formed by pattern printing of a silver paste by a screen printing method. However, a collector electrode formed using a silver paste has a high resistivity and a high material cost. Therefore, a method for forming a collector electrode by a plating method that is excellent in terms of material cost and process cost has been proposed.

  When forming a collector electrode by a plating method, a resist layer having an opening is generally formed on the transparent electrode layer, and a metal layer such as copper is formed by electroplating in the opening of the resist on the transparent electrode layer. However, the resist material is expensive and a mask is required to form a resist having a predetermined opening. Therefore, when a resist is used, the merit of material cost and process cost by the plating method is lost.

  Therefore, a method of forming a collecting electrode by a plating method without using a resist has been proposed. For example, in Patent Document 1 and Patent Document 2, a conductive seed is formed on a transparent electrode layer by a printing method or the like, an insulating layer having an opening is formed thereon, and through the opening of this insulating layer, A method of forming a metal electrode layer by electroplating has been proposed. In Patent Document 2, an insulating layer is formed on a conductive seed containing a low-melting-point material, and then annealing is performed by heating, whereby the low-melting-point material in the conductive seed is thermally flowed to form an opening in the insulating layer. A method has been proposed.

  The methods of Patent Document 1 and Patent Document 2 can form a thin line pattern collecting electrode by plating without using an expensive resist material, which is advantageous in terms of material cost and process cost. Moreover, by providing a low-resistance metal seed, the contact resistance between the transparent electrode layer and the collector electrode can be reduced.

  By the way, in Patent Document 3, by forming an optical refractive index matching layer made of silicon oxynitride on a transparent conductive film of a thin film solar cell, reflection of incident light is prevented, and weather resistance and water vapor barrier properties are reduced. It is disclosed that improvements can be made. In Patent Document 4, in a heterojunction solar cell, when a silicon nitride layer or the like is formed as an antireflection layer on the indium oxide layer using a CVD method or the like, the indium oxide layer is reduced by hydrogen plasma generated in the CVD. In order to prevent this, it is disclosed that a zinc oxide layer is formed on the upper side of the indium oxide layer.

WO2011 / 045287 International Publication Pamphlet WO2013 / 077038 International Publication Pamphlet JP 2010-238863 A JP 2013-89766 A

  When the present inventors formed a zinc oxide layer on an indium oxide layer as a transparent electrode layer as in Patent Document 4, and then formed a silicon nitride layer as an insulating layer (antireflection layer) by a CVD method, The modification of the indium oxide layer by hydrogen plasma could be suppressed. However, when a copper layer was formed as a collecting electrode by a plating method using a solar cell having such a transparent electrode layer and an insulating layer, zinc oxide was dissolved by a strong acid plating solution (copper sulfate), As a result, the film peeled off and the long-term reliability deteriorated.

  Thus, in the viewpoint of protecting the indium oxide layer from the hydrogen plasma and the plating solution when the silicon nitride layer is used as the insulating layer by the CVD method, no investigation has been made so far, and in terms of further improving the characteristics, There was a problem.

  The present invention achieves both the solar cell collector electrode formation by the plating method as described above and the insulating layer formation by the silicon nitride thin film, improving the conversion efficiency of the solar cell, and ensuring the long-term reliability of the solar cell. With the goal.

  As a result of intensive studies in view of the above problems, the present inventors can improve the conversion efficiency of a crystalline silicon solar cell by using a predetermined blackening prevention layer, and further, the collector electrode can be formed at low cost. As a result, the present invention was reached.

  That is, the present invention relates to the following.

A method for manufacturing a solar cell, comprising: a photoelectric conversion unit; a first transparent electrode layer mainly composed of indium oxide on a first main surface of the photoelectric conversion unit; and a collector electrode including a plating layer in this order. And
An insulating layer forming step of forming an insulating layer mainly composed of silicon nitride on the first main surface of the first transparent electrode layer by plasma CVD, and a plating layer is formed in the opening of the insulating layer by plating Plating step to be performed in this order, the first main surface of the first transparent electrode layer, the collector electrode forming region where the collector electrode is formed, the collector electrode non-formation region where the collector electrode is not formed, A blackening prevention layer forming step of forming a blackening prevention layer on substantially the entire surface of the collector non-formation region on the first main surface of the first transparent electrode layer before the insulating layer formation step. A method for manufacturing a solar cell.

  In the insulating layer forming step, the insulating layer is preferably formed on the entire surface of the blackening prevention layer.

  The blackening prevention layer preferably has a thickness of 3 nm to 100 nm.

  The blackening prevention layer is preferably a translucent insulating material formed by a PVD method.

  The translucent insulating material is preferably at least one material selected from ZrO2, HfO2, SiO, MgO, SiN, and Al2O3.

  The photoelectric conversion portion has unevenness formed by texture on the surface on the first main surface, and the blackening prevention layer has a film thickness d2 at the protrusions of the unevenness larger than a film thickness d1 at the inclined portion. It is preferable.

  The collector electrode has a base electrode layer and the plating layer in this order from the first transparent electrode layer side, and a base on the first main surface of the first transparent electrode layer before the insulating layer forming step. Preferably, the method includes a base electrode layer forming step of forming an electrode layer, and in the plating step, the plating layer is formed so as to be electrically connected to the base electrode layer through the opening of the insulating layer.

  A second transparent electrode layer mainly composed of indium oxide and a back electrode are provided in this order on the second main surface side of the photoelectric conversion unit, the back electrode is grid-like, and the second transparent electrode layer The first main surface has a back electrode forming region in which a back electrode is formed and a back electrode non-forming region in which no back electrode is formed, and the second main surface of the second transparent electrode layer It is preferable that the blackening prevention layer and the insulating layer are formed in this order on substantially the entire surface of the back electrode non-formation region.

  The back electrode preferably has a plating layer.

  It is preferable that the plating layer of the collector electrode and the plating layer of the back electrode are formed simultaneously by the plating step.

  It is preferable to produce a solar cell module having the solar cell and a wiring material connected to the solar cell.

  According to the present invention, it is possible to prevent reduction (blackening) of a transparent electrode layer (indium oxide layer) by hydrogen plasma when an insulating layer (silicon nitride layer) is formed by a CVD method. Further, since the collecting electrode can be formed by plating, the collecting electrode can be reduced in resistance, and the conversion efficiency of the solar cell can be improved. Furthermore, the transparent electrode layer can be protected from the plating solution by the insulating layer and the blackening prevention layer.

It is typical sectional drawing which shows the solar cell of this invention. It is typical sectional drawing which shows the preparation methods of the solar cell in one Embodiment of this invention. It is typical sectional drawing which shows the heterojunction solar cell concerning one Embodiment. It is typical sectional drawing which shows the heterojunction solar cell concerning one Embodiment.

As schematically shown in FIG. 1, a solar cell 100 produced by the production method of the present invention is:
On the 1st main surface of a photoelectric conversion part 50 and the photoelectric conversion part, it has the 1st transparent electrode layer 6 which has an indium oxide as a main component, and the collector electrode 70 containing a plating layer in this order. Further, the blackening prevention layer 8 and the insulating layer 9 are provided on substantially the entire surface of the first main surface of the photoelectric conversion portion where the collector electrode is not formed (also referred to as a collector electrode non-formation region).

  In the solar cell of the present invention, as shown in FIG. 2, the blackening prevention layer 8 is formed on the first main surface of the first transparent electrode layer 6 (FIG. 2 (a), blackening prevention layer forming step), An insulating layer 9 containing silicon nitride as a main component is formed on the blackening prevention layer by plasma CVD (FIG. 2B, insulating layer forming step), and a plating layer is formed in the opening of the insulating layer by plating. 72 is formed (FIG. 2C, plating step).

  Hereinafter, the present invention will be described in more detail by taking, as an example, a heterojunction crystalline silicon solar cell (hereinafter sometimes referred to as a “heterojunction solar cell”) that is an embodiment of the present invention. A heterojunction solar cell is a crystalline silicon solar cell in which a diffusion potential is formed by having a silicon thin film having a band gap different from that of single crystal silicon on the surface of a single crystal silicon substrate of one conductivity type. The silicon-based thin film is preferably amorphous. Among them, a thin intrinsic amorphous silicon layer interposed between a conductive amorphous silicon thin film for forming a diffusion potential and a crystalline silicon substrate is a crystalline silicon solar cell having the highest conversion efficiency. It is known as one of the forms.

  FIG. 3 is a schematic cross-sectional view of a crystalline silicon solar cell according to an embodiment of the present invention. In the crystalline silicon solar cell 101, a conductive silicon thin film 3 a is formed on the first main surface (light incident surface) of the one conductive single crystal silicon substrate 1 as the photoelectric conversion unit 50. As a photoelectric conversion part, it is preferable to have the conductive silicon-based thin film 3b on the second main surface (back surface) of the one-conductive single-crystal silicon substrate 1.

  A first transparent electrode layer 6a is formed on the conductive silicon thin film 3a on the first main surface of the photoelectric conversion unit 50, and a second is formed on the conductive silicon thin film 3b on the second main surface. It is preferable that the transparent electrode layer 6b is formed.

  A collecting electrode 70 including a plating layer 72 is formed on the first transparent electrode layer 6a on the first main surface. As shown in FIG. 3, the collector electrode preferably has a base electrode layer 71 and a plating layer 72 in this order.

  On the first main surface of the photoelectric conversion part (the first main surface of the first transparent electrode layer in FIG. 3), a collector electrode forming region where the collector electrode is formed, and a collector electrode non-forming region where the collector electrode is not formed, Is formed. A blackening prevention layer 8 and an insulating layer 9 are formed in this order in a region where the collector electrode is not formed (region where no collector electrode is formed). As shown in FIG. 3, a blackening prevention layer and an insulating layer having an opening may be formed between the base electrode layer 71 and the plating layer (that is, on a part of the base electrode layer).

(Photoelectric converter)
It is preferable to have intrinsic silicon-based thin films 2a and 2b between the one-conductivity-type single crystal silicon substrate 1 and the conductive silicon-based thin films 3a and 3b. First, the one conductivity type single crystal silicon substrate 1 in the crystalline silicon solar cell of the present invention will be described. In general, a single crystal silicon substrate contains an impurity that supplies electric charge to silicon in order to provide conductivity. Single crystal silicon substrates include an n-type in which atoms (for example, phosphorus) for introducing electrons into silicon atoms and a p-type in which atoms (for example, boron) for introducing holes into silicon atoms are contained. That is, “one conductivity type” in the present invention means either n-type or p-type.

  In heterojunction solar cells, electron / hole pairs are efficiently separated and recovered by providing a strong electric field with the heterojunction on the incident side where the most incident light is absorbed as the reverse junction. Can do. Therefore, the heterojunction on the light incident side is preferably a reverse junction. On the other hand, when holes and electrons are compared, electrons having smaller effective mass and scattering cross section generally have higher mobility. From the above viewpoint, the single crystal silicon substrate 1 used for the heterojunction solar cell is preferably an n-type single crystal silicon substrate. The single crystal silicon substrate 1 preferably has a texture structure on the surface from the viewpoint of light confinement.

  A silicon-based thin film is formed on the surface of the one conductivity type single crystal silicon substrate 1 on which the texture is formed. As a method for forming a silicon-based thin film, a plasma CVD method is preferable. As conditions for forming a silicon-based thin film by plasma CVD, a substrate temperature of 100 to 300 ° C., a pressure of 20 to 2600 Pa, and a high frequency power density of 0.004 to 0.8 W / cm 2 are preferably used. As a raw material gas used for forming a silicon-based thin film, a silicon-containing gas such as SiH 4 or Si 2 H 6 or a mixed gas of a silicon-based gas and H 2 is preferably used.

  The conductive silicon thin film 3 is a one-conductivity type or reverse conductivity type silicon thin film. For example, when n-type is used as the one-conductivity-type single crystal silicon substrate 1, the one-conductivity-type silicon-based thin film and the reverse-conductivity-type silicon-based thin film are n-type and p-type, respectively. As a dopant gas for forming a p-type or n-type silicon-based thin film, B2H6 or PH3 is preferably used. Moreover, since the addition amount of impurities such as P and B may be very small, it is preferable to use a mixed gas diluted in advance with SiH4 or H2. When forming a conductive silicon thin film, the energy gap of the silicon thin film may be changed by adding a gas containing a different element such as CH4, CO2, NH3, GeH4 and alloying the silicon thin film. it can.

  Examples of silicon-based thin films include amorphous silicon thin films, microcrystalline silicon (thin films containing amorphous silicon and crystalline silicon), and the like. Among these, it is preferable to use an amorphous silicon thin film. For example, when a n-type single crystal silicon substrate is used as the one-conductivity-type single crystal silicon substrate 1, a suitable configuration of the photoelectric conversion unit 50 is a p-type amorphous silicon thin film 3a / i-type amorphous silicon system. A laminated structure in the order of a thin film 2a / n-type single crystal silicon substrate 1 / i-type amorphous silicon-based thin film 2b / n-type amorphous silicon-based thin film 3b can be given. In this case, for the reason described above, it is preferable that the p-layer side be the light incident surface.

  The intrinsic silicon thin films 2a and 2b are preferably i-type hydrogenated amorphous silicon composed of silicon and hydrogen. When i-type hydrogenated amorphous silicon is deposited on a single crystal silicon substrate by CVD, surface passivation can be effectively performed while suppressing impurity diffusion into the single crystal silicon substrate. Further, by changing the amount of hydrogen in the film, it is possible to give an effective profile to the carrier recovery in the energy gap.

  The p-type silicon thin film is preferably a p-type hydrogenated amorphous silicon layer, a p-type amorphous silicon carbide layer, or a p-type amorphous silicon oxide layer. A p-type hydrogenated amorphous silicon layer is preferable from the viewpoint of suppressing impurity diffusion and reducing the series resistance. On the other hand, the p-type amorphous silicon carbide layer and the p-type amorphous silicon oxide layer are wide gap low-refractive index layers, which are preferable in terms of reducing optical loss.

  As described above, the photoelectric conversion unit 50 of the heterojunction solar cell 101 can be formed.

(Transparent electrode layer)
In a heterojunction solar cell, the 1st transparent electrode layer 6a is provided on the 1st main surface of a photoelectric conversion part, ie, the conductive silicon thin film 3a. Moreover, it is preferable to provide the 2nd transparent electrode layer 6b on the 2nd main surface of a photoelectric conversion part, ie, the conductive silicon-type thin film 3b. In the present specification, the “transparent electrode layer” means at least one of the first transparent electrode layer and the second transparent electrode layer.

  The first transparent electrode layer contains indium oxide as a main component. When forming a collector electrode by a plating process as in the present invention, an indium oxide containing indium oxide as a main component is preferably used from the viewpoints of conductivity, optical characteristics, and long-term reliability. Among them, those containing indium oxide as a main component are more preferable, and IWO using indium tin oxide (ITO) or tungsten as a doping agent is preferably used. Here, “main component” means that the content is more than 50% by weight, preferably 70% by weight or more, and more preferably 90% by weight or more.

  A doping agent can be added to the transparent electrode layer. For example, when indium oxide is used as the transparent electrode layer, examples of the doping agent include zinc, tin, titanium, tungsten, molybdenum, and silicon. When tin oxide is used as the transparent electrode layer, examples of the doping agent include fluorine.

  The doping agent can be added to one or both of the light incident side transparent electrode layer 6a and the back surface side transparent electrode layer 6b. In particular, it is preferable to add a doping agent to the light incident side transparent electrode layer 6a. By adding a doping agent to the light incident side transparent electrode layer 6a, the resistance of the transparent electrode layer itself can be reduced, and resistance loss between the transparent electrode layer 6a and the collector electrode 70 can be suppressed.

  The first transparent electrode layer may be a single layer or a laminated structure composed of a plurality of layers, but when the first transparent electrode layer 6a is a plurality of layers, at least a layer mainly composed of indium oxide is used as the outermost surface layer. That's fine. By doing in this way, the tolerance with respect to a plating solution improves. For example, when zinc oxide that is fragile to an acidic solution such as a plating solution is used as the transparent electrode layer, a laminated structure in which the outermost surface layer is covered with an indium oxide layer can be used.

  The film thickness of the first transparent electrode layer 6a on the light incident side is preferably 10 nm or more and 140 nm or less from the viewpoints of transparency, conductivity, and light reflection reduction. The role of the transparent electrode layer 6a is to transport carriers to the collector electrode 70, as long as it has conductivity necessary for that purpose, and the film thickness is preferably 10 nm or more. By setting the film thickness to 140 nm or less, light absorption loss in the transparent electrode layer 6a is small, and a decrease in photoelectric conversion efficiency accompanying a decrease in transmittance can be suppressed.

  Moreover, if the film thickness of the transparent electrode layer 6a is within the above range, an increase in carrier concentration in the transparent electrode layer can also be prevented, so that a decrease in photoelectric conversion efficiency due to a decrease in transmittance in the infrared region is also suppressed. The thickness of the transparent electrode layer is preferably 10 nm to 140 nm, more preferably 20 nm to 80 nm, and particularly preferably 40 nm to 70 nm.

  In the present invention, since silicon nitride is used as the insulating layer, which has a refractive index of about 1.8, which is relatively close to the refractive index of the transparent electrode layer, even when the transparent electrode layer is thinned to 20 nm to 80 nm, for example. The same light confinement effect as when the transparent electrode layer is thick can be expected. The film thickness in this specification means the film thickness in the direction perpendicular to the texture slope when the surface of the photoelectric conversion part has a texture structure. Of course, when the surface of the photoelectric conversion portion is smooth, the thickness is in the direction perpendicular to the main surface.

  The method for forming the transparent electrode layer is not particularly limited, but a physical vapor deposition method (PVD method) such as a sputtering method, or a chemical vapor deposition (MOCVD) method using a reaction between an organometallic compound and oxygen or water. Etc. are preferred. In any film forming method, energy by heat or plasma discharge can be used. When forming a transparent electrode layer mainly composed of indium oxide, such as the first transparent electrode layer, the sputtering method is particularly preferable.

  The substrate temperature at the time of producing the transparent electrode layer is appropriately set. For example, when an amorphous silicon thin film is used as the silicon thin film, the temperature is preferably 200 ° C. or lower. By setting the substrate temperature to 200 ° C. or lower, desorption of hydrogen from the amorphous silicon layer and accompanying dangling bonds to silicon atoms can be suppressed, and as a result, conversion efficiency can be improved.

  The back surface metal electrode 10 is preferably formed on the back surface side transparent electrode layer 6b. As the back metal electrode 10, it is desirable to use a material having high reflectivity from the near infrared to the infrared region and high conductivity and chemical stability. Examples of materials that satisfy such characteristics include silver, aluminum, copper, and gold. The method for forming the back surface metal electrode layer is not particularly limited, but a physical vapor deposition method such as a sputtering method or a vacuum evaporation method, a printing method such as screen printing, or the like is applicable.

(Collector electrode)
A collecting electrode 70 is formed on the transparent electrode layer 6a. The collector electrode 70 includes a plating layer 72. The collector electrode preferably has the base electrode layer 71 and the plating layer in this order from the first transparent electrode layer side. In this case, plating can be easily performed by providing the base electrode layer 71 having a lower resistance than the first transparent electrode layer.

  Further, a blackening prevention layer and an insulating layer are provided on substantially the entire surface of the transparent electrode layer 6a on the non-collecting electrode forming region. At this time, it is sufficient that at least the blackening prevention layer is formed on substantially the entire surface of the collector electrode non-forming region, and it is preferable that the blackening prevention layer and the insulating layer are formed on substantially the entire surface of the collector electrode non-forming region.

  Here, “substantially the entire surface” means 90% or more of the region. That is, it means that the layer is formed on 90% or more of the base electrode non-formation region (collection electrode non-formation region) on the first main surface of the photoelectric conversion part. Among these, 95% or more is preferable, and 100%, that is, it is particularly preferable to be formed over the entire surface of the base electrode layer non-forming region.

  When the blackening preventing layer is also formed in the base electrode layer non-forming region, it is possible to prevent the transparent electrode layer from being reduced by plasma when forming the insulating layer. When the insulating layer is also formed in the base electrode layer non-formation region, when the plating layer is formed by plating, the first transparent electrode layer and the photoelectric conversion part existing thereunder are chemically treated from the plating solution. And electrical protection can be achieved.

  Moreover, as shown in FIG. 2, you may have a blackening prevention layer and an insulating layer on a part on base electrode layer. That is, you may have the blackening prevention layer and insulating layer in which the opening part was formed on the base electrode layer.

  Hereinafter, a solar cell having a base electrode layer and a plating layer in this order as a collector electrode, on a collector electrode non-formation region, on a part of the collector electrode formation region, and a blackening prevention layer and an insulating layer are formed. Although described, the present invention is not limited to the following embodiments.

  As shown in FIG. 2, a base electrode layer 71 is formed on the first main surface of the first transparent electrode layer 6, and a blackening prevention layer 8 is formed so as to cover the base electrode layer 71 (FIG. 2 ( a) Blackening prevention layer forming step). Thereafter, an insulating layer 9 mainly composed of silicon nitride is formed on the blackening prevention layer 8 by plasma CVD (FIG. 2B, insulating layer forming step). Thereafter, openings are formed in the blackening prevention layer 8 and the insulating layer 9 on the base electrode layer (FIG. 2 (b ′)), and plating is applied to the openings of the blackening prevention layer 8 and the insulating layer 9 by plating. A layer 72 is formed (FIG. 2C, plating step).

  In the present embodiment, the blackening prevention layer 8 and the insulating layer 9 are formed between the base electrode layer 71 and the plating layer 72, and a part of the plating layer 72 is electrically connected to the base electrode layer 71. Here, “partially conducting” is typically a state in which an opening is formed in the insulating layer, and the opening is filled with the material of the plating layer, thereby conducting. . In addition, a part of the film thickness of the blackening prevention layer 8 and the insulating layer 9 is very thin, about several nanometers, so that the plating layer 72 is electrically connected to the base electrode layer 71. For example, when the low melting point material of the base electrode layer 71 is a metal material such as aluminum, the base electrode layer 71 and the plating layer 72 are electrically connected via an oxide film (corresponding to an insulating layer) formed on the surface thereof. The state being done is mentioned.

  The method of forming the blackening prevention layer on the base electrode layer and the opening in the insulating layer is not particularly limited. However, as described in Patent Document 2, the insulating layer 9 is formed on the base electrode layer 71 or made of the insulating layer. A method of heating (annealing) to a temperature higher than the heat flow starting temperature of the low melting point material after the film is suitably employed. When the base electrode layer is heated, the low melting point material becomes a fluid state, and the surface shape of the base electrode layer changes, and accordingly, the blackening prevention layer 8 formed on the base electrode layer 71 and An opening (crack) can be generated in the insulating layer 9. Thereby, after annealing, the plating layer 72 is formed by a plating method.

  Although the base electrode layer 71 is covered with the blackening prevention layer 8 and the insulating layer 9, the base electrode layer 71 is exposed in a portion where the blackening prevention layer 8 and the insulating layer 9 have openings. is there. Therefore, the base electrode layer is exposed to the plating solution, and metal can be deposited starting from this opening. According to such a method, a plating layer corresponding to the shape of the collector electrode can be formed by a plating method without providing a resist material layer having an opening corresponding to the shape of the collector electrode.

  In addition, a method of providing an opening in the blackening prevention layer 8 and the insulating layer 9 by irradiating the base electrode layer 71 with laser light, a patterning of the blackening prevention layer 8 and the insulating layer 9, and opening. The method of providing a part etc. are mentioned. Examples of a method for forming the pattern of the blackening prevention layer 8 and the insulating layer 9 include a patterning method using a mask using a metal mask or photolithography, but the patterning method is not particularly limited. Further, only one of the insulating layer and the blackening preventing layer may be provided on the base electrode layer, and neither the insulating layer nor the blackening preventing layer may be formed on the base electrode layer.

  Further, without providing the base electrode layer 71, the patterned blackening prevention layer 8 and the insulating layer 9 are formed on the transparent electrode layer 6a, and the transparent electrode layer 6a is used as a seed by plating to directly on the transparent electrode layer 6a. The plating layer 72 may be formed, the insulating layer 9 may be formed in a region other than the base electrode layer 71 formation region, and the plating layer 72 may be formed on the base electrode layer 71 (not shown).

  The base electrode layer 71 can be produced by a known technique such as an ink jet method, a screen printing method, a conductive wire bonding method, a spray method, a vacuum deposition method, or a sputtering method. The base electrode layer 71 is preferably patterned in a predetermined shape such as a comb shape. A screen printing method is suitable for forming the patterned base electrode layer from the viewpoint of productivity. In the screen printing method, a method of printing a collector electrode pattern using a printing paste containing a low melting point material made of metal particles and a screen plate having an opening pattern corresponding to the pattern shape of the collector electrode is preferably used. Further, the formation method of the base electrode layer is not limited to the printing method. For example, the base electrode layer may be formed by vapor deposition or sputtering using a mask corresponding to the pattern shape.

(Blackening prevention layer)
A blackening prevention layer is formed on the first main surface of the first transparent electrode layer (FIG. 2A, blackening prevention layer forming step). In the present invention, a plating layer is formed by a plating method. As described above, the first transparent electrode layer 6a is mainly composed of indium oxide that has some resistance to the plating solution.

  Here, in order to suppress the dissolution of the first transparent electrode layer in the plating solution, the insulating layer 9 is formed in the non-collecting electrode forming region other than the collecting electrode forming region. A silicon nitride thin film formed using a plasma CVD method is used from the viewpoint of the rate and the denseness of the film coating.

  However, there is a problem that the indium oxide is reduced by the hydrogen plasma generated in the process of forming the silicon nitride thin film using the CVD method and the transmittance is reduced. On the other hand, as described in Patent Document 4, an attempt was made to prevent reduction by hydrogen plasma when forming a silicon nitride layer by forming zinc oxide that is difficult to be reduced by hydrogen plasma on the indium oxide layer. Although the reduction could be prevented, when the plating layer was formed after that, dissolution by the plating solution occurred, and the solar cell characteristics were greatly deteriorated.

  On the other hand, in the present invention, by providing a predetermined blackening prevention layer 8 between the transparent electrode layer 6 and the insulating layer 9, the reduction of the transmittance due to the reduction of the transparent electrode layer 6 is prevented, and a silicon nitride thin film is used. It is possible to achieve both optical advantages.

  As the blackening prevention layer, the first transparent electrode layer mainly composed of indium oxide can be protected from hydrogen plasma that can be generated when an insulating layer mainly composed of silicon nitride is formed by plasma CVD, and Any material that can protect the first transparent electrode layer from the plating solution may be used.

  As the material of the blackening prevention layer 8, a translucent insulating material is preferable. For example, ZrO2, HfO2, SiO2, SiN, AlF3, AlN, Al2O3, BaF2, BeO, BiF3, CaF2, CeF3, LaF3, La2O3, LiF, MgF2, MgO, NaF, Si3N4, YF3, Y2O3 and the like can be mentioned.

  Here, in the case where a thin film thickness of about 30 to 200 nm is formed as the insulating layer 9, a certain degree of coverage and denseness can be ensured because the insulating layer is formed using the CVD method. It is difficult to completely eliminate the pinhole, and an undesired metal (ghost) may be deposited in the pinhole portion by the plating process. The deposition of these metals can cause light-shielding loss and recombination loss of electrical carriers due to diffusion of the metal into the crystalline silicon substrate, and such pinholes must be reduced as much as possible.

  From the viewpoint of preventing metal deposition in the pinholes of the insulating layer 9, the blackening prevention layer is preferably made of an insulating material or an insulating material for the plating process. For example, when the blackening prevention layer is a conductive material, electricity flows through the blackening prevention layer in the plating step, and plating is performed in the pinhole. On the other hand, in the case of a material having an insulation property or a sufficiently high resistance to the plating process, the insulation property is secured by the blackening prevention layer even if the insulation layer 9 has a pinhole. Therefore, it is possible to suppress the deposition of plating in the pinhole. Among them, from the viewpoint of further suppressing the deposition of plating on undesired locations, it is preferable to use an insulating material as the blackening prevention layer, and in order to capture more light from the first main surface that is the light incident surface, It is more preferable to use a translucent insulating material.

In the present specification, it is defined as being conductive if the volume resistivity is 10 ⁻² Ω · cm or less. Further, if the volume resistivity is 10 ² Ω · cm or more, it is defined as insulating.

  As a method for forming the blackening prevention layer, any method such as a PVD method or a CVD method may be used as long as hydrogen plasma is not generated to the extent that the transparent electrode layer 6 can cause reduction when the blackening prevention layer is formed. I do not care. Especially, it is more preferable to form by PVD method from a viewpoint of suppressing a pinhole. By using the PVD method, the formation methods of the blackening prevention layer 8 and the insulating layer 9 are different, and it is considered that the probability of forming pinholes can be lowered.

  For example, when a minute organic deposit is adhered to the substrate surface, if both the blackening prevention layer 8 and the insulating layer 9 are formed by plasma CVD, a chemical reaction occurs on the substrate surface to form a film. In the CVD method, a chemical reaction is hindered on the surface of the organic substance, and pinholes may be formed. On the other hand, if the PVD method is used for the blackening prevention layer 8, it is considered that a film can be easily formed on a minute organic material as described above, for example, by the PVD method in which a material is physically attached to form a film. Yeah. In such a case, since the blackening prevention layer 8 is also formed on the organic material, it is considered that the insulating layer 9 can be easily formed on the organic material by the CVD method. In this way, it is considered that by using methods having different film formation mechanisms in combination, for example, even when the insulating layer is as thin as about 30 nm to 200 nm, it is possible to prevent the formation of pinholes.

  Examples of the PVD method include a vacuum deposition method and a sputtering method, but it is more preferable to use a sputtering method. Moreover, as a translucent insulating material, ZrO2, HfO2, SiO2, SiN, AlF3, AlN, Al2O3, BaF2, BeO, BiF3, CaF2, CeF3, LaF3, La2O3, LiF, MgF2, MgO, NaF, Si3N4, YF3 by PVD method. , Y2O3 is preferably formed. Thereby, suppression of light absorption loss in the blackening prevention layer can be expected.

  The blackening prevention layer preferably has a thickness of 3 nm to 100 nm. Thereby, even if it is a case where an insulating layer is formed into a thin film as mentioned above, precipitation of the plating to an undesired location can be suppressed. Among them, the film thickness is more preferably 10 nm or more and 50 nm or less, and particularly preferably 15 nm or more and 40 nm or less from the viewpoint of reducing the reflection loss and improving the coverage.

  When the surface on the first main surface of the photoelectric conversion portion has unevenness formed by texture, the blackening prevention layer 8 is thicker at the convex portion than at the inclined portion of the unevenness. It is preferable. Under the present circumstances, it is preferable to satisfy | fill 2 * d1> d2> d1, when the film thickness in an inclination part is set to d1 and the film thickness in a convex part is set to d2.

  In the uneven protrusion (near the top), the thickness of the insulating layer 9 tends to be thin, which may cause pinholes. However, by increasing the film thickness of the blackening prevention layer in the protrusions, , And the deposition of undesired plating can be suppressed. Unless otherwise specified, in this specification, the film thickness when unevenness is formed on the surface of the photoelectric conversion portion means the film thickness (d1) in the direction perpendicular to the hypotenuse as described above. Shall.

  Examples of a method for increasing the thickness of the blackening prevention layer in the convex portion include a method of forming a blackening prevention layer by a PVD method. This is different from the CVD method, which tends to form a relatively uniform film when the material gas reacts on the uneven surface. In the PVD method such as sputtering, the material particles physically fly and adhere to the uneven surface. Therefore, the film is more easily formed in the vicinity of the convex portion than the concave portion of the concave and convex portions. Thus, it is considered that pinhole formation can be further suppressed by combining the blackening prevention layer 8 formed by the PVD method and the insulating layer 9 formed by the CVD method.

(Insulating layer)
On the blackening prevention layer 8, an insulating layer 9 mainly composed of silicon nitride (SiN) is formed (FIG. 2B, insulating layer forming step).

  Here, when the base electrode layer 71 is formed in a predetermined pattern (for example, a comb shape), a base electrode layer formation region (collection electrode formation region) in which the base electrode layer is formed on the surface of the photoelectric conversion unit 50. And a base electrode layer non-formation region (collection electrode non-formation region) in which the base electrode layer is not formed.

  The insulating layer 9 is preferably formed on substantially the entire surface of the blackening prevention layer in at least the base electrode layer non-forming region. At this time, it is more preferably formed over the entire surface of the blackening prevention layer, and particularly preferably formed so as to cover the entire surface of the base electrode layer non-forming region. That is, contact between the first transparent electrode layer and the plating solution is suppressed, and deposition of the metal layer (plating layer) on the first transparent electrode layer can be prevented. The insulating layer 9 is preferably formed also on the base electrode layer forming region, and more preferably, the insulating layer is formed on the entire base electrode layer forming region and the base electrode layer non-forming region. In this case, the insulating layer can be formed without using a mask or the like corresponding to the pattern shape of the base electrode layer, which is preferable from the viewpoint of productivity.

  By using the insulating layer 9 containing silicon nitride as a main component, light absorption by the insulating layer is reduced, and more light can be taken into the photoelectric conversion unit. Further, since the insulating layer 9 has sufficient transparency with a light absorptance of 5% or less, optical loss due to light absorption in the insulating layer is small, and without removing the insulating layer after the plating layer is formed, the solar layer is left as it is. Can be used as a battery. Therefore, the manufacturing process of a solar cell can be simplified and productivity can be further improved. The insulating layer 9 can also be used as it is without being removed. Furthermore, since it has sufficient weather resistance and stability to heat and humidity, the reliability when modularized can be improved.

  The insulating layer is formed by a plasma CVD method. In this case, a film having a denser structure with fewer defects such as pinholes can be formed. By this method, even when an insulating layer having a thin film thickness of about 30 to 200 nm is formed, a film having a highly dense structure can be formed. From the viewpoint of imparting suitable antireflection characteristics to the insulating layer 9, the film thickness is preferably set within a range of 30 nm to 200 nm, and more preferably set within a range of 50 nm to 150 nm.

  When a transparent electrode layer (generally having a refractive index of about 1.9 to 2.1) is provided on the surface of the photoelectric conversion unit 50 as in a heterojunction solar cell, the effect of preventing light reflection at the interface is enhanced and the solar cell. In order to increase the amount of light introduced into the inside, the refractive index of the insulating layer is preferably an intermediate value between the sealing material (for example, refractive index = 1.5 for EVA) and the transparent electrode layer. . From this viewpoint, the refractive index of the insulating layer 9 is preferably, for example, 1.55 to 1.95, preferably 1.6 to 1.9, and more preferably 1.65 to 1.85.

  Examples of the material having such a refractive index include a silicon oxide thin film (SiOx) in addition to a silicon nitride thin film. However, when SiOx having the above-described refractive index is formed by reducing the oxygen content, the extinction coefficient increases as the refractive index increases, and the light absorption loss in the insulating layer increases. For this reason, the insulating layer 9 is preferably composed mainly of silicon nitride having a high refractive index and a small light absorption loss. Further, silicon oxynitride may be formed by mixing oxygen during silicon nitride formation, and the refractive index may be adjusted to a desired range (SiON). Thus, in the present invention, if silicon nitride is the main component, the refractive index can be adjusted by mixing with various materials.

  In addition, unless otherwise indicated, the refractive index in this specification is a refractive index with respect to the light of wavelength 550nm, and is a value measured by spectroscopic ellipsometry. Further, it is preferable that the optical film thickness (refractive index × film thickness) of the insulating layer is set so as to improve the antireflection characteristics according to the refractive index of the insulating layer.

  For example, in the case where the surface of the photoelectric conversion unit 50 has a texture structure (uneven structure) like the crystalline silicon solar cell shown in FIG. The layer is preferably formed by a plasma CVD method. By using a highly dense insulating layer, it is possible to reduce damage to the transparent electrode layer during the plating process and to prevent metal deposition on the transparent electrode layer. Such a highly dense insulating film functions as a barrier layer of water, oxygen, etc. for the layers inside the photoelectric conversion unit 50 as well as the silicon thin film 3 in the crystalline silicon solar cell of FIG. Therefore, the effect of improving the long-term reliability of the solar cell can be expected.

  As a method for forming the silicon nitride-based thin film, for example, a substrate temperature of 100 to 200 ° C., a pressure of 20 to 2600 Pa, and a high frequency power density of 0.004 to 0.8 W / cm 2 are preferably used. Source gases used for forming a silicon nitride thin film include silane (SiH4), disilane (Si2H6), hexamethyldisiloxane (HMDSO), tetramethylsilane (TMS), tetramethoxysilane (TMOS), and tetraethoxysilane. It is preferable to mix a gas such as NH3 or N2 into a silicon-containing gas such as (TEOS) or hexamethyldisilane, or a mixed gas of a silicon-based gas and H2. Furthermore, for the formation of the silicon oxynitride thin film, SiON can be formed by mixing an oxygen-containing gas such as N 2 O with the above-mentioned mixed gas.

(Optical design)
The film thicknesses of the first transparent electrode layer 6a, the blackening prevention layer 8, and the insulating layer 9 described above cause strong interference with light in a wavelength region of about 300 nm to 1200 nm that contributes to power generation of the crystalline silicon solar cell. Since the film thickness is such, it is necessary to perform optical design in consideration of all the refractive indexes and film thicknesses of these films. The optical design may be designed using any method, but it is easier to obtain the optimum structure by optical simulation.

  In the optical simulation, for example, in a solar cell having a completely flat surface, calculation can be performed one-dimensionally using a characteristic matrix or the like. In addition, in a solar cell having a concavo-convex structure on the surface, it may be handled three-dimensionally and calculation may be performed using wave optics, or the optical interference portion may be obtained by one-dimensional calculation, and a three-dimensional ray may be obtained as a coating file. -You may calculate geometrically by introducing in tracing etc.

  Tables 1 (a) and 1 (b) show the short-circuit current values of the heterojunction solar cells when SiO2 (refractive index: 1.5) and HfO2 (refractive index 2.0) are used as the blackening prevention layer 8, respectively. The result of having calculated the rate of change by simulation is shown. The refractive index and extinction coefficient of each material in this calculation were determined from the formed film using spectroscopic ellipsometry (trade name M2000, manufactured by JA Woollam). Although the refractive index describes the value at a wavelength of 550 nm, the refractive index value at each wavelength of 300 nm to 1200 nm was used in the calculation.

  A case where the refractive index of the blackening prevention layer 8 is the same as that of SiN (refractive index: 1.8) is shown in Table 1 (c). The rate of change is based on the case where the surface structure of the solar cell is encapsulant (EVA) / transparent electrode layer (ITO) / p-type amorphous silicon film / intrinsic amorphous silicon film / single crystal silicon substrate Structure, sealing material (EVA) / insulating layer 9 (SiN) / blackening preventing layer 8 / transparent electrode layer (ITO) / p-type amorphous silicon thin film / intrinsic amorphous silicon film / single crystal The change rate (%) of the short circuit current value (Jsc) from the reference structure in the case of the silicon substrate structure is shown. In Table 1, the vertical axis represents the silicon nitride layer (SiN) as an insulating layer, and the horizontal axis represents the thickness of the blackening prevention layer.

  For example, as shown in Table 1 (a), SiO 2 is used for the blackening prevention layer 8 to have a film thickness of 71 nm, and the film thickness of the insulating layer 9 SiN (refractive index: 1.8) is 141 nm. In this case, a 1% current drop is observed with respect to the reference structure. However, in this calculation, the intrinsic current excluding the light shielding loss of the comb electrode is calculated, and in an actual solar cell, it is necessary to further consider the light shielding loss of the comb electrode.

  For example, in the basic structure, the comb electrode is usually formed by printing Ag paste. However, when the comb electrode is formed by plating as in the present case, the line width of the comb electrode is reduced because the electrical resistivity of the electrode is low. It can be made thinner, and a further improvement in current can be expected by reducing the light shielding loss of the comb electrode. In addition, since the light absorption loss due to the reduction of the transparent electrode layer is not considered in the calculation of Table 1, for example, when the film thickness of the blackening prevention layer is less than 5 nm, the blackening prevention layer is not sufficiently covered. The light absorption loss by the reduction | restoration of the 1st transparent electrode layer which may arise by this is not taken in.

  The range surrounded by the thick frame in Table 1 represents the case where the current change rate is 0% or more. However, from the viewpoint of protection from the plating solution, the thickness of the insulating layer is set to the lower limit of the thick frame when the thickness is 30 nm or more where the coating is sufficient. The refractive index n2 of the blackening prevention layer 8 may be any value, but when (a), (b), and (c) in Table 1 are compared with each other, in the case of (c), the current decrease is small. Is more widely seen, it is preferably provided between the refractive index of the sealing material and the refractive index of the transparent electrode layer. That is, the refractive index of the blackening preventing layer is preferably from 1.5 to 2.2, more preferably from 1.6 to 2.0, and particularly preferably from 1.7 to 1.9.

  In the case of SiO2 in Table 1 (a), it can be seen that the film thickness of SiN as an insulating layer is preferably 30 nm to 120 nm, and the film thickness of SiO2 is preferably in the range of 5 nm to 50 nm. In the case of HfO2 in Table 1 (b), the film thickness of SiN is 30 nm to 170 nm, and the film thickness of HfO2 is optimal in the range of 5 nm to 40 nm.

  Furthermore, in the case of Table 1 (c), the thickness of the insulating layer 9 is optimal from 30 nm to 140 nm, and the thickness of the blackening prevention layer 8 is optimal from 5 nm to 140 nm, but as can be seen from Table 1 (c), blackening occurs. It can be seen that the total thickness of the prevention layer 8 and the insulating layer 9 shows a particularly good value when it is about 150 nm or less. On the other hand, since the insulating layer 9 formed using the CVD method can be denser than the blackening prevention layer 8 formed using the PVD method, the insulating layer 9 has a certain thickness. Is preferable from the viewpoint of suppressing pinholes.

  For this reason, the film thickness of the blackening prevention layer 8 is preferably 3 nm or more and 100 nm or less, and more preferably 10 nm or more and 50 nm or less. In addition, the film thickness of the blackening prevention layer 8 is preferably 5 nm or more from the viewpoint of coverage, and the film thickness of the insulating layer 9 is preferably 30 nm or more from the viewpoint of being a protective layer against the plating solution. That is, it is considered that 30 nm or more and 50 nm or less are more preferable from the viewpoint of coverage and protection against the plating solution. Thus, the refractive index and film thickness of the blackening prevention layer 8 and the insulating layer 9 can be appropriately designed by optical simulation.

  As can be seen from Table 1, in the case of SiO 2 having the lowest refractive index of the blackening prevention layer calculated this time, a region where the current decrease is 1% or more is observed, but SiN or HfO 2 having a large refractive index is observed. In such a case, such a region where the current greatly decreases is not found in the range calculated this time. In particular, in the case of SiN in which the refractive index of the blackening prevention layer 8 is the same as that of the insulating layer 9, it can be seen that the range in which the current decrease is small is wide and particularly preferable.

  From this, it is understood that the refractive index of the blackening prevention layer 8 is preferably a value close to the refractive index of a certain insulating layer 9 and a value larger than that. Examples of the material for the blackening prevention layer 8 include ZrO2, HfO2, SiO, SiN, AlF3, AlN, Al2O3, BaF2, BeO, BiF3, CeF3, La2O3, MgO, Si3N4, and Y2O3.

(Plating process)
After the insulating layer forming step, a plating layer 72 is formed on the base electrode layer by a plating method (FIG. 2C, plating step). At this time, the metal deposited as the plating layer is not particularly limited as long as it is a material that can be formed by a plating method. For example, copper, nickel, tin, aluminum, chromium, silver, gold, zinc, lead, palladium, etc. Can be used. Among them, it is preferable to use copper from the viewpoint of low efficiency and low electrical resistance loss in the collecting electrode and low material cost.

  During operation of the solar cell (during power generation), current flows mainly through the plating layer. Therefore, from the viewpoint of suppressing resistance loss in the plating layer, the line resistance of the plating layer is preferably as small as possible. Specifically, the line resistance of the plating layer is preferably 1 Ω / cm or less, and more preferably 0.5 Ω / cm or less. On the other hand, the line resistance of the base electrode layer only needs to be small enough to function as a base layer during electroplating, for example, 5 Ω / cm or less.

  The plating layer can be formed by either an electroless plating method or an electrolytic plating method, but the electrolytic plating method is preferably used from the viewpoint of productivity. In the electroplating method, the metal deposition rate can be increased, so that the plating layer can be formed in a short time.

  The plating solution 16 used for acidic copper plating contains copper ions. For example, a known composition mainly composed of copper sulfate, sulfuric acid, and water can be used, and a metal that is a plating layer can be deposited by applying a current of 0.1 to 10 A / dm 2 thereto. . An appropriate plating time is appropriately set according to the area of the collecting electrode, current density, cathode current efficiency, set film thickness, and the like.

  The plating layer may be composed of a plurality of layers. For example, after forming a plating layer made of a material having high conductivity such as Cu on the base electrode layer via an insulating layer, a second plating layer (protective layer) having excellent chemical stability is formed on the surface of the plating layer. By forming, a collector electrode having low resistance and excellent chemical stability can be formed.

  It is preferable to provide a plating solution removing step after the plating step to remove the plating solution remaining on the surface of the substrate 12.

  As described above, the case where the collector electrode 70 is provided on the light incident side of the heterojunction solar cell has been mainly described. However, a similar collector electrode (collector electrode having a double-sided grid structure) is also formed on the back surface side as shown in FIG. Also good. In this case, the production process can be reduced, for example, by forming the light incident surface side and the back surface side plating layers simultaneously.

  Since a solar cell using a crystalline silicon substrate, such as a heterojunction solar cell, has a large amount of current, in general, power generation loss due to loss of contact resistance between the transparent electrode layer / collector electrode tends to be significant. On the other hand, in the present invention, since the collector electrode having the base electrode layer and the plating layer has a low contact resistance with the transparent electrode layer, it is possible to reduce power generation loss due to the contact resistance.

  The solar cell of the present invention is preferably modularized for practical use. The modularization of the solar cell is performed by an appropriate method. For example, a bus bar is connected to the collector electrode via an interconnector such as a tab, whereby a plurality of solar cells are connected in series or in parallel by a wiring material and sealed by a sealant and a glass plate. Is modularized.

  The solar cell module sequentially arranges the light-receiving surface side sealing material and the light-receiving surface side protective material on the light-receiving surface side of the solar battery cell, and sequentially arranges the back surface side sealing material and the back surface-side protective material on the back surface side of the solar battery cell. It is formed by doing. At this time, it is preferable to use a light-transmitting substrate such as glass as the light-receiving surface side protective material. Moreover, as a back surface side protective material, what has metal foil, such as Al, is generally used, However, The thing which does not have metal foil is preferable. Normally, when using a back side protective material that does not have a metal foil, moisture can easily penetrate into the solar cell, which may reduce long-term reliability, especially when forming grid-like electrodes on both sides become.

  On the other hand, for example, even when a double-sided grid-like collecting electrode is formed, it is preferable to form a blackening prevention layer and an insulating layer on both sides as shown in FIG. That is, the second main surface of the second transparent electrode layer has a back electrode forming region in which the back electrode is formed and a back electrode non-forming region in which the back electrode is not formed, but at least the back electrode is not formed. It is preferable to form a blackening prevention layer and an insulating layer so as to cover substantially the entire surface of the region. Thereby, the penetration | invasion of moisture can be prevented more and long-term reliability can be improved.

  Hereinafter, the present invention will be specifically described with reference to the examples of the heterojunction solar cell shown in FIG. 3, but the present invention is not limited to the following examples.

Example 1
The heterojunction solar cell of Example 1 was manufactured as follows.

  As a single conductivity type single crystal silicon substrate, an n-type single crystal silicon wafer having an incident plane of (100) and a thickness of 200 μm was used, and this silicon wafer was immersed in a 2 wt% HF aqueous solution for 3 minutes. After the silicon oxide film was removed, rinsing with ultrapure water was performed twice. This silicon substrate was immersed in a 5/15 wt% KOH / isopropyl alcohol aqueous solution maintained at 70 ° C. for 15 minutes, and the texture was formed by etching the surface of the wafer. Thereafter, rinsing with ultrapure water was performed twice. When the surface of the wafer was observed with an atomic force microscope (manufactured by AFM Pacific Nanotechnology), the surface of the wafer was most etched and a pyramidal texture with an exposed (111) surface was formed. It was.

  The etched wafer was introduced into a CVD apparatus, and an i-type amorphous silicon film having a thickness of 5 nm was formed on the light incident side as an intrinsic silicon-based thin film 2a. The film forming conditions for the i-type amorphous silicon were: substrate temperature: 150 ° C., pressure: 120 Pa, SiH 4 / H 2 flow rate ratio: 3/10, and input power density: 0.011 W / cm 2. In addition, the film thickness of the thin film in a present Example measures the film thickness of the thin film formed on the glass substrate on the same conditions by the spectroscopic ellipsometry (brand name M2000, JA Woollam Co., Ltd. product). It is a value calculated from the film forming speed obtained by this.

  On the i-type amorphous silicon layer 2a, a p-type amorphous silicon film having a thickness of 7 nm was formed as the reverse conductivity type silicon-based thin film 3a. The film forming conditions for the p-type amorphous silicon layer 3a were a substrate temperature of 150 ° C., a pressure of 60 Pa, a SiH 4 / B 2 H 6 flow rate ratio of 1/3, and an input power density of 0.01 W / cm 2. The B2H6 gas flow rate mentioned above is a flow rate of a diluted gas diluted with H2 to a B2H6 concentration of 5000 ppm.

  Next, an i-type amorphous silicon layer having a thickness of 6 nm was formed as an intrinsic silicon-based thin film 2b on the back side of the wafer. The film formation conditions for the i-type amorphous silicon layer 2b were the same as those for the i-type amorphous silicon layer 2a. On the i-type amorphous silicon layer 2b, an n-type amorphous silicon layer having a thickness of 4 nm was formed as a one-conductivity-type silicon-based thin film 3b. The film forming conditions of the n-type amorphous silicon layer 3b were: substrate temperature: 150 ° C., pressure: 60 Pa, SiH 4 / PH 3 flow rate ratio: 1/2, input power density: 0.01 W / cm 2. The PH3 gas flow rate mentioned above is the flow rate of the diluted gas diluted with H2 to a PH3 concentration of 5000 ppm.

  On top of this, indium tin oxide (ITO, refractive index: 1.9) was formed to a thickness of 70 nm as the first transparent electrode layer 6a and the second transparent electrode layer 6b. Here, the mixing ratio of tin oxide was 5 wt%. Indium oxide was used as a target, and a transparent electrode layer was formed by applying a power density of 0.5 W / cm 2 in an argon atmosphere at a substrate temperature of room temperature and a pressure of 0.2 Pa. On the back surface side transparent electrode layer 6b, silver was formed as a back surface metal electrode 8 with a film thickness of 500 nm by sputtering. On the light incident side transparent electrode layer 6a, a collector electrode 70 having a base electrode layer 71 and a plating layer 72 was formed as follows.

  For the formation of the base electrode layer 71, SnBi metal powder (particle size DL = 25 to 35 μm, melting point T1 = 141 ° C.) as a low melting point material and silver powder (particle size DH = 2 to 3 μm, as a high melting point material, A melting point T2 = 971 ° C.) at a weight ratio of 20:80, and a printing paste containing an epoxy resin as a binder resin. The printed paste was screen printed using a # 230 mesh (opening width: l = 85 μm) screen plate having an opening width (L = 80 μm) corresponding to the collector electrode pattern, and dried at 90 ° C. .

  Next, 5 nm (d1) of hafnium oxide (HfO 2, refractive index: 2.0) was formed on the entire surface of the first main surface side by sputtering. The blackening prevention layer 8 was formed using hafnium oxide as a target and applying a power density of 3.5 W / cm 2 in an argon atmosphere at a substrate temperature of room temperature and a pressure of 0.5 Pa.

  Then, it was put into a CVD apparatus, and silicon nitride (refractive index: 1.8) was formed as an insulating layer 9 with a thickness of 100 nm on the entire light incident surface side by plasma CVD. The film forming conditions for the insulating layer 9 were: substrate temperature: 150 ° C., pressure 50 Pa, SiH 4 / NH 3 flow rate ratio: 1/3, input power density: 0.04 W / cm 2. Under this condition, the refractive index of the insulating layer formed on the light incident surface side was 1.8 at a wavelength of 550 nm. Thereafter, the wafer after forming the insulating layer was introduced into a hot-air circulating oven, and an annealing process was performed at 180 ° C. for 20 minutes in an air atmosphere.

  The substrate 12 having been subjected to the annealing process as described above was put into the plating tank 11. In the plating solution 16, copper sulfate pentahydrate, sulfuric acid, and sodium chloride were added to a solution prepared so as to have a concentration of 120 g / l, 150 g / l, and 70 mg / l, respectively. (Product: ESY-2B, ESY-H, ESY-1A) added were used. Using this plating solution, plating was performed under conditions of a temperature of 40 ° C. and a current of 3 A / dm 2, and copper was uniformly deposited as a plating layer 72 with a thickness of about 10 μm on the insulating layer on the base electrode layer 71. Copper was hardly deposited in the region where the base electrode layer was not formed.

  Thereafter, the silicon wafer on the outer periphery of the cell was removed with a width of 0.5 mm by a laser processing machine, and the heterojunction solar cell of the present invention was produced. Further, a mini-module including one heterojunction solar cell is manufactured, and a solar simulator having an AM1.5 spectral distribution is used to irradiate pseudo-sunlight with an energy density of 100 mW / cm 2 at 25 ° C. The battery characteristics were measured. The structure of the mini-module is backsheet / sealing material (EVA) / wiring member-connected heterojunction solar cell / sealing material (EVA) / glass, and externally via the wiring member attached to the heterojunction solar cell. The solar cell characteristics were measured using the solar simulator.

  Thereafter, when the cross section of the solar cell was observed with a transmission electron microscope (TEM), the film thickness (d2) of the uneven portion of the blackening prevention layer was 6 nm, which was larger than the thickness of the oblique side (d1 = 5 nm). It was thick.

(Example 2)
A heterojunction solar cell was fabricated in the same manner as in Example 1 except that the film thickness d1 of HfO2 serving as the blackening prevention layer 8 was 15 nm. Similarly, the film thickness d2 of the convex and concave portions was 18 nm.

(Example 3)
A heterojunction solar cell was fabricated in the same manner as in Example 1 except that the film thickness d1 of HfO2 serving as the blackening prevention layer 8 was 30 nm. Similarly, the film thickness d2 of the convex and concave portions was 35 nm.

Example 4
A heterojunction solar cell was produced in the same manner as in Example 1 except that the film thickness d1 of HfO2 serving as the blackening prevention layer 8 was 50 nm. Similarly, the film thickness d2 of the convex and concave portions was 57 nm.

(Comparative Example 1)
A heterojunction solar cell was produced in the same manner as in Example 1 except that the blackening prevention layer 8 was not formed.

  The production conditions and solar cell characteristics (open circuit voltage (Voc), short circuit current density (Jsc), fill factor (FF), and conversion efficiency (Eff)) of the heterojunction solar cells of the above Examples and Comparative Examples are shown in Table 2. Shown in

  Table 2 shows values normalized by the values of the parameters of Comparative Example 1. As can be seen from Table 2, it can be seen that the current values in Examples 1 to 4 in which HfO2 was formed increased compared to Comparative Example 1 in which HfO2 was not formed. This is presumably because, in the comparative example 1, when forming the SiN as the insulating layer 9, the ITO as the transparent electrode layer 6 was reduced by the hydrogen plasma and the transmittance was lowered. On the other hand, in Examples 1 to 4 in which HfO2 that is the blackening prevention layer 8 was formed, it was considered that a high current value could be obtained by suppressing the reduction of ITO.

  Compared to Comparative Example 1, in Example 1, a 5 nm blackening prevention layer was formed, and the transparent electrode layer was protected by the blackening prevention layer although it was not perfect. It has been seen. In Examples 2 to 4, since the transparent electrode layer was almost completely covered with the blackening prevention layer, the current was further improved.

  Moreover, when Examples 1-4 were compared, the characteristic of Example 3 whose thickness of a blackening prevention layer is 30 nm became the highest. This is because, in the solar cell created this time, the balance between the change in the optical current and the change in the absorption loss of reduction due to the improvement in the coverage of the blackening prevention layer 8 is 30 nm. It is thought that it became the best in the case.

  As described above with reference to the examples, according to the present invention, reduction of the transparent electrode layer during formation of the insulating layer can be suppressed, and a high-output solar cell can be provided.

1. 1. One conductivity type single crystal silicon substrate 2. Intrinsic silicon-based thin film 5. Conductive silicon thin film Transparent electrode layer 70. Collector electrode 71. Ground electrode layer 72. Plating layer 8. 8. Blackening prevention layer Insulating layer 10. Back metal electrode 50. Photoelectric conversion unit 100. Solar cell 101. Heterojunction solar cell

Claims (10)

A method for manufacturing a solar cell, comprising: a photoelectric conversion unit; a first transparent electrode layer mainly composed of indium oxide on a first main surface of the photoelectric conversion unit; and a collector electrode including a plating layer in this order. And
An insulating layer forming step of forming an insulating layer mainly composed of silicon nitride by a plasma CVD method on the first main surface of the first transparent electrode layer;
A plating step of forming a plating layer in the opening of the insulating layer by plating, in this order,
The first main surface of the first transparent electrode layer has a collecting electrode forming region where a collecting electrode is formed, and a collecting electrode non-forming region where a collecting electrode is not formed,
Before the insulating layer formation step, the method includes a blackening prevention layer forming step of forming a blackening prevention layer on substantially the entire surface of the collector non-formation region on the first main surface of the first transparent electrode layer, The material of the blackening prevention layer is selected from HfO2, SiO2, SiN, AlF3, AlN, Al2O3, BaF2, BeO, BiF3, CaF2, CeF3, LaF3, La2O3, LiF, MgF2, MgO, NaF, Si3N4, YF3, Y2O3. Ri least one material der, the blackening prevention layer has a thickness of at 15nm or more 100nm or less, the manufacturing method of the solar cell.   The method for manufacturing a solar cell according to claim 1, wherein in the insulating layer forming step, the insulating layer is formed on substantially the entire surface of the blackening prevention layer. The blackening prevention layer is a transparent insulating material formed by a PVD method, a method for manufacturing a solar cell according to claim 1 or 2. The method for manufacturing a solar cell according to claim 3 , wherein the translucent insulating material is at least one material selected from HfO 2, SiO 2, MgO, SiN, and Al 2 O 3 . The photoelectric conversion portion has unevenness formed by texture on the surface on the first main surface, and the blackening prevention layer has a film thickness d2 at the protrusions of the unevenness larger than a film thickness d1 at the inclined portion. The manufacturing method of the solar cell of any one of Claims 1-4 . The collector electrode has a base electrode layer and the plating layer in this order from the first transparent electrode layer side,
Before the insulating layer forming step, it has a base electrode layer forming step of forming a base electrode layer on the first main surface of the first transparent electrode layer,
In the plating step, the as conductive with the underlying electrode layer through an opening in the insulating layer, the plating layer is formed, producing a solar cell according to any one of claims 1-5. On the second main surface side of the photoelectric conversion portion, it further has a second transparent electrode layer mainly composed of indium oxide and a back electrode in this order,
The back electrode has a grid shape,
The first main surface of the second transparent electrode layer has a back electrode forming region in which a back electrode is formed, and a back electrode non-forming region in which a back electrode is not formed,
Over substantially the entire surface of the back electrode non-formation region in the second main surface of the second transparent electrode layer, blackening prevention layer and the insulating layer are formed in this order, according to any one of claims 1 to 6 Solar cell manufacturing method. The said back surface electrode is a manufacturing method of the solar cell of Claim 7 which has a plating layer. The method for manufacturing a solar cell according to claim 8 , wherein the plating layer of the collecting electrode and the plating layer of the back electrode are formed simultaneously by the plating step. To produce a solar cell by the method according to any one of claims 1 to 9 for connecting the wiring member to the solar cell, a method for manufacturing a solar cell module.