JP6430842B2 - Method for manufacturing solar cell element and method for manufacturing solar cell module - Google Patents

Description

  The present invention relates to a solar cell element and a manufacturing method thereof, and a solar cell module and a manufacturing method thereof.

  In a solar cell element provided with a silicon substrate, a passivation film is provided on the surface of the silicon substrate in order to reduce recombination of minority carriers. As a material for the passivation film, for example, an oxide made of silicon oxide or aluminum oxide, or a nitride made of a silicon nitride film or the like is employed (see, for example, Patent Document 1 below). In addition, a method for improving the reliability of the solar cell element by providing a protective layer on the passivation layer has been proposed (see, for example, Patent Document 2 below).

JP 2009-164544 A Special table 2010-527146 gazette

  However, if a vacuum process is used when forming the protective layer, it is difficult to improve productivity.

  Accordingly, it is an object of the present invention to provide a solar cell element and a manufacturing method thereof, and a solar cell module and a manufacturing method thereof that can improve productivity.

In order to solve the above problems, a method for manufacturing a solar cell element according to one aspect of the present invention includes a first main surface and a second main surface located on the opposite side of the first main surface, and p A semiconductor in which a p-type semiconductor region and an n-type semiconductor region are stacked so that the p-type semiconductor region is located closest to the first main surface and the n-type semiconductor region is located closest to the second main surface A substrate, a passivation layer including aluminum oxide disposed on the p-type semiconductor region located closest to the first main surface, and silicon oxide including nitrogen disposed on the passivation layer. A protective layer , wherein the protective layer has a coating film in which a liquid or solid having a Si-N bond is dissolved in an organic solvent on the passivation layer. And the coating Firing the formed.

Furthermore, the manufacturing method of the solar cell module which concerns on one form of this invention is equipped with the solar cell element which consists of a manufacturing method of the said solar cell element , The said passivation layer and the said passivation on the said 1st main surface of the said semiconductor substrate. A method of manufacturing a solar cell module in which a first power generation unit in which a first conductor juxtaposed with a layer is disposed and a second power generation unit having a second conductor are electrically connected via a wiring conductor. Te, comprising said first conductor of said first power generation unit, the higher the wiring conductor disposed Engineering of arranging the wiring conductor on the second conductor of the second power generation unit.

  According to the above solar cell element and solar cell module, high efficiency can be realized. Moreover, according to the manufacturing method of the above solar cell element and solar cell module, the protective layer can be formed by a simple process such as a coating method without using a vacuum process, thereby improving productivity. sell.

It is a top view which shows the external appearance of the 1st main surface of the solar cell element which concerns on one Embodiment of this invention. It is a top view which shows the external appearance of the 2nd main surface of the solar cell element which concerns on one Embodiment of this invention. (A) is sectional drawing which shows the A-A 'cross section in FIG. 1, FIG. 2, (b) is a modification of (a). (A)-(f) is sectional drawing which shows the manufacturing process of the solar cell element which concerns on one Embodiment of this invention, respectively. It is a top view which shows the external appearance of the 1st main surface of the solar cell element which concerns on the modification of this invention. It is sectional drawing which shows the B-B 'cross section in FIG. 5 of the solar cell element which concerns on the modification of this invention. It is a top view which shows the external appearance of the 1st main surface of the solar cell element connected by the wiring conductor which concerns on one Embodiment of this invention. It is a top view which shows the external appearance of the 2nd main surface of the solar cell element connected by the wiring conductor which concerns on one Embodiment of this invention. It is a top view which shows the external appearance of the solar cell module which concerns on one Embodiment of this invention. It is sectional drawing which shows the cross section of the solar cell module which concerns on one Embodiment of this invention. (A) is sectional drawing which shows the C-C 'cross section in FIG. 7, FIG. 8, Each of (b), (c) is a modification of (a). (A) is sectional drawing of the solar cell element of a comparative example, (b) is sectional drawing of the solar cell module of a comparative example. It is a graph which shows transition of the output of the solar cell module by the moisture-proof test in an Example and a comparative example.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The drawings are schematically shown.

<< First Embodiment >>
<Solar cell element>
First, the basic configuration of the solar cell element of this embodiment will be described. As shown in FIGS. 4A to 4F, the solar cell element 10 includes a semiconductor substrate 1 having a first main surface 1a and a second main surface 1b located on the opposite side of the first main surface 1a. Yes. The semiconductor substrate 1 includes a first semiconductor region 2 of a p-type semiconductor region and a second semiconductor region 3 of an n-type semiconductor region, the first semiconductor region 2 being located closest to the first main surface 1a side, The semiconductor regions 3 are stacked so as to be located closest to the second main surface 1b. Further, the first passivation layer 5 containing aluminum oxide is formed on the first semiconductor region 2 located closest to the first main surface 1a side of the semiconductor substrate 1, and the silicon oxide containing nitrogen is disposed thereon. And a protective layer 11.

  Next, a specific configuration of the solar cell element 10 will be described. As shown in FIGS. 1-3, the solar cell element 10 has the 1st main surface 10a and the 2nd main surface 10b. The second main surface 10b is a surface (light receiving surface) that mainly receives incident light. The first main surface 10 a is a surface (for example, a non-light receiving surface) located on the opposite side of the second main surface 10 b of the solar cell element 10.

  The solar cell element 10 includes a semiconductor substrate 1, a first passivation layer 5, a second passivation layer 6, an antireflection layer 7, a first electrode 8, and a second electrode 9. Furthermore, the solar cell element 10 has at least a protective layer 11 on the first passivation layer 5.

  The passivation effect of the first passivation layer 5 and the second passivation layer 6 includes an electric field passivation effect due to a built-in electric field (an electric field is formed near the interface due to the presence of the passivation layer) and dangling bonds at the interface. And a passivation effect (chemical passivation). Here, the electric field passivation effect means that the larger the fixed charge density of the passivation layer, the more effective the effect. For example, for p-type silicon, the passivation layer is better with a higher negative fixed charge density. Chemical passivation means that the smaller the interface state density, the more effective.

The first passivation layer 5 and the second passivation layer 6 are formed by ALD (Atomic Layer).
It is formed using the Deposition (atomic layer deposition) method. In the ALD method, for supplying aluminum, an organic metal gas containing aluminum such as trimethylaluminum (TMA) or triethylaluminum (TEA) and a gas containing oxygen such as ozone or water for oxidizing aluminum are used as raw materials.

  In the semiconductor substrate 1, a pn junction is formed by the first semiconductor region 2 and the second semiconductor region 3. In addition to the pn junction region, the semiconductor substrate 1 includes a semiconductor junction region by interposing another semiconductor region such as an i-type semiconductor region between the first semiconductor region 2 and the second semiconductor region 3, for example. It may be.

  As the semiconductor of the first semiconductor region 2, for example, crystalline silicon such as single crystal silicon and polycrystalline silicon, or amorphous silicon is employed. By using at least one of boron (B) and gallium (Ga) as the p-type dopant, the first semiconductor region 2 has the p-type conductivity type.

  The thickness of the first semiconductor region 2 is, for example, 250 μm or less, and may be 150 μm or less. The shape of the first semiconductor region 2 is not particularly limited. For example, if the shape is a quadrangular shape in plan view, the first semiconductor region 2 can be easily manufactured.

  The second semiconductor region 3 has a surface layer on the second main surface 1b side of the crystalline silicon substrate by diffusing an element serving as an n-type dopant in a region on the second main surface 1b side of the p-type crystal silicon substrate. Formed inside. At this time, a portion other than the second semiconductor region 3 in the crystalline silicon substrate can be the first semiconductor region 2. The n-type dopant may be phosphorus (P), for example.

  In addition, as shown in FIGS. 3A and 3B, the uneven portion 12 is disposed on the second main surface 1 b of the semiconductor substrate 1. Here, the height of the convex part in the uneven | corrugated | grooved part 12 should just be about 0.1-10 micrometers, for example, and the width | variety of a convex part should just be about 1-20 micrometers, for example. Moreover, the surface shape of the recessed part of the uneven | corrugated | grooved part 12 should just be a substantially spherical shape, for example. The above-mentioned “height of the convex portion” is based on a plane (reference plane) passing through the bottom surface of the concave section and parallel to the first main surface 1a, and the normal direction of the reference plane from the reference plane. It means the distance to the top surface of the convex part. Further, the “width of the convex portion” means a distance between the bottom surfaces of adjacent concave portions in a direction parallel to the reference plane.

  The first passivation layer 5 is disposed on the first main surface 1 a side of the semiconductor substrate 1. That is, the first passivation layer 5 is disposed on the first main surface 1 a side of the first semiconductor region 2. As a material for the first passivation layer 5, for example, aluminum oxide may be used. When the first passivation layer 5 exists, minority carrier recombination in the first main surface 1a of the semiconductor substrate 1 is reduced by a so-called passivation effect. Thereby, since the open circuit voltage and short circuit current of the solar cell element 10 increase, the output characteristic of the solar cell element 10 improves. In addition, the average value of the thickness of the 1st passivation layer 5 should just be about 3-100 nm, for example.

  In the first passivation layer 5, if aluminum oxide has a negative fixed charge density, electrons which are minority carriers are reduced in the vicinity of the interface with the first passivation layer 5 in the first semiconductor region 2. The energy band bends in the direction. Specifically, in the first semiconductor region 2, the energy band is bent such that the closer to the interface with the first passivation layer 2, the greater the electron potential. Thereby, the passivation effect by what is called a built-in electric field increases. Further, the composition and the like of the first passivation layer 5 are appropriately adjusted, so that the passivation effect due to the built-in electric field and the passivation effect due to dangling bond termination are increased.

  The second passivation layer 6 is disposed on the second main surface 1 b side of the semiconductor substrate 1. That is, the second passivation layer 6 is disposed on the second main surface 1 b of the second semiconductor region 3. When the second passivation layer 6 exists, minority carrier recombination on the second main surface 1b side of the semiconductor substrate 1 is reduced by a passivation effect due to the so-called dangling bond termination. Thereby, since the open circuit voltage and short circuit current of the solar cell element 10 increase, the output characteristic of the solar cell element 10 improves. In addition, the average value of the thickness of the 2nd passivation layer 6 should just be about 3-100 nm, for example.

  Here, when aluminum oxide is adopted as the material of the second passivation layer 6, for example, a positive interface fixed charge density or a negative interface fixed charge smaller than the aluminum oxide is formed on the second passivation layer 6. The antireflection layer 7 having a density may be disposed. According to such a configuration, the second passivation layer 6 has a negative interface fixed charge density in the vicinity of the interface with the second passivation layer 6 in the second semiconductor region 3. Thereby, the malfunction that an energy band bends in the direction which the hole which is a minority carrier increases is reduced. As a result, characteristic deterioration due to an increase in minority carrier recombination on the second main surface 1b side of the semiconductor substrate 1 is suppressed.

The first passivation layer 5 and the second passivation layer 6 can be easily formed by using the ALD method. In the ALD method, for example, an organic metal gas containing aluminum (Al) such as trimethylaluminum (TMA) or triethylaluminum (TEA) for supplying aluminum, and ozone (O ₃ ) or water (H for oxidizing aluminum) are used. _A gas containing oxygen (O) such as ₂ O) is used as a raw material.

  The antireflection layer 7 is a film for improving the efficiency of light absorption in the solar cell element 10. The antireflection layer 7 is disposed on the second main surface 10 b side of the second passivation layer 6. The material of the antireflection layer 7 may be, for example, silicon nitride or silicon oxide. The thickness of the antireflection layer 7 may be appropriately set according to the materials of the semiconductor substrate 1 and the antireflection layer 7. Thereby, in the solar cell element 10, the conditions which are hard to reflect with respect to the light of a specific wavelength range are implement | achieved. The above-mentioned “light in a specific wavelength region” refers to a wavelength region around the peak wavelength of the irradiation intensity of sunlight. When the semiconductor substrate 1 is a crystalline silicon substrate, the refractive index of the antireflection layer 7 may be, for example, about 1.8 to 2.3, and the average thickness of the antireflection layer 7 is For example, what is necessary is just about 20-120 nm.

  The antireflection layer 7 may be provided on the side surface 1 c side of the semiconductor substrate 1. In this case, the antireflection layer 7 becomes dense when it is formed by the ALD method. As a result, the formation of minute openings such as pinholes on the side surface 1c of the semiconductor substrate 1 is greatly reduced, and characteristic deterioration due to the occurrence of leakage current can be avoided.

  The third semiconductor region 4 is disposed on the first main surface 1 a side of the semiconductor substrate 1. The third semiconductor region 4 has the same p-type conductivity as the first semiconductor region 2. The dopant concentration in the third semiconductor region 4 is higher than the dopant concentration in the first semiconductor region 2. That is, the third semiconductor region 4 is doped with the p-type dopant at a higher concentration than the p-type dopant doped into the semiconductor substrate 1 in order to form the first semiconductor region 2. It is formed.

  The third semiconductor region 4 has a role of generating a built-in electric field on the first main surface 1 a side of the semiconductor substrate 1 and reducing recombination of minority carriers on the first main surface 1 a side of the semiconductor substrate 1. . For this reason, the conversion efficiency of the solar cell element 10 can be further increased by the presence of the third semiconductor region 4. The third semiconductor region 4 is formed, for example, by doping an element serving as a dopant such as boron or aluminum on the first main surface 1a side of the semiconductor substrate 1.

  The first electrode 8 is disposed on the first main surface 1a side of the semiconductor substrate. As shown in FIG. 2, the first electrode 8 includes, for example, a plurality of first output extraction electrodes 8a and a large number of linear first current collecting electrodes 8b. At least a part of the plurality of first output extraction electrodes 8a intersects with the plurality of linear first current collection electrodes 8b to be electrically connected to the plurality of first current collection electrodes 8b. .

  The width | variety in the transversal direction of the 1st current collection electrode 8b should just be about 50-300 micrometers, for example. The width | variety in the transversal direction of the 1st output extraction electrode 8a should just be about 1.3-3 mm, for example. That is, the width in the short direction of the first current collecting electrode 8b may be smaller than the width in the short direction of the first output extraction electrode 8a. Moreover, the space | interval of adjacent 1st current collection electrode 8b among the some 1st current collection electrodes 8b should just be about 1-3 mm. Furthermore, the thickness of the 1st electrode 8 should just be about 10-40 micrometers, for example. The first electrode 8 is fired after, for example, a conductive paste (silver paste) containing silver as a main component is applied in a desired pattern on the first main surface 1a of the semiconductor substrate 1 by screen printing or the like. Is formed. Further, aluminum may be mainly used as the material of the first current collecting electrode 8b, and silver may be mainly used as the material of the first output extraction electrode 8a.

  The second electrode 9 is disposed on the second main surface 1 b side of the semiconductor substrate 1. As shown in FIG. 1, the second electrode 9 includes, for example, a plurality of second output extraction electrodes 9a and a large number of linear second current collecting electrodes 9b. Here, at least a part of the second output extraction electrode 9a is electrically connected to the plurality of second current collection electrodes 9b by intersecting with the plurality of linear second current collection electrodes 9b. Yes.

The width | variety in the transversal direction of the 2nd current collection electrode 9b should just be about 50-200 micrometers, for example. The width | variety in the transversal direction of the 2nd output extraction electrode 9a should just be about 1.3-2.5 mm, for example. That is, the width of the second collector electrode 9b in the short direction may be smaller than the width of the second output extraction electrode 9a in the short direction. Moreover, the space | interval of the adjacent 2nd current collection electrodes 9b among the some 2nd current collection electrodes 9b should just be about 1-3 mm. Furthermore, the thickness of the 2nd electrode 9 should just be about 10-40 micrometers, for example. In addition, the 2nd electrode 9 is formed by baking after apply | coating a silver paste with the desired pattern on the 2nd main surface 1b of the semiconductor substrate 1 by screen printing etc., for example.

  As shown in FIG. 3A, a protective layer 11 made of silicon oxide containing nitrogen is disposed on the first passivation layer 5. By the presence of the protective layer 11 in the solar cell element 10, moisture permeability from the outside can be suppressed so that the passivation effect is not impaired, and the electrical characteristics of the solar cell element 10 are not impaired. Can be improved. The protective layer 11 is formed and disposed by, for example, a spray method or a spin coat method. Further, by setting the thickness of the protective layer 11 to 200 to 1000 nm, the reliability can be improved without impairing the electrical characteristics. Note that. The presence or absence of nitrogen in silicon oxide may be confirmed by using a Fourier transform infrared spectroscopy (FT-IR) apparatus to confirm the Si—N bond.

  When the film thickness is less than 200 nm, sufficient reliability cannot be obtained, and when the film thickness exceeds 1000 nm, the formation of the coating film and the firing time become long, so that the productivity of the solar cell element 10 is deteriorated. Moreover, peeling of the film occurs due to the internal stress of the coating film after baking, resulting in a decrease in reliability.

  Since the protective layer 11 contains nitrogen in silicon oxide, it is excellent in terms of reducing moisture permeability. This is presumed that since a denser film is formed with silicon nitride than with silicon oxide, the effect of reducing moisture permeability can be obtained more when nitrogen is contained. At this time, the protective layer 11 should just contain 0.5-30 atomic ratio of nitrogen with respect to the oxygen 100, More preferably, it should just be 3-30. The concentration of oxygen and nitrogen can be measured, for example, by X-ray photoelectron spectroscopy.

  When the atomic ratio of nitrogen to oxygen 100 is less than 0.5, it is presumed that sufficient reliability cannot be obtained due to a decrease in the denseness of the protective layer 11. Further, when the atomic ratio of nitrogen to oxygen 100 is more than 30, it is presumed that the film is peeled off due to the internal stress of the protective layer 11 and sufficient reliability cannot be obtained.

  Further, the protective layer 11 may be formed only on the first passivation layer 5 as shown in FIG. 3A, and the first passivation layer 5 and the first collection layer as shown in FIG. 3B. It may be formed on the electric electrode 8b. By forming the protective layer 11 also on the first current collecting electrode 8b, not only the first passivation layer 5 but also the first current collecting electrode 8b is protected, so that the deterioration of the first current collecting electrode 8b is reduced. The long-term reliability of the solar cell element 10 is improved.

<Method for producing solar cell element>
Next, an example of the manufacturing method of the solar cell element 10 will be described in detail with reference to FIG.

  First, the substrate preparation process of the semiconductor substrate 1 having the first semiconductor region (p-type semiconductor region) 2 will be described. The semiconductor substrate 1 is formed by, for example, an existing casting method. Hereinafter, an example in which a p-type polycrystalline silicon substrate is used as the semiconductor substrate 1 will be described. However, the semiconductor substrate 1 may be an n-type or a single crystal silicon substrate.

  First, a polycrystalline silicon ingot is produced by, for example, a casting method. Next, as shown in FIG. 4A, the ingot is sliced to a thickness of 250 μm or less, for example. Thereafter, in order to clean the mechanical damage layer and the contamination layer on the cut surface of the semiconductor substrate 1, the surface of the semiconductor substrate 1 may be etched by a very small amount with a solution such as NaOH, KOH, hydrofluoric acid, or hydrofluoric acid.

  Next, as shown in FIG. 4B, the uneven portion 12 is formed on the second main surface 1 b of the semiconductor substrate 1. As a method for forming the uneven portion 12, the uneven portion 12 is formed using a wet etching method using an alkaline solution such as NaOH or an acid solution such as hydrofluoric acid, or a dry etching method using RIE (Reactive Ion Etching) or the like. be able to. At this time, the first uneven portion is formed on at least the first main surface 1a side of the semiconductor substrate 1 using the wet etching method, and then the second uneven portion is formed on the second main surface 1b side using the dry etching method. By forming the distance between the convex portions of the first concavo-convex portion of the first main surface 1a of the semiconductor substrate 1 can be made larger than the distance between the convex portions on the second main surface 1b side.

  Next, as shown in FIG. 4C, a step of forming the second semiconductor region 3 is performed on the second main surface 1b of the semiconductor substrate 1 having the concavo-convex portion 12 formed by the above steps. Specifically, the n-type second semiconductor region 3 is formed in the surface layer on the second main surface 1b side in the semiconductor substrate 1 having the uneven portion 12.

The second semiconductor region 3 is a diffusion source of a coating thermal diffusion method in which P ₂ O ₅ in a paste state is applied to the surface of the semiconductor substrate 1 for thermal diffusion, or phosphorus oxychloride (POCl ₃ ) in a gas state is a diffusion source. The gas phase thermal diffusion method is used. The second semiconductor region 3 is formed to have a depth of about 0.2 to 2 μm and a sheet resistance of about 40 to 200Ω / □. For example, in the vapor phase thermal diffusion method, the semiconductor substrate 1 is heat-treated for about 15 to 30 minutes at a temperature of about 600 to 800 ° C. in an atmosphere having a diffusion gas composed of POCl ₃ or the like, thereby converting the phosphor glass into Form on the surface. Then, phosphorus is diffused from the phosphorous glass to the semiconductor substrate 1 by heat-treating the semiconductor substrate 1 for about 10 to 40 minutes at a high temperature of about 800 to 900 ° C. in an inert gas atmosphere such as argon or nitrogen. A second semiconductor region 3 is formed on the surface of the semiconductor substrate 1.

  Next, in the step of forming the second semiconductor region 3, when the second semiconductor region 3 is also formed on the first main surface 1a side, the second semiconductor region 3 formed on the first main surface 1a side. Only etch away. Thereby, the p-type conductivity type region is exposed on the first main surface 1a side. For example, the second semiconductor region 3 formed on the first main surface 1a side is removed by immersing only the first main surface 1a side of the semiconductor substrate 1 in a hydrofluoric acid solution. Thereafter, the phosphor glass adhering to the surface (second main surface 1b side) of the semiconductor substrate 1 when the second semiconductor region 3 is formed is removed by etching.

  As described above, the second semiconductor region 3 is removed by the phosphorous glass by removing the second semiconductor region 3 formed on the first principal surface 1a side by leaving the phosphorous glass on the second principal surface 1b side. , Can reduce damage.

  In the formation process of the second semiconductor region 3, a diffusion mask is formed in advance on the first main surface 1a side, the second semiconductor region 3 is formed by vapor phase thermal diffusion or the like, and then the diffusion mask is formed. It may be removed. Even by such a process, it is possible to form a similar structure. In this case, since the second semiconductor region 3 is not formed on the first main surface 1a side, the first main surface 1a side is formed. A step of removing the second semiconductor region 3 is not necessary.

  The method for forming the second semiconductor region 3 is not limited to the above method. For example, a thin film technique is used to form an n-type hydrogenated amorphous silicon film or a crystalline silicon film including a microcrystalline silicon film. It may be formed.

  As described above, the second semiconductor region 3 that is an n-type semiconductor region is disposed on the second main surface 1b side, and the first semiconductor region 2 that is a p-type semiconductor region in which the uneven portion 12 is formed on the surface is included. The semiconductor substrate 1 can be prepared.

  Next, the first passivation layer 5 is formed on the first main surface 1a side of the semiconductor substrate 1, and the second passivation layer 6 is formed on the second main surface 1b side where the second semiconductor region 3 is formed. As a method for forming the first passivation layer 5 and the second passivation layer 6, for example, an ALD method is used. As a result, the first passivation layer 5 and the second passivation layer 6 are formed simultaneously around the entire periphery of the semiconductor substrate 1. That is, a passivation layer is also formed on the side surface 1 c of the semiconductor substrate 1.

  When the ALD method is employed, the semiconductor substrate 1 on which the second semiconductor region 3 is formed is placed in the chamber of the film forming apparatus, and the semiconductor substrate 1 is heated in a temperature range of 100 to 250 ° C. In the state, the following steps A to D are repeated. Thereby, the 1st passivation layer 5 and the 2nd passivation layer 6 which have desired thickness are formed.

[Step A] By supplying an Al material such as TMA onto the semiconductor substrate 1 together with a carrier gas such as Ar gas or N ₂ gas, the Al material is adsorbed around the entire circumference of the semiconductor substrate 1. Here, the dangling bonds on the surface of the semiconductor substrate 1 are preferably terminated in the form of OH groups. This structure can be formed by pure water rinsing conditions in the step of treating the Si substrate with dilute hydrofluoric acid, subsequent treatment with an oxidizing solution such as nitric acid, or ozone treatment. The time for supplying TMA may be, for example, about 15 milliseconds to 3 seconds. In step A, the following reaction occurs.
Si—O—H + Al (CH ₃ ) ₃ → Si—O—Al (CH ₃ ) ₂ + CH ₄ ↑
By this reaction, the Al raw material is adsorbed on the entire periphery of the semiconductor substrate 1.

[Step B] By purifying the film forming apparatus chamber with N ₂ gas, the Al material in the chamber is removed, and the Al material physically and chemically adsorbed on the semiconductor substrate 1 is at the atomic layer level. Remove Al raw materials other than chemically adsorbed components. In addition, the time for which the inside of the chamber is purified by N ₂ gas may be, for example, about 1 to several tens of seconds.

[Step C] By supplying an oxidizing agent such as water or O ₃ gas into the chamber of the film forming apparatus, the methyl group as an alkyl group contained in TMA is removed and replaced with an OH group. That is, the following reaction occurs.
Si—O—Al—CH ₃ + HOH → Si—O—Al—OH + CH ₄ ↑
Here, “Si—O—Al—CH ₃ ” on the left side should be expressed accurately as “Si—O—Al— (CH ₃ ) ₂ ”. Only the reaction for one CH ₃ is shown in the above reaction scheme.

  As a result, an atomic layer of aluminum oxide is formed on the semiconductor substrate 1. The time for supplying the oxidizing agent into the chamber is preferably about 750 msec to 1.1 sec. For example, when H is supplied together with the oxidizing agent into the chamber, H is easily contained in the aluminum oxide.

[Step D] By purifying the inside of the chamber of the film forming apparatus with N ₂ gas, the oxidizing agent in the chamber is removed. At this time, for example, the oxidant that did not contribute to the reaction during the formation of atomic layer level aluminum oxide on the semiconductor substrate 1 is removed. Note that the time for purging the inside of the chamber with N ₂ gas may be about 1 second, for example.

Here, when the process returns again, the following reaction occurs.
Si—O—Al—OH + Al (CH ₃ ) ₃ →
Si-O-Al-O- Al (CH 3) 2 + CH 4 ↑

  Thereafter, an aluminum oxide layer having a desired film thickness is formed by repeating a series of steps A to D a plurality of times as in step B → step C → step D → step A →.

  In this way, by forming the first passivation layer 5 and the second passivation layer 6 by the ALD method, even if there are minute irregularities on the surface of the semiconductor substrate 1, an aluminum oxide layer is uniformly formed along the irregularities. Is done. Thereby, the passivation effect on the surface of the semiconductor substrate 1 is enhanced.

Next, an antireflection layer 7 is formed on the second passivation layer 6 formed on the second main surface 1 b of the semiconductor substrate 1. As a method for forming the antireflection layer 7, for example, PECVD (Plasma
An Enhanced Chemical Vapor Deposition) method, an ALD method, a vapor deposition method or a sputtering method is employed. For example, when the PECVD method is employed, in the film forming apparatus, a mixed gas of SiH ₄ gas and NH ₃ gas is diluted with N ₂ gas and converted into plasma by glow discharge decomposition in the chamber. Silicon nitride is deposited on the two-passivation layer 6. Thereby, the antireflection layer 7 containing silicon nitride is formed. Note that the temperature in the chamber when silicon nitride is deposited may be about 500 ° C., for example. The antireflection layer 7 is formed by a PECVD method other than the ALD method, a vapor deposition method, a sputtering method, or the like, whereby the antireflection layer 7 having a desired thickness is formed in a short time. Thereby, the productivity of the solar cell element 10 is improved.

  Next, as shown in FIG. 4E, the third semiconductor region 4, the first electrode 8, and the second electrode 9 are formed.

  Here, a method of forming the third semiconductor region 4 and the first electrode 8 will be described. First, an aluminum paste containing glass frit and aluminum powder is applied to a predetermined region on the first passivation layer 5. Next, the component of the aluminum paste is transmitted through the first passivation layer 5 to the first main surface 1a side of the semiconductor substrate 1 by a fire-through method in which heat treatment is performed in a high temperature range of 600 to 800 ° C. A third semiconductor region 4 is formed. At this time, an aluminum layer is formed on the first main surface 1 a of the third semiconductor region 4. This aluminum layer is used as the first current collecting electrode 8 b as a part of the first electrode 8. Here, the region where the third semiconductor region 4 is formed is, for example, at the position where the first current collecting electrode 8b is formed on the first main surface 1a of the semiconductor substrate 1, as shown in FIG. Any area along the line may be used.

  And the 1st output extraction electrode 8a is produced using the silver paste containing the metal powder mainly containing silver (Ag) etc., an organic vehicle, and glass frit, for example. Specifically, a silver paste is applied on the first passivation layer 5. Then, the 1st output extraction electrode 8 is formed by baking a silver paste. Here, the maximum temperature in baking should just be about 600-800 degreeC, for example. Further, at the time of firing, for example, the temperature is raised toward the peak temperature, the temperature is lowered after being held for a certain time (within several seconds) near the peak temperature. As a method for applying the silver paste, for example, a screen printing method or the like may be employed. After applying the silver paste, the solvent in the silver paste may be evaporated by drying the silver paste at a predetermined temperature. Here, the first output extraction electrode 8 is electrically connected to the first collector electrode 8b by being in contact with the aluminum layer.

  In addition, after forming the 1st output extraction electrode 8a, you may form the 1st current collection electrode 8b. Further, the first output extraction electrode 8 a may not be in direct contact with the semiconductor substrate 1, and the first passivation layer 5 may exist between the first output extraction electrode 8 a and the semiconductor substrate 1. The aluminum layer formed on the third semiconductor region 4 may be removed. Moreover, you may form the 1st output extraction electrode 8a and the 1st current collection electrode 8b using the same silver paste.

Next, a method for forming the second electrode 9 will be described. For example, the second electrode 9 is mainly made of Ag.
It is produced using a silver paste containing a metal powder containing the like, an organic vehicle and glass frit. Specifically, a silver paste is applied on the antireflection layer 7 of the semiconductor substrate 1. Then, the 2nd electrode 9 is formed by baking a silver paste. Here, the maximum temperature in baking should just be about 600-800 degreeC, for example. Moreover, the time which performs baking should just be hold | maintained within about several seconds in a baking peak temperature, for example. As a method for applying the silver paste, for example, a screen printing method or the like may be employed. After applying the silver paste, the solvent in the silver paste may be evaporated by drying the silver paste at a predetermined temperature. The second electrode 9 includes a second output extraction electrode 9a and a second current collection electrode 9b. By adopting a screen printing method, the second output extraction electrode 9a and the second current collection electrode 9b are used. Are formed simultaneously in one step.

  By the way, about the 1st electrode 8 and the 2nd electrode 9, after apply | coating each paste, you may bake simultaneously by baking simultaneously. In the above example, the first electrode 8 and the second electrode 9 are formed by printing and baking. However, the present invention is not limited to this. For example, the first electrode 8 and the second electrode 9 may be formed by other thin film forming methods such as vapor deposition or sputtering, or plating.

  Further, after the first passivation layer 5 and the second passivation layer 6 are formed, the passivation effect by the first passivation layer 5 and the second passivation layer 6 is increased by setting the maximum temperature of the heat treatment in each step to 800 ° C. or less. To do. For example, in each step after forming the first passivation layer 5 and the second passivation layer 6, the time for performing the heat treatment in the temperature range of 300 to 500 ° C. may be about 3 to 30 minutes, for example.

  Next, a method for forming the protective layer 11 will be described. The protective layer 11 is formed on the first passivation layer 5 as shown in FIG. The protective layer 11 is formed as follows. First, for example, a first solution is prepared by dissolving a liquid or solid having an Si—N bond, such as polysilazane, and an amine-based catalyst in a solvent such as toluene, xylene, or tarben. And a 1st solution is apply | coated on the 1st passivation layer 5, and a coating film is arrange | positioned. As a coating method, a spray method, a spin coating method, or the like is employed. At this time, when a protective layer is provided on the first passivation layer 5 and the first electrode 8, a coating film may be disposed on the entire surface of the first main surface 1 a of the semiconductor substrate 1. However, when the protective layer 11 is formed only on the first passivation layer 5, a mask may be provided on the first electrode 8 in advance. In addition, when the protective layer 11 is formed also on the first collector electrode 8b, a mask may be provided in advance on the first output extraction electrode 8a. Next, after drying the arrange | positioned coating film at normal temperature as needed, it bakes and the protective layer 11 is formed. The highest temperature of baking should just be 200 degrees C or less, for example, More preferably, it should just be 100-150 degreeC. Moreover, baking time should just be 180 minutes or less, for example, More preferably, it is 10 to 60 minutes. The bonded state of the produced protective layer 11 can be measured using an FT-IR apparatus.

  If the baking temperature of the coating film is 200 ° C. or less or the baking time is 180 minutes or less, it is difficult for the semiconductor substrate 1 to be subjected to a thermal load in the baking process of the coating film. The characteristics of the solar cell element 10 are maintained. Moreover, in this case, since the reaction of the coating film is difficult to be accelerated, the nitrogen content is unlikely to decrease, and it is assumed that the denseness of the protective layer 11 is maintained and the reliability is maintained. In addition, the protective layer 11 may be formed in the manufacturing process of the solar cell module 20 described in detail later.

The coating film is baked in an oxidizing atmosphere containing nitrogen to form silicon oxide containing nitrogen as the protective layer 11. Further, during the firing of the coating, nitrogen (N ₂₎ gas, ammonia (NH ₃₎ may be controlled nitrogen content by adjusting the gas flow containing nitrogen such as a gas. By producing the protective film 11 under the above conditions, the protective layer 11 can contain nitrogen at 0.5 to 30 atomic% with respect to oxygen.

<< Second Embodiment >>
Next, a second embodiment will be described. A description of portions common to the first embodiment is omitted.

<Solar cell element>
As shown in FIGS. 5 and 6, in the solar cell element 10, the first current collecting electrode 8 b is disposed on the protective layer 11. Furthermore, the 1st current collection electrode 8b is arrange | positioned also on each of the 1st main surface 1a of the semiconductor substrate 1 of the area | region in which the 1st passivation layer 5 and the protective layer 11 are not formed. Thus, the 1st current collection electrode 8b is arrange | positioned so that the substantially whole surface of the 1st main surface 1a of the semiconductor substrate 1 may be covered. In this embodiment, even if the 1st current collection electrode 8b is provided on the protective layer 11, moisture permeation from the outside can be suppressed and the passivation effect can be maintained. Thereby, reliability can be improved, without impairing the electrical property of the solar cell element 10. FIG. Further, by arranging the first current collecting electrode 8b so as to cover substantially the entire first main surface 1a of the semiconductor substrate 1, the collected carriers can be efficiently moved to the first output extraction electrode 8a. For this reason, the output of the solar cell element 10 can be increased.

<Method for producing solar cell element>
The first passivation layer 5 is formed on the first main surface 1a of the semiconductor substrate 1 including the second semiconductor region 3 by the same method as that of the first embodiment, and the protective layer 11 is formed thereon.

  Next, in order to obtain an electrical connection between the semiconductor substrate 1 and the first current collecting electrode 8b, a part of the first passivation layer 5 and a part of the protective layer 11 are removed, and a contact hole is provided. The contact hole may be formed by, for example, laser beam irradiation, or by etching after forming a patterned etching mask.

  Next, an aluminum paste containing glass frit and aluminum powder is applied to the contact hole and a predetermined region on the protective layer 11. And the 1st current collection electrode 8b is formed by baking for about several dozen seconds-several tens of minutes on the conditions whose maximum temperature is 600-850 degreeC. At this time, it is preferable that the first passivation layer 5 and the protective layer 11 do not fire through when the aluminum paste is fired. For this reason, for example, it is preferable to lower the firing temperature, shorten the firing time, or use a lead-free glass in the composition of the glass frit. In addition, reaction of the coating film of the protective layer 11 is accelerated | stimulated by the heat processing in formation of an electrode, and nitrogen content rate may fall. However, the decrease in the nitrogen content can be reduced by setting the heat treatment time in the formation of the electrode to several tens of seconds to several tens of minutes. Further, by increasing the nitrogen content when the protective layer 11 is formed, the nitrogen content of the protective layer 11 after electrode formation can be adjusted to an optimum value.

  Moreover, reliability can be improved without impairing the electrical property of the solar cell element 10 by making the thickness of the protective layer 11 into 200 nm or more. In addition, the first passivation layer 5 can be protected by the protective layer 11 so that the aluminum paste does not cause the first passivation layer 5 to fire through, and the deterioration of the characteristics of the solar cell element 10 can be reduced.

<Solar cell module>
The solar cell module 20 according to an embodiment includes one or more solar cell elements 10 each having a protective layer 11. For example, the solar cell module 20 may include a plurality of solar cell elements that are electrically connected. Such a solar cell module 20 is formed by connecting a plurality of solar cell elements 10 in series or in parallel, for example, when the electric output of a single solar cell element 10 is small. For example, a practical electrical output is taken out by combining a plurality of solar cell modules 20. Hereinafter, an example in which the solar cell module 20 includes a plurality of solar cell elements 10 will be described.

  As shown in FIG. 10, the solar cell module 20 includes a laminated body in which, for example, a transparent member 23, a front side filler 24, a plurality of solar cell elements 10, a wiring conductor 21, a back side filler 25, and a back surface protective material 26 are laminated. It has. Here, the transparent member 23 is a member for protecting the light receiving surface that receives sunlight in the solar cell module 20. The transparent member 23 may be a transparent flat plate member, for example. As a material of the transparent member 23, for example, glass or the like is employed. The front side filler 24 and the back side filler 25 may be transparent fillers, for example. As the material of the front side filler 24 and the back side filler 25, for example, ethylene / vinyl acetate copolymer (EVA) or the like is employed. The back surface protective material 26 is a member for protecting the solar cell module 20 from the back surface. As a material of the back surface protective material 26, for example, polyethylene terephthalate (PET) or polyvinyl fluoride resin (PVF) is adopted. In addition, the back surface protective material 26 may have a single layer structure or a laminated structure.

  The wiring conductor 21 is a member (connection member) that electrically connects the plurality of solar cell elements 10. The solar cell elements 10 adjacent to each other in one direction among the plurality of solar cell elements 10 included in the solar cell module 20 are the first electrode 8 of one solar cell element 10 and the second electrode of the other solar cell element 10. 9 is connected by a wiring conductor 21. That is, when the solar cell element 10 shown in FIG. 3A is used, as shown in FIGS. 7, 8, and 11A, the first output extraction electrode 8a and the second output extraction of the solar cell element 10 are performed. A wiring conductor 21 is connected to the electrode 9a. Here, the thickness of the wiring conductor 21 should just be 0.1-0.2 mm, for example. The width of the wiring conductor 21 may be about 2 mm, for example. For example, a member in which the entire surface of a copper foil is coated with solder is used as the wiring conductor 21.

  Of the plurality of solar cell elements 10 electrically connected in series, one end of the electrode of the first solar cell element 10 and one end of the electrode of the last solar cell element 10 are respectively connected to the output extraction wiring 22. It is electrically connected to a terminal box 28 as an output extraction part. Moreover, although illustration is abbreviate | omitted in FIG. 10, as shown in FIG. 9, the solar cell module 20 may be provided with the frame 27 which hold | maintains the said laminated body from the periphery. As the material of the frame 27, for example, aluminum having both corrosion resistance and strength is employed.

  Thus, the 1st passivation layer 5 by the water which permeate | transmitted in the solar cell module 20 is formed by forming the solar cell module 20 provided with the solar cell element 10 which has arrange | positioned the protective layer 11 on the 1st passivation layer 5. Degradation can be reduced, and the reliability of the solar cell module 20 can be improved.

  In addition, when EVA is adopted as the material of the back side filler 25, since EVA contains vinyl acetate, hydrolysis occurs over time due to permeation of moisture or water at a high temperature to generate acetic acid. There is a case. On the other hand, in this embodiment, the damage given to the solar cell element 10 by acetic acid is reduced by providing the protective layer 11 on the first passivation layer 5. As a result, the reliability of the solar cell module 20 is ensured for a long time.

When EVA is adopted as at least one material of the front side filler 24 and the back side filler 25, an acid acceptor containing magnesium hydroxide or calcium hydroxide may be added to this EVA. . Thereby, since the generation | occurrence | production of the acetic acid from EVA is reduced, durability of the solar cell module 20 improves, and the damage given to the 1st passivation layer 5 or the 2nd passivation layer 6 by an acetic acid is further reduced. As a result, the reliability of the solar cell module 20 is ensured for a long time.

  When the solar cell element 10 shown in FIG. 3B is used, as shown in FIG. 11B, the first solar cell element 10 in which the protective layer 11 is also formed on the first current collecting electrode 8b. A wiring conductor 21 is connected to the first output extraction electrode 8a and the second output extraction electrode 9a. For this reason, deterioration of the 1st current collection electrode 8b by the water which permeate | transmitted the solar cell module 20, acetic acid etc. which generate | occur | produced from EVA can be reduced, and the long-term reliability of the solar cell module 20 is ensured over a long time. Is done.

  Moreover, after connecting the wiring conductor 21 to the solar cell element 10, as shown in FIG.11 (c), you may form the protective layer 11 on the 1st current collection electrode 8b and the wiring conductor 21. FIG. Since the protective layer 11 protects the first current collecting electrode 8b, the wiring conductor 21, and the connection portion between the wiring conductor 21 and the first output extraction electrode 8a, damage due to water, acetic acid and the like is reduced, and the solar cell module 20 has a long period of time. Reliability is ensured for a long time.

<Method for manufacturing solar cell module>
Next, a method for manufacturing the solar cell module 20 will be described.

  First, a basic manufacturing method of the solar cell module 20 will be described. Here, the solar cell module 20 includes a plurality of the solar cell elements 10 described above, for example. The solar cell module 20 includes a first power generation unit in which a first passivation layer 5 and a first conductor juxtaposed with the first passivation layer 5 are arranged on the first main surface 1a of the semiconductor substrate 1; And a second power generation unit having a second conductor having the same configuration as the first power generation unit. In the solar cell module 20, the first power generation unit and the second power generation unit are electrically connected via the wiring conductor 21. The manufacturing process of such a solar cell module 20 includes a wiring conductor 21 arranging step of arranging a wiring conductor 21 on the first conductor of the first power generation unit and the second conductor of the second power generation unit. The coating film disposing step of disposing a coating film in which a liquid or solid having an Si—N bond is dissolved in an organic solvent on the first passivation layer 5, and firing the coating film to form the first passivation layer 5. A protective layer forming step of forming the protective layer 11 thereon.

  Next, a specific method for manufacturing the solar cell module 20 will be described in detail with reference to FIG. First, the several solar cell element 10 is arrange | positioned in series-parallel, and the solar cell elements 10 adjacent by the wiring conductor 21 are electrically connected. As a method for connecting the wiring conductor 21, a method such as soldering iron, hot air, laser, or pulse heat can be used. By such a method, the wiring conductor 21 is soldered to the first output extraction electrode 8a and the second output extraction electrode 9b.

  Next, the front-side filler 24 is disposed on the transparent member 23, and the plurality of solar cell elements 10 to which the wiring conductor 21 and the output extraction wiring 22 are connected are disposed thereon. Furthermore, the back side filler 25 and the back surface protective material 26 are sequentially laminated thereon. Then, after that, the output extraction wiring 22 is led out to the outside of the back surface protective material 26 from the slits provided in the respective members on the back surface side. Such a laminate is set in a laminator and heated at 80 to 200 ° C., for example, for 15 to 60 minutes while being pressurized under reduced pressure. Thereby, the solar cell module 20 in which a laminated body is integrated can be obtained.

Next, the terminal box 28 is attached. Specifically, the terminal box 28 is attached to the back surface protective material 26 from which the output lead-out wiring 22 is led out using an adhesive such as silicon. Then, the plus and minus output lead-out wirings 22 are fixed to terminals (not shown) of the terminal box 28 by soldering or the like. Thereafter, a lid is attached to the terminal box 28.

  Finally, the frame body 27 is attached to complete the solar cell module 20. Specifically, a frame body 27 made of aluminum or the like is attached to the outer periphery of the solar cell module 20. The frame 27 can be attached, for example, by fixing its corners with screws or the like. In this way, the solar cell module 20 is completed.

  Further, the protective layer 11 of the first passivation layer 5 may be formed in the manufacturing process of the solar cell module 20 as described above. This case will be described in detail below.

  First, a plurality of solar cell elements 10 are arranged in series and parallel, and the wiring conductor 21 is arranged on the first output extraction electrode 8a and the second output extraction electrode 9b.

  Next, a first solution is applied to the entire first main surface 10 a of the solar cell element 10, and a liquid having Si—N bonds on the first passivation layer 5, the first current collecting electrode 8 b and the wiring conductor 21 or A coating film in which a solid is dissolved in an organic solvent is disposed. In addition, you may dry the arrange | positioned coating film as needed. For example, the coating film may be dried simultaneously with the heat treatment for connecting the wiring conductor 21 to the electrode, or after the wiring conductor 21 is connected to the electrode, the coating film may be disposed and the coating film may be dried in a separate process.

  After the coating film is dried, a laminate in which the transparent member 23, the front side filler 24, the plurality of solar cell elements 10 connecting the wiring conductor 21 and the output extraction wiring 22, the back side filler 25, and the back surface protective material 26 are laminated. Is heated under pressure with a laminator under reduced pressure. Thereby, a coating film is baked simultaneously with lamination and the protective layer 11 is formed. Or you may form the protective layer 11 by baking a coating film simultaneously with the heat processing which connects the wiring conductor 21 to an electrode. The coating film is baked by a connection step of the wiring conductor 21 or a laminator. Thereby, since the solar cell module 20 can be manufactured without newly providing the baking process of the protective layer 11, the manufacturing cost of the solar cell module 20 can be reduced and productivity can be improved.

  Note that the present invention is not limited to the above-described embodiment, and various changes and improvements can be made without departing from the scope of the present invention.

For example, the third semiconductor region 4 may be formed before forming the first passivation layer 5. In this case, boron or aluminum may be diffused into a predetermined region in the first main surface 1a before the step of forming the first passivation layer 5. Boron is diffused by heating the semiconductor substrate 1 at a temperature of 800 to 1100 ° C. using a thermal diffusion method using boron tribromide (BBr ₃ ) as a diffusion source.

  Further, the order of forming the antireflection layer 7 and the second passivation layer 6 may be opposite to the order described above.

  Examples that further embody the embodiments of the present invention will be described below.

<Example 1>
First, using a semiconductor substrate 1 having a first semiconductor region 2 having p-type conductivity as a solar cell substrate, a polycrystalline silicon substrate having a square side of about 156 mm and a thickness of about 200 μm in plan view is obtained. Prepared. These semiconductor substrates 1 were etched with a NaOH aqueous solution, and then washed. The following processing was performed on the semiconductor substrate 1 thus prepared.

  First, the uneven portion 12 (texture) was formed on the second main surface 1b side of the semiconductor substrate 1 by using the RIE method.

Next, phosphorus is diffused in the semiconductor substrate 1 by vapor phase thermal diffusion using phosphorus oxychloride (POCl ₃ ) as a diffusion source, and the n-type second semiconductor region 3 having a sheet resistance of about 90Ω / □. Formed. The second semiconductor region 3 formed on the side surface 1c and the first main surface 1a side of the semiconductor substrate 1 was removed with a hydrofluoric acid solution, and then the remaining glass was removed with a hydrofluoric acid solution.

  Next, a first passivation layer 5 and a second passivation layer 6 made of an aluminum oxide layer were formed on the entire surface of the semiconductor substrate 1 using the ALD method.

Here, the semiconductor substrate 1 was placed in the chamber of the film forming apparatus, and the surface temperature of the semiconductor substrate 1 was maintained at about 100 to 200 ° C. Then, Step A to Step D described above were repeated using TMA as the aluminum source material and O ₃ gas as the oxidizing agent. As a result, a first passivation layer 5 and a second passivation layer 6 having a thickness of about 30 nm were formed.

  Thereafter, an antireflection layer 7 made of a silicon nitride film was formed on the second passivation layer 6 by plasma CVD. Then, a silver paste was applied to the pattern of the second electrode on the second main surface 1b side, and a silver paste was applied to the pattern of the first output extraction electrode 8a on the first main surface 1a side. Thereafter, an aluminum paste was applied to the pattern of the first current collecting electrode 8b. Then, the pattern of these pastes was baked to form the third semiconductor region 4, the first electrode 8, and the second electrode 9.

  In sample 1, protective layer 11 made of silicon oxide containing nitrogen is arranged on first passivation layer 5, and in sample 2, protective layer 11 is formed on first passivation layer 5 as shown in FIG. Did not place. In addition, the protective layer 11 apply | coated the organic solvent containing polysilazane on the 1st main surface 1a side by the spray method on the 1st passivation layer 5, and formed the coating film. And the coating film was dried by heating at 180 degreeC for 30 minutes in air | atmosphere atmosphere. At this time, the thickness of the protective layer 11 was 500 nm. Further, it was confirmed by X-ray photoelectron spectroscopy that the atomic ratio of nitrogen to oxygen 100 in the protective layer 11 was 20. Furthermore, Si—N bonds and Si—O bonds were confirmed in the protective layer 11 using an FT-IR apparatus.

  And after producing the solar cell element 10, the solar cell module 20 as shown to FIG. 9 and FIG. 10 was produced, and the following reliability test was done about the sample 1 and the sample 2. FIG.

In the reliability test, the maximum output Pm, which is a solar cell output, was measured. Further, Sample 1 and Sample 2 were put into a constant temperature and humidity tester having a temperature of 125 ° C. and a humidity of 95%. Then, the change rate from the initial Pm was measured in each case after 150 hours, 350 hours, 450 hours, 550 hours, and 700 hours. These characteristics were measured under the conditions of AM (Air Mass) 1.5 and 100 mW / cm ² based on JIS C 8913.

  As shown in FIG. 13, in the solar cell module 20 including the solar cell element 10 that does not include the protective layer 11 of Sample 2, the output decreased by about 8% after 150 hours and by about 10% after 350 hours. On the other hand, in the solar cell module 20 including the solar cell element 10 provided with the protective layer 11 of the sample 1, it was confirmed that only about 4% was decreased even after 700 hours, and the initial characteristics could be maintained for a longer time.

<Example 2>
Next, the initial characteristics of the solar cell module 20 were examined in more detail. Sample 3 in which the solar cell module 20 was manufactured in the same manner as in Example 1 and the heat treatment condition of the coating applied on the first passivation layer 5 was changed to change the atomic ratio of nitrogen to oxygen in the protective layer 11. ~ 7 were made.

  As the protective layer 11, the atomic ratio of nitrogen to oxygen 100 is 0.1 (sample 3), 0.5 (sample 4), 3 (sample 5), 30 (sample 6), and 35 (sample 7). A solar cell module 20 having this was produced.

  And about these solar cell modules 20, the initial characteristic was evaluated similarly to Example 1, and the reliability test was done.

  As a result, in the solar cell module 20 of the sample 7, a decrease in the initial characteristics that seems to be due to the influence of thermal damage was observed. Further, the output of the solar cell modules 20 of Sample 3 and Sample 7 decreased by about 8% after 700 hours. On the other hand, the solar cell modules 20 of Samples 4 to 6 in which the atomic ratio of nitrogen to oxygen is 0.5 to 30 decrease only by less than 5% even after 700 hours, and maintain the initial characteristics for a longer time. It was confirmed.

1: Semiconductor substrate 1a: 1st main surface 1b: 2nd main surface 2: 1st semiconductor region (p-type semiconductor region)
3: Second semiconductor region (n-type semiconductor region)
4: 3rd semiconductor region 5: 1st passivation layer 6: 2nd passivation layer 7: Antireflection layer 8: 1st electrode 8a: 1st output extraction electrode 8b: 1st current collection electrode 9: 2nd electrode 9a: 2nd electrode 2 output extraction electrode 9b: 2nd current collection electrode 10: Solar cell element 10a: 1st main surface 10b: 2nd main surface 11: Protection layer 12: Uneven part 20: Solar cell module 21: Wiring conductor 22: Output extraction wiring 23: Transparent member 24: Front side filler 25: Back side filler 26: Back side protective material 27: Frame 28: Terminal box

Claims (6)

A first main surface and a second main surface located on the opposite side of the first main surface, wherein the p-type semiconductor region and the n-type semiconductor region are closest to the first main surface side. And the semiconductor substrate stacked so that the n-type semiconductor region is located closest to the second main surface side, and
A passivation layer containing aluminum oxide and disposed on the p-type semiconductor region located closest to the first main surface;
A protective layer made of silicon oxide containing nitrogen, disposed on the passivation layer, and a method for producing a solar cell element ,
The said protective layer arrange | positions the coating film in which the liquid or solid which has a Si-N bond melt | dissolves in the organic solvent on the said passivation layer, The manufacturing method of the solar cell element formed by baking this coating film . The method for manufacturing a solar cell element according to claim 1, wherein the protective layer has an atomic ratio of nitrogen to oxygen of 0.5 to 30. The method for manufacturing a solar cell element according to claim 1, wherein the protective layer has a thickness of 200 nm to 1000 nm. The protective layer, the manufacturing method of the solar battery cell of claim 1, formed by firing in the coating film 200 ° C. or lower. The said protective layer is a manufacturing method of the solar cell element of Claim 4 formed by baking the said coating film for 180 minutes or less. Includes a solar cell element comprising a method of manufacturing a solar cell device according to any of claims 1 to 5, the first main surface of said semiconductor substrate, first being juxtaposed with said passivation layer, and the passivation layer A method for manufacturing a solar cell module in which a first power generation unit in which one conductor is disposed and a second power generation unit having a second conductor are electrically connected via a wiring conductor,
Wherein said first conductor of the first power generation unit, a method for manufacturing a solar cell module including a more wiring conductors arranged Engineering of arranging the wiring conductor on the second conductor of the second power generation unit.

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