JP6311407B2 - Module parts and manufacturing method thereof - Google Patents

Description

  The present invention relates to a module component in which a plurality of chip components are mounted on a substrate and a manufacturing method thereof.

  In recent years, the use of communication devices such as microwave communication devices and radar devices used in a high frequency band has increased. In addition, a high frequency band has been used with an increase in transmission capacity, and a communication module corresponding to this is required. Conventionally, in module parts used in communication equipment, a plurality of chip parts are mounted (mounted) on a substrate via a connecting material (a brazing material, conductive resin, etc.), and the chip parts are electrically connected with metal wires. Some have a connected structure.

  However, the electrical connection between the chip parts by the metal wire has a loop length, so that the connection distance between the chip parts becomes long and a transmission loss occurs, so that it is difficult to ensure transmission characteristics at high frequencies.

  Therefore, a structure has been proposed in which the connection distance between chip components is short. For example, Patent Document 1 discloses a structure in which a plurality of chips (chip components) are connected via a wiring connection portion (connection material) and a wiring board. In Patent Document 1, a plurality of chips are mounted on a chip mounting substrate with the main surface facing up, and the inter-chip wiring layer of the wiring substrate is connected to the main surface side of the plurality of chips via a wiring connecting portion. It is connected to the. The chips are electrically connected by the wiring connection portion and the interchip wiring layer.

JP-A-6-29456

  The following analysis is given by the inventor.

  However, the structure disclosed in Patent Document 1 has the following problems.

  The first problem is that when there is a difference in thickness between chips, or when the height of the mounting position is different even with the same thickness, it is difficult to electrically connect with the inter-chip wiring layer.

  For example, when a wiring board is connected via a wiring connecting portion after a plurality of chips having different thicknesses are mounted on the chip mounting board, a difference occurs in the state of connection area between a thick chip and a thin chip. For this reason, sufficient electrical connection cannot be obtained with one or both electrodes of the thick chip and the thin chip, and connection failure is likely to occur.

  In addition, when multiple chips are mounted on a chip mounting board after connecting the wiring board via the wiring connecting portion, the gap between the chip mounting board and the chip becomes wider on the thin chip side, or on the thin chip side. If the adjustment is made so that there is no gap between the chip mounting substrate and the chip, the thickness of the wiring connection portion is increased on the thin chip side, so that the thermal conductivity is lowered. Therefore, sufficient heat dissipation cannot be obtained, leading to deterioration of characteristics and deterioration of reliability.

  Furthermore, in order to make the thickness between the chips uniform, when additional processing such as grinding or etching is performed on the chip component, there is a problem that characteristics are deteriorated and cost is increased.

  The second problem is that when each chip is mounted on the chip mounting substrate, positional displacement occurs due to mounting accuracy, and thus it is difficult to electrically connect each chip to the inter-chip wiring layer of the wiring substrate. . If there is a positional shift between the electrically connected chips in the opposite direction (the direction away from each other), there is a possibility that a sufficient connection area cannot be obtained, resulting in a connection failure.

  SUMMARY OF THE INVENTION The main object of the present invention is to provide a module component that can achieve short-distance and sufficient connection between chip components and improve performance by reducing transmission loss, and a method for manufacturing the module component.

According to a first aspect of the present invention, in the module component, the first substrate, the second substrate disposed opposite to the first substrate, and the main surface facing the second substrate side, the first substrate. The first chip component mounted on one substrate and the first chip mounted on a position different from the first chip component on the first substrate with the main surface facing the second substrate side. A second chip component thinner than the thickness of the component, a first bump connecting the second substrate and the first chip component, a second bump connecting the second substrate and the second chip component, The first chip component is electrically connected to the second chip component via the first bump, the second substrate, and the second bump, and the second bump is formed on the first bump. It is characterized by being higher than the height.
As a modification of the first viewpoint, in the module component, the first substrate, the second substrate disposed opposite to the first substrate, and the first surface with the main surface facing the second substrate side. The first chip component mounted on the substrate and the first chip component mounted at a position different from the first chip component on the first substrate with the main surface facing the second substrate. A second chip component thinner than the first chip component, a first bump for connecting the second substrate and the first chip component, and a second bump for connecting the second substrate and the second chip component. The first chip component is electrically connected to the second chip component via the first bump, the second substrate, and the second bump, and the second bump is a height of the first bump. Higher than the first substrate at a position different from the second substrate. A third substrate disposed in a direction facing the third substrate, and a third substrate mounted at a position different from the first chip component and the second chip component on the first substrate with the main surface facing the third substrate. A chip component; a third bump that connects the third substrate and the second chip component; and a fourth bump that connects the third substrate and the third chip component. The component is electrically connected to the second chip component through the fourth bump, the third substrate, and the third bump.

  In a second aspect of the present invention, in the module component, the first substrate, the second substrate disposed to face the first substrate, and the first surface with the main surface facing the second substrate side. The first chip component mounted on one substrate and the first chip mounted on a position different from the first chip component on the first substrate with the main surface facing the second substrate side. A second chip component thinner than the thickness of the component, a first bump connecting the second substrate and the first chip component, a second bump connecting the second substrate and the second chip component, The first chip component is electrically connected to the second chip component via the first bump, the second substrate, and the second bump, and the second substrate is connected to the first bump. The first substrate electrode to be connected is connected to the second bump. A second substrate electrode that protrudes closer to the first substrate than the first substrate electrode, and the second bump has the same height as the first bump. It is characterized by.

In a third aspect of the present invention, in the module component manufacturing method, the first chip component and the second chip component thinner than the thickness of the first chip component are formed on a predetermined region of the first substrate. Mounting with the main surface facing upward, forming a first bump on one of the first chip electrode of the first chip component and the first substrate electrode of the second substrate; Forming a second bump higher than the height of the first bump on one of a second chip electrode of a two-chip component and a second substrate electrode of the second substrate; and the first chip electrode and the The first chip electrode and the first substrate electrode are aligned with each other so that the first substrate electrode faces and the second chip electrode and the second substrate electrode face each other. Connected via a bump, and the second chip electrode And a serial second substrate electrode, characterized in that it comprises, a step of connecting via the second bump.
As a modification of the third viewpoint, in the module component manufacturing method, a first chip component, a second chip component thinner than the thickness of the first chip component, and a third chip on a predetermined region of the first substrate, A step of mounting the chip component with the main surface facing upward, and forming a first bump on one of the first chip electrode of the first chip component and the first substrate electrode of the second substrate And forming a second bump higher than the height of the first bump on one of the second chip electrode of the second chip component and the second substrate electrode of the second substrate; The first chip electrode and the first substrate electrode are aligned so that the chip electrode and the first substrate electrode are opposed to each other, and the second chip electrode and the second substrate electrode are opposed to each other. Through the first bump, and the second A step of connecting a top electrode and the second substrate electrode via the second bump, a third chip electrode of the second chip component, and a third substrate electrode of the third substrate Forming a third bump, forming a fourth bump on one of the fourth chip electrode of the third chip component and the fourth substrate electrode of the third substrate, and the third chip electrode and the Alignment is performed such that the third substrate electrode faces the fourth chip electrode and the fourth substrate electrode faces each other, and the third chip electrode and the third substrate electrode are moved to the third substrate electrode. And connecting via the bump, and connecting the fourth chip electrode and the fourth substrate electrode via the fourth bump.

  According to the present invention, a short distance and sufficient connection between chip components can be obtained, and performance can be improved by reducing transmission loss.

It is sectional drawing which showed typically the structure of the module component which concerns on Embodiment 1 of this invention. It is the top view which showed typically the structure of the module component which concerns on Embodiment 2 of this invention. It is sectional drawing between XX 'of FIG. 2 which showed the structure of the module component which concerns on Embodiment 2 of this invention typically. It is sectional drawing which showed typically the 1st process of the manufacturing method of the module components which concern on Embodiment 2 of this invention. It is sectional drawing following FIG. 4 which showed typically the 2nd process of the manufacturing method of the module components which concern on Embodiment 2 of this invention. It is sectional drawing following FIG. 5 which showed typically the 3rd process of the manufacturing method of the module components which concern on Embodiment 2 of this invention. It is sectional drawing which showed typically the structure of the module component which concerns on Embodiment 3 of this invention. It is sectional drawing which showed typically the structure of the module component which concerns on Embodiment 4 of this invention. It is sectional drawing which showed typically the structure of the module component which concerns on Embodiment 5 of this invention.

[Embodiment 1]
A module component according to Embodiment 1 of the present invention will be described with reference to the drawings. FIG. 1 is a cross-sectional view schematically showing the configuration of a module component according to Embodiment 1 of the present invention.

  The module component 20 is a component in which the first chip component 2 and the second chip component 3 mounted on the first substrate 1 are electrically connected by the second substrate 5 via the first bump 7a and the second bump 7b. It is. The module component 20 includes a first substrate 1, a first chip component 2, a second chip component 3, a second substrate 5, a first bump 7a, and a second bump 7b.

  The first substrate 1 is a substrate on which the first chip component 2 and the second chip component 3 are mounted. The first chip component 2 is a chip-shaped electronic component mounted on the first substrate 1 with the main surface facing the second substrate 5 side. The first chip component 2 is electrically connected to the second chip component 3 through the first bump 7a, the second substrate 5, and the second bump 7b. The second chip component 3 is a chip-shaped electronic component mounted at a position different from the first chip component 2 on the first substrate 1 with the main surface facing the second substrate 5 side. The second chip component 3 is thinner than the first chip component 2. The second substrate 5 is a wiring substrate (wiring body) disposed to face the first substrate 1. The first bumps 7 a are bumps that connect the second substrate 5 and the first chip component 2. The second bump 7 b is a bump that connects the second substrate 5 and the second chip component 3. The second bump 7b is higher than the height of the first bump 7a (longer than the vertical length of the first bump 7a in the figure).

  According to the first embodiment, by connecting the chip components 2 and 3 through the second substrate 5, it is possible to connect at a shorter distance than the connection by the conventional metal wire. Therefore, performance can be improved by reducing transmission loss. Further, by using the bumps 7a and 7b having different heights depending on the height difference between the main surfaces between the chip components 2 and 3 to be connected, the difference in height between the main surfaces between the chip components 2 and 3 can be obtained. Thus, a sufficient connection state between the second substrate 5 and the chip components 2 and 3 is obtained.

[Embodiment 2]
A module component according to Embodiment 2 of the present invention will be described with reference to the drawings. FIG. 2 is a plan view schematically showing the configuration of the module component according to Embodiment 2 of the present invention. FIG. 3 is a cross-sectional view taken along the line XX ′ in FIG. 2 schematically illustrating the configuration of the module component according to the second embodiment.

  The module component 20 is a component in which a plurality of chip components 2, 3, and 4 are mounted face-up on the first substrate 1 via connection materials 11a, 11b, and 11c. In the module component 20, a plurality of chip components 2, 3, 4 having different thicknesses are placed on the main surface on the chip component mounting area 1 d on the first substrate 1 via the connection materials 11 a, 11 b, 11 c. It is mounted in the state. The module component 20 includes a first substrate 1, a first chip component 2, a second chip component 3, a third chip component 4, a second substrate 5, a third substrate 6, and stud bumps 8a to 8d. , Metal wires 10a to 10c and connection materials 11a to 11c.

  The first substrate 1 is a wiring substrate on which the first chip component 2 and the second chip component 3 are mounted. The first substrate 1 has substrate electrodes 1a, 1b, 1c and a chip component mounting area 1d on the surface of the chip components 2, 3, 4 side. The substrate electrode 1a is electrically connected to the chip electrode 2a of the first chip component 2 via the metal wire 10a, and is electrically connected to the wiring in the first substrate 1. The substrate electrode 1b is electrically connected to the chip electrode 3c of the second chip component 3 through the metal wire 10c, and is electrically connected to the wiring in the first substrate 1. The substrate electrode 1c is electrically connected to the chip electrode 4b of the third chip component 4 through the metal wire 10b, and is electrically connected to the wiring in the first substrate 1. The chip component mounting area 1d is an area for mounting the chip parts 2, 3, and 4. For example, a conductor (for example, copper) can be used for the substrate electrodes 1a, 1b, and 1c and the chip component mounting region 1d.

  The first chip component 2 is mounted via a connecting material 11a at a position different from the chip components 3 and 4 on the chip component mounting region 1d of the first substrate 1 with the main surface 2e facing the second substrate 5 side. Chip-shaped electronic components. The first chip component 2 has a circuit (not shown) necessary for high-frequency transmission. The first chip component 2 has chip electrodes 2a, 2b, and 2c on the main surface 2e. The chip electrode 2a is an electrode that is electrically connected to the circuit (not shown) and electrically connected to the substrate electrode 1a of the first substrate 1 via the metal wire 10a. The chip electrode 2b is electrically connected to the circuit (not shown) and is electrically connected to the chip electrode 3a of the second chip component 3 adjacent thereto via the stud bump 8a, the second substrate 5, and the stud bump 8b. It is an electrode for connecting to. The chip electrode 2c is an electrode that is electrically connected to the circuit (not shown).

  The second chip component 3 has a connecting material 11b at a position different from the chip components 2 and 4 on the chip component mounting region 1d of the first substrate 1 with the main surface 3e facing the second substrate 5 and the third substrate 6 side. It is a chip-like electronic component mounted via The second chip component 3 is thinner than the first chip component 2. The second chip component 3 has a circuit (not shown) necessary for high-frequency transmission. The second chip component 3 has chip electrodes 3a, 3b, 3c and 3d on the main surface 3e. The chip electrode 3a is electrically connected to the circuit (not shown), and is electrically connected to the chip electrode 2b of the first chip component 2 adjacent thereto via the stud bump 8b, the second substrate 5, and the stud bump 8a. It is an electrode for connecting to. The chip electrode 3b is electrically connected to the circuit (not shown) and is electrically connected to the chip electrode 4a of the third chip component 4 adjacent thereto via the stud bump 8c, the third substrate 6, and the stud bump 8d. It is an electrode for connecting to. The chip electrode 3c is an electrode that is electrically connected to the circuit (not shown) and electrically connected to the substrate electrode 1b of the first substrate 1 via the metal wire 10c. The chip electrode 3d is an electrode that is electrically connected to the circuit.

  The third chip component 4 is mounted via a connection material 11c at a position different from the chip components 2 and 3 on the chip component mounting region 1d of the first substrate 1 with the main surface 4e facing the third substrate 6 side. Chip-shaped electronic components. The third chip component 4 has a circuit (not shown) necessary for high-frequency transmission. The third chip component 4 has chip electrodes 4a, 4b and 4c on the main surface 4e. The chip electrode 4a is electrically connected to the circuit (not shown) and electrically connected to the chip electrode 3b of the second chip component 3 adjacent thereto via the stud bump 8d, the third substrate 6, and the stud bump 8c. It is an electrode for connecting to. The chip electrode 4b is an electrode that is electrically connected to the circuit (not shown) and electrically connected to the substrate electrode 1c of the first substrate 1 via the metal wire 10b. The chip electrode 4c is an electrode that is electrically connected to the circuit (not shown).

  The second substrate 5 is a wiring substrate (wiring body) for electrically connecting the chip electrode 2 b of the first chip component 2 and the chip electrode 3 a of the second chip component 3. The second substrate 5 is disposed to face the first substrate 1. The second substrate 5 is disposed on the main surfaces 2e, 3e side of the chip components 2, 3. The second substrate 5 includes a first substrate electrode 5a, a second substrate electrode 5b, and a wiring 5c on the surface of the support plate 5d on the first substrate 1 side. The first substrate electrode 5 a is disposed at a position corresponding to the chip electrode 2 b of the first chip component 2. The second substrate electrode 5 b is disposed at a position corresponding to the chip electrode 3 a of the second chip component 3. The wiring 5c electrically connects the first substrate electrode 5a and the second substrate electrode 5b. The substrate electrodes 5a and 5b are preferably larger in size than the chip electrodes 2b and 3a in consideration of the amount of mounting displacement of the chip components 2 and 3 to be connected. Thus, by setting the size of the chip electrodes 2b and 3a, a sufficient connection area can be ensured regardless of the mounting displacement amount of the chip components 2 and 3. The shape of the substrate electrodes 5a and 5b can be circular or square, and is not particularly limited as long as it is larger than the chip electrodes 2b and 3a. Further, the substrate electrodes 5a and 5b may have the same width as the wiring 5c.

  The shape of the second substrate 5 is that the substrate electrode 1a of the first substrate 1 connected by the metal wire 10a, the chip electrode 2a of the first chip component 2, and the substrate electrode of the first substrate 1 connected by the metal wire 10c. If it is the shape which does not cover 1b and the chip electrode 3c of the 2nd chip component 3, it will not specifically limit. For example, in FIG. 2, the second substrate 5 is narrower than the chip components 2 and 3, but the second substrate 5 covers the chip electrodes 2b and 3a connected to the substrate electrodes 5a and 5b. What is necessary is just to take the shape wider than the chip components 2 and 3, etc. In this case, a part between the second substrate 5 and the first substrate 1 can be connected with an adhesive or a conductive material, and the connection strength between the chip electrodes 2b and 3a and the substrate electrodes 5a and 5b can be increased. Can be reinforced. The second substrate 5 may be electrically connected to the first substrate 1 via a conductive material (not shown). Further, the second substrate 5 has wiring (not shown) and substrate electrodes (not shown) arranged on the surface not connected to the chip components 2 and 3, wiring (not shown) formed on both surfaces, Vias (not shown) that connect substrate electrodes (not shown) may be formed.

  The third substrate 6 is a wiring substrate (wiring body) for electrically connecting the chip electrode 3 b of the second chip component 3 and the chip electrode 4 a of the third chip component 4. The third substrate 6 is disposed to face the first substrate 1. The third substrate 6 is disposed on the main surfaces 3e, 4e side of the chip components 3, 4. The third substrate 6 includes a third substrate electrode 6a, a fourth substrate electrode 6b, and a wiring 6c on the surface of the support plate 6d on the first substrate 1 side. The third substrate electrode 6 a is disposed at a position corresponding to the chip electrode 3 b of the second chip component 3. The fourth substrate electrode 6 b is disposed at a position corresponding to the chip electrode 4 a of the third chip component 4. The wiring 6c electrically connects the third substrate electrode 6a and the fourth substrate electrode 6b. The substrate electrodes 6a and 6b are preferably larger in size than the chip electrodes 3b and 4a in consideration of the amount of mounting displacement of the chip components 3 and 4 to be connected. Thus, by setting the sizes of the chip electrodes 3b and 4a, it is possible to ensure a sufficient connection area regardless of the mounting displacement amount of the chip components 3 and 4. The shape of the substrate electrodes 6a and 6b can be circular or quadrangular, and is not particularly limited as long as it is larger than the chip electrodes 3b and 4a. Further, the substrate electrodes 6a and 6b may have the same width as the wiring 6c.

  The shape of the third substrate 6 is that the substrate electrode 1c of the first substrate 1 connected by the metal wire 10b, the chip electrode 4b of the third chip component 4, and the substrate electrode of the first substrate 1 connected by the metal wire 10c. If it is the shape which does not cover 1b and the chip electrode 3c of the 2nd chip component 3, it will not specifically limit. For example, in FIG. 2, the third substrate 6 is narrower than the chip components 3 and 4, but the third substrate 6 only needs to cover the chip electrodes 3b and 4a connected to the substrate electrodes 6a and 6b. Further, it is possible to adopt a shape wider than the chip parts 3 and 4. In this case, a part between the third substrate 6 and the first substrate 1 can be connected with an adhesive or a conductive material, and the connection strength between the chip electrodes 3b, 4a and the substrate electrodes 6a, 6b can be increased. Can be reinforced. The third substrate 6 may be electrically connected to the first substrate 1 through a conductive material (not shown). Further, the third substrate 6 is provided with wiring (not shown) and substrate electrodes (not shown) on the surface not connected to the chip components 2 and 3, and wiring (not shown) formed on both surfaces. Vias (not shown) that connect substrate electrodes (not shown) may be formed.

  The stud bump 8 a is a bump that electrically connects the first substrate electrode 5 a of the second substrate 5 and the chip electrode 2 b of the first chip component 2. Since the height of the main surface 2e of the first chip component 2 is higher than the main surface 4e of the second chip component 3, the stud bump 8a is set to have a smaller volume than the stud bump 8b. As the stud bump 8a, for example, one formed using an Au wire or the like can be used. The stud bump 8a can be a single-stage stud bump.

  The stud bump 8 b is a bump that electrically connects the second substrate electrode 5 b of the second substrate 5 and the chip electrode 3 a of the second chip component 3. The stud bump 8b is higher than the height of the stud bump 8a (longer than the vertical length of the stud bump 8a in the figure). Since the height of the main surface 3e of the second chip component 3 is lower than the main surface 2e of the first chip component 2, the stud bump 8b is set to have a larger volume than the stud bump 8a. As the stud bump 8b, for example, one formed using an Au wire or the like can be used. The stud bump 8b can be a two-stage stud bump. The stud bump 8b may be a stud bump having a one-stage structure and having a height or volume different from that of the stud bump 8b. By adjusting the height or volume of the stud bump 8b with respect to the stud bump 8a in accordance with the height difference between the main surfaces 2e and 3e between the chip components 2 and 3 to be connected, the main components between the chip components 2 and 3 are adjusted. The difference in height between the surfaces 2e and 3e can be eliminated, and sufficient connection strength between the first substrate electrode 5a and the second substrate electrode 5b of the second substrate 5 can be obtained.

  The stud bump 8 c is a bump that electrically connects the third substrate electrode 6 a of the third substrate 6 and the chip electrode 3 b of the second chip component 3.

  The stud bump 8 d is a bump that electrically connects the fourth substrate electrode 6 b of the third substrate 6 and the chip electrode 4 a of the third chip component 4.

  The stud bumps 8a, 8b, 8c, and 8d may be constituted by bumps made of Cu, for example.

  The metal wire 10 a is a wire made of metal that electrically connects the substrate electrode 1 a of the first substrate 1 and the chip electrode 2 a of the first chip component 2.

  The metal wire 10 b is a wire made of metal that electrically connects the substrate electrode 1 c of the first substrate 1 and the chip electrode 4 b of the third chip component 4.

  The metal wire 10 c is a wire made of a metal (for example, Au) that electrically connects the substrate electrode 1 b of the first substrate 1 and the chip electrode 3 c of the second chip component 3.

  The connection materials 11a, 11b, and 11c are materials for connecting (bonding) the back surfaces of the chip components 2, 3, and 4 to the chip component mounting region 1d of the first substrate 1. For the connection materials 11a, 11b, and 11c, for example, a brazing material containing Su as a main component or a conductive adhesive containing a metal filler such as Ag or Cu can be used.

  As a modification, the second substrate 5 can have a ground-signal-ground structure for the purpose of improving the transmission characteristics by the structure of the module component 20 as described above. For example, on the surface (rear surface) connected to the chip components 2, 3, 4 on the second substrate 5 and the third substrate 6, both sides of the signal wiring 5 c, 6 c for connecting the chip components 2, 3, 4 Ground wirings (not shown) can be arranged at intervals (on both sides in the wiring width direction). Wiring (not shown) and substrate electrodes (not shown) are provided on the surfaces (front surfaces) of the second substrate 5 and the third substrate 6 that are not connected to the chip components 2, 3, 4, and the second substrate 5 and the third substrate. A wiring (not shown) or a substrate electrode (not shown) on the surface of 6 and a ground wiring (not shown) on the back surface of the second substrate 5 and the third substrate 6 are connected by a via (not shown). To do. Then, a substrate electrode (not shown) arranged on the surface of the second substrate 5 and the third substrate 6 and a substrate electrode (not shown) arranged on the first substrate 1 and connected to the ground are connected to a metal wire (FIG. (Not shown), the structure is obtained. Since the second substrate 5 and the third substrate 6 have wirings configured in a ground-signal-ground arrangement, high performance can be obtained.

  As another modified example, the second substrate 5 or the third substrate 6 is made wider than the chip components 2, 3, 4, and signal wiring 5 c, 6 c for connecting the chip components 2, 3, 4 is used. Board electrodes (not shown) connected to wirings (not shown) arranged on both sides in the both-side wiring width direction are provided at locations wider than the width of the chip components 2, 3, 4. A structure may be adopted in which the substrate electrode (not shown) and the substrate electrode (not shown) arranged on the first substrate 1 and connected to the ground are connected via a conductive material.

  As another modification, chip electrodes (not shown) are connected to the ground on both sides of chip electrodes 2b, 3a, 3b, and 4a for connecting the chip components 2, 3, and 4 in the chip components 2, 3, and 4. 2), and a connection is made using wirings (not shown) arranged on both sides of the wirings 5c and 6c for connecting the chip components 2, 3, and 4 of the second substrate 5 or the third substrate 6. Also good.

  Furthermore, as another modification, a passive component (not shown) for the purpose of adjusting electrical characteristics is connected to a substrate electrode (not shown) provided on the surface of the second substrate 5 or the third substrate 6. Structures can be combined. A decoupling capacitor or the like can be applied as the passive component. The second substrate 5 or the third substrate 6 has a passive component electrically connected to the substrate electrodes 5a, 5b, 6a, 6b, so that the performance can be improved.

  Next, the manufacturing method of the module component which concerns on Embodiment 2 of this invention is demonstrated using drawing. 4 to 6 are cross-sectional views schematically showing a method for manufacturing a module component according to Embodiment 2 of the present invention.

  First, the connection material 11 is supplied onto the chip component mounting area 1d of the first substrate 1, and a plurality of chip components 2, 3, 4 having different thicknesses are placed with the main surfaces 2e, 3e, 4e facing upward. Controlled mounting is performed at the set arbitrary mounting height (step A1; see FIG. 4).

  Here, the chip component mounting region of the first substrate 1 is considered in consideration of the amount of heat generated by the chip component 4 and the thermal conductivity of the connection material 11 so that sufficient heat dissipation is obtained for each chip component 2, 3, 4. Each chip component 2, 3, 4 can be mounted at an arbitrary height (for example, 10 μm) from the surface of 1 d. Further, the supply amount of the connection material 11 is such that the connection between the chip components 2, 3, 4 and the first substrate 1 in the state where the chip components 2, 3, 4 are mounted at an arbitrary mounting height. The amount is controlled so as to be sufficiently filled with 11a, 11b, and 11c. The mounting height is set in consideration of the amount of heat generated during the operation of the chip components 2, 3, 4 and the thermal conductivity of the connection materials 11a, 11b, 11c. The connection material 11 may be a brazing material containing Sn as a main component or a conductive resin containing a conductive filler such as Ag or Cu.

  Further, when a conductive resin is used for the connection materials 11a, 11b, and 11c, a printing method, a dispensing method, or the like can be applied as a supply method onto the chip component mounting region 1d. In the printing method, it is possible to supply all the chip components 2, 3, and 4 at a time, and then take a procedure of mounting each chip component 2, 3, 4. In the dispensing method, a procedure for supplying the connection material 11 after recognizing the mounting position for each of the chip components 2, 3, 4 can be adopted. In the printing method, efficiency in the mounting process of the chip components 2, 3, 4 can be improved. In the dispensing method, the supply position accuracy of the connection materials 11a, 11b, and 11c can be improved with respect to the chip components 2, 3, and 4. Therefore, the creeping of the connecting parts 11a, 11b, and 11c to the main surfaces 2e, 3e, and 4e of the chip components 2, 3, and 4 can be suppressed. In addition to the method for supplying the connection materials 11a, 11b, and 11c described above, a transfer method or the like can be applied, and the supply method can be selected according to the specifications. In the case where a conductive resin is used for the connection materials 11a, 11b, and 11c, the chip components 2, 3, and 4 are mounted and then heated (for example, heated to 180 ° C.) in a heating furnace to be thermally cured.

  Next, stud bumps 8a, 8b, 8c, and 8d are formed on chip electrodes 2b, 3a, 3b, and 4a for connecting the mounted chip components 2, 3, and 4 (step A2; see FIG. 5). .

  Here, the stud bumps 8 a, 8 b, 8 c, and 8 d are chip components 2, 3, 3, which are caused by a difference in thickness between the chip components 2, 3, 4 to be connected or a difference in mounting height of the chip component 4. It is formed with a volume corresponding to the difference in height of the main surface between the four. As the stud bumps 8a, 8b, 8c, and 8d, a single-stage stud bump 8a is used for the chip electrode 2b of the first chip component 2 having a high main surface among the chip components 2, 3, and 4 to be connected. A stud bump 8b having a two-stage structure can be used for the chip electrode 3a of the low second chip component 3. In addition, the volume is adjusted from the wire diameter of the Au wire and the initial ball diameter at the time of forming the stud bumps 8a, 8b, 8c, 8d to form stud bumps 8a, 8b, 8c, 8d having different one-stage structures. May be.

  Next, the chip electrodes 2b, 3a, 3b and 4a on which the stud bumps 8a, 8b, 8c and 8d are formed are positioned so that the substrate electrodes 5a, 5b, 6a and 6b of the second substrate 5 and the third substrate 6 face each other. The second substrate 5 and the third substrate 6 are mounted on the chip components 2, 3, and 4 (step A3; see FIG. 6).

  In step A3, the substrate electrodes 5a, 5b, 6a, 6b (for example, a square having a side of 130 μm) of the second substrate 5 and the third substrate 6 are connected to the chip electrodes 2b, 3a, 3b, 4a (for example, one side is connected). Since the size is set to be larger than a square of 100 μm), a sufficient connection area can be secured even if there is a mounting displacement in the chip components 2, 3, 4.

  Finally, the substrate electrodes 1a, 1b, 1c of the first substrate 1 and the chip electrodes 2a, 3c, 4b of the corresponding chip components 2, 3, 4 are connected by metal wires 10a, 10b, 10c (step A4). ; See FIGS. 2 and 3). Thereby, substrate electrode 1a, 1b, 1c and corresponding chip electrode 2a, 3c, 4b are electrically connected.

  In the module component manufacturing method described above, the stud bumps 8a, 8b, 8c, and 8d are formed on the chip electrodes 2b, 3a, 3b, and 4a after the chip components 2, 3, and 4 are mounted on the first substrate 1. Although an example is shown, a procedure of forming bumps (corresponding to 8a, 8b, 8c, 8d) before mounting the chip components 2, 3, 4 on the first substrate 1 may be taken. In this case, a plating method may be applied to the formation of the bump.

  In the module component manufacturing method described above, an example in which the stud bumps 8a, 8b, 8c, and 8d are formed on the chip electrodes 2b, 3a, 3b, and 4a side is shown, but the substrate electrodes 5a, 5b, 6a, and 6b side are shown. You may take the method of forming to. In this case, Au bumps (not shown) are formed on the substrate electrodes 5a, 5b, 6a, and 6b at positions that reflect the amount of mounting position deviation of the chip components 2, 3, and 4. In this method, there is no damage to the chip components 2, 3, and 4 related to Au bump formation, and the reliability can be further improved.

  According to the second embodiment, by connecting the chip components 2, 3, and 4 using the second substrate 5 and the third substrate 6, it is possible to connect at a shorter distance than the connection using the conventional metal wire. Therefore, performance can be improved by reducing transmission loss. Further, since the chip parts 2, 3, 4 to be connected are stud bumps 8a, 8b, 8c, 8d having a structure in which the height or volume differs depending on the height difference of the main surfaces 2e, 3e, 4e. Thus, the difference in height between the main surfaces of the chip components 2, 3, and 4 is eliminated, and a sufficient connection state with the substrate electrodes 5a and 5b is obtained. Further, in consideration of the mounting misalignment amount of the chip components 2, 3, 4, the substrate electrodes 5 a, 5 b, 6 a, 6 b are set to be larger in size than the chip electrodes 2 b, 3 a, 3 b, 4 a. A sufficient connection area can be secured regardless of the amount of mounting displacement of 2, 3, and 4. Therefore, high connection strength is obtained and reliability is improved.

[Embodiment 3]
A module component according to Embodiment 3 of the present invention will be described with reference to the drawings. FIG. 7 is a cross-sectional view schematically showing the configuration of the module component according to the third embodiment.

  The third embodiment is a modification of the second embodiment. The bumps 7a, 7b, 7c, and 7d connected to the substrate electrodes 5a, 5b, 6a, and 6b are all formed in a single-stage structure, and the stud bumps 8 are soldered. It is covered with bumps 9. The solder bump 9 is the first chip component 2 having a high principal surface among the chip components 2, 3, 4 to be connected, and the second chip component 3 and the third chip component 4 having a small principal surface and a small principal surface. Then, the volume of the solder bump 9 is large. In mounting the second substrate 5 and the third substrate 6, heating is performed at a temperature higher than the temperature at which the solder bumps 9 are melted. As a method of adjusting the supply amount of the solder bump 9, it is adjusted by the size of the substrate electrode or the opening size of the solder resists 2f, 3f, 4f, 5e, 6e. In the case of applying a printing method or a plating method, adjustment is also possible depending on the opening size of the mask. The main surfaces 2e, 3e, and 4e of the chip components 2, 3, and 4 are solder resists 2f, 3f, and 4f except for the chip electrodes 2a, 2b, 2c, 3a, 3b, 3c, 3d, 4a, 4b, and 4c. The surface of the second substrate 5 and the third substrate 6 on the first substrate 1 side may be covered with solder resists 5e and 6e except for the substrate electrodes 5a, 5b, 6a and 6b. Other configurations and manufacturing methods are the same as those in the second embodiment.

  In the third embodiment, each stud bump (8 in FIG. 7) formed on the chip electrode (2b, 3a, 3b, 4a in FIG. 7) side is connected to the chip component (2, 3, FIG. 7). 4) may have the same volume, and the solder bump (FIG. 7) is formed on the substrate electrode (5a, 5b, 6a, 6b) side without forming the stud bump (8 in FIG. 7). 9) Only the structure may be formed and connected to the chip electrode (2b, 3a, 3b, 4a in FIG. 7) side.

  According to the third embodiment, the same effects as those of the second embodiment can be obtained, and even if the chip components 2, 3, and 4 to be connected have a variation in height due to mounting accuracy, the molten solder bump 9 exhibits the variation. This eliminates the problem and ensures higher connection reliability. In addition, since the solder bumps 9 corresponding to the height of the main surface are supplied, short-circuit defects do not occur with adjacent connection portions and other circuit portions. Further, the mounting height can be controlled by the solder bumps 9 so as to have an arbitrary height during mounting. Accordingly, it is possible to cope with a difference in height on the main surfaces 2e, 3e, 4e between the chip components 2, 3, 4 to be connected more strictly. Furthermore, even if a mounting position shift occurs between the chip components 4, the solder bump 9 is melted during mounting and sufficient wettability with the stud bump 8 is obtained, so that a connection area can be ensured.

[Embodiment 4]
A module component according to Embodiment 4 of the present invention will be described with reference to the drawings. FIG. 8 is a cross-sectional view schematically showing the configuration of the module component according to Embodiment 4 of the present invention.

The fourth embodiment is a modification of the second embodiment, in which the chip components 2, 3, 4 are electrically connected by a single second substrate 5 instead of a plurality. The second substrate 5 has a substrate electrode 5a corresponding to the electrical connection with the chip electrodes 2b, 3a, 3b, 4a of the individual chip components 2, 3, 4 on the surface of the support plate 5d on the first substrate 1 side. 5b, 5f, 5g and wirings 5c, 5h.
The wiring 5c electrically connects the substrate electrodes 5a and 5b. The wiring 5h electrically connects the substrate electrodes 5f and 5g. With respect to the stud bumps 8a, 8b, 8c, and 8d, the stud bump 8a on the chip electrode 2b of the first chip component 2 having the highest main surface height is set in a single-stage structure and has a small volume. The stud bumps 8a on the chip electrodes 3a, 3b, 4a of the second chip component 3 and the third chip component 4 having a height lower than that of the first chip component 2 are set in a two-stage structure and have a large volume. Yes. The volumes of the stud bumps 8a, 8b, 8c, and 8d are not limited to this, and are set according to the height of the main surfaces 2e, 3e, and 4e of the chip components 2, 3, and 4. Other configurations are the same as those of the second embodiment. The third embodiment may be applied to the fourth embodiment.

  According to the fourth embodiment, the same effects as those of the second embodiment are achieved, and by adopting a structure in which each chip component 2, 3, 4 is connected by one second substrate 5, the number of components is reduced and production is performed. Can improve the cost and reduce the cost.

[Embodiment 5]
A module component according to Embodiment 5 of the present invention will be described with reference to the drawings. FIG. 9 is a cross-sectional view schematically showing the configuration of the module component according to Embodiment 5 of the present invention.

  The fifth embodiment is a modification of the second embodiment. The stud bumps 8a, 8b, 8c, and 8d have the same height, and the main surfaces 2e, 3e, and 4e between the chip components 2, 3, and 4 have a height. The thickness of the substrate electrode is adjusted according to the difference. In the configuration of FIG. 9, only the thickness of the second substrate electrode 5b is adjusted. However, the thickness is not limited to this, and the height of the main surfaces 2e, 3e, 4e between the chip components 2, 3, 4 is not limited to this. Depending on the difference, the height of any of the other substrate electrodes 5a, 6a, 6b may be adjusted. Other configurations are the same as those of the second embodiment.

  According to the fifth embodiment, the same effects as those of the second embodiment can be obtained, and the main surfaces 2e, 3e, and 4e between the chip components 2, 3, and 4 to be connected have the same height, and the second substrate 5 or the second substrate 5 By adjusting the thickness of any of the substrate electrodes 5a, 5b, 6a, 6b of the three substrates 6, the difference in height of the main surfaces 2e, 3e, 4e between the chip components 2, 3, 4 to be connected is eliminated. In addition, a sufficient connection state between the chip electrodes 2b, 3a, 3b, and 4a and the substrate electrodes 5a, 5b, 6a, and 6b can be obtained through the stud bumps 8a, 8b, 8c, and 8d. Further, the volume or height of the stud bumps 8a, 8b, 8c, 8d can be made constant by the chip electrodes 2b, 3a, 3b, 4a or the substrate electrodes 5a, 5b, 6a, 6b. Therefore, since the same connection state can be obtained by the chip electrodes 2b, 3a, 3b, 4a or the substrate electrodes 5a, 5b, 6a, 6b, assembly is easy.

  Note that, in the present application, where reference numerals are attached to the drawings, these are only for the purpose of helping understanding, and are not intended to be limited to the illustrated embodiments.

(Appendix)
According to a first aspect of the present invention, in the module component, the first substrate, the second substrate disposed opposite to the first substrate, and the main surface facing the second substrate side, the first substrate. The first chip component mounted on one substrate and the first chip mounted on a position different from the first chip component on the first substrate with the main surface facing the second substrate side. A second chip component thinner than the thickness of the component, a first bump connecting the second substrate and the first chip component, a second bump connecting the second substrate and the second chip component, The first chip component is electrically connected to the second chip component via the first bump, the second substrate, and the second bump, and the second bump is formed on the first bump. It is characterized by being higher than the height.

  In the module component of the present invention, the first chip component has a first chip electrode connected to the first bump on a main surface, and the second chip component is connected to the second bump on a main surface. The second substrate has a first substrate electrode connected to the first bump at a position facing the first chip electrode, and faces the second chip electrode. It is preferable that a second substrate electrode connected to the second bump is provided at a position, and the first substrate electrode and the second substrate electrode have a larger area than the first chip electrode and the second chip electrode. .

  In the module component of the present invention, a connection area between the first bump and the first electrode is smaller than a connection area between the first bump and the first chip electrode, and the second bump and the second electrode. Is preferably smaller than the connection area between the second bump and the second chip electrode.

In the module component of the present invention, the first bump is a stud bump,
It is preferable that the second bumps are stud bumps stacked in multiple stages than the first bumps.

  In the module component of the present invention, the first bump has a structure in which a stud bump is covered with a solder bump, and the second bump has a structure in which a stud bump is covered with a solder bump. Preferably it is.

  In the module component of the present invention, it is preferable that the second substrate has a passive component electrically connected to the first substrate electrode or the second substrate electrode.

  In the module component of the present invention, the third substrate disposed opposite to the first substrate at a position different from the second substrate, and the first substrate with the main surface facing the third substrate side A third chip component mounted at a position different from the first chip component and the second chip component, a third bump connecting the third substrate and the second chip component, and the third substrate; A fourth bump connecting the third chip component, and the third chip component is electrically connected to the second chip component via the fourth bump, the third substrate, and the third bump. It is preferable to be connected to.

  In the module component of the present invention, a third chip component mounted at a position different from the first chip component and the second chip component on the first substrate with a main surface facing the second substrate side; And a third bump for connecting the second substrate and the second chip component at a position different from the second bump, and a fourth bump for connecting the second substrate and the third chip component. The third chip component is preferably electrically connected to the second chip component via the fourth bump, the second substrate, and the third bump.

  In the module component of the present invention, it is preferable that the first bump and the second bump are made of one or more kinds of metals.

  In the module component according to the aspect of the invention, it is preferable that the second substrate has a wiring configured in the order of ground, signal, and ground.

  In a second aspect of the present invention, in the module component, the first substrate, the second substrate disposed to face the first substrate, and the first surface with the main surface facing the second substrate side. The first chip component mounted on one substrate and the first chip mounted on a position different from the first chip component on the first substrate with the main surface facing the second substrate side. A second chip component thinner than the thickness of the component, a first bump connecting the second substrate and the first chip component, a second bump connecting the second substrate and the second chip component, The first chip component is electrically connected to the second chip component via the first bump, the second substrate, and the second bump, and the second substrate is connected to the first bump. The first substrate electrode to be connected is connected to the second bump. A second substrate electrode that protrudes closer to the first substrate than the first substrate electrode, and the second bump has the same height as the first bump. It is characterized by.

  In a third aspect of the present invention, in the module component manufacturing method, the first chip component and the second chip component thinner than the thickness of the first chip component are formed on a predetermined region of the first substrate. Mounting with the main surface facing upward, forming a first bump on one of the first chip electrode of the first chip component and the first substrate electrode of the second substrate; Forming a second bump higher than the height of the first bump on one of a second chip electrode of a two-chip component and a second substrate electrode of the second substrate; and the first chip electrode and the The first chip electrode and the first substrate electrode are aligned with each other so that the first substrate electrode faces and the second chip electrode and the second substrate electrode face each other. Connected via a bump, and the second chip electrode And a serial second substrate electrode, characterized in that it comprises, a step of connecting via the second bump.

  It should be noted that the embodiments or examples can be changed or adjusted within the scope of the entire disclosure (including claims and drawings) of the present invention and based on the basic technical concept. In addition, various combinations or selections of various disclosed elements (including each element of each claim, each element of each embodiment or example, each element of each drawing, etc.) are possible within the scope of the entire disclosure of the present invention. It is. That is, the present invention naturally includes various variations and modifications that could be made by those skilled in the art according to the entire disclosure including the claims and the drawings, and the technical idea. Further, regarding numerical values and numerical ranges described in the present application, it is considered that any intermediate value, lower numerical value, and small range are described even if not specified.

DESCRIPTION OF SYMBOLS 1 1st board | substrate 1a, 1b, 1c board | substrate electrode 1d chip component mounting area | region 1e main surface 2 1st chip components 2a, 2b, 2c chip electrode 2e main surface 2f solder resist 3 2nd chip components 3a, 3b, 3c, 3d chip Electrode 3e Main surface 3f Solder resist 4 Third chip component 4a, 4b, 4c Chip electrode 4e Main surface 4f Solder resist 5 Second substrate 5a First substrate electrode 5b Second substrate electrode 5c Wiring 5d Support plate 5e Solder resist 5f Third Substrate electrode 5g Fourth substrate electrode 5h Wiring 6 Third substrate 6a Third substrate electrode 6b Fourth substrate electrode 6c Wiring 6d Support plate 6e Solder resist 7a First bump 7b Second bump 7c Third bump 7d Fourth bump 8 Stud bump 8a Stud bump (first bump)
8b Stud bump (second bump)
8c Stud bump (third bump)
8d Stud bump (4th bump)
9 Solder bumps 10a, 10b, 10c Metal wires 11a, 11b, 11c Connecting material 12 Solder resist 20 Module parts

Claims (8)

A first substrate;
A second substrate disposed opposite the first substrate;
A first chip component mounted on the first substrate with the main surface facing the second substrate;
A second chip component that is mounted at a position different from the first chip component on the first substrate with the main surface facing the second substrate, and is thinner than the thickness of the first chip component;
A first bump connecting the second substrate and the first chip component;
A second bump connecting the second substrate and the second chip component;
With
The first chip component is electrically connected to the second chip component via the first bump, the second substrate, and the second bump,
The second bump is rather higher than the height of the first bump,
A third substrate disposed opposite to the first substrate at a position different from the second substrate;
A third chip component mounted at a position different from the first chip component and the second chip component on the first substrate with the main surface facing the third substrate side;
A third bump connecting the third substrate and the second chip component;
A fourth bump connecting the third substrate and the third chip component;
Further comprising
The third chip component is electrically connected to the second chip component via the fourth bump, the third substrate, and the third bump.
Module parts. The first chip component has a first chip electrode connected to the first bump on a main surface;
The second chip component has a second chip electrode connected to the second bump on a main surface,
The second substrate has a first substrate electrode connected to the first bump at a position facing the first chip electrode, and is connected to the second bump at a position facing the second chip electrode. A second substrate electrode;
The module component according to claim 1, wherein the first substrate electrode and the second substrate electrode have a larger area than the first chip electrode and the second chip electrode. The connection area between the first bump and the first substrate electrode is smaller than the connection area between the first bump and the first chip electrode.
The module component according to claim 2, wherein a connection area between the second bump and the second substrate electrode is smaller than a connection area between the second bump and the second chip electrode. The first bump is a stud bump,
4. The module component according to claim 1, wherein the second bump is a stud bump that is stacked in multiple stages than the first bump. 5. The first bump has a structure in which a stud bump is covered with a solder bump,
The module component according to any one of claims 1 to 3, wherein the second bump has a structure in which a stud bump is covered with a solder bump. The second substrate, the first substrate electrode and the second module component of claim 2 or 3, wherein a substrate electrode and electrically connected to the passive components. A first substrate;
A second substrate disposed opposite the first substrate;
A first chip component mounted on the first substrate with the main surface facing the second substrate;
A second chip component that is mounted at a position different from the first chip component on the first substrate with the main surface facing the second substrate, and is thinner than the thickness of the first chip component;
A first bump connecting the second substrate and the first chip component;
A second bump connecting the second substrate and the second chip component;
With
The first chip component is electrically connected to the second chip component via the first bump, the second substrate, and the second bump,
The second substrate has a first substrate electrode connected to the first bump and a second substrate electrode connected to the second bump.
The second substrate electrode protrudes closer to the first substrate than the first substrate electrode,
The second bump is a module component having the same height as the first bump. Mounting the first chip component, the second chip component thinner than the thickness of the first chip component, and the third chip component on a predetermined region of the first substrate with the main surface facing up; When,
A first bump is formed on one of the first chip electrode of the first chip component and the first substrate electrode of the second substrate, the second chip electrode of the second chip component, and the second Forming a second bump higher than the height of the first bump on one of the second substrate electrodes of the substrate;
The first chip electrode and the first substrate electrode are aligned with each other so that the first chip electrode and the first substrate electrode are opposed to each other, and the second chip electrode and the second substrate electrode are opposed to each other. Connecting a substrate electrode via the first bump, and connecting the second chip electrode and the second substrate electrode via the second bump;
A third bump is formed on one of the third chip electrode of the second chip component and the third substrate electrode of the third substrate, the fourth chip electrode of the third chip component, and the third chip electrode. Forming a fourth bump on one of the fourth substrate electrodes of the substrate;
The third chip electrode and the third substrate electrode are aligned so that the third chip electrode and the third substrate electrode face each other, and the fourth chip electrode and the fourth substrate electrode face each other. Connecting a substrate electrode via the third bump, and connecting the fourth chip electrode and the fourth substrate electrode via the fourth bump;
Of manufacturing module parts including

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