JP6361217B2 - Power converter - Google Patents

Description

  The present invention relates to a power conversion device, and more particularly to a technique for rectifying an AC voltage to obtain a DC voltage once and then converting it to another AC voltage.

  The technology can be applied to, for example, a power conversion device that drives an AC rotating machine to accelerate and decelerate. This is suitable when the capacitor for holding the DC voltage is small and the DC voltage pulsates depending on the power supply frequency.

  2. Description of the Related Art Conventionally, a technique is known in which input AC power is rectified to obtain DC power once, and then AC power having a variable voltage and variable frequency is obtained by switching and then output. The output AC power is used for variable speed control of an AC rotating machine, for example.

  An example of a power conversion device employed in such a technology is a diode bridge that performs full-wave rectification on an AC voltage supplied from a commercial power source and converts it to a DC voltage, and switches the DC voltage to another AC voltage. And a power converter that is supplied to an AC rotating machine as a load. A power converter controls each switching element which comprises a power converter, and outputs the alternating voltage of the designated frequency to an alternating current rotary machine.

  In this power converter, a capacitor that holds a DC voltage output from the diode bridge is employed. In order to improve the drive performance of the AC rotating machine, a large capacitance is required to sufficiently smooth the DC voltage in the capacitor. This is to increase the ripple current resistance.

  An electrolytic capacitor is used as a capacitor having a large capacitance. However, electrolytic capacitors are larger in size and more expensive than other types of capacitors. Thus, there are problems that the power conversion device becomes large and the manufacturing cost increases.

  As an example of measures against such a problem, an electrolytic capacitor-less inverter device has been developed (for example, Patent Document 1 and Non-Patent Document 1 listed below). For example, in the electrolytic capacitor-less inverter device of Patent Document 1, a three-phase AC voltage is used as a power source, and a small-capacity film capacitor is used as a capacitor.

  When the capacitance of the capacitor is small, the DC voltage supplied to the main circuit of the inverter includes pulsation. When a DC voltage is switched by an inverter based on the average value without considering this pulsation, for example, an AC voltage including pulsation is applied to the AC rotating machine. Driving with an AC voltage including pulsation causes the AC rotating machine to output a pulsating torque, and a current flowing through the AC rotating machine pulsates.

  In response to such a problem, a technique has been proposed in which a timing signal for pulse width modulation to be given to a switching element constituting an inverter (power converter) is corrected based on the value of a DC voltage including pulsation ( For example, Patent Document 2). By such correction, a three-phase AC voltage having a constant amplitude that does not affect the AC rotating machine is output.

  For example, as in Patent Document 3, a technique for rectifying an AC voltage using a converter that operates in a PWM (pulse width modulation) system instead of a diode bridge is also proposed. In such a technique, unlike the technique of rectifying by a diode bridge, it is considered to perform switching of the converter so that pulsation does not occur in the DC voltage in the first place.

JP 2009-17673 A Japanese Examined Patent Publication No. 61-048356 JP-A-9-56162

Isao Takahashi, Yoichi Ito, “Control Method of Capacitorless Inverter”, National Conference of the Institute of Electrical Engineers of Japan in 1988, No. 527, pp624-626

  On the other hand, the DC voltage obtained from the diode bridge, unlike the DC voltage obtained from the converter, pulsates if the capacitance of the capacitor is small. In order to use such a DC voltage for pulse width modulation, it is necessary to accurately sample the pulsation component. In general, a DC voltage is sampled at the top and / or bottom of a carrier used for pulse width modulation, so that the carrier frequency is increased to accurately sample the pulsating component of the DC voltage.

  Also, it is desirable to increase the carrier frequency in order to keep the control response high because the stability of the system is secured against the pulsation of the DC voltage. Therefore, in the configuration shown in Patent Document 2, there is a problem that the carrier frequency must be set high. However, in Patent Document 2, there is no clear examination on the pulsation component of the DC voltage and the sampling frequency.

  As described above, in the electrolytic capacitorless inverter device, the problems of DC voltage pulsation, improvement of DC voltage sampling accuracy for correcting the pulsation, and increase of carrier frequency for improvement of the accuracy are linked. The problems of increasing the loss of the power conversion device due to the rise of the temperature and increasing the size of the cooling device for reducing the loss occur in a chain.

  Therefore, an object of the present invention is to provide a technology that contributes to suppressing the switching loss depending on the carrier frequency and thus reducing the size of the power converter while ensuring the followability of the control of the power converter with respect to the pulsation of the DC voltage. There is to do.

  A first aspect of the power conversion device according to the present invention is a rectifier circuit (51) (53A) that rectifies an AC voltage (Vs) (Vr, Vs, Vt) by a diode bridge and outputs a DC voltage (Vdc) ( 53B), a capacitor (3) that receives the DC voltage at both ends, a power converter (2) that converts the DC voltage into another AC voltage by switching, and a control unit that controls the power converter ( 4).

  The control unit generates a signal (G) for controlling the switching of the power converter based on a switching carrier (C1, C2) and a command value (V *) of the other AC voltage to convert the power A modulation signal generator (13) to be supplied to the device.

  The frequency (Fc) of the switching carrier is variable according to the phase region divided by the phase (θ) of the AC voltage.

  A second mode of the power converter according to the present invention is the first mode, and a frequency setting unit (19A) (19B) that sets the value of the frequency based on the phase (θ) of the AC voltage. Is further provided.

  The switching carriers (C1, C2) employed in the modulation signal generation unit have the frequency set by the frequency setting unit.

  The 3rd aspect of the power converter device concerning this invention is the 1st or 2nd aspect, Comprising: The said alternating voltage is a single phase alternating voltage (Vs). The rectifier circuit (51) performs full-wave rectification.

  In the first phase region (T01) including the phase (180 degrees, 360 degrees) in which the absolute value of the change rate of the AC voltage is the largest, the frequency takes the first value (Fc1). In the second phase region (T02) including the phase (90 degrees, 270 degrees) in which the absolute value of the change rate of the AC voltage is the smallest, the frequency takes the second value (Fc2). Preferably, the first value is greater than the second value.

  The 4th aspect of the power converter device concerning this invention is the 1st or 2nd aspect, Comprising: The said alternating voltage is a three-phase alternating voltage (Vr, Vs, Vt). The rectifier circuit (53A) performs half-wave rectification.

  In the first phase region (T1) including the first phase (θrs, θst, θtr) in which two phases of the AC voltage have the same positive value, the frequency takes the first value (Fc1). In the second phase region (T2) different from the first phase region including the second phase (θrs + 60 °, θst + 60 °, θtr + 60 °) which is 60 degrees later than the first phase, the frequency is the second Take the value (Fc2). Preferably, the first value is greater than the second value.

  The 5th aspect of the power converter device concerning this invention is the 1st or 2nd aspect, Comprising: The said alternating voltage is a three-phase alternating voltage (Vr, Vs, Vt). The rectifier circuit (53B) performs full-wave rectification.

  In a first phase region (T1) including a first phase (θrs, θst, θtr, θsr, θts, θrt) in which two phases of the AC voltage have the same value, the frequency has a first value (Fc1). take. A second phase region different from the first phase region including a second phase (θrs + 30 °, θst + 30 °, θtr + 30 °, θsr + 30 °, θts + 30 °, θrt + 30 °) that is 30 degrees later than the first phase. In (T2), the frequency takes a second value (Fc2). Preferably, the first value is greater than the second value.

  A sixth aspect of the power conversion device according to the present invention is any one of the third to fifth aspects, wherein the third phase is different from both the first phase region and the second phase region. A region (T03; T3) exists. The frequency takes a third value (Fc3) in the third phase region. Preferably, the third value is smaller than the first value and larger than the second value.

  The 7th aspect of the power converter device concerning this invention is the 1st or 2nd aspect, Comprising: The said alternating voltage is a single phase alternating voltage (Vs). The rectifier circuit (51) performs full-wave rectification.

  In the first phase region (T02; T02 ′; T04) including the phase (90 degrees, 270 degrees) in which the absolute value of the change rate of the AC voltage is the smallest, the frequency is the first value (Fc2; Fc2 ′; Fc4). Take. In a pair of second phase regions (T01; T03; T05) adjacent to each other across the first phase region, the frequency takes a second value (Fc1; Fc3; Fc5). Preferably, the second value is greater than the first value.

  An eighth aspect of the power conversion device according to the present invention is the seventh aspect, and is a third phase region (T06; T6) different from any of the first phase region and the second phase region. Exists. The frequency takes a third value (Fc6) in the third phase region. Preferably, the third value is smaller than the second value.

  A ninth aspect of the power conversion device according to the present invention is the eighth aspect, in which the first value (Fc4) is smaller than the third value (Fc6).

  The DC voltage rectified from the AC voltage by the diode bridge pulsates in synchronization with the AC voltage. In the first aspect of the power conversion device according to the present invention, the frequency of the switching carrier is changed according to the phase of the AC voltage, so that the frequency according to the magnitude of the DC voltage or the torque that varies based on the DC voltage is changed. The power converter switches with the received signal. Thus, the switching loss depending on the carrier frequency is suppressed while ensuring the followability of the control of the power converter with respect to the pulsation of DC voltage and the fluctuation of torque, which contributes to downsizing of the power converter.

  The second aspect of the power conversion device according to the present invention contributes to the realization of the first aspect.

  According to the third to sixth aspects of the power converter according to the present invention, the switching loss depending on the carrier frequency is suppressed while ensuring the followability of the control of the power converter with respect to the DC voltage pulsation itself. .

  According to the seventh to ninth aspects of the power converter according to the present invention, the switching loss depending on the carrier frequency while ensuring the followability of the control of the power converter with respect to the torque fluctuation caused by the pulsation of the DC voltage. Is suppressed.

It is a circuit diagram which illustrates the composition of the power converter concerning a 1st embodiment and a 2nd embodiment. It is a graph which shows the phase area | region in 1st Embodiment. It is a graph explaining operation | movement of 1st Embodiment. It is a circuit diagram which illustrates the composition of the frequency setting part adopted in a 1st embodiment. It is a timing chart which shows operation | movement of the frequency setting part employ | adopted in 1st Embodiment. It is a graph which shows the phase area | region in 2nd and 4th embodiment. It is a graph explaining operation | movement of 2nd Embodiment. It is a circuit diagram which illustrates the structure of the frequency setting part employ | adopted in 2nd Embodiment. It is a timing chart which shows operation | movement of the frequency setting part employ | adopted in 2nd Embodiment. It is a graph explaining the effect of 2nd Embodiment. It is a circuit diagram which illustrates the composition of the power converter concerning the 3rd and 4th embodiment. It is a graph which shows the phase area | region in 3rd Embodiment. It is a graph explaining operation | movement of 3rd Embodiment. It is a graph explaining operation | movement of 4th Embodiment. It is a circuit diagram which illustrates the composition of the power converter concerning a 5th embodiment. It is a graph which shows the phase area | region in 5th Embodiment. It is a circuit diagram which illustrates the composition of the power converter concerning a 6th embodiment. It is a graph which shows the phase area | region in 6th Embodiment. It is a graph explaining selection of the carrier for switching.

First embodiment.
FIG. 1 is a circuit diagram illustrating the configuration of the power conversion apparatus according to the first embodiment. The power converter includes a rectifier circuit 51, a capacitor 3, a power converter 2, and a control unit 4.

  The rectifier circuit 51 is configured by a diode bridge, and rectifies the AC voltage Vs supplied from the single-phase power supply 61 to output a DC voltage Vdc.

  Although the capacitor 3 receives the DC voltage Vdc at both ends, the smoothing function is not necessarily required here. According to the first embodiment, even if the smoothing function is small and the pulsation of the DC voltage Vdc is large, control following this can be performed.

  The power converter 2 converts the DC voltage Vdc into another AC voltage by switching, and outputs it. In the power converter 2, more specifically, the switching is controlled by the control unit 4. Here, the case where the power converter 2 outputs a three-phase AC voltage for driving the three-phase AC rotating machine 1 is illustrated. Of course, the output AC voltage may be a single phase.

  In the switching of the power converter 2, a signal for controlling the switching (hereinafter also referred to as “switching control signal”) is usually determined for each cycle of the switching carrier. Therefore, the switching loss depends on the frequency of the switching carrier (carrier frequency). More specifically, the switching loss is reduced as the carrier frequency is lower.

  On the other hand, the higher the carrier frequency, the higher the followability of the control for the pulsation of the DC voltage Vdc.

  FIG. 2 is a graph showing a phase region in the first embodiment. Specifically, the waveform of the AC voltage Vs and the waveform of the DC voltage Vdc obtained by full-wave rectification of the waveform are shown. As is apparent from FIG. 2, the DC voltage Vdc pulsates at the frequency of the AC voltage Vs, that is, twice the power supply frequency.

  Since the waveform of the DC voltage Vdc is based on a sine wave, the smaller the value, the greater the change. Specifically, when the power supply phase θ of the AC voltage Vs is adopted as a reference (0 degree) with the phase having the largest change rate of the AC voltage Vs, the phase region can be grasped as follows. However, regarding the phase, 360 degrees and 0 degrees are handled in the same manner.

Phase region T01 including a phase (θ = 180 degrees or 360 degrees) having the largest absolute value of the rate of change of the AC voltage Vs:
A phase region T02 including a phase (θ = 90 degrees or θ = 270 degrees) having the smallest absolute value of the rate of change of the AC voltage Vs.

  When the phase region is divided as described above, it can be said that the pulsation of the DC voltage Vdc in the phase region T01 is more significant than the pulsation of the DC voltage Vdc in the phase region T02.

  Therefore, in phase region T02, even if the sampling period of DC voltage Vdc is made longer than in phase region T01, it can be said that the followability of control of power converter 2 with respect to pulsation of DC voltage Vdc is less likely to be impaired. In addition, since the voltage supplied to the power converter 2 is large when the value of the DC voltage Vdc is large, reducing the frequency of controlling the power converter 2 in the phase region T02 also causes a reduction in switching loss. To do.

  As described above, the DC voltage Vdc is sampled at the top and / or bottom of the switching carrier used for pulse width modulation. Therefore, increasing the sampling period of the DC voltage Vdc corresponds to reducing the carrier frequency.

  Therefore, by introducing the frequency Fc2 of the switching carrier in the phase region T02 and the frequency Fc1 of the switching carrier in the phase region T01, the relationship of Fc1> Fc2 is established, whereby the power converter for the pulsation of the DC voltage Vdc The switching loss depending on the carrier frequency of the power conversion device can be reduced while ensuring the followability of the control 2. This simplifies the cooling device for the switching element and contributes to downsizing the power conversion device.

  FIG. 3 is a graph for explaining the operation of the first embodiment, and shows the waveform of the DC voltage Vdc and the waveform of the carrier frequency fc when the power supply phase θ takes 0 to 180 degrees. Due to the symmetry of the DC voltage Vdc with respect to the power supply phase θ, the waveform of the DC voltage Vdc when the power supply phase θ takes 180 to 360 degrees appears as shown in FIG. Similarly, the waveform of the carrier frequency fc when the power supply phase θ is 180 to 360 degrees also appears as in FIG.

  In FIG. 3, the phase region T01 is grasped as a range where the power supply phase θ is 0 degree to a value θ1 (approximately 75 degrees in FIG. 3) and a value θ2 (approximately 105 degrees in FIG. 3) to 180 degrees. As described above, since the waveform of the DC voltage Vdc is repeated with a period of 180 °, the arrow indicating the phase region T01 has no arrowhead at the position where the power supply phase θ is 0 ° and 180 °.

  In the phase region T02, the power supply phase θ is grasped as a range of values θ1 to θ2. When the power supply phase θ takes either the value θ1 or the value θ2, the power supply phase θ is at the boundary between the phase regions T01 and T02, so that it may be understood that it is in any of the phase regions T01 and T02.

  In FIG. 3, the carrier frequency fc is 6 kHz and 3 kHz in the phase regions T01 and T02, respectively. That is, FIG. 3 illustrates the case where Fc1 = 6 kHz and Fc2 = 3 kHz.

  Returning to FIG. 1, the control unit 4 includes first carrier frequency generation means 9, second carrier frequency generation means 10, switching means 18, output voltage command calculation means 12, and PWM means 13.

  The phase detector 17 detects the power supply phase θ of the AC voltage Vs. Since such a detection technique is known, a detailed description thereof will be omitted. However, for example, a configuration in which a signal synchronized with the AC voltage Vs is obtained using a zero cross detection circuit and the power supply phase θ is calculated can be employed. That is, the phase detection unit 17 is not limited to a unit that directly detects the power supply phase θ, and may have a function capable of calculating, detecting, and estimating the power supply phase θ.

  The first carrier frequency generation means 9 and the second carrier frequency generation means 10 output frequencies Fc1 and Fc2, respectively. Here, as described above, there is a relationship of Fc1> Fc2. Since the switching unit 18 operates as follows, the frequency setting unit sets the value of the carrier frequency fc based on the power supply phase θ in combination with the first carrier frequency generation unit 9 and the second carrier frequency generation unit 10. 19A is configured.

  FIG. 4 is a block diagram illustrating the configuration of the switching unit 18A employed as the switching unit 18. The switching unit 18A includes a selection unit 181, comparators 182a, 182b, 182c, and 182d, AND (logical product) gates 183a, 183b, and 186, an OR (logical sum) gate 184, and a switching controller 185.

  Comparators 182a, 182b, 182c, and 182d, AND gates 183a and 183b, and OR gate 184 determine whether power supply phase θ is in phase region T01 or T02, and input the determination result to AND gate 186. Here, the case where the determination result signal D inputted from the OR gate 184 to the AND gate 186 takes logic “L” and “H”, respectively, corresponding to the power supply phase θ being in the phase regions T01 and T02 is illustrated. Yes. This will be described in more detail below.

  The comparator 182a receives the power supply phase θ and the value θ1, and outputs logic “H” and “L”, respectively, depending on whether θ ≧ θ1. The comparator 182b receives the power supply phase θ and the value θ2, and outputs logic “H” and “L”, respectively, depending on whether θ ≦ θ2. The AND gate 183a takes and outputs the logical product of the logics output from the comparators 182a and 182b. That is, the AND gate 183a outputs logic “H” and “L”, respectively, depending on whether θ1 ≦ θ ≦ θ2.

  Thus, when the power supply phase θ is in the phase region T01 appearing in FIG. 3, the AND gate 183a outputs a logic “L”, and when it is in the phase region T02 appearing in FIG. 3, the AND gate 183a is in the logic region. Outputs “H”.

  The comparator 182c receives the power supply phase θ and the value θ1 + 180 °, and outputs logic “H” and “L”, respectively, depending on whether θ ≧ θ1 + 180 °. The comparator 182d receives the power supply phase θ and the value θ2 + 180 °, and outputs logic “H” and “L” depending on whether θ ≦ θ2 + 180 °, respectively. The AND gate 183b takes and outputs the logical product of the logics output from the comparators 182c and 182d. That is, the AND gate 183b outputs logic “H” and “L” depending on whether θ1 + 180 ° ≦ θ ≦ θ2 + 180 °, respectively.

  Thus, when the power supply phase θ is in the phase region T01 not appearing in FIG. 3, the AND gate 183b outputs a logic “L”, and when it is in the phase region T02 not appearing in FIG. 3, the AND gate 183b is the logic “L”. Outputs “H”.

  The OR gate 184 calculates the logical sum of the outputs of the AND gates 183a and 183b and outputs a discrimination result signal D. As a result, as described above, the determination result signal D takes logic “L” and “H” in response to the power supply phase θ being in the phase regions T01 and T02.

  The selection unit 181 selects either the first carrier frequency Fc1 (here, input to the terminal A) or the second carrier frequency Fc2 (here, input to the terminal B) and selects it as the switching carrier frequency fc. (In this case, output from the terminal C).

  The switching controller 185 outputs a selection permission signal E that determines whether or not the selection unit 181 can perform the selection operation. The AND gate 186 takes a logical product of the determination result signal D and the selection permission signal E and outputs the logical product to the selection unit 181.

  When the selection permission signal E takes the logic “H”, the selection unit 181 determines that the determination result signal D is “H” (the power supply phase θ is in the phase region T02 and the fluctuation of the DC voltage Vdc is gentle). ) The terminal B is connected to the terminal C, and the frequency Fc2 is adopted as the frequency fc. If the determination result signal D is “L” (the power supply phase θ is in the phase region T01 and the fluctuation of the DC voltage Vdc is abrupt), the terminal A is connected to the terminal C.

  The operation of the switching controller 185 and the case where the selection permission signal E becomes “L” will be described later. Until then, the case where the selection permission signal E assumes “H” will be described.

  FIG. 5 is a timing chart showing the operation of the power supply phase θ and the comparators 182a, 182b, 182c and 182d, the AND gates 183a and 183b, and the OR gate 184. In FIG. 5, the operation of the selection unit 181 is indicated by using symbols (A) and (B) attached to the counterpart terminal connected to the terminal C.

  The output voltage command calculation means 12 generates a voltage command V * which is a command value for the AC voltage (“other”) output from the power converter 2. As a method for obtaining the voltage command V *, general V / f control, vector control which is a control method of an AC rotating machine, or the like can be employed. Since this technique is publicly known, detailed description thereof is omitted.

  The PWM means 13 functions as a modulation signal generation unit that applies the switching control signal G to the power converter 2 based on pulse width modulation. Specifically, the PWM means 13 generates the switching carrier C1 having the frequency Fc1 (see FIG. 19) and the switching carrier C2 having the frequency Fc2 in synchronization (carrier C2-1 in FIG. 19). , C2-2, and C2-3: these distinctions will be described later).

  Then, corresponding to whether the frequency fc output from the switching means 18 is the frequency Fc1 or Fc2, the switching carriers C1 and C2 are respectively employed as the switching carriers C to generate the switching control signal G.

  In the embodiment described later, a switching carrier having the frequency Fc3 may be employed in the PWM means 13.

  A switching element (not shown) included in the power converter 2 performs switching based on the switching control signal G and outputs a three-phase AC voltage to the AC rotating machine 1. Since the structure of the power converter 2 is well known, a detailed description thereof is omitted.

  The switching control signal G is generated by comparing the switching carrier with the voltage command V * obtained from the output voltage command calculation means 12. Since the generation itself is a known technique, a detailed description thereof is omitted.

  As described above, the switching of the power converter 2 is performed in the phase region T01. The switching loss depending on the carrier frequency can be reduced while ensuring controllability of control with respect to the pulsation of the DC voltage Vdc, based on switching carriers having different carrier frequencies depending on T02.

  More specifically, the switching loss of the power converter 2 depending on the carrier frequency is suppressed by switching the frequency of the switching carrier that is also used for sampling the DC voltage Vdc, while ensuring the followability of the control. can do.

Second embodiment.
When obtaining the voltage command V *, torque control for obtaining a desired torque in the AC rotary machine 1 can also be employed.

  However, in this case, the generated torque includes pulsation due to pulsation of the DC voltage Vdc. Since the output torque is small when the DC voltage Vdc is small, the followability of the control with respect to the change of the DC voltage Vdc does not need to be emphasized in the torque control of the power converter.

  On the other hand, when the DC voltage Vdc is large, the output torque is large, but since the change in the DC voltage Vdc is small (as understood from the first embodiment), the change in torque is also small, and the control followability is also good. Need not be valued.

  Rather, in the phase region where the DC voltage Vdc transitions from the phase region where the DC voltage Vdc is small to the phase region where the DC voltage Vdc is large or vice versa, the torque fluctuation is large, and followability is important for torque control of the power converter. The Further, since the switching loss increases when the DC voltage Vdc is large, it is desirable that the control period of torque control is long.

  Also in the second embodiment, the power converter can have the same configuration as that of the first embodiment (see FIG. 1). However, the switching means 18 is not the switching means 18A of the first embodiment, but a switching means 18B as will be described later.

  FIG. 6 is a graph showing a phase region in the second embodiment, and corresponds to FIG. 2 in the first embodiment. FIG. 6 shows the waveform of the AC voltage Vs and the waveform of the DC voltage Vdc obtained by full-wave rectification of the waveform.

  FIG. 7 is a graph for explaining the operation of the second embodiment, and corresponds to FIG. 3 of the first embodiment. FIG. 7 shows the waveform of the DC voltage Vdc, the waveform of the carrier frequency fc, and the waveform of the assumed torque T when the power supply phase θ takes 0 to 180 degrees.

  In the second embodiment, the phase region is divided as follows.

Phase region T04 (phase region of θ3 ≦ θ ≦ θ4) including the phase (θ = 90 degrees or 270 degrees) in which the absolute value of the change rate of the AC voltage Vs is the smallest:
A pair of adjacent phase regions T05 across the phase region T04 (both the phase region of θ1 ≦ θ ≦ θ3 and the phase region of θ4 ≦ θ ≦ θ2):
A phase region T06 (including a phase region of 0 ° ≦ θ ≦ θ1 and a phase region of θ2 ≦ θ ≦ 180 °) including a phase having the largest absolute value of the rate of change of the AC voltage Vs and different from both of the phase regions T04 and T05. Both):
The values θ1 and θ2 do not necessarily have to be the same as the values θ1 and θ2 in the first embodiment, but here, the values θ1 and θ2 are exemplified as the case in which both the values θ1 and θ2 take the same values as in the first embodiment. (Θ1≈15 °, θ2≈165 °). Further, the case where about 75 degrees and about 105 degrees are adopted as the values θ3 and θ4 is illustrated.

  When the power supply phase θ is at the boundary between a pair of adjacent phase regions, the power supply phase θ may be grasped as being in either of the pair of phase regions.

  When the phase region is divided as described above, it can be said that the torque T waveform in the phase region T05 varies more significantly than the torque T waveform in the phase region T04. Furthermore, it can also be said that the torque T waveform in the phase region T05 varies more significantly than the torque T waveform in the phase region T06.

  Therefore, in the phase region T04 or further in the phase region T06, even if the control period of torque control is made longer than in the phase region T05, it can be said that the followability of control of the power converter 2 with respect to the torque T is less likely to be impaired. Normally, control of torque control is performed in units of one carrier cycle, so increasing the control cycle of torque control corresponds to reducing the carrier frequency.

  Therefore, by introducing the switching carrier frequency Fc4 in the phase region T04 and the switching carrier frequency Fc5 in the phase region T05, the relationship of Fc4 <Fc5 is established, so that the power converter with respect to the assumed torque T variation is established. The switching loss depending on the carrier frequency of the power conversion device can be reduced while ensuring the followability of the control 2. This simplifies the cooling device for the switching element and contributes to downsizing the power conversion device.

  Further, by introducing the frequency Fc6 of the switching carrier in the phase region T06 and establishing the relationship of Fc6 <Fc5 between this and the frequency Fc5, the above effect can be enhanced.

  In FIG. 7, the carrier frequency fc is 3 kHz, 6 kHz, and 3 kHz in the phase regions T04, T05, and T06, respectively. That is, FIG. 3 illustrates the case of Fc4 = Fc6 = 3 kHz and Fc5 = 6 kHz.

  FIG. 8 is a block diagram illustrating the configuration of a switching unit 18B employed in the second embodiment as the switching unit 18 in FIG. Similar to the switching means 18A, the switching means 18B, in combination with the first carrier frequency generation means 9 and the second carrier frequency generation means 10, is grasped as a frequency setting unit that sets the value of the carrier frequency fc based on the power supply phase θ. Is done. The switching means 18B is designed on the premise that Fc3 = Fc1.

  The switching unit 18B includes a selection unit 181, comparators 182a, 182b, 182c, 182d, 182e, 182f, 182g, and 182h, AND gates 183a, 183b, 183e, 183f, and 186, NAND (logical product inversion) gates 183c and 183d. , An OR gate 184, and a switching controller 185.

  Inputs to the comparators 182a, 182b, 182c, 182d and the AND gates 183a, 183b are the same as those in the first embodiment. Therefore, the AND gate 183a outputs logic “H” and “L” depending on whether θ1 ≦ θ ≦ θ2, respectively, and the AND gate 183b depends on whether θ1 + 180 ° ≦ θ ≦ θ2 + 180 °, respectively. Logic “H” and “L” are output. That is, if either of the AND gates 183a and 183b is “H”, the power supply phase θ is in one of the phase regions T05 and T06 and not in the phase region T04.

  The comparator 182e receives the power supply phase θ and the value θ3, and outputs logic “H” and “L”, respectively, depending on whether θ ≧ θ3. The comparator 182f receives the power supply phase θ and the value θ4, and outputs logic “H” and “L”, respectively, depending on whether θ ≦ θ4. The NAND gate 183c takes and inverts the logical product of the logics output from the comparators 182e and 182f. That is, the NAND gate 183c outputs logic “L” and “H” depending on whether θ3 ≦ θ ≦ θ4.

  The AND gate 183e takes and outputs the logical product of the output of the AND gate 183a and the output of the NAND gate 183c. Accordingly, when the power supply phase θ is in the phase region T05 appearing in FIG. 7, the AND gate 183e outputs a logic “H”, and when it is in the phase regions T04 and T06 appearing in FIG. 7, the AND gate 183e. Outputs a logic "L".

  The comparator 182g receives the power supply phase θ and the value θ3 + 180 °, and outputs logic “H” and “L”, respectively, depending on whether θ ≧ θ3 + 180 °. The comparator 182h receives the power supply phase θ and the value θ4 + 180 °, and outputs logic “H” and “L”, respectively, depending on whether θ ≦ θ4 + 180 °. The NAND gate 183d takes the logical inversion of the logic output from each of the comparators 182g and 182g and outputs the result. The NAND gate 183d outputs logic “L” and “H” depending on whether θ3 + 180 ° ≦ θ ≦ θ4 + 180 °, respectively.

  The AND gate 183f takes and outputs the logical product of the output of the AND gate 183b and the output of the NAND gate 183d. Thus, when the power supply phase θ is in the phase region T05 that does not appear in FIG. 7, the AND gate 183f outputs a logic “H”, and when it is in the phase regions T04 and T06 that do not appear in FIG. 7, the AND gate 183f. Outputs a logic "L".

  The OR gate 184 calculates the logical sum of the outputs of the AND gates 183e and 183f and outputs the result to the AND gate 186 as a judgment result signal J. As a result of the above-described operation, the determination result signal J takes a logic “L” when the power supply phase θ is in the phase regions T04 and T06, and takes a logic “H” when it is in the phase region T05.

  The carrier frequency Fc4 (equivalent to the carrier frequency Fc6 here) is input to the terminal A of the selection unit 181 and the carrier frequency Fc5 is input to the terminal B. When the selection permission signal E takes the logic “H”, the selection unit 181 determines that the determination result signal J is “H” (the power source phase θ is in the phase regions T04 and T06, and the torque T varies slowly). Terminal B is connected to terminal C, and frequency Fc4 is adopted as frequency fc. If the determination result signal J is “L” (since the power supply phase θ is in the phase region T05 and the torque T fluctuates rapidly), the terminal A is connected to the terminal C.

  FIG. 9 is a timing chart showing the operation of the power supply phase θ and the comparators 182a, 182b, 182e, 182f, the AND gate 183a, the NAND gate 183c, and the AND gate 183e. In FIG. 9, the operation of the selection unit 181 is indicated by using symbols (A) and (B) attached to the counterpart terminal connected to the terminal C.

  FIG. 10 is a graph for explaining the effect of the second embodiment, and is output from the power converter 2 to the AC rotating machine 1 by the DC voltage Vdc, the switching carrier C, the assumed torque T and the output torque To. The waveforms of current id and iq are shown. However, the currents id and iq are so-called d-axis current and q-axis current, respectively, and are an in-phase component and a quadrature component of the current flowing in the AC rotating machine 1 with respect to the field of the AC rotating machine 1.

  The carrier employs a carrier frequency of 3 kHz in the phase regions T04 and T06, and a carrier frequency of 6 kHz in the phase region T05.

  It can be seen that the output torque To is a torque actually generated in the AC rotating machine 1, and that the rise is slow and slow with respect to the assumed torque T. However, the region where the change in the output torque To is large is in the phase region T05 where the change in the assumed torque T is large. Accordingly, FIG. 10 shows a desirable result that the frequency of the switching carrier C is increased in the phase region T05.

  Note that the frequency of the switching carrier C changes at the boundary between the phase region T05, the adjacent phase regions T04, T06, and the phase region T05. This can lead to discontinuities in the switching carrier. FIG. 10 illustrates the case where such discontinuity does not occur, but the continuity of the waveform of the switching carrier at the boundary between adjacent phase regions will be described in detail in <Modification 2> below. .

Third embodiment.
FIG. 11 is a circuit diagram illustrating the configuration of a power conversion device according to the third embodiment. The power converter has a configuration in which the frequency setting unit 19A is replaced with a frequency setting unit 19B with respect to the control unit 4 employed in the first embodiment and the second embodiment.

  The frequency setting unit 19B includes switching table means 191. The switching table means 191 stores the carrier frequency in association with each phase region, and outputs the carrier frequency fc according to the input power supply phase θ.

  By adopting such a switching table means 191, it is obvious that the setting of the carrier frequency fc corresponding to each phase region as shown in the first embodiment and the second embodiment is realized. It is. In addition, it is easy to realize more complicated correspondence. For example, it is possible to easily adopt three types of carrier frequencies.

  FIG. 12 is a graph showing a phase region in the third embodiment, and corresponds to FIG. 2 in the first embodiment. FIG. 12 shows the waveform of the AC voltage Vs and the waveform of the DC voltage Vdc obtained by full-wave rectification of the waveform.

  FIG. 13 is a graph for explaining the operation of the third embodiment, and corresponds to FIG. 3 of the first embodiment. FIG. 13 shows the waveform of the DC voltage Vdc, the waveform of the carrier frequency fc, and the waveform of the assumed torque T when the power supply phase θ takes 0 to 180 degrees.

  In the third embodiment, as compared with the first embodiment, the phase region T02 is divided into phase regions T02 'and T03 with values θ5 and θ6 as boundaries. Of course, the phase region obtained by combining the phase regions T02 'and T03 does not necessarily match the phase region T02 of the first embodiment. In other words, the values θ1 and θ2 may be different between the first embodiment and the third embodiment.

  Therefore, similar to the first embodiment, it is possible to grasp the phase region by dividing it as follows.

Phase region T01 (phase region of 0 ° ≦ θ ≦ θ1 and phase region of θ2 ≦ θ ≦ 180 °) including the phase (θ = 180 degrees or 360 degrees) having the largest absolute value of the rate of change of the AC voltage Vs Both):
Phase region T02 ′ (phase region of θ5 ≦ θ ≦ θ6) including the phase (θ = 90 degrees or θ = 270 degrees) having the smallest absolute value of the change rate of the AC voltage Vs:
A phase region T03 different from both of the phase regions T01 and T02 ′ (both a phase region of θ1 ≦ θ ≦ θ5 and a phase region of θ6 ≦ θ ≦ θ2).

  In the third embodiment, frequencies Fc2 'and Fc3 to be employed as carrier frequencies fc are introduced in the phase regions T02' and T03, respectively, and the relationship of Fc2 '<Fc3 <Fc1 is set. For example, FIG. 13 shows a case where Fc2 ′ = 3 kHz, Fc3 = 4 kHz, and Fc1 = 6 kHz.

  In the phase regions T02 ', T03, and T01, since the pulsation of the DC voltage Vdc becomes remarkable in this order, the effect of the first embodiment can be enhanced by setting the above relationship.

  Alternatively, the phase region in the third embodiment can be divided and grasped as follows, similar to the second embodiment.

Phase region T02 ′ (phase region of θ5 ≦ θ ≦ θ6) including the phase (θ = 90 degrees or 270 degrees) in which the absolute value of the change rate of the AC voltage Vs is the smallest:
A pair of phase regions T03 adjacent to each other with the phase region T02 ′ in between (both the phase region of θ1 ≦ θ ≦ θ5 and the phase region of θ6 ≦ θ ≦ θ2):
A phase region T01 including a phase having the largest absolute value of the rate of change of the AC voltage Vs and different from both of the phase regions T02 ′ and T03 (a phase region of 0 ° ≦ θ ≦ θ1 and a phase region of θ2 ≦ θ ≦ 180 °) Both).

  Therefore, when viewed from the arrangement of the phase regions, the phase regions T02 ', T03, and T01 of the third embodiment correspond to T04, T05, and T06 of the second embodiment, respectively. However, the magnitude relationship (Fc2 '<Fc3 <Fc1) employed as the carrier frequency fc is different from that of the second embodiment (T04 <T05, T05> T06).

  If θ1 = θ5 and θ2 = θ6, the phase region T03 substantially disappears, and the phase region T02 'can be handled in the same manner as the phase region T02 of the first embodiment. That is, the first embodiment can be grasped as follows.

  That is, the carrier frequency fc takes the frequency Fc2 in the phase region T02 including the phase having the smallest absolute value of the change rate of the AC voltage Vs, and the carrier frequency fc in the pair of adjacent phase regions T01 across the phase region T02 is the frequency Fc1. The frequency Fc1 is larger than the frequency Fc2.

Fourth embodiment.
Also in the fourth embodiment, the power converter can use the same configuration as that of the third embodiment (see FIG. 11). Further, the same phase region (see FIG. 6) as that of the second embodiment is employed.

  FIG. 14 is a graph for explaining the operation of the fourth embodiment, and corresponds to FIG. 7 of the second embodiment.

  In the fourth embodiment, unlike the second embodiment, the frequency Fc4 employed as the carrier frequency fc in the phase region T04 is set to be smaller than the frequency Fc5 as well as the frequency Fc6 (Fc4 <Fc6 <Fc5 ). For example, FIG. 14 shows a case where Fc6 = 3 kHz, F5 = 6 kHz, and Fc4 = 2 kHz.

  Thus, the carrier frequency in the phase region T04 in which the waveform of the assumed torque T is flat and it is not necessary to shorten the control cycle of torque control, and the value of the DC voltage Vdc is large and the switching loss tends to increase. Decreasing Fc4 enhances the effect of the second embodiment.

Fifth embodiment.
The pulsation of the rectified voltage occurs not only when the single-phase AC voltage is rectified but also when the three-phase AC voltage is rectified. This becomes more noticeable due to the small capacitance of the capacitor. Here, an embodiment in the case of half-wave rectification of a three-phase AC voltage will be described.

  FIG. 15 is a circuit diagram illustrating the configuration of a power conversion device according to the fifth embodiment. The power converter has a configuration in which the single-phase power source 61 and the rectifier circuit 51 are replaced with a three-phase power source 63A and a rectifier circuit 53A, respectively, with respect to the configuration shown in the third embodiment (see FIG. 11). ing.

  The three-phase power supply 63A outputs a three-phase AC voltage Vr, Vs, Vt and a neutral point voltage Vn to realize a so-called three-phase four-wire distribution. The rectifier circuit 53A is a diode bridge that half-wave rectifies the phase voltage, and half-wave rectifies the AC voltages Vr, Vs, and Vt based on the neutral point voltage Vn.

  Here, the description is simplified by using the frequency setting unit 19B, but it is also possible to adopt the same configuration as the frequency setting unit 19A by appropriately designing a circuit.

  FIG. 16 is a graph showing a phase region in the fifth embodiment, and corresponds to FIG. 2 in the first embodiment. FIG. 16 shows the waveforms of AC voltages Vr, Vs, and Vt, and the waveform of DC voltage Vdc obtained by half-wave rectification of the waveforms.

  As is well known, the AC voltages Vr, Vs, and Vt are out of phase with each other by 120 °. Here, the voltage Vs is slower than the voltage Vr, and the voltage Vt is slower than the voltage Vs. Is illustrated.

  The waveform of the DC voltage Vdc takes the waveform of the maximum value of the AC voltages Vr, Vs, and Vt, and pulsates at a cycle of 120 ° in terms of the phase of the power supply voltage Vs. Specifically, the DC voltage Vdc is minimized when any two of the three-phase AC voltages have the same positive voltage value, and any two of the three-phase AC voltages have the same negative voltage value. Maximum at the moment.

  Therefore, for example, as in the first embodiment, the phase regions T1 and T2 are selected in order to reduce the switching loss depending on the carrier frequency while ensuring the followability of the control with respect to the pulsation of the DC voltage Vdc. The carrier frequency employed in the region can be set.

  In this case, the phase region can be selected as follows by taking the intersection of the waveforms of the AC voltages Vr, Vs, and Vt from the above-described viewpoint regarding the waveform of the DC voltage Vdc.

Phase region T1: including a first phase (illustrated as phases θrs, θst, θtr in FIG. 16) in which two AC voltages take the same positive voltage value
A phase region T2 including a second phase in which two AC voltages have the same negative voltage value (which is 60 ° slower than the first phase).

  When the phase region is divided as described above, it can be said that the pulsation of the DC voltage Vdc in the phase region T1 is more significant than the pulsation of the DC voltage Vdc in the phase region T2.

  Therefore, in phase region T2, even if the sampling period of DC voltage Vdc is made longer than in phase region T1, it can be said that the followability of control of power converter 2 with respect to pulsation of DC voltage Vdc is less likely to be impaired. Moreover, since the voltage supplied to the power converter 2 is large when the value of the DC voltage Vdc is large, reducing the frequency of controlling the power converter 2 in the phase region T2 also leads to a reduction in switching loss. To do.

  Further, a phase region T3 different from any of the phase regions T1 and T2 may be selected. In the phase regions T1, T2, and T3, the switching carriers have frequencies Fc1, Fc2,. By adopting the relationship of Fc2 <Fc3 <Fc1 as adopting Fc3, as in the third embodiment, switching loss depending on the carrier frequency while ensuring controllability to control the pulsation of the DC voltage Vdc is ensured. The effect of lowering can be enhanced.

Sixth embodiment.
Here, an embodiment in the case of full-wave rectification of a three-phase AC voltage will be described. FIG. 17 is a circuit diagram illustrating the configuration of the power converter according to the sixth embodiment. The power converter has a configuration in which the three-phase power source 63A and the rectifier circuit 53A are replaced with the three-phase power source 63B and the rectifier circuit 53B, respectively, with respect to the configuration shown in the fifth embodiment (see FIG. 15). ing.

  The three-phase power supply 63B outputs three-phase AC voltages Vr, Vs, and Vt, and realizes so-called three-phase three-wire power distribution. The rectifier circuit 53B is a diode bridge that full-wave rectifies the line voltage. Here, Vtr = Vt−Vr, Vrs = Vr−Vs, and Vst = Vs−Vt are adopted as the line voltages.

  In the sixth embodiment, the description is simplified by using the frequency setting unit 19B in the same manner as in the fifth embodiment, but the circuit configuration is appropriately designed to adopt the same configuration as the frequency setting unit 19A. You can also.

  FIG. 18 is a graph showing a phase region in the sixth embodiment, and corresponds to FIG. 2 in the first embodiment. FIG. 18 shows waveforms of AC voltages Vr, Vs, Vt, waveforms of line voltages Vtr, Vrs, Vst, and a waveform of DC voltage Vdc obtained by full-wave rectification of these line voltages.

  As is well known, the phases of the line voltages Vtr, Vrs, Vst are shifted from each other by 120 °. The waveform of the DC voltage Vdc takes the waveform of the maximum value among the absolute values of the line voltages Vtr, Vrs, Vst, and pulsates at a cycle of 60 ° in terms of the phase of the power supply voltage Vs. Specifically, the DC voltage Vdc is minimized when any two of the three-phase AC voltages Vr, Vs, and Vt take the same voltage value (regardless of positive or negative), and the line voltages Vtr, Vrs, and Vst are It becomes the maximum when any two of them take the same voltage value (whether positive or negative).

  Therefore, for example, as in the first embodiment, the phase regions T1 and T2 are selected in order to reduce the switching loss depending on the carrier frequency while ensuring the followability of the control with respect to the pulsation of the DC voltage Vdc. The carrier frequency employed in the region can be set.

  In this case, the phase region can be selected as follows by taking the intersection of the waveforms of the AC voltages Vr, Vs, and Vt from the above-described viewpoint regarding the waveform of the DC voltage Vdc.

A phase including a first phase in which two AC voltages take the same voltage value (in FIG. 16, phases θrs, θst, θtr taking the same positive voltage values, and phases θsr, θts, θrt taking the same negative voltage values). Region T1:
A phase region T2 including a second phase in which two line voltages have the same voltage value (which is 30 ° later than the first phase).

  When the phase region is divided as described above, it can be said that the pulsation of the DC voltage Vdc in the phase region T1 is more significant than the pulsation of the DC voltage Vdc in the phase region T2. Therefore, assuming that the switching carriers employ the frequencies Fc1 and Fc2 in the phase regions T1 and T2, respectively, by adopting the relationship of Fc2 <Fc1, the same effect as in the first embodiment can be obtained.

  Further, a phase region T3 different from any of the phase regions T1 and T2 may be selected. By adopting the relationship of Fc2 <Fc3 <Fc1, assuming that the switching carrier adopts the frequency Fc3 in the phase region T3, the same effect as that of the third embodiment can be obtained.

<Overall description of the embodiment>
When reducing the pulsation of the DC voltage Vdc itself (for example, the first embodiment) and when reducing the pulsation of the torque T that is assumed due to the pulsation of the DC voltage Vdc (for example, the second embodiment). In some cases, the magnitude relationship of the carrier frequency in each phase region may be different (particularly between the phase regions T01 and T06 in which the DC voltage Vdc takes a value close to zero and the adjacent phase regions T02 and T05 sandwiching each of them) Between carrier frequencies).

  However, the frequency fc of the switching carrier is made variable according to the phase region divided by the power supply phase θ, and the frequency fc is appropriately set according to the above case, so that the power converter can be changed according to each case. Switching loss depending on the carrier frequency can be suppressed while ensuring control followability.

  This utilizes the fact that a DC voltage rectified from an AC voltage by a diode bridge pulsates in synchronization with the AC voltage. By changing the frequency of the switching carrier according to the phase of the AC voltage, the power converter is switched with a signal corresponding to the frequency according to the magnitude of the DC voltage and the torque that varies based on the DC voltage. Thus, the switching loss depending on the carrier frequency is suppressed while ensuring the followability of the control of the power converter with respect to the pulsation of DC voltage and the fluctuation of torque, which contributes to downsizing of the power converter.

<Modification 1>
In any of the above embodiments, the phase that determines the phase region, in other words, the phase that becomes the boundary of the phase region, can be grasped from different aspects. For example, in the fifth embodiment, referring to FIG. 16, the first phases θrs, θst, θtr included in the phase region T1 are from the phase having the largest absolute value of the rate of change of the voltages Vs, Vt, Vr. It can be understood that the phase is 60 ° late.

  Or it can grasp | ascertain that the 2nd phase which phase region T2 contains in a 6th embodiment is a phase where any voltage zero-crosses.

  As described above, in any of the embodiments, the phase that determines the phase region can be specified from various viewpoints as long as it is derived from the calculation, detection, and estimation of the power supply phase θ.

<Modification 2>
In any of the above embodiments, switching carriers having different frequencies are temporally adjacent at the boundary between adjacent phase regions. It is desirable that the maximum values (or the vicinity thereof) of the waveforms of the respective switching carriers are adjacent to each other, or the minimum values (or the vicinity thereof) are adjacent to each other in time.

  By switching the switching carrier in this way, one cycle between the maximum values (or the minimum values) of the respective switching carriers is not impaired. Usually, the command value to be compared with the switching carrier is maintained in one cycle between the maximum values (or the minimum values) of the switching carrier, so that the AC voltage output by switching depends on the command value. It will be.

  Of course, since the command value is set in accordance with the amplitude of the switching carrier, it is desirable that the plurality of switching carriers to be switched have the same maximum value and the same minimum value.

  With regard to the switching carrier C shown in FIG. 10, the case where the maximum value is taken at the boundary between the phase region T05 and the phase regions T04 and T06 is illustrated.

  For example, in the second embodiment, if the switching carrier C that uses the frequency Fc5 is the switching carrier C1, and the switching carrier C that uses the frequency Fc4 (= Fc6) is the switching carrier C2, Fc5 = N · Fc4 ( However, if N is an integer equal to or greater than 2, the maximum values or the minimum values of the switching carriers C1 and C2 can be matched.

  Similarly, if Fc1 = M · Fc2 (where M is an integer equal to or greater than 2), the maximum values of the switching carrier C1 (frequency Fc1) and switching carrier C2 (frequency Fc2) Alternatively, the minimum values can be matched.

  However, it is not always easy to precisely match the switching timing of the switching carrier with the boundary between the phase regions. This is because the phase value serving as the boundary of the phase region does not necessarily match the minimum value or the maximum value of the switching carrier C2. From this point of view, it is not desirable to control the operation of the selection unit 181 only by the discrimination result signal D “H” / “L”.

  Therefore, the switching controller 185 outputs the selection permission signal E based on the switching carrier having the lowest frequency, here the switching carrier C2, and selects the selection unit 181 based on the determination result signal D only when it is “H”. To switch the selection. Since the switching carrier C2 is used in the PWM means 13, it can be prepared by the PWM means 13 and obtained therefrom.

  FIG. 19 is a graph illustrating selection of a switching carrier. However, here, three types of carriers C2-1, C2-2, and C2-3 are illustrated as the switching carrier C2.

  The carriers C2-1 and C2-2 have a frequency Fc2 that is an even number of the frequency Fc1 of the switching carrier C1, and here, a case where Fc2 = Fc1 / 2 is illustrated. The carrier C2-1 is synchronized so that the timing at which the maximum value is taken is selected from the timing at which the switching carrier C1 takes the maximum value. The carrier C2-2 is synchronized such that the timing at which the minimum value is taken is selected from the timing at which the switching carrier C1 takes the minimum value.

  The carrier C2-3 has a frequency Fc2 that is an odd number of the frequency Fc1 of the switching carrier C1 (the odd number is 3 or more). Here, the case of Fc2 = Fc1 / 3 is illustrated. When the carrier C2-3 takes the maximum value, the switching carrier C1 also takes the maximum value, and when the carrier C2-3 takes the minimum value, the switching carrier C1 also takes the minimum value.

  As described above, it is desirable to detect the maximum value / minimum value of the switching carrier C2 having the lowest frequency and to cause the selection unit 111 to switch the selection at the timing. Such control can be performed by the switching controller 185.

  Specifically, when the carrier C2-1 is adopted as the switching carrier C2, the switching controller 185 sets the selection permission signal E to “H” at the timing when the carrier C2-1 takes the maximum value, and selects the carrier C2-1. The unit 181 switches the selection. Thereby, the switching carriers C1 and C2 both take the maximum value at the switching timing.

  When the carrier C2-2 is employed as the switching carrier C2, the selection permission signal E is set to “H” at the timing when the carrier C2-2 takes the minimum value, and the selection unit 181 switches the selection. As a result, the switching carriers C1 and C2 both take the minimum value at the switching timing.

  When the carrier C2-3 is employed as the switching carrier C2, the selection unit 181 switches the selection at the timing when the carrier C2-3 takes the maximum value, so that the switching carrier C1 at the switching timing. , C2 take the maximum value. Further, by causing the selection unit 181 to perform selection switching at the timing when the carrier C2-3 takes the minimum value, the switching carriers C1 and C2 both take the minimum value at the switching timing.

  From the viewpoint of such switching, the frequency Fc2 is desirably an odd number of the frequency Fc1. This is because the present invention can be applied both when the frequency is switched at the timing when the carrier takes the maximum value and when the frequency is switched at the timing when the carrier takes the minimum value.

  Similarly, it is desirable to set the frequencies Fc4, Fc5, Fc6.

  Similarly, it is desirable that the frequency fc is output from the switching table means 191 at a timing according to the value of the switching carrier C2.

  As shown in the third and fourth embodiments, when there are three or more frequencies adopted as the carrier frequency fc, the frequencies adopted in a pair of adjacent phase regions are It is desirable that they have an integer multiple relationship with each other. That is, according to the third embodiment, a relationship of Fc1 = m × Fc3, Fc3 = n × Fc2 ′ (m and n are integers of 2 or more) is desirable (in the example of FIG. 13). Fc1 = (3/2) × Fc3, Fc3 = (4/3) × Fc2 ′, and there was no integer m or n). Further, according to the fourth embodiment, Fc5 = 2 × Fc6 = 3 × Fc4, and the three frequencies Fc4, Fc5, and Fc6 satisfy the above-described desirable relationship.

<Modification 3>
In the above description, the control unit 4 can be configured to include a microcomputer and a storage device. The microcomputer executes each processing step (in other words, a procedure) described in the program. The storage device is composed of one or more of various storage devices such as a ROM (Read Only Memory), a RAM (Random Access Memory), a rewritable nonvolatile memory (EPROM (Erasable Programmable ROM), etc.), and a hard disk device, for example. Is possible.

  The storage device stores various information, data, and the like, stores a program executed by the microcomputer, and provides a work area for executing the program. It can be understood that the microcomputer functions as various means corresponding to each processing step described in the program, or can realize that various functions corresponding to each processing step are realized.

  The controller 4 is not limited to this, and various procedures executed by the controller 4 or various means or various functions implemented may be realized by hardware.

2 Power converter 3 Capacitor 4 Control unit 13 PWM means (modulation signal generation unit)
51, 53A, 53B Rectifier circuit 19A, 19B Frequency setting unit

Claims (13)

Rectifying circuits (51) (53A) (53B) for rectifying an alternating voltage (Vs) (Vr, Vs, Vt) with a diode bridge and outputting a direct voltage (Vdc);
A capacitor (3) receiving the DC voltage at both ends;
A power converter (2) that converts the DC voltage into another AC voltage by switching;
Control unit (4) for controlling the power converter
And
The controller is
A modulation signal that generates a signal (G) for controlling switching of the power converter based on the switching carriers (C1, C2) and the command value (V *) of the other AC voltage and gives the signal to the power converter Generation unit (13)
Have
The power conversion device according to claim 1, wherein the frequency (Fc) of the switching carrier is variable in accordance with a phase region divided by the phase (θ) of the AC voltage. Frequency setting unit (19A) (19B) for setting the frequency value based on the phase (θ) of the AC voltage
Further comprising
The power conversion device according to claim 1, wherein the switching carriers (C1, C2) employed in the modulation signal generation unit have the frequency set by the frequency setting unit. The alternating voltage is a single-phase alternating voltage (Vs),
The rectifier circuit (51) performs full-wave rectification,
In the first phase region (T01) including the phase (180 degrees, 360 degrees) in which the absolute value of the change rate of the AC voltage is the largest, the frequency takes the first value (Fc1),
The frequency takes a second value (Fc2) in the second phase region (T02) including the phase (90 degrees, 270 degrees) in which the absolute value of the change rate of the AC voltage is the smallest. The power converter described. The AC voltage is a three-phase AC voltage (Vr, Vs, Vt),
The rectifier circuit (53A) performs half-wave rectification,
In the first phase region (T1) including the first phase (θrs, θst, θtr) in which two phases of the AC voltage have the same positive value, the frequency takes the first value (Fc1),
In the second phase region (T2) different from the first phase region including the second phase (θrs + 60 °, θst + 60 °, θtr + 60 °) which is 60 degrees later than the first phase, the frequency is the second The power converter according to claim 1 or 2 which takes value (Fc2). The AC voltage is a three-phase AC voltage (Vr, Vs, Vt),
The rectifier circuit (53B) performs full-wave rectification,
In a first phase region (T1) including a first phase (θrs, θst, θtr, θsr, θts, θrt) in which two phases of the AC voltage have the same value, the frequency has a first value (Fc1). Pick,
A second phase region different from the first phase region including a second phase (θrs + 30 °, θst + 30 °, θtr + 30 °, θsr + 30 °, θts + 30 °, θrt + 30 °) that is 30 degrees later than the first phase. The power converter according to claim 1 or 2, wherein the frequency takes a second value (Fc2) in (T2).   A third phase region (T03; T3) different from both the first phase region and the second phase region exists, and the frequency takes a third value (Fc3) in the third phase region; The power converter device as described in any one of Claim 3 thru | or 5.   The power converter according to claim 3, wherein the first value is larger than the second value.   The power converter according to claim 6, wherein the first value is larger than the second value, and the third value is smaller than the first and larger than the second value. The alternating voltage is a single-phase alternating voltage (Vs),
The rectifier circuit (51) performs full-wave rectification,
In the first phase region (T02; T02 ′; T04) including the phase (90 degrees, 270 degrees) in which the absolute value of the change rate of the AC voltage is the smallest, the frequency is the first value (Fc2; Fc2 ′; Fc4). Take
3. The frequency takes a second value (Fc1; Fc3; Fc5) in a pair of second phase regions (T01; T03; T05) adjacent to each other with the first phase region interposed therebetween. Power converter.   There is a third phase region (T06; T6) different from both the first phase region and the second phase region, and the frequency takes a third value (Fc6) in the third phase region; The power conversion device according to claim 9.   The power conversion device according to claim 9, wherein the second value is larger than the first value.   The power conversion device according to claim 10, wherein the second value is larger than the first value, and the third value is smaller than the second value.   The power conversion device according to claim 12, wherein the first value (Fc4) is smaller than the third value (Fc6).

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