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JP6299388B2 - Semiconductor device and power conversion device using the same - Google Patents

Semiconductor device and power conversion device using the same Download PDF

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Publication number
JP6299388B2
JP6299388B2 JP2014091815A JP2014091815A JP6299388B2 JP 6299388 B2 JP6299388 B2 JP 6299388B2 JP 2014091815 A JP2014091815 A JP 2014091815A JP 2014091815 A JP2014091815 A JP 2014091815A JP 6299388 B2 JP6299388 B2 JP 6299388B2
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potential side
side terminal
semiconductor device
low potential
high potential
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JP2015211550A (en
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啓一郎 沼倉
啓一郎 沼倉
健太 江森
健太 江森
林　哲也
林　　哲也
早見　泰明
泰明 早見
雄二 斎藤
雄二 斎藤
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Nissan Motor Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

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  • Inverter Devices (AREA)

Description

本発明は、半導体装置及びこれを用いた電力変換装置に関する。   The present invention relates to a semiconductor device and a power conversion device using the same.

従来の３相インバータとして、絶縁ゲート型バイポーラトランジスタ（ＩＧＢＴ）やダイオード等の複数の半導体素子を、上下アーム３相分１パッケージ化した６ｉｎ１タイプの半導体装置により構成するもの、上下アーム分を１パッケージ化した２ｉｎ１タイプの半導体装置を３つ並べて構成するもの、上下アームをそれぞれ個別に１パッケージ化した１ｉｎ１タイプの半導体装置を６つ並べて構成するのものが知られている。   As a conventional three-phase inverter, a plurality of semiconductor elements such as insulated gate bipolar transistors (IGBTs) and diodes are constituted by a 6-in-1 type semiconductor device in one package for three upper and lower arms, and one package for the upper and lower arms There are known a configuration in which three 2-in-1 type semiconductor devices are arranged side by side, and a configuration in which six 1-in-1 type semiconductor devices in which upper and lower arms are individually packaged are arranged side by side.

例えば、特許文献１に記載の半導体装置は、上下アームを個別に１パッケージ化した１ｉｎ１タイプであるため、実装自由度の低下や汎用性の低下を抑制することができる。   For example, since the semiconductor device described in Patent Document 1 is a 1 in 1 type in which the upper and lower arms are individually packaged, it is possible to suppress a decrease in mounting flexibility and a decrease in versatility.

特開２００８−２１７９６号公報Japanese Patent Application Laid-Open No. 2008-217176

特許文献１に記載の半導体装置において、低インピーダンス化するために、外部接続用電極（エミッタ電極及びコレクタ電極）の端子部の幅をある程度広くする必要がある。また、外部接続用電極の両側には複数本の信号電極が設けられる。このため、特許文献１に記載の半導体装置の幅は、外部接続用電極及び信号電極の幅により規定されることになる。   In the semiconductor device described in Patent Document 1, the width of the terminal portion of the external connection electrode (emitter electrode and collector electrode) needs to be increased to some extent in order to reduce the impedance. A plurality of signal electrodes are provided on both sides of the external connection electrode. For this reason, the width of the semiconductor device described in Patent Document 1 is defined by the widths of the external connection electrode and the signal electrode.

したがって、特許文献１に記載の１ｉｎ１タイプの半導体装置を６つ用いて構成した三相インバータは、２ｉｎ１タイプの半導体装置を３つ用いた場合や６ｉｎ１タイプの半導体装置を１つ用いた場合よりも装置が大型化する問題があった。   Therefore, the three-phase inverter configured by using six 1 in 1 type semiconductor devices described in Patent Document 1 is more than the case of using three 2 in 1 type semiconductor devices or one 6 in 1 type semiconductor device. There was a problem that the apparatus became large.

上記課題に鑑みて成されたものであり、その目的は、１つの半導体素子が１パッケージ化された１ｉｎ１タイプの半導体装置において小型化を図ることができる半導体装置及びこれを用いた電力変換装置を提供することである。   The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor device that can be miniaturized in a 1 in 1 type semiconductor device in which one semiconductor element is packaged in one package, and a power conversion device using the semiconductor device. Is to provide.

本発明の一態様に係る半導体装置及びこれを用いた電力変換装置は、半導体素子と接続される高電位側電極及び低電位側電極の一部である高電位側端子部及び低電位側端子部が、半導体装置の互いに対向する側面から延出され、半導体装置の平面視において、高電位側端子部の中心と低電位側端子部の中心を結んだ直線が、半導体装置の中心から半導体装置の側面に伸ばした中心線と交わることを特徴とする。   A semiconductor device according to one embodiment of the present invention and a power conversion device using the semiconductor device include a high potential side terminal portion and a low potential side terminal portion that are part of a high potential side electrode and a low potential side electrode connected to the semiconductor element. However, a straight line connecting the center of the high-potential side terminal portion and the center of the low-potential side terminal portion in the plan view of the semiconductor device extends from the opposite sides of the semiconductor device from the center of the semiconductor device. It is characterized by crossing the center line that extends to the side.

本発明によれば、１つの半導体素子が１パッケージ化された１ｉｎ１タイプの半導体装置において小型化を図ることができる半導体装置及びこれを用いた電力変換装置を提供することができる。   According to the present invention, it is possible to provide a semiconductor device that can be reduced in size in a 1 in 1 type semiconductor device in which one semiconductor element is packaged, and a power converter using the same.

本発明の第1実施形態に係る半導体装置の平面図である。1 is a plan view of a semiconductor device according to a first embodiment of the present invention. 本発明の第1実施形態に係る半導体装置の側面図である。1 is a side view of a semiconductor device according to a first embodiment of the present invention. 図１のＡ−Ａ切断面の断面図である。It is sectional drawing of the AA cut surface of FIG. 図１のＢ−Ｂ切断面の断面図である。It is sectional drawing of the BB cut surface of FIG. 本発明の第２実施形態に係る半導体装置及びこれを用いた電力変換装置の平面図である。It is a top view of the semiconductor device which concerns on 2nd Embodiment of this invention, and a power converter device using the same. 本発明の第２実施形態に係る半導体装置の側面図である。It is a side view of the semiconductor device concerning a 2nd embodiment of the present invention. 本発明の第３実施形態に係る半導体装置及びこれを用いた電力変換装置の平面図である。It is a top view of the semiconductor device which concerns on 3rd Embodiment of this invention, and a power converter device using the same. 本発明のその他の実施形態に係る半導体装置及びこれを用いた電力変換装置の平面図である。It is a top view of the semiconductor device which concerns on other embodiment of this invention, and a power converter device using the same. 本発明のその他の実施形態に係る３相モータの回路図である。It is a circuit diagram of the three-phase motor which concerns on other embodiment of this invention.

（第１実施形態）
本発明の第1実施形態では、１つ半導体素子が１パッケージ化された１ｉｎ１タイプ半導体装置及びこれを用いた電力変換装置を説明する。本発明の第1実施形態に係る半導体装置は、図１〜図４に示すように、電力変換用半導体素子（半導体チップ）１と、電力変換用半導体素子１と電気的に接続された高電位側電極（ドレイン電極）２と、電力変換用半導体素子１と電気的に接続された低電位側電極（ソース電極）３とを備える。 (First embodiment)
In the first embodiment of the present invention, a 1 in 1 type semiconductor device in which one semiconductor element is packaged and a power conversion device using the same will be described. As shown in FIGS. 1 to 4, the semiconductor device according to the first embodiment of the present invention includes a power conversion semiconductor element (semiconductor chip) 1 and a high potential electrically connected to the power conversion semiconductor element 1. A side electrode (drain electrode) 2 and a low potential side electrode (source electrode) 3 electrically connected to the power conversion semiconductor element 1 are provided.

電力変換用半導体素子１、高電位側電極２の一部、及び低電位側電極３の一部は、直方体形状の樹脂１８により封止されている。図１の平面視において、樹脂１８は、高電位側電極２及び低電位側電極３の長手方向を長辺とした矩形を有する。ここで、図１の平面視において、矩形の樹脂１８の中心を、半導体装置の中心Ｃ０と定義する。更に、図１の平面視において、半導体装置の中心Ｃ０から、樹脂１８の対向する側面Ｓ１，Ｓ２に伸ばした直線を、半導体装置の中心線Ｌ２と定義する。   The semiconductor element 1 for power conversion, a part of the high potential side electrode 2 and a part of the low potential side electrode 3 are sealed with a rectangular parallelepiped resin 18. In the plan view of FIG. 1, the resin 18 has a rectangular shape with long sides in the longitudinal direction of the high potential side electrode 2 and the low potential side electrode 3. Here, in the plan view of FIG. 1, the center of the rectangular resin 18 is defined as the center C0 of the semiconductor device. Furthermore, in the plan view of FIG. 1, a straight line extending from the center C0 of the semiconductor device to the opposite side surfaces S1 and S2 of the resin 18 is defined as a center line L2 of the semiconductor device.

電力変換用半導体素子１は、半田（図示省略）等を介して高電位側電極２に接続されていてもよい。電力変換用半導体素子１は、配線柱材料やワイヤ（図示省略）等を介して低電位側電極３に接続されていてもよい。   The power conversion semiconductor element 1 may be connected to the high potential side electrode 2 via solder (not shown) or the like. The semiconductor element 1 for power conversion may be connected to the low potential side electrode 3 via a wiring column material, a wire (not shown) or the like.

電力変換用半導体素子１としては、例えば金属酸化膜半導体電界効果トランジスタ（ＭＯＳＦＥＴ）やＩＧＢＴが採用可能である。本発明の第1実施形態においては電力変換用半導体素子１がＭＯＳＦＥＴである場合を説明するが、ＩＧＢＴである場合には「ドレイン」が「コレクタ」となり、「ソース」が「エミッタ」となる。なお、電力変換用半導体素子１が形成される半導体チップには、電流を逆向きに流すダイオードが内蔵されていてもよい。   As the power conversion semiconductor element 1, for example, a metal oxide semiconductor field effect transistor (MOSFET) or IGBT can be adopted. In the first embodiment of the present invention, the case where the power conversion semiconductor device 1 is a MOSFET will be described. However, in the case of an IGBT, the “drain” becomes the “collector” and the “source” becomes the “emitter”. Note that a semiconductor chip in which the power conversion semiconductor element 1 is formed may incorporate a diode that allows current to flow in the reverse direction.

高電位側電極２には、電力変換用半導体素子１とは別個の電子材料１２が絶縁材を介して接続されている。電子材料１２としては、例えば温度測定用サーミスタ等が採用可能である。電子材料１２は、例えば図１の平面視において、電力変換用半導体素子１及び低電位側電極３の端部に隣接する位置に配置されている。なお、電子材料１２がない構成であってもよく、複数の電子材料が配置されていてもよい。   An electronic material 12 separate from the power conversion semiconductor element 1 is connected to the high potential side electrode 2 via an insulating material. As the electronic material 12, for example, a thermistor for temperature measurement can be employed. For example, the electronic material 12 is disposed at a position adjacent to the ends of the power conversion semiconductor element 1 and the low potential side electrode 3 in the plan view of FIG. 1. In addition, the structure without the electronic material 12 may be sufficient and the several electronic material may be arrange | positioned.

高電位側電極２は、電力変換用半導体素子１を搭載する搭載部（ダイパッド部）２１と、搭載部２１に折れ曲がるように一体的に形成され、外部の電源電位に接続される高電位側端子部２２とを有する。   The high potential side electrode 2 is integrally formed so as to be bent on the mounting portion (die pad portion) 21 on which the power conversion semiconductor element 1 is mounted, and is connected to an external power source potential. Part 22.

図１の平面視において、搭載部２１は矩形を有し、その略中央に電力変換用半導体素子１が搭載されている。搭載部２１の中心と樹脂１８の中心とは互いに一致していてもよく、異なる位置であってもよい。図２〜図４に示すように、搭載部２１の電力変換用半導体素子１の搭載面と対向する面は、樹脂１８から露出している。   In the plan view of FIG. 1, the mounting portion 21 has a rectangular shape, and the power conversion semiconductor element 1 is mounted at substantially the center thereof. The center of the mounting portion 21 and the center of the resin 18 may coincide with each other or may be at different positions. As shown in FIGS. 2 to 4, the surface of the mounting portion 21 that faces the mounting surface of the power conversion semiconductor element 1 is exposed from the resin 18.

高電位側端子部２２は、半導体装置（樹脂１８）の側面Ｓ２から露出して直線状に延伸する。高電位側端子部２２の直線部分の幅は、搭載部２１の幅の半分程度である。図１の平面視において、高電位側端子部２２の側面Ｓ２から露出して直線状に延伸する矩形部分の中心を、高電位側端子部２２の中心Ｃ１と定義する。   The high potential side terminal portion 22 is exposed from the side surface S2 of the semiconductor device (resin 18) and extends linearly. The width of the straight portion of the high potential side terminal portion 22 is about half of the width of the mounting portion 21. In the plan view of FIG. 1, the center of the rectangular portion exposed from the side surface S <b> 2 of the high potential side terminal portion 22 and extending linearly is defined as the center C <b> 1 of the high potential side terminal portion 22.

低電位側電極３は、電力変換用半導体素子１と接続する接続部３１と、接続部３１と一体的に形成され、外部の接地電位に接続される低電位側端子部３２とを有する。   The low potential side electrode 3 includes a connection portion 31 connected to the semiconductor element 1 for power conversion, and a low potential side terminal portion 32 formed integrally with the connection portion 31 and connected to an external ground potential.

図１及び図３に示すように、接続部３１は、電力変換用半導体素子１の上面の略半分の領域を覆っている。図２及び図３に示すように、高電位側電極２の搭載部２１と低電位側電極３の接続部３１は、電力変換用半導体素子１を挟むように互いに対面する。   As shown in FIGS. 1 and 3, the connection portion 31 covers a substantially half of the upper surface of the power conversion semiconductor element 1. As shown in FIGS. 2 and 3, the mounting portion 21 of the high potential side electrode 2 and the connection portion 31 of the low potential side electrode 3 face each other so as to sandwich the power conversion semiconductor element 1.

低電位側端子部３２は、半導体装置（樹脂１８）の側面Ｓ２に対向する側面Ｓ１から露出して直線状に延伸する。図１の平面視において、低電位側端子部３２が樹脂１８の側面Ｓ１から露出して直線状に延伸する矩形部分の中心を、低電位側端子部３２の中心Ｃ２と定義する。   The low potential side terminal portion 32 is exposed from the side surface S1 facing the side surface S2 of the semiconductor device (resin 18) and extends linearly. In the plan view of FIG. 1, the center of the rectangular portion where the low potential side terminal portion 32 is exposed from the side surface S <b> 1 of the resin 18 and extends linearly is defined as the center C <b> 2 of the low potential side terminal portion 32.

本発明の第1実施形態に係る半導体装置において、高電位側端子部２２の中心Ｃ１と低電位側端子部３２の中心Ｃ２を結んだ直線Ｌ１が少なくとも半導体装置の中心線Ｌ２と交わるように、高電位側端子部２２及び低電位側端子部３２がそれぞれ配置されている。なお、高電位側端子部２２の中心Ｃ１と低電位側端子部３２の中心Ｃ２を結んだ直線Ｌ１は、半導体装置の中心Ｃ０を通ってもよく、半導体装置の中心Ｃ０とは異なる位置で半導体装置の中心線Ｌ２と交わってもよい。   In the semiconductor device according to the first embodiment of the present invention, a straight line L1 connecting the center C1 of the high potential side terminal portion 22 and the center C2 of the low potential side terminal portion 32 intersects at least the center line L2 of the semiconductor device. A high potential side terminal portion 22 and a low potential side terminal portion 32 are respectively disposed. Note that a straight line L1 connecting the center C1 of the high potential side terminal portion 22 and the center C2 of the low potential side terminal portion 32 may pass through the center C0 of the semiconductor device, and the semiconductor is located at a position different from the center C0 of the semiconductor device. It may intersect with the center line L2 of the device.

高電位側端子部２２及び低電位側端子部３２は、延出部１４，１５をそれぞれ有する。延出部１４，１５は高電位側端子部２２の中心Ｃ１及び低電位側端子部３２の中心Ｃ２から半導体装置の中心線Ｌ２のない側にそれぞれ延伸している。   The high potential side terminal portion 22 and the low potential side terminal portion 32 have extending portions 14 and 15, respectively. The extending portions 14 and 15 extend from the center C1 of the high potential side terminal portion 22 and the center C2 of the low potential side terminal portion 32 to the side without the center line L2 of the semiconductor device.

高電位側端子部２２と低電位側端子部３２は、ねじ穴（開口部）１６，１７を有する。ねじ穴（開口部）１６，１７は、ねじを挿入して実装基板に半導体装置を固定するために設けられる。ねじ穴１６，１７の中心Ｃ３，Ｃ４は、高電位側端子部２２の中心Ｃ１及び低電位側端子部３２の中心Ｃ２から半導体装置の中心線Ｌ２のない側に配置されている。   The high potential side terminal portion 22 and the low potential side terminal portion 32 have screw holes (openings) 16 and 17. The screw holes (openings) 16 and 17 are provided for inserting a screw and fixing the semiconductor device to the mounting substrate. The centers C3 and C4 of the screw holes 16 and 17 are arranged on the side without the center line L2 of the semiconductor device from the center C1 of the high potential side terminal portion 22 and the center C2 of the low potential side terminal portion 32.

電力変換用半導体素子１の上面には複数のボンディングパッド（図示省略）が形成されている。電力変換用半導体素子１に形成された複数のボンディングパッドには、低電位測定用信号端子（ソースセンス）９、スイッチング制御用信号端子（ゲート電極）８、電流測定用信号端子１０がワイヤ４１〜４３を介して電気的に接続されている。低電位測定用信号端子９、スイッチング制御用信号端子８及び電流測定用信号端子１０は、低電位側端子部３２と並列に、互いに離間して配置されている。   A plurality of bonding pads (not shown) are formed on the upper surface of the power conversion semiconductor element 1. A plurality of bonding pads formed on the power conversion semiconductor element 1 include a low potential measurement signal terminal (source sense) 9, a switching control signal terminal (gate electrode) 8, and a current measurement signal terminal 10. It is electrically connected through 43. The low potential measurement signal terminal 9, the switching control signal terminal 8, and the current measurement signal terminal 10 are arranged in parallel with the low potential side terminal portion 32 and separated from each other.

低電位測定用信号端子９は、電力変換用半導体素子１の低電位側電極３の電位を測定するものであり、外部の電位計に接続される。図１に示すように、低電位測定用信号端子９は、低電位側端子部３２に隣接し、半導体装置の中心線Ｌ２に近い側に配置されている。図１、図２及び図４に示すように、低電位測定用信号端子９の端部は折れ曲がり、高電位側電極２の搭載部２１上に絶縁材（図示省略）を介して配置される。   The low potential measurement signal terminal 9 measures the potential of the low potential side electrode 3 of the power conversion semiconductor element 1 and is connected to an external electrometer. As shown in FIG. 1, the low-potential measurement signal terminal 9 is disposed adjacent to the low-potential side terminal portion 32 and close to the center line L2 of the semiconductor device. As shown in FIGS. 1, 2, and 4, the end of the low potential measurement signal terminal 9 is bent and disposed on the mounting portion 21 of the high potential side electrode 2 via an insulating material (not shown).

スイッチング制御用信号端子８は、電力変換用半導体素子１のゲート電極にゲート電圧を供給してスイッチング動作を制御するものであり、外部の制御回路に接続される。図１に示すように、スイッチング制御用信号端子８は、低電位測定用信号端子９と電流測定用信号端子１０との間に配置されている。スイッチング制御用信号端子８の端部は低電位測定用信号端子９と同様に折れ曲がり、高電位側電極２の搭載部２１上に絶縁材（図示省略）を介して配置される。   The switching control signal terminal 8 controls the switching operation by supplying a gate voltage to the gate electrode of the power conversion semiconductor element 1, and is connected to an external control circuit. As shown in FIG. 1, the switching control signal terminal 8 is disposed between the low potential measurement signal terminal 9 and the current measurement signal terminal 10. The end of the switching control signal terminal 8 is bent in the same manner as the low potential measurement signal terminal 9 and is disposed on the mounting portion 21 of the high potential side electrode 2 via an insulating material (not shown).

電流測定用信号端子１０は、電力変換用半導体素子１の低電位側電極３に流れる電流を測定するものであり、外部の電流計に接続される。図１に示すように、電流測定用信号端子１０は、スイッチング制御用信号端子８に隣接して配置されている。電流測定用信号端子１０の端部は低電位測定用信号端子９と同様に折れ曲がり、高電位側電極２の搭載部２１上に絶縁材（図示省略）を介して配置される。   The current measurement signal terminal 10 measures the current flowing through the low potential side electrode 3 of the power conversion semiconductor element 1 and is connected to an external ammeter. As shown in FIG. 1, the current measurement signal terminal 10 is disposed adjacent to the switching control signal terminal 8. The end of the current measurement signal terminal 10 is bent in the same manner as the low potential measurement signal terminal 9 and is disposed on the mounting portion 21 of the high potential side electrode 2 via an insulating material (not shown).

なお、低電位測定用信号端子９、スイッチング制御用信号端子８及び電流測定用信号端子１０の配置位置は適宜入れ替えることができる。例えば、図１では低電位測定用信号端子９が低電位側端子部３２に隣接して配置されているが、スイッチング制御用信号端子８又は電流測定用信号端子１０が低電位側端子部３２に隣接して配置されていてもよい。   The arrangement positions of the low potential measurement signal terminal 9, the switching control signal terminal 8, and the current measurement signal terminal 10 can be appropriately switched. For example, in FIG. 1, the low potential measurement signal terminal 9 is arranged adjacent to the low potential side terminal portion 32, but the switching control signal terminal 8 or the current measurement signal terminal 10 is connected to the low potential side terminal portion 32. You may arrange | position adjacently.

一方、高電位側電極２には、高電位測定用信号端子（ドレインセンス）１１が電気的に接続されている。高電位測定用信号端子１１は、電力変換用半導体素子１の高電位側電極２の電位を測定するものであり、外部の電位計に接続される。高電位測定用信号端子１１は、高電位側端子部２２に隣接し且つ平行に、半導体装置の中心線Ｌ２に近い側に配置されている。   On the other hand, a high potential measurement signal terminal (drain sense) 11 is electrically connected to the high potential side electrode 2. The high potential measurement signal terminal 11 measures the potential of the high potential side electrode 2 of the power conversion semiconductor element 1 and is connected to an external electrometer. The high-potential measurement signal terminal 11 is disposed adjacent to and parallel to the high-potential side terminal portion 22 on the side close to the center line L2 of the semiconductor device.

電子材料１２には、電子材料用信号端子１３の一端がワイヤ４４等を介して電気的に接続されている。電子材料用信号端子１３の他端は、温度計等の外部機器に接続される。図１に示すように、電子材料用信号端子１３は、高電位測定用信号端子１１に隣接して配置されている。図３に示すように、電子材料用信号端子１３の一端は折れ曲がり、高電位側電極２の搭載部２１上に絶縁材（図示省略）を介して配置される。なお、図示を省略するが、電子材料用信号端子１３は、低電位測定用信号端子９等と同様に、低電位側端子部３２に隣接して配置されても良い。また、電子材料用信号端子１３の本数は特に限定されず、複数本（２本以上）の電子材料用信号端子が並列に配置されていてもよい。   One end of the electronic material signal terminal 13 is electrically connected to the electronic material 12 via a wire 44 or the like. The other end of the electronic material signal terminal 13 is connected to an external device such as a thermometer. As shown in FIG. 1, the electronic material signal terminal 13 is disposed adjacent to the high potential measurement signal terminal 11. As shown in FIG. 3, one end of the electronic material signal terminal 13 is bent and disposed on the mounting portion 21 of the high potential side electrode 2 via an insulating material (not shown). Although not shown, the electronic material signal terminal 13 may be disposed adjacent to the low potential side terminal portion 32 in the same manner as the low potential measurement signal terminal 9 and the like. The number of the electronic material signal terminals 13 is not particularly limited, and a plurality (two or more) of electronic material signal terminals may be arranged in parallel.

次に、本発明の第1実施形態に係る半導体装置の製造方法の一例を説明する。なお、本発明の第1実施形態に係る半導体装置の製造方法は以下の製造方法に特に限定されるものではない。   Next, an example of a method for manufacturing the semiconductor device according to the first embodiment of the present invention will be described. The method for manufacturing the semiconductor device according to the first embodiment of the present invention is not particularly limited to the following manufacturing method.

（イ）まず、高電位側電極２を用意し、高電位側電極２の搭載部２１上に、半田等を介して電力変換用半導体素子１を搭載する。更に、低電位側電極３を用意し、電力変換用半導体素子１の上面に、半田等を介して低電位側電極３の接続部３１を配置する。このとき、図１の平面視において、半導体装置の高電位側端子部２２の中心Ｃ１と低電位側端子部３２の中心Ｃ２を結んだ直線Ｌ１が、半導体装置の中心線Ｌ２と交わるように、高電位側端子部２２及び低電位側端子部３２を配置する。   (A) First, the high potential side electrode 2 is prepared, and the power conversion semiconductor element 1 is mounted on the mounting portion 21 of the high potential side electrode 2 via solder or the like. Furthermore, the low potential side electrode 3 is prepared, and the connection portion 31 of the low potential side electrode 3 is disposed on the upper surface of the power conversion semiconductor element 1 via solder or the like. At this time, in a plan view of FIG. 1, a straight line L1 connecting the center C1 of the high potential side terminal portion 22 and the center C2 of the low potential side terminal portion 32 of the semiconductor device intersects with the center line L2 of the semiconductor device. The high potential side terminal portion 22 and the low potential side terminal portion 32 are arranged.

（ロ）更に、高電位側電極２の搭載部２１上に、スイッチング制御用信号端子８、低電位測定用信号端子９及び電流測定用信号端子１０のそれぞれの端部を絶縁材を介して配置する。更に、高電位側電極２の搭載部２１上に、電子材料１２を絶縁材を介して搭載する。更に、高電位側電極２の搭載部２１の上面に、高電位測定用信号端子１１の端部を接続する。   (B) Furthermore, the end portions of the switching control signal terminal 8, the low potential measurement signal terminal 9, and the current measurement signal terminal 10 are arranged on the mounting portion 21 of the high potential side electrode 2 through an insulating material. To do. Further, the electronic material 12 is mounted on the mounting portion 21 of the high potential side electrode 2 via an insulating material. Further, the end of the high potential measurement signal terminal 11 is connected to the upper surface of the mounting portion 21 of the high potential side electrode 2.

（ハ）電力変換用半導体素子１と、スイッチング制御用信号端子８、低電位測定用信号端子９及び電流測定用信号端子１０とを、ワイヤボンディング等によりワイヤ４１〜４３で接続する。また、電子材料１２と電子材料用信号端子１３とを、ワイヤボンディング等によりワイヤ４４で接続する。   (C) The power conversion semiconductor element 1, the switching control signal terminal 8, the low potential measurement signal terminal 9, and the current measurement signal terminal 10 are connected by wires 41 to 43 by wire bonding or the like. Further, the electronic material 12 and the electronic material signal terminal 13 are connected by a wire 44 by wire bonding or the like.

（ニ）その後、金型等を用いて、電力変換用半導体素子１、高電位側電極２の搭載部２１及び低電位側電極３の接続部３１を樹脂１８で直方体形状に封止する。この結果、図１に示した半導体装置が完成する。   (D) Thereafter, the power conversion semiconductor element 1, the mounting portion 21 of the high potential side electrode 2, and the connection portion 31 of the low potential side electrode 3 are sealed in a rectangular parallelepiped shape with the resin 18 using a mold or the like. As a result, the semiconductor device shown in FIG. 1 is completed.

従来、シリコン（Ｓｉ）からなるＩＧＢＴ等の大きな半導体チップを用いた半導体装置においては、一般的には半導体チップの幅により半導体装置全体の幅が規定される。一方、炭化珪素（ＳｉＣ）からなるＭＯＳＦＥＴ等の小さな半導体チップを用いた半導体装置においては、半導体チップの幅ではなく、高電位側電極及び低電位側電極の端子部の幅等により半導体装置全体の幅が規定される場合がある。このため、高電位側電極及び低電位側電極の端子部の幅等が小型化の障害となってしまう。   Conventionally, in a semiconductor device using a large semiconductor chip such as an IGBT made of silicon (Si), the width of the entire semiconductor device is generally defined by the width of the semiconductor chip. On the other hand, in a semiconductor device using a small semiconductor chip such as a MOSFET made of silicon carbide (SiC), not the width of the semiconductor chip but the width of the terminal portion of the high potential side electrode and the low potential side electrode, etc. The width may be specified. For this reason, the width of the terminal portion of the high potential side electrode and the low potential side electrode becomes an obstacle to miniaturization.

これに対して、本発明の第1実施形態に係る半導体装置及びこれを用いた電力変換装置によれば、高電位側端子部２２の中心Ｃ１と低電位側端子部３２の中心Ｃ２を結んだ直線Ｌ１が、少なくとも半導体装置の中心線Ｌ２と交わるように、高電位側端子部２２及び低電位側端子部３２を配置することにより、低インピーダンス化するために高電位側端子部２２及び低電位側端子部３２の幅を大きくしつつ、半導体装置全体を小型化できる。   On the other hand, according to the semiconductor device and the power conversion device using the same according to the first embodiment of the present invention, the center C1 of the high potential side terminal portion 22 and the center C2 of the low potential side terminal portion 32 are connected. By arranging the high-potential side terminal portion 22 and the low-potential side terminal portion 32 so that the straight line L1 intersects at least the center line L2 of the semiconductor device, the high-potential side terminal portion 22 and the low potential are reduced in order to reduce the impedance. The entire semiconductor device can be reduced in size while increasing the width of the side terminal portion 32.

また、スイッチング制御用信号端子８、低電位測定用信号端子９及び電流測定用信号端子１０を低電位側端子部３２の延出部１５及びねじ穴１７のない側に並列に配置し、且つ高電位測定用信号端子１１を高電位側端子部２２の延出部１４及びねじ穴１６のない側に隣接して配置することにより、絶縁距離を必要最小限にしつつ、高電位側端子部２２及び低電位側端子部３２の幅にしばられることなく、半導体装置全体の幅を小さくすることができる。   Further, the switching control signal terminal 8, the low potential measurement signal terminal 9, and the current measurement signal terminal 10 are arranged in parallel on the side of the low potential side terminal portion 32 where the extension portion 15 and the screw hole 17 are not provided, and By arranging the potential measuring signal terminal 11 adjacent to the extended portion 14 of the high potential side terminal portion 22 and the side without the screw hole 16, the high potential side terminal portion 22 and The width of the entire semiconductor device can be reduced without being limited to the width of the low potential side terminal portion 32.

また、電子材料用信号端子１３が低電位側端子部３２又は高電位側端子部２２に並列に、半導体装置の中心線Ｌ２に近い側に配置されるため、平面視において低インピーダンス化するために高電位側端子部２２及び低電位側端子部３２の幅を大きくし、電子材料用信号端子１３を設けつつ、半導体装置全体を小型化できる。   In addition, since the electronic material signal terminal 13 is arranged in parallel to the low potential side terminal portion 32 or the high potential side terminal portion 22 and on the side close to the center line L2 of the semiconductor device, the impedance can be reduced in plan view. The entire semiconductor device can be reduced in size while increasing the width of the high potential side terminal portion 22 and the low potential side terminal portion 32 and providing the electronic material signal terminal 13.

また、高電位側端子部２２及び低電位側端子部３２の延出部１４，１５が、高電位側端子部２２の中心Ｃ１及び低電位側端子部３２の中心Ｃ２から半導体装置の中心線Ｌ２のない側に延出されるので、平面視において低インピーダンス化するために高電位側端子部２２及び低電位側端子部３２の幅を更に大きくしつつ、半導体装置を小型化できる。   Further, the extended portions 14 and 15 of the high potential side terminal portion 22 and the low potential side terminal portion 32 are connected to the center line L2 of the semiconductor device from the center C1 of the high potential side terminal portion 22 and the center C2 of the low potential side terminal portion 32. Therefore, the semiconductor device can be downsized while further increasing the width of the high potential side terminal portion 22 and the low potential side terminal portion 32 in order to reduce the impedance in plan view.

また、延出部１４，１５の少なくとも一部を用いて外部接続用のねじ穴１６，１７を設けることができるので、高電位側端子部２２及び低電位側端子部３２の直線部分にねじ穴１６，１７を設ける場合よりも高電位側端子部２２及び低電位側端子部３２の直線部分の幅を狭くすることができ、半導体装置全体の幅を小さくすることができる。   Further, since the screw holes 16 and 17 for external connection can be provided by using at least a part of the extending portions 14 and 15, screw holes are formed in the straight portions of the high potential side terminal portion 22 and the low potential side terminal portion 32. The width of the straight portions of the high-potential side terminal portion 22 and the low-potential side terminal portion 32 can be made narrower than when 16 and 17 are provided, and the overall width of the semiconductor device can be reduced.

また、高電位側電極２及び低電位側電極３の少なくとも一部が電力変換用半導体素子１を挟むように互いに対面し、電力変換用半導体素子１、高電位側電極２の一部、及び低電位側電極３の一部が樹脂封止されることにより、高電位側電極２と低電位側電極３との絶縁距離を小さくし、半導体装置を更に小型化できる。   Further, at least a part of the high potential side electrode 2 and the low potential side electrode 3 face each other so as to sandwich the power conversion semiconductor element 1, and the power conversion semiconductor element 1, a part of the high potential side electrode 2, and the low potential side electrode 2 Since a part of the potential side electrode 3 is resin-sealed, the insulation distance between the high potential side electrode 2 and the low potential side electrode 3 can be reduced, and the semiconductor device can be further miniaturized.

（第２実施形態）
本発明の第２実施形態に係る電力変換装置は、図５に示すように、１ｉｎ１タイプの半導体装置１００ａ，１００ｂを２個配置して構成される。なお、本発明の第２実施形態に係る電力変換装置は、更に複数個（３個以上）の半導体装置で構成してもよい。 (Second Embodiment)
The power converter according to the second embodiment of the present invention is configured by arranging two 1 in 1 type semiconductor devices 100a and 100b as shown in FIG. Note that the power conversion device according to the second embodiment of the present invention may be configured by a plurality of (three or more) semiconductor devices.

また、半導体装置１００ａ，１００ｂのそれぞれは、本発明の第1実施形態に係る半導体装置に対して電流測定用信号端子１０を省略している点が異なるが、本発明の第1実施形態に係る半導体装置と同様に電流測定用信号端子を有していてもよい。   Each of the semiconductor devices 100a and 100b is different from the semiconductor device according to the first embodiment of the present invention in that the current measurement signal terminal 10 is omitted, but according to the first embodiment of the present invention. Like the semiconductor device, it may have a signal terminal for current measurement.

半導体装置１００ａは、図５及び図６に示すように、電力変換用半導体素子（半導体チップ）１ａと、電力変換用半導体素子１ａと電気的に接続される高電位側電極２ａと、電力変換用半導体素子１ａと電気的に接続される低電位側電極３ａとを備える。更に、高電位側電極２ａには、電力変換用半導体素子１ａとは別個の電子材料１２ａが絶縁材を介して接続されている。電力変換用半導体素子１ａ、電子材料１２ａ、高電位側電極２ａの一部及び低電位側電極３ａの一部は樹脂１８ａで封止されている。   As shown in FIGS. 5 and 6, the semiconductor device 100a includes a power conversion semiconductor element (semiconductor chip) 1a, a high potential side electrode 2a electrically connected to the power conversion semiconductor element 1a, and a power conversion semiconductor device 100a. A low potential side electrode 3a electrically connected to the semiconductor element 1a is provided. Further, an electronic material 12a separate from the power conversion semiconductor element 1a is connected to the high potential side electrode 2a via an insulating material. The semiconductor element 1a for power conversion, the electronic material 12a, a part of the high potential side electrode 2a, and a part of the low potential side electrode 3a are sealed with a resin 18a.

高電位側電極２ａは搭載部２１ａ及び高電位側端子部２２ａを有する。低電位側電極３ａは、接続部３１ａ及び低電位側端子部３２ａを有する。高電位側端子部２２ａの中心Ｃ１１と低電位側端子部３２ａの中心Ｃ１２を結んだ直線Ｌ１１が、少なくとも半導体装置の中心Ｃ１０から側面に伸ばした中心線Ｌ１２と交わるように、高電位側端子部２２ａ及び低電位側端子部３２ａがそれぞれ配置されている。   The high potential side electrode 2a has a mounting portion 21a and a high potential side terminal portion 22a. The low potential side electrode 3a includes a connection portion 31a and a low potential side terminal portion 32a. The high potential side terminal portion so that the straight line L11 connecting the center C11 of the high potential side terminal portion 22a and the center C12 of the low potential side terminal portion 32a intersects at least the center line L12 extending from the center C10 of the semiconductor device to the side surface. 22a and the low potential side terminal portion 32a are respectively arranged.

高電位側端子部２２ａ及び低電位側端子部３２ａは延出部１４ａ，１５ａ及びねじ穴１６ａ，１７ａをそれぞれ有する。ねじ穴１６ａ，１７ａの中心Ｃ１３，Ｃ１４は、高電位側端子部２２ａの中心Ｃ１１及び低電位側端子部３２ａの中心Ｃ１２から半導体装置の中心線Ｌ１２のない側に配置されている。   The high potential side terminal portion 22a and the low potential side terminal portion 32a have extension portions 14a and 15a and screw holes 16a and 17a, respectively. The centers C13 and C14 of the screw holes 16a and 17a are arranged on the side without the center line L12 of the semiconductor device from the center C11 of the high potential side terminal portion 22a and the center C12 of the low potential side terminal portion 32a.

電力変換用半導体素子１ａには、低電位測定用信号端子９ａ、スイッチング制御用信号端子８ａがワイヤ４１ａ，４２ａを介して電気的に接続されている。高電位側電極２ａには、高電位測定用信号端子１１ａが電気的に接続されている。電子材料１２ａには、電子材料用信号端子１３ａがワイヤ４４ａを介して電気的に接続されている。   A low potential measurement signal terminal 9a and a switching control signal terminal 8a are electrically connected to the power conversion semiconductor element 1a via wires 41a and 42a. A high potential measurement signal terminal 11a is electrically connected to the high potential side electrode 2a. An electronic material signal terminal 13a is electrically connected to the electronic material 12a via a wire 44a.

図５及び図６に示すように、低電位測定用信号端子９ａ及び電子材料用信号端子１３ａは、高電位側端子部２２ａ又は低電位側端子部３２ａに近い位置で、半導体装置の平面視に対して垂直に折れ曲がっている。スイッチング制御用信号端子８ａ及び高電位測定用信号端子１１ａも、低電位測定用信号端子９ａ及び電子材料用信号端子１３ａと同様に、低電位側端子部３２ａに近い位置で、半導体装置の平面視に対して垂直に折れ曲がっている。   As shown in FIGS. 5 and 6, the low potential measurement signal terminal 9a and the electronic material signal terminal 13a are located close to the high potential side terminal portion 22a or the low potential side terminal portion 32a in the plan view of the semiconductor device. It is bent vertically. Similarly to the low potential measurement signal terminal 9a and the electronic material signal terminal 13a, the switching control signal terminal 8a and the high potential measurement signal terminal 11a are also close to the low potential side terminal portion 32a in a plan view of the semiconductor device. It is bent perpendicular to

一方、半導体装置１００ｂは、電力変換用半導体素子（半導体チップ）１ｂと、電力変換用半導体素子１ｂと電気的に接続される高電位側電極２ｂと、電力変換用半導体素子１ｂと電気的に接続される低電位側電極３ｂとを備える。更に、高電位側電極２ｂには、電力変換用半導体素子１ｂとは別個の電子材料１２ｂが絶縁材を介して接続されている。電力変換用半導体素子１ｂ、電子材料１２ｂ、高電位側電極２ｂの一部及び低電位側電極３ｂの一部は樹脂１８ｂで封止されている。   On the other hand, the semiconductor device 100b is electrically connected to the power conversion semiconductor element (semiconductor chip) 1b, the high potential side electrode 2b electrically connected to the power conversion semiconductor element 1b, and the power conversion semiconductor element 1b. The low potential side electrode 3b is provided. Further, an electronic material 12b separate from the power conversion semiconductor element 1b is connected to the high potential side electrode 2b via an insulating material. The semiconductor element 1b for power conversion, the electronic material 12b, a part of the high potential side electrode 2b, and a part of the low potential side electrode 3b are sealed with a resin 18b.

高電位側電極２ｂは搭載部２１ｂ及び高電位側端子部２２ｂを有する。低電位側電極３ｂは、接続部３１ｂ及び低電位側端子部３２ｂを有する。高電位側端子部２２ｂの中心Ｃ２１と低電位側端子部３２ｂの中心Ｃ２２を結んだ直線Ｌ２１が、少なくとも半導体装置の中心Ｃ２０から側面に伸ばした中心線直線Ｌ２２と交わるように、高電位側端子部２２ｂ及び低電位側端子部３２ｂがそれぞれ配置されている。   The high potential side electrode 2b has a mounting portion 21b and a high potential side terminal portion 22b. The low potential side electrode 3b includes a connection portion 31b and a low potential side terminal portion 32b. The high potential side terminal so that a straight line L21 connecting the center C21 of the high potential side terminal portion 22b and the center C22 of the low potential side terminal portion 32b intersects at least a center line straight line L22 extending from the center C20 of the semiconductor device to the side surface. The part 22b and the low potential side terminal part 32b are respectively arranged.

高電位側端子部２２ｂ及び低電位側端子部３２ｂは延出部１４ｂ，１５ｂ及びねじ穴１６ｂ，１７ｂをそれぞれ有する。ねじ穴１６ｂ，１７ｂの中心Ｃ２３，Ｃ２４は、高電位側端子部２２ｂの中心Ｃ２１及び低電位側端子部３２ｂの中心Ｃ２２から半導体装置の中心線直線Ｌ２２のない側に配置されている。   The high potential side terminal portion 22b and the low potential side terminal portion 32b have extended portions 14b and 15b and screw holes 16b and 17b, respectively. The centers C23 and C24 of the screw holes 16b and 17b are arranged on the side without the center line straight line L22 of the semiconductor device from the center C21 of the high potential side terminal portion 22b and the center C22 of the low potential side terminal portion 32b.

電力変換用半導体素子１ｂには、低電位測定用信号端子９ｂ、スイッチング制御用信号端子８ｂがワイヤ４１ｂ，４２ｂを介して電気的に接続されている。高電位側電極２ｂには、高電位測定用信号端子１１ｂが電気的に接続されている。電子材料１２ｂには、電子材料用信号端子１３ｂがワイヤ４４ｂを介して電気的に接続されている。   A low potential measurement signal terminal 9b and a switching control signal terminal 8b are electrically connected to the power conversion semiconductor element 1b via wires 41b and 42b. A high potential measurement signal terminal 11b is electrically connected to the high potential side electrode 2b. An electronic material signal terminal 13b is electrically connected to the electronic material 12b via a wire 44b.

本発明の第２実施形態に係る半導体装置１００ａ，１００ｂは、図５に示すように、低電位側端子部３２ａ，３２ｂ同士を隣接し、高電位側端子部２２ａ，２２ｂ同士を隣接して配置されている。   As shown in FIG. 5, in the semiconductor devices 100a and 100b according to the second embodiment of the present invention, the low potential side terminal portions 32a and 32b are adjacent to each other, and the high potential side terminal portions 22a and 22b are adjacent to each other. Has been.

スイッチング制御用信号端子８ｂ、低電位測定用信号端子９ｂ、高電位測定用信号端子１１ｂ及び電子材料用信号端子１３ｂは、高電位側端子部２２ｂ又は低電位側端子部３２ｂに近い位置で、半導体装置の平面視に対して垂直に折れ曲がっている。   The switching control signal terminal 8b, the low potential measurement signal terminal 9b, the high potential measurement signal terminal 11b, and the electronic material signal terminal 13b are located close to the high potential side terminal portion 22b or the low potential side terminal portion 32b. It is bent perpendicular to the plan view of the device.

本発明の第２実施形態に係る半導体装置１００ａ，１００ｂ及びこれを用いた電力変換装置によれば、高電位側端子部２２ａ，２２ｂの中心Ｃ１１，Ｃ２１と低電位側端子部３２ａ，３２ｂの中心Ｃ１２，２２を結んだ直線Ｌ１１，Ｌ２１が、少なくとも半導体装置の中心線Ｌ１２，Ｌ２２と交わるように、高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂを配置することにより、低インピーダンス化するために高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂの幅を大きくしつつ、半導体装置１００ａ，１００ｂ全体を小型化できる。   According to the semiconductor devices 100a and 100b and the power conversion device using the same according to the second embodiment of the present invention, the centers C11 and C21 of the high potential side terminal portions 22a and 22b and the centers of the low potential side terminal portions 32a and 32b. By arranging the high potential side terminal portions 22a and 22b and the low potential side terminal portions 32a and 32b so that the straight lines L11 and L21 connecting C12 and 22 intersect at least the center lines L12 and L22 of the semiconductor device, The entire semiconductor devices 100a and 100b can be reduced in size while increasing the width of the high potential side terminal portions 22a and 22b and the low potential side terminal portions 32a and 32b in order to achieve impedance.

また、スイッチング制御用信号端子８ａ，８ｂ、低電位測定用信号端子９ａ，９ｂ及び電流測定用信号端子（図示省略）を低電位側端子部３２ａ，３２ｂの延出部１５ａ，１５ｂ及びねじ穴１７ａ，１７ｂのない側に並列に配置し、且つ高電位測定用信号端子１１ａ，１１ｂを高電位側端子部２２ａ，２２ｂの延出部１４ａ，１４ｂ及びねじ穴１６ａ，１６ｂのない側に隣接して配置することにより、絶縁距離を必要最小限にしつつ、高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂの幅にしばられることなく、半導体装置１００ａ，１００ｂ全体の幅を小さくすることができる。   The switching control signal terminals 8a and 8b, the low potential measurement signal terminals 9a and 9b, and the current measurement signal terminal (not shown) are connected to the extended portions 15a and 15b and the screw holes 17a of the low potential side terminal portions 32a and 32b. , 17b are arranged in parallel to each other, and the high potential measurement signal terminals 11a, 11b are adjacent to the extended portions 14a, 14b of the high potential side terminal portions 22a, 22b and the side without the screw holes 16a, 16b. The arrangement reduces the overall width of the semiconductor devices 100a and 100b without being limited by the widths of the high potential side terminal portions 22a and 22b and the low potential side terminal portions 32a and 32b while minimizing the insulation distance. be able to.

また、電子材料用信号端子１３ａ，１３ｂが低電位側端子部３２ａ，３２ｂ又は高電位側端子部２２ａ，２２ｂに並列に、半導体装置の中心線Ｌ１２，Ｌ２２に近い側に配置されるため、平面視において低インピーダンス化するために高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂの幅を大きくし、電子材料用信号端子１３ａ，１３ｂを設けつつ、半導体装置１００ａ，１００ｂ全体を小型化できる。   Further, since the electronic material signal terminals 13a and 13b are arranged in parallel to the low potential side terminal portions 32a and 32b or the high potential side terminal portions 22a and 22b on the side close to the center lines L12 and L22 of the semiconductor device, In order to reduce the impedance when viewed, the widths of the high-potential side terminal portions 22a and 22b and the low-potential side terminal portions 32a and 32b are increased, and the entire semiconductor devices 100a and 100b are provided while providing the electronic material signal terminals 13a and 13b. Can be downsized.

また、高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂの延出部１４ａ，１４ｂ，１５ａ，１５ｂが、高電位側端子部２２ａ，２２ｂの中心Ｃ１１，Ｃ２１及び低電位側端子部３２の中心Ｃ１２，２２から半導体装置の中心線Ｌ１２，Ｌ２２のない側に延出されるので、平面視において低インピーダンス化するために高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂの幅を更に大きくしつつ、半導体装置１００ａ，１００ｂを小型化できる。   The extended portions 14a, 14b, 15a, 15b of the high potential side terminal portions 22a, 22b and the low potential side terminal portions 32a, 32b are the centers C11, C21 and the low potential side terminals of the high potential side terminal portions 22a, 22b. Since it extends from the center C12, 22 of the portion 32 to the side without the center lines L12, L22 of the semiconductor device, the high potential side terminal portions 22a, 22b and the low potential side terminal portion 32a, The semiconductor devices 100a and 100b can be downsized while further increasing the width of 32b.

また、延出部１４ａ，１４ｂ，１５ａ，１５ｂのそれぞれの少なくとも一部を用いて外部接続用のねじ穴１６ａ，１６ｂ，１７ａ，１７ｂを設けることができるので、高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂの直線部分にねじ穴１６ａ，１６ｂ，１７ａ，１７ｂを設ける場合よりも高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂの直線部分の幅を狭くすることができ、半導体装置１００ａ，１００ｂ全体の幅を小さくすることができる。   Further, since the external connection screw holes 16a, 16b, 17a, 17b can be provided by using at least a part of each of the extending portions 14a, 14b, 15a, 15b, the high potential side terminal portions 22a, 22b and The widths of the straight portions of the high potential side terminal portions 22a and 22b and the low potential side terminal portions 32a and 32b are narrower than when the screw holes 16a, 16b, 17a and 17b are provided in the straight portions of the low potential side terminal portions 32a and 32b. The width of the entire semiconductor device 100a, 100b can be reduced.

また、高電位側電極２ａ，２ｂ及び低電位側電極３ａ，３ｂの少なくとも一部が電力変換用半導体素子１ａ，１ｂを挟むように互いに対面し、電力変換用半導体素子１ａ，１ｂ、高電位側電極２ａ，２ｂの一部、及び低電位側電極３ａ，３ｂの一部が樹脂封止されることにより、高電位側電極２ａ，２ｂと低電位側電極３ａ，３ｂとの絶縁距離を小さくし、半導体装置１００ａ，１００ｂを更に小型化できる。   Further, at least a part of the high potential side electrodes 2a, 2b and the low potential side electrodes 3a, 3b face each other so as to sandwich the power conversion semiconductor elements 1a, 1b, and the power conversion semiconductor elements 1a, 1b, high potential side A part of the electrodes 2a and 2b and a part of the low potential side electrodes 3a and 3b are sealed with resin, thereby reducing an insulation distance between the high potential side electrodes 2a and 2b and the low potential side electrodes 3a and 3b. The semiconductor devices 100a and 100b can be further downsized.

更に、図５に示すように、半導体装置１００ａのスイッチング制御用信号端子８ａ及び低電位測定用信号端子９ａが垂直に折れ曲がることにより確保された箇所に、半導体装置１００ｂの低電位側端子部３２ｂの延出部１５ｂ及びねじ穴１７ｂを設けることができる。更に、半導体装置１００ｂの高電位測定用信号端子１１ｂ及び電子材料用信号端子１３ｂが垂直に折れ曲がることにより確保された箇所に、半導体装置１００ａの高電位側端子部２２ａの延出部１４ａ及びねじ穴１６ａを設けることができる。   Further, as shown in FIG. 5, the switching potential signal terminal 8a and the low potential measurement signal terminal 9a of the semiconductor device 100a are secured by bending vertically in the low potential side terminal portion 32b of the semiconductor device 100b. The extension part 15b and the screw hole 17b can be provided. Further, the extended portion 14a and the screw hole of the high potential side terminal portion 22a of the semiconductor device 100a are secured at the locations where the high potential measurement signal terminal 11b and the electronic material signal terminal 13b of the semiconductor device 100b are bent vertically. 16a can be provided.

このため、半導体装置１００ａ，１００ｂ同士の絶縁沿面距離を小さくしつつ、大電流が流れる高電位側端子部２２ａ，２２ｂと低電位側端子部３２ａ，３２ｂの電極幅と外部接続用ねじ穴１６ａ，１６ｂ，１７ａ，１７ｂを設け、半導体装置１００ａ，１００ｂを複数個並べて配置し構成する電力変換装置を小型化できる。半導体装置１００ａ，１００ｂを駆動する駆動回路は信号端子が垂直に折れ曲がっていることより半導体装置１００ａ，１００ｂの直上に配置することにより、信号端子の配線インピーダンスを最短とし、電力変換装置を更に小型化できる。   Therefore, while reducing the insulation creepage distance between the semiconductor devices 100a and 100b, the electrode widths of the high potential side terminal portions 22a and 22b and the low potential side terminal portions 32a and 32b through which a large current flows and the external connection screw holes 16a, The power conversion device provided with 16b, 17a, 17b and arranged by arranging a plurality of semiconductor devices 100a, 100b can be reduced in size. Since the drive circuit for driving the semiconductor devices 100a and 100b is arranged directly above the semiconductor devices 100a and 100b because the signal terminals are bent vertically, the wiring impedance of the signal terminals is minimized, and the power converter is further miniaturized. it can.

更に、スイッチング制御用信号端子８ａ，８ｂ、低電位測定用信号端子９ａ，９ｂ、高電位測定用信号端子１１ａ，１１ｂ、電子材料用信号端子１３ａ，１３ｂ及び電流測定用信号端子（図示省略）の少なくとも一部が、高電位側端子部２２ａ，２２ｂ又は低電位側端子部３２ａ，３２ｂのうちの並列する一方に近い位置で、半導体装置１００ａ，１００ｂの平面視に対して垂直に折れ曲がっている。このため、平面視に垂直に折れ曲がった信号端子によって絶縁沿面を確保することができるため、半導体装置１００ａ，１００ｂを更に小型化できる。   Furthermore, switching control signal terminals 8a and 8b, low potential measurement signal terminals 9a and 9b, high potential measurement signal terminals 11a and 11b, electronic material signal terminals 13a and 13b, and current measurement signal terminals (not shown). At least a portion is bent perpendicular to the plan view of the semiconductor devices 100a and 100b at a position close to one of the high potential side terminal portions 22a and 22b or the low potential side terminal portions 32a and 32b in parallel. For this reason, since the insulation creepage can be ensured by the signal terminals bent vertically in a plan view, the semiconductor devices 100a and 100b can be further downsized.

更に、半導体装置１００ａ，１００ｂを２個以上、低電位側端子部３２ａ，３２ｂ同士を隣接し、高電位側端子部２２ａ，２２ｂ同士を隣接して配置されるため、平面視において高電位側端子部２２ａ，２２ｂ、低電位側端子部３２ａ，３２ｂ及び信号端子がない箇所の絶縁沿面によって互いの距離を小さくできる。このため、半導体装置１００ａ，１００ｂを２個以上用いて構成される電力変換装置を小型化できる。   Furthermore, two or more semiconductor devices 100a and 100b, the low potential side terminal portions 32a and 32b are adjacent to each other, and the high potential side terminal portions 22a and 22b are adjacent to each other. The distance between the portions 22a and 22b, the low potential side terminal portions 32a and 32b, and the insulating creepage surface where there is no signal terminal can be reduced. For this reason, the power converter device comprised using two or more semiconductor devices 100a and 100b can be reduced in size.

（第３実施形態）
本発明の第３実施形態に係る電力変換装置は、図７に示すように、１ｉｎ１タイプの半導体装置１００ａ，１００ｂを２個配置して構成される。なお、本発明の第２実施形態に係る電力変換装置は、更に複数個（３個以上）の半導体装置で構成してもよい。 (Third embodiment)
The power converter according to the third embodiment of the present invention is configured by arranging two 1 in 1 type semiconductor devices 100a and 100b as shown in FIG. Note that the power conversion device according to the second embodiment of the present invention may be configured by a plurality of (three or more) semiconductor devices.

また、半導体装置１００ａ，１００ｂのそれぞれは、本発明の第1実施形態に係る半導体装置に対して電流測定用信号端子１０を省略している点が異なるが、本発明の第1実施形態に係る半導体装置と同様に電流測定用信号端子を有していてもよい。   Each of the semiconductor devices 100a and 100b is different from the semiconductor device according to the first embodiment of the present invention in that the current measurement signal terminal 10 is omitted, but according to the first embodiment of the present invention. Like the semiconductor device, it may have a signal terminal for current measurement.

本発明の第３実施形態に係る電力変換装置において、半導体装置１００ａ，１００ｂの低電位側端子部３２ａ，３２ｂと、半導体装置１００ａ，１００ｂの高電位側端子部２２ａ，２２ｂとが互いに隣接するように、半導体装置１００ａ，１００ｂが配置されている点が、本発明の第２実施形態の構成と異なる。   In the power conversion device according to the third embodiment of the present invention, the low potential side terminal portions 32a and 32b of the semiconductor devices 100a and 100b and the high potential side terminal portions 22a and 22b of the semiconductor devices 100a and 100b are adjacent to each other. The semiconductor device 100a, 100b is different from the configuration of the second embodiment of the present invention.

第３実施形態においてもスイッチング制御用信号端子８ａ，８ｂ、低電位測定用信号端子９ａ，９ｂ、高電位測定用信号端子１１ａ，１１ｂ及び電子材料用信号端子１３ａ，１３ｂが高電位側端子部２２ａ，２２ｂ又は低電位側端子部３２ａ，３２ｂに近い位置で、半導体装置１００ａ，１００ｂの平面視に対して垂直に折れ曲がっており、その側面図は図６と同様となる。   Also in the third embodiment, the switching control signal terminals 8a and 8b, the low potential measurement signal terminals 9a and 9b, the high potential measurement signal terminals 11a and 11b, and the electronic material signal terminals 13a and 13b are provided on the high potential side terminal portion 22a. , 22b or the low potential side terminal portions 32a, 32b are bent perpendicular to the plan view of the semiconductor devices 100a, 100b, and the side view thereof is the same as FIG.

本発明の第３実施形態に係る半導体装置１００ａ，１００ｂ及びこれを用いた電力変換装置によれば、高電位側端子部２２ａ，２２ｂの中心Ｃ１１，Ｃ２１と低電位側端子部３２ａ，３２ｂの中心Ｃ１２，２２を結んだ直線Ｌ１１，Ｌ２１が、少なくとも半導体装置の中心線Ｌ１２，Ｌ２２と交わるように、高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂを配置することにより、低インピーダンス化するために高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂの幅を大きくしつつ、半導体装置１００ａ，１００ｂ全体を小型化できる。   According to the semiconductor devices 100a and 100b and the power conversion device using the same according to the third embodiment of the present invention, the centers C11 and C21 of the high potential side terminal portions 22a and 22b and the centers of the low potential side terminal portions 32a and 32b. By arranging the high potential side terminal portions 22a and 22b and the low potential side terminal portions 32a and 32b so that the straight lines L11 and L21 connecting C12 and 22 intersect at least the center lines L12 and L22 of the semiconductor device, The entire semiconductor devices 100a and 100b can be reduced in size while increasing the width of the high potential side terminal portions 22a and 22b and the low potential side terminal portions 32a and 32b in order to achieve impedance.

また、スイッチング制御用信号端子８ａ，８ｂ、低電位測定用信号端子９ａ，９ｂ及び電流測定用信号端子（図示省略）を低電位側端子部３２ａ，３２ｂの延出部１５ａ，１５ｂ及びねじ穴１７ａ，１７ｂのない側に並列に配置し、且つ高電位測定用信号端子１１ａ，１１ｂを高電位側端子部２２ａ，２２ｂの延出部１４ａ，１４ｂ及びねじ穴１６ａ，１６ｂのない側に隣接して配置することにより、絶縁距離を必要最小限にしつつ、高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂの幅にしばられることなく、半導体装置１００ａ，１００ｂ全体の幅を小さくすることができる。   The switching control signal terminals 8a and 8b, the low potential measurement signal terminals 9a and 9b, and the current measurement signal terminal (not shown) are connected to the extended portions 15a and 15b and the screw holes 17a of the low potential side terminal portions 32a and 32b. , 17b are arranged in parallel to each other, and the high potential measurement signal terminals 11a, 11b are adjacent to the extended portions 14a, 14b of the high potential side terminal portions 22a, 22b and the side without the screw holes 16a, 16b. The arrangement reduces the overall width of the semiconductor devices 100a and 100b without being limited by the widths of the high potential side terminal portions 22a and 22b and the low potential side terminal portions 32a and 32b while minimizing the insulation distance. be able to.

また、電子材料用信号端子１３ａ，１３ｂが低電位側端子部３２ａ，３２ｂ又は高電位側端子部２２ａ，２２ｂに並列に、半導体装置の中心線Ｌ１２，Ｌ２２に近い側に配置されるため、平面視において低インピーダンス化するために高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂの幅を大きくし、電子材料用信号端子１３ａ，１３ｂを設けつつ、半導体装置１００ａ，１００ｂ全体を小型化できる。   Further, since the electronic material signal terminals 13a and 13b are arranged in parallel to the low potential side terminal portions 32a and 32b or the high potential side terminal portions 22a and 22b on the side close to the center lines L12 and L22 of the semiconductor device, In order to reduce the impedance when viewed, the widths of the high-potential side terminal portions 22a and 22b and the low-potential side terminal portions 32a and 32b are increased, and the entire semiconductor devices 100a and 100b are provided while providing the electronic material signal terminals 13a and 13b. Can be downsized.

また、高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂの延出部１４ａ，１４ｂ，１５ａ，１５ｂが、高電位側端子部２２ａ，２２ｂの中心Ｃ１１，Ｃ２１及び低電位側端子部３２の中心Ｃ１２，２２から半導体装置の中心線Ｌ１２，Ｌ２２のない側に延出されるので、平面視において低インピーダンス化するために高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂの幅を更に大きくしつつ、半導体装置１００ａ，１００ｂを小型化できる。   The extended portions 14a, 14b, 15a, 15b of the high potential side terminal portions 22a, 22b and the low potential side terminal portions 32a, 32b are the centers C11, C21 and the low potential side terminals of the high potential side terminal portions 22a, 22b. Since it extends from the center C12, 22 of the portion 32 to the side without the center lines L12, L22 of the semiconductor device, the high potential side terminal portions 22a, 22b and the low potential side terminal portion 32a, The semiconductor devices 100a and 100b can be downsized while further increasing the width of 32b.

また、延出部１４ａ，１４ｂ，１５ａ，１５ｂのそれぞれの少なくとも一部を用いて外部接続用のねじ穴１６ａ，１６ｂ，１７ａ，１７ｂを設けることができるので、高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂの直線部分にねじ穴１６ａ，１６ｂ，１７ａ，１７ｂを設ける場合よりも高電位側端子部２２ａ，２２ｂ及び低電位側端子部３２ａ，３２ｂの直線部分の幅を狭くすることができ、半導体装置１００ａ，１００ｂ全体の幅を小さくすることができる。   Further, since the external connection screw holes 16a, 16b, 17a, 17b can be provided by using at least a part of each of the extending portions 14a, 14b, 15a, 15b, the high potential side terminal portions 22a, 22b and The widths of the straight portions of the high potential side terminal portions 22a and 22b and the low potential side terminal portions 32a and 32b are narrower than when the screw holes 16a, 16b, 17a and 17b are provided in the straight portions of the low potential side terminal portions 32a and 32b. The width of the entire semiconductor device 100a, 100b can be reduced.

また、高電位側電極２ａ，２ｂ及び低電位側電極３ａ，３ｂの少なくとも一部が電力変換用半導体素子１ａ，１ｂを挟むように互いに対面し、電力変換用半導体素子１ａ，１ｂ、高電位側電極２ａ，２ｂの一部、及び低電位側電極３ａ，３ｂの一部が樹脂封止されることにより、高電位側電極２ａ，２ｂと低電位側電極３ａ，３ｂとの絶縁距離を小さくし、半導体装置１００ａ，１００ｂを更に小型化できる。   Further, at least a part of the high potential side electrodes 2a, 2b and the low potential side electrodes 3a, 3b face each other so as to sandwich the power conversion semiconductor elements 1a, 1b, and the power conversion semiconductor elements 1a, 1b, high potential side A part of the electrodes 2a and 2b and a part of the low potential side electrodes 3a and 3b are sealed with resin, thereby reducing an insulation distance between the high potential side electrodes 2a and 2b and the low potential side electrodes 3a and 3b. The semiconductor devices 100a and 100b can be further downsized.

更に、図７に示すように、半導体装置１００ａの高電位測定用信号端子１１ａ及び電子材料用信号端子１３ａが垂直に折れ曲がることにより確保された箇所に、半導体装置１００ｂの低電位側端子部３２ｂの延出部１５ｂ及びねじ穴１６ｂを設けることができる。更に、半導体装置１００ｂの高電位測定用信号端子１１ｂ及び電子材料用信号端子１３ｂが垂直に折れ曲がることにより確保された箇所に、半導体装置１００ａの低電位側端子部３２ａの延出部１５ａ及びねじ穴１７ａを設けることができる。   Further, as shown in FIG. 7, the low potential side terminal portion 32b of the semiconductor device 100b is provided at a location secured by the vertical bending of the high potential measurement signal terminal 11a and the electronic material signal terminal 13a of the semiconductor device 100a. The extension part 15b and the screw hole 16b can be provided. Further, the extended portion 15a and the screw hole of the low potential side terminal portion 32a of the semiconductor device 100a are secured at the locations where the high potential measurement signal terminal 11b and the electronic material signal terminal 13b of the semiconductor device 100b are bent vertically. 17a can be provided.

このため、半導体装置１００ａ，１００ｂ同士の絶縁沿面距離を小さくしつつ、大電流が流れる高電位側端子部２２ａ，２２ｂと低電位側端子部３２ａ，３２ｂの電極幅と外部接続用ねじ穴１６ａ，１６ｂ，１７ａ，１７ｂを設け、半導体装置１００ａ，１００ｂを複数個並べて配置し構成する電力変換装置を小型化できる。半導体装置１００ａ，１００ｂを駆動する駆動回路は信号端子が垂直に折れ曲がっていることより半導体装置１００ａ，１００ｂの直上に配置することにより、信号端子の配線インピーダンスを最短とし、電力変換装置を更に小型化できる。   Therefore, while reducing the insulation creepage distance between the semiconductor devices 100a and 100b, the electrode widths of the high potential side terminal portions 22a and 22b and the low potential side terminal portions 32a and 32b through which a large current flows and the external connection screw holes 16a, The power conversion device provided with 16b, 17a, 17b and arranged by arranging a plurality of semiconductor devices 100a, 100b can be reduced in size. Since the drive circuit for driving the semiconductor devices 100a and 100b is arranged directly above the semiconductor devices 100a and 100b because the signal terminals are bent vertically, the wiring impedance of the signal terminals is minimized, and the power converter is further miniaturized. it can.

更に、スイッチング制御用信号端子８ａ，８ｂ、低電位測定用信号端子９ａ，９ｂ、高電位測定用信号端子１１ａ，１１ｂ、電子材料用信号端子１３ａ，１３ｂ及び電流測定用信号端子（図示省略）の少なくとも一部が、高電位側端子部２２ａ，２２ｂ又は低電位側端子部３２ａ，３２ｂのうちの並列する一方に近い位置で、半導体装置１００ａ，１００ｂの平面視に対して垂直に折れ曲がっている。このため、平面視に垂直に折れ曲がった信号端子によって絶縁沿面を確保することができるため、半導体装置１００ａ，１００ｂを更に小型化できる。   Furthermore, switching control signal terminals 8a and 8b, low potential measurement signal terminals 9a and 9b, high potential measurement signal terminals 11a and 11b, electronic material signal terminals 13a and 13b, and current measurement signal terminals (not shown). At least a portion is bent perpendicular to the plan view of the semiconductor devices 100a and 100b at a position close to one of the high potential side terminal portions 22a and 22b or the low potential side terminal portions 32a and 32b in parallel. For this reason, since the insulation creepage can be ensured by the signal terminals bent vertically in a plan view, the semiconductor devices 100a and 100b can be further downsized.

更に、半導体装置１００ａ，１００ｂを２個以上、低電位側端子部３２ａ，３２ｂと高電位側端子部２２ａ，２２ｂとを互いに隣接して配置されるため、平面視において高電位側端子部２２ａ，２２ｂ、低電位側端子部３２ａ，３２ｂ及び信号端子がない箇所の絶縁沿面によって互いの距離を小さくできる。このため、半導体装置１００ａ，１００ｂを２個以上用いて構成される電力変換装置を小型化できる。   Further, since two or more semiconductor devices 100a and 100b and the low potential side terminal portions 32a and 32b and the high potential side terminal portions 22a and 22b are arranged adjacent to each other, the high potential side terminal portions 22a and 22b in the plan view are arranged. 22b, the low potential side terminal portions 32a and 32b, and the insulation creepage where there is no signal terminal can reduce the distance to each other. For this reason, the power converter device comprised using two or more semiconductor devices 100a and 100b can be reduced in size.

（その他の実施形態）
上記のように、本発明は第１〜第３実施形態によって記載したが、この開示の一部をなす論述及び図面はこの発明を限定するものであると理解すべきではない。この開示から当業者には様々な代替実施形態、実施例及び運用技術が明らかとなろう。 (Other embodiments)
As described above, the present invention has been described according to the first to third embodiments. However, it should not be understood that the description and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

例えば、図８に示すように、１ｉｎ１タイプの半導体装置１００を６つ並べてねじ１０２ａ，１０２ｂを用いて実装基板１０１に実装することにより、電力変換装置（３相インバータ）を構成することができる。図９に示すように、電力変換装置（３相インバータ）１０３は、制御回路１０４及びモータ１０５に接続される。   For example, as shown in FIG. 8, by arranging six 1 in 1 type semiconductor devices 100 and mounting them on the mounting substrate 101 using screws 102 a and 102 b, a power conversion device (three-phase inverter) can be configured. As shown in FIG. 9, the power converter (three-phase inverter) 103 is connected to the control circuit 104 and the motor 105.

また、電力変換用半導体素子１，１ａ，１ｂがＩＧＢＴ等である場合、ＩＧＢＴ等の半導体チップと個別にダイオードの半導体チップを配置してもよい。ダイオードは、高電位側電極２，２ａ，２ｂの搭載部２１，２１ａ，２１ｂ上の任意の位置に配置される。例えば、ダイオードは、電力変換用半導体素子１，１ａ，１ｂに隣接するように配置してもよい。また、電力変換装置に適用可能な電力変換用半導体素子１，１ａ，１ｂを半導体素子の一例として説明したが、電力変換用ではない他の半導体素子であってもよい。   When the power conversion semiconductor elements 1, 1a, 1b are IGBTs or the like, a diode semiconductor chip may be disposed separately from a semiconductor chip such as an IGBT. The diode is disposed at an arbitrary position on the mounting portions 21, 21a, 21b of the high potential side electrodes 2, 2a, 2b. For example, the diode may be arranged adjacent to the power conversion semiconductor elements 1, 1a, 1b. Further, the power conversion semiconductor elements 1, 1a, and 1b applicable to the power conversion apparatus have been described as examples of the semiconductor elements, but other semiconductor elements that are not for power conversion may be used.

このように、本発明はここでは記載していない様々な実施形態等を含むことは勿論である。したがって、本発明の技術的範囲は上記の説明から妥当な特許請求の範囲に係る発明特定事項によってのみ定められるものである。   As described above, the present invention naturally includes various embodiments not described herein. Therefore, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.

１：半導体素子（半導体チップ）
２：高電位側電極
３：低電位側電極
８：スイッチング制御用信号端子
９：低電位測定用信号端子
１０：電流測定用信号端子
１１：高電位測定用信号端子
１２：電子材料
１３：電子材料用信号端子
１４，１５：延出部
１６，１７：ねじ穴
１８：樹脂
２１：搭載部
２２：高電位側端子部
３１：接続部
３２：低電位側端子部
４１〜４４，４１ａ，４１ｂ，４２ａ，４２ｂ，４４ａ，４４ｂ：ワイヤ
１００，１００ａ，１００ｂ：半導体装置
１０２ａ，１０２ｂ：ねじ
１０３：電力変換装置
１０４：制御回路
１０５：モータ 1: Semiconductor element (semiconductor chip)
2: High potential side electrode 3: Low potential side electrode 8: Signal terminal for switching control 9: Signal terminal for low potential measurement 10: Signal terminal for current measurement 11: Signal terminal for high potential measurement 12: Electronic material 13: Electronic material Signal terminal 14, 15: Extension part 16, 17: Screw hole 18: Resin 21: Mounting part 22: High potential side terminal part 31: Connection part 32: Low potential side terminal part 41-44, 41a, 41b, 42a , 42b, 44a, 44b: wire 100, 100a, 100b: semiconductor device 102a, 102b: screw 103: power conversion device 104: control circuit 105: motor

Claims (4)

半導体素子と、
前記半導体素子と接続される高電位側電極と、
前記半導体素子と接続される低電位側電極とを備える半導体装置であって、
前記高電位側電極の一部である高電位側端子部と、前記低電位側電極の一部である低電位側端子部とが、前記半導体装置の互いに対向する側面から延出され、
前記半導体装置の平面視において、前記高電位側端子部の中心と前記低電位側端子部の中心を結んだ直線が、前記半導体装置の中心から前記半導体装置の前記側面に伸ばした中心線と交わり、
前記高電位側端子部と前記低電位側端子部は延出部をそれぞれ有し、
前記高電位側端子部の前記延出部は前記高電位側端子部の中心から前記半導体装置の前記中心線のない側に延出され、
前記低電位側端子部の前記延出部は前記低電位側端子部の中心から前記半導体装置の前記中心線のない側に延出される
ことを特徴とする記載の半導体装置。 A semiconductor element;
A high potential side electrode connected to the semiconductor element;
A semiconductor device comprising a low potential side electrode connected to the semiconductor element,
A high potential side terminal part that is a part of the high potential side electrode and a low potential side terminal part that is a part of the low potential side electrode are extended from the mutually opposing side surfaces of the semiconductor device,
In a plan view of the semiconductor device, a straight line connecting the center of the high potential side terminal portion and the center of the low potential side terminal portion intersects with a center line extending from the center of the semiconductor device to the side surface of the semiconductor device. ,
The high potential side terminal portion and the low potential side terminal portion each have an extending portion,
The extended portion of the high potential side terminal portion extends from the center of the high potential side terminal portion to the side without the center line of the semiconductor device,
The semiconductor device according to claim 1, wherein the extension portion of the low potential side terminal portion extends from a center of the low potential side terminal portion to a side of the semiconductor device that does not have the center line . 半導体素子と、
前記半導体素子と接続される高電位側電極と、
前記半導体素子と接続される低電位側電極とを備える半導体装置であって、
前記高電位側電極の一部である高電位側端子部と、前記低電位側電極の一部である低電位側端子部とが、前記半導体装置の互いに対向する側面から延出され、
前記半導体装置の平面視において、前記高電位側端子部の中心と前記低電位側端子部の中心を結んだ直線が、前記半導体装置の中心から前記半導体装置の前記側面に伸ばした中心線と交わり、
前記高電位側端子部と前記低電位側端子部はねじ穴をそれぞれ有し、
前記高電位側端子部の前記ねじ穴の中心は前記高電位側端子部の中心から前記半導体装置の前記中心線のない側に配置され、
前記低電位側端子部の前記ねじ穴の中心は前記低電位側端子部の中心から前記半導体装置の前記中心線のない側に配置される
ことを特徴とする半導体装置。 A semiconductor element;
A high potential side electrode connected to the semiconductor element;
A semiconductor device comprising a low potential side electrode connected to the semiconductor element,
A high potential side terminal part that is a part of the high potential side electrode and a low potential side terminal part that is a part of the low potential side electrode are extended from the mutually opposing side surfaces of the semiconductor device,
In a plan view of the semiconductor device, a straight line connecting the center of the high potential side terminal portion and the center of the low potential side terminal portion intersects with a center line extending from the center of the semiconductor device to the side surface of the semiconductor device. ,
The high potential side terminal portion and the low potential side terminal portion each have a screw hole,
The center of the screw hole of the high potential side terminal portion is disposed on the side without the center line of the semiconductor device from the center of the high potential side terminal portion,
The center of the screw hole of the low potential side terminal portion is arranged on the side without the center line of the semiconductor device from the center of the low potential side terminal portion.
A semiconductor device. 前記高電位側電極及び前記低電位側電極の少なくとも一部が前記半導体素子を挟むように互いに対面し、
前記半導体素子、前記高電位側電極の一部、及び前記低電位側電極の一部が樹脂封止されている
ことを特徴とする請求項１又は２に記載の半導体装置。 At least a part of the high potential side electrode and the low potential side electrode face each other so as to sandwich the semiconductor element;
3. The semiconductor device according to claim 1 , wherein the semiconductor element, a part of the high potential side electrode, and a part of the low potential side electrode are resin-sealed . 半導体素子と、A semiconductor element;
前記半導体素子と接続される高電位側電極と、A high potential side electrode connected to the semiconductor element;
前記半導体素子と接続される低電位側電極とを備える半導体装置であって、A semiconductor device comprising a low potential side electrode connected to the semiconductor element,
前記高電位側電極の一部である高電位側端子部と、前記低電位側電極の一部である低電位側端子部とが、前記半導体装置の互いに対向する側面から延出され、A high potential side terminal part that is a part of the high potential side electrode and a low potential side terminal part that is a part of the low potential side electrode are extended from the mutually opposing side surfaces of the semiconductor device,
前記半導体装置の平面視において、前記高電位側端子部の中心と前記低電位側端子部の中心を結んだ直線が、前記半導体装置の中心から前記半導体装置の前記側面に伸ばした中心線と交わるように構成された半導体装置を複数有し、In a plan view of the semiconductor device, a straight line connecting the center of the high potential side terminal portion and the center of the low potential side terminal portion intersects with a center line extending from the center of the semiconductor device to the side surface of the semiconductor device. Having a plurality of semiconductor devices configured as described above,
前記複数の半導体装置は、前記低電位側端子部と前記高電位側端子部が互いに隣接して、それぞれが並列に配置されることを特徴とする電力変換装置。In the plurality of semiconductor devices, the low potential side terminal portion and the high potential side terminal portion are adjacent to each other and are arranged in parallel.
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