JP6024838B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 83
- 239000004519 grease Substances 0.000 claims description 46
- 238000001816 cooling Methods 0.000 claims description 27
- 239000003566 sealing material Substances 0.000 claims description 5
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 3
- 239000000463 material Substances 0.000 claims description 2
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 13
- 239000000758 substrate Substances 0.000 description 7
- 239000002184 metal Substances 0.000 description 4
- 238000009413 insulation Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000020169 heat generation Effects 0.000 description 2
- 238000005192 partition Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
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Description
図1〜図5は、本発明の実施の形態1にかかる半導体装置を示す図である。図1は図2のA−A線に沿う断面図であり、図2は、半導体装置10の内部を上面側から見たチップ配置図である。実施の形態1にかかる半導体装置10は、上面22aと下面22bを備えた金属製のベース板22と、上面22aに設けられた複数の絶縁基板24と、それぞれの絶縁基板24に並べて実装され通電時に発熱する複数の半導体素子26、28とを備えている。典型的には、半導体素子26はIGBTであり、半導体素子28はフリーホイールダイオードである。
図6〜図11は、本発明の実施の形態2にかかる半導体装置110を示す図である。図6は図7のC−C線に沿う断面図である。半導体装置110は、ベース板22の代わりにベース板122を備えた点以外は半導体装置10と同じである。図7はベース板122の上面122a側からみたチップ配置図である。図7に波線で示したのは下面122bに設けられた環状溝150である。環状溝150は、ベース板122の平面視において上面側の半導体素子26、28および絶縁基板24を囲む連続した1つの環状の溝である。環状溝150内部は絶縁グリス42で充填されている。
図12〜図14は、本発明の実施の形態3にかかる半導体装置210を示す図である。図12は図13のD−D線に沿う断面図である。半導体装置210は、ベース板22の代わりにベース板222を備えた点以外は半導体装置10と同じである。図14は、溝領域250の拡大断面図である。ベース板222の下面222bに、その平面方向に複数の溝が連なった溝領域250が設けられている。
図15は、本発明の実施の形態4にかかる半導体装置310を示す図である。半導体装置310は、シール材312が設けられた点を除き、半導体装置10と同じである。ベース板22の縁に沿って絶縁グリス42をシールするようにシール材312が設けられている。これにより、絶縁グリス42がベース板22の平面方向にはみ出して絶縁グリス量が不足することを抑制することができる。なお、シール材312は、実施の形態2、3にかかる半導体装置110、210に組み合わせてもよい。
図16および図17は、本発明の実施の形態5にかかる半導体装置410、460を示す図である。半導体装置410が備える冷却フィン440は、絶縁グリス42を挟んでベース板422と重なる平面440aに、平面視でベース板422よりも外形が小さい環状の溝444が設けられている。さらに、ベース板422は、その下面422bに、環状の溝444と嵌合する凸部424を備えている。凸部424と溝444とが嵌めあわさることで、絶縁グリス42がベース板422の平面方向にはみ出して絶縁グリス量が不足することを抑制することができる。図17に示すように、実施の形態4のシール材312を組み合わせた半導体装置460を提供しても良い。なお、図示しないが、実施の形態1、2にかかるベース板22、122の下面の環状溝50〜190と嵌まりあう1つまたは複数の凸部を冷却フィン40に設けてもよい。
図18〜19は、本発明の実施の形態6にかかる半導体装置510、560を示す図である。半導体装置510は、上面322aおよび下面322bを備えたベース板322と、表面540aに溝544を設けた冷却フィン540とを組み合わせたものである。下面322bは平坦である。ベース板322の平面視における溝544の形は、図7の環状溝150と同じである。環状の溝544の外形は、平面視でベース板322よりも小さい。溝544が実施の形態1の環状溝50,52と同じ働きをすることで、絶縁グリス42がベース板422の平面方向にはみ出して絶縁グリス量が不足することを抑制することができる。図19に示すように、溝544の内側にさらに溝546を設けた半導体装置560を提供してもよい。なお、ベース板322を、実施の形態1〜3にかかるベース板22〜222のいずれか1つに置換してもよい。
Claims (3)
- 上面と下面を備えたベース板と、前記上面側に並べて設けられた平板状の複数の半導体素子と、を備え、
前記ベース板の前記下面に、複数の溝が連なって前記複数の半導体素子と重なるように広がる溝領域が設けられ、前記ベース板の中央における前記溝領域の溝の深さが、前記ベース板の端部側における前記溝領域の溝の深さよりも、大きい半導体装置。 - 平面を有し、前記下面に前記平面が重ねられた冷却フィンを備え、
前記下面と前記平面の間に絶縁グリスが設けられ、
前記ベース板の縁に沿って前記絶縁グリスをシールするようにシール材が設けられた請求項1に記載の半導体装置。 - 前記半導体素子が、炭化ケイ素を半導体材料とする請求項1又は2に記載の半導体装置。
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PCT/JP2013/085148 WO2015097874A1 (ja) | 2013-12-27 | 2013-12-27 | 半導体装置 |
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JP6024838B2 true JP6024838B2 (ja) | 2016-11-16 |
JPWO2015097874A1 JPWO2015097874A1 (ja) | 2017-03-23 |
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US (1) | US9543227B2 (ja) |
JP (1) | JP6024838B2 (ja) |
CN (1) | CN105849904B (ja) |
DE (1) | DE112013007721B4 (ja) |
WO (1) | WO2015097874A1 (ja) |
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JP6483565B2 (ja) * | 2015-08-04 | 2019-03-13 | 株式会社Soken | 半導体装置 |
JP6582783B2 (ja) * | 2015-09-16 | 2019-10-02 | 富士電機株式会社 | 半導体装置 |
JP7019809B2 (ja) * | 2018-06-13 | 2022-02-15 | 三菱電機株式会社 | 電力用半導体装置 |
JP7169246B2 (ja) * | 2019-04-22 | 2022-11-10 | 株式会社Soken | 半導体装置 |
JP7345445B2 (ja) * | 2020-09-02 | 2023-09-15 | 三菱電機株式会社 | 半導体装置 |
CN117203757A (zh) * | 2021-08-19 | 2023-12-08 | 日立安斯泰莫株式会社 | 电子控制装置 |
US20230127088A1 (en) * | 2021-10-22 | 2023-04-27 | Carrier Corporation | Seal for thermal interface material of power electronics modules |
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JP2005129675A (ja) * | 2003-10-23 | 2005-05-19 | Mitsubishi Electric Corp | 半導体装置 |
JP2006269639A (ja) * | 2005-03-23 | 2006-10-05 | Denso Corp | 放熱装置および車載電子機器 |
JP2007096191A (ja) * | 2005-09-30 | 2007-04-12 | Mitsubishi Electric Corp | 半導体装置および放熱機構付き半導体装置 |
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JP2009290118A (ja) * | 2008-05-30 | 2009-12-10 | Toshiba Corp | 電子機器 |
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JP2728518B2 (ja) * | 1988-09-26 | 1998-03-18 | 株式会社日立製作所 | 電子デバイスの冷却装置 |
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CN105849904A (zh) | 2016-08-10 |
US9543227B2 (en) | 2017-01-10 |
DE112013007721T5 (de) | 2016-12-08 |
DE112013007721B4 (de) | 2020-07-23 |
CN105849904B (zh) | 2018-09-07 |
US20160240456A1 (en) | 2016-08-18 |
JPWO2015097874A1 (ja) | 2017-03-23 |
WO2015097874A1 (ja) | 2015-07-02 |
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