JP6018396B2 - Backside-illuminated image sensor, driving device and imager including the same, and backside-illuminated image sensor driving method - Google Patents

Description

  The present invention relates to, for example, a back-illuminated image sensor used for high-speed imaging, a driving apparatus and an imaging apparatus including the back-illuminated image sensor, and a driving method of the back-illuminated image sensor.

  It is generally known that a pixel peripheral recording type is suitable for a high-speed imaging device used for high-speed imaging. A pixel peripheral recording type image pickup device having an oblique linear CCD memory capable of super high-speed shooting at a maximum shooting speed of 1 million images / second has already been invented (Patent Document 1). In addition, a pixel peripheral recording type image pickup device having a maximum shooting speed of 2 million frames / second and having divided driving and pixel wiring resistance reduction has already been invented (Patent Document 2).

  Since the accumulation time per frame is shortened in high-speed shooting, the high-speed shooting element needs to have high sensitivity at the same time. Patent Documents 1 and 2 describe a front-illuminated pixel peripheral recording type imaging device. In the front-illuminated type, it is necessary to dispose a CCD memory on the surface side, and since this occupied area is large, The occupied area ratio was about 16% of the area of one pixel (50.4 μm □). Further, in the surface irradiation type pixel peripheral recording type image pickup device, since the generated signal charges are read out at 2 million sheets / second, it is necessary to collect and discharge the signal charges at high speed from the photoelectric conversion unit having an area of about 50 μm × 10 μm. . Therefore, in the surface irradiation type pixel peripheral recording type imaging device, it is necessary to use a photogate instead of a photodiode in the photoelectric conversion unit.

  Hereinafter, the configuration of a conventional surface irradiation type pixel peripheral recording type imaging device will be described in detail with reference to FIGS.

  FIG. 11 is a schematic plan view of a conventional surface irradiation type pixel peripheral recording type image pickup device 100. A photogate 101 serving as a photoelectric conversion unit is connected to a CCD memory 102 having a slanted linear shape for each pixel. The CCD memory 102 is connected to a readout VCCD (vertical transfer CCD) 104 common to one column via a junction 103. The VCCD 104 is connected to an HCCD (horizontal transfer CCD) 105 common to all columns. An amplifier 106 is connected to the output side of the VCCD 104.

  FIG. 12 is a schematic cross-sectional view along the CCD memory electrode from the photogate electrode of the front-illuminated pixel peripheral recording image sensor 100. The photogate electrode is composed of two sheets G1 and G2. The CCD memory electrode is composed of four phases M1 to M4.

  FIG. 13 is a drive waveform schematic diagram of the photogate electrodes G1 and G2 and the CCD memory electrode of the front-illuminated pixel peripheral recording type image pickup device 100 and M1 and M2. As illustrated, the drive voltages φG1, φG2, φM1, and φM2 are clocks having a high level (H) period and a low level (L) period.

  The drive voltages φG1 and φG2 are typically ½ of one cycle in the high level period and ½ of one cycle in the low level period. The signal charge generated in the photogate 101 by exposure in the high level period is accumulated in the photogate 101 as it is. When transferring from the photogate 101 to the CCD memory 102, the signal charges in the photogate 101 can be discharged at high speed by changing the drive voltages φG1 and φG2 from the high level to the low level. During the period when the drive voltages φG1 and φG2 are at the low level, the signal charge generated in the photogate 101 is discarded to the substrate.

  FIG. 14 is a schematic cross-sectional potential diagram of the front side pixel peripheral recording type image pickup device 100. FIG. 14 is a schematic cross-sectional potential diagram of the A1-A2 cross section in FIG. 12 when the drive voltages φG1, φG2, φM1, and φM2 from the period T1 to the period T4 in FIG. 13 are applied. Signal charges generated in the photogate electrode G1 in the period T1 are collected in the photogate electrode G2. Signal charges generated in the photogate electrode G1 in the period T2 are collected in the CCD memory electrode M1 through the photogate electrode G2. In the period T3 and the period T4, the photogate electrodes G1 and G2 are off, the generated signal charge is discarded to the substrate, and the signal charge is transferred from the CCD memory electrode M1 to M2.

  Since the conventional surface irradiation type pixel peripheral recording type imaging device 100 can use only the signal charges generated in the high level period (periods T1 and T2) in FIG. 13, the time aperture ratio of the photogate is 50% as a standard. is there. Here, the time aperture ratio is a ratio of a period during which the photogate generates charges that can be transferred to the CCD memory with respect to a period during which the photogate is exposed.

  By the way, there is a known phenomenon that the drive waveform is distorted in the operation of turning off the photogate. If the on and off periods are set in consideration of this phenomenon, the operation is performed at 60 to less than 500,000 images / second. As described above, the time aperture ratio is 50% (on period ½, off period ½), but the on period ¼, off period at 500,000 sheets / second or more and 2,000,000 sheets / second or less. It is necessary to make it 3/4 (Patent Document 3).

  Since the signal charge generated by the light incident during the off period of the photogate is discarded to the substrate, the signal charge generated during the off period cannot be used. Specifically, in a conventional front-illuminated pixel peripheral recording type imaging device, when the imaging speed is 500,000 or more, the spatial aperture ratio is 16%, and the temporal aperture ratio is 25%, the spatiotemporal aperture ratio is 4%. Met. For this reason, the conventional surface irradiation type has a problem that the sensitivity becomes insufficient in the super-high-speed shooting at 2 million images / second even though the area of the photogate is designed to be large. Here, the spatial aperture ratio refers to the ratio of the photogate aperture area to the unit pixel area. The spatiotemporal aperture ratio refers to the product of the spatial aperture ratio and the temporal aperture ratio.

  As a technique for increasing the sensitivity of a solid-state image sensor, a back-illuminated image sensor is generally known (Patent Document 4). In this backside illumination type image pickup device, a photoelectric conversion unit of each pixel is provided on the back side of the device, and an AD converter, a signal storage unit, and the like are provided on the front side of the device. In the back irradiation type, the spatial aperture ratio of the photoelectric conversion part can be increased to 100%.

  In order to increase the sensitivity of a pixel peripheral recording type imaging device capable of performing ultra-high speed imaging, an element structure in which the pixel peripheral recording type imaging device is a back-illuminated type has been studied. So far, a structure for preventing signal charges from being mixed into peripheral circuits (Patent Document 5), a structure for improving the movement speed of signal charges in the charge collection layer (Patent Document 6), and rapid and efficient signal charges An impurity concentration distribution (Patent Document 7) having a structure that can be taken out is invented.

JP 2001-345441 A JP 2011-239278 A JP 2011-250477 A Japanese Patent Laid-Open No. 9-331052 JP 2004-235621 A JP 2006-121058 A JP 2010-283232 A

  However, since the conventional surface-illuminated pixel peripheral recording type imaging device uses a photogate, the time aperture ratio is 50% as a standard as described with reference to FIGS. 13 and 14, and the sensitivity is high. It was insufficient. In addition, the devices described in Patent Documents 5, 6, and 7 relating to the backside-illuminated pixel peripheral recording type imaging element take into account the spatial aperture ratio but do not consider the temporal aperture ratio, and further sensitivity. Improvement was desired.

  The present invention has been made in view of the above-described circumstances, and a back-illuminated imaging element capable of improving sensitivity as compared with the conventional one, a drive device and an imaging apparatus including the same, and a back-illuminated imaging. It is an object to provide a method for driving an element.

The backside illumination type imaging device of the present invention has a plurality of pixel portions arranged in a two-dimensional array on one surface side of a semiconductor substrate, and a back surface on which subject light is incident from the other surface side of the semiconductor substrate An irradiation type imaging device, wherein a first DC voltage is applied, a back electrode provided on the other surface side, and a second DC voltage higher than the first DC voltage are applied, and the subject a signal charge collection unit for collecting the generated signal charges of light photoelectrically converting the first clock is applied, and the signal charges output unit for outputting pre said signal charges relaxin No. charge collection unit collects sequentially, applied second and third clock phase that Do different from each other, respectively, and first and second signal charge storage transfer unit for transferring the signal charges by the signal charge output section outputs sequentially stored to the output side, wherein the first, the second and the third click Each has a high level voltage and a low level voltage, and the high level of the first clock is lower than the high level of the second clock and higher than the second DC voltage. In the exposure period including the first period, the second period, the third period, and the fourth period that are sequentially consecutive, the first and second DC voltages are applied from the first period to the fourth period. In the first period, the high level voltage of the first clock and the low level voltage of the second and third clocks are applied. In the second period, the first and second voltages are applied. The high level of the clock and the low level voltage of the third clock are applied, and the low level of the first clock, the high level of the second and third clocks are applied in the third period. of Pressure is applied, in the fourth period, and has a configuration in which said first and said second of said low level of the clock, the voltage of the high level of the third clock is applied.

  With this configuration, in the backside illumination type imaging device of the present invention, the first DC voltage is applied to the back electrode, the second DC voltage higher than the first DC voltage is applied to the signal charge collecting unit, Is applied to the signal charge output section, a 100% time aperture ratio is obtained, and the signal charge generated over the entire period can be used. Therefore, the backside illumination type imaging device of the present invention can improve the sensitivity as compared with the conventional one.

The drive device of the present invention is a drive device for driving a back-illuminated imaging device, wherein the first DC voltage applying means for applying the first DC voltage to the back electrode, and the second DC voltage are applied. a second DC voltage applying means for applying to the signal charge collecting unit, a first clock means for applying said first clock to the signal charge output portion, a front Stories second and third clock And a second clock applying means for applying to the first and second signal charge storage / transfer sections.

  With this configuration, the drive device according to the present invention can set the time aperture ratio of the back-illuminated image sensor to 100%, and the signal charges generated over the entire period can be used. Therefore, the drive device of the present invention can improve the sensitivity as compared with the conventional one.

  An image pickup apparatus according to the present invention includes a back-illuminated image sensor, a driving device, and a signal processing circuit that processes signals from a plurality of pixel units of the back-illuminated image sensor and outputs video signals. have.

  With this configuration, the imaging apparatus according to the present invention includes the back-illuminated imaging element having a time aperture ratio of 100%, so that the sensitivity can be improved as compared with the conventional one.

The driving method of the present invention has a plurality of pixel portions arranged in a two-dimensional array on one surface side of a semiconductor substrate, and backside illumination imaging in which subject light is incident from the other surface side of the semiconductor substrate A driving method for driving an element, wherein the back-illuminated imaging device is applied with a first DC voltage, and a back electrode provided on the other surface side and a first DC voltage higher than the first DC voltage. 2 DC voltage is applied, and the signal charge collecting unit for collecting the generated signal charges photoelectrically converts the object light, the first clock is applied, before the signal charge relaxin No. charge collection unit collects and sequentially output to the signal charge output portion, respectively applied second and third clock that phase Do different from each other, the first and transferred to the output side of the signal charges by the signal charge output section outputs sequentially accumulates and a second signal charge storage transfer unit comprises, The first, second, and third clocks have high and low level voltages, respectively, and the high level of the first clock is higher than the high level of the second clock. In the exposure period including a first period, a second period, a third period, and a fourth period, which are successively lower and higher than the second DC voltage, and from the first period to the fourth period, the first period to the fourth period. 1 and the second DC voltage are applied, and during the first period, the high level voltage of the first clock, the low level voltage of the second and third clocks are applied, and the second voltage is applied. In the period, the high level voltage of the first and second clocks and the low level voltage of the third clock are applied, and in the third period, the low level of the first clock and the second level of the first clock are applied. 2 and the third The voltage of the high level of the clock is applied, in the fourth period, has a configuration for applying the first and the second of said low level of the clock, the voltage of the high level of the third clock Yes.

  With this configuration, the driving method according to the present invention can set the time aperture ratio of the back-illuminated image sensor to 100%, and the signal charges generated over the entire period can be used. Therefore, the drive device of the present invention can improve the sensitivity as compared with the conventional one.

  INDUSTRIAL APPLICABILITY The present invention can provide a backside illuminating type imaging device having an effect that sensitivity can be improved as compared with the conventional one, a driving device and an imaging device including the same, and a driving method for the backside illuminating type imaging device. Is.

It is a block block diagram of the drive device in 1st Embodiment of this invention. It is a cross-sectional schematic diagram of the backside illumination type image sensor in 1st Embodiment of this invention. It is a schematic diagram of the drive voltage waveform which the drive device in 1st Embodiment of this invention outputs. It is a cross-sectional potential schematic diagram of the backside illumination type image sensor in the first embodiment of the present invention. It is a figure which shows an example of the drive voltage of the drive device in 1st Embodiment of this invention. In the backside illumination type image sensor according to the first embodiment of the present invention, a two-dimensional potential distribution in the vicinity of the surface of almost one pixel is displayed. It is a cross-sectional schematic diagram which shows the movement of a signal charge in the backside illumination type image pick-up element in 1st Embodiment of this invention. It is a figure which shows the relationship between an image surface illumination intensity and CCD output voltage in the back surface irradiation type imaging device in 1st Embodiment of this invention, and the conventional surface irradiation type pixel periphery recording type imaging device. It is a figure which shows the output image (left) of the conventional surface irradiation type pixel periphery recording type imaging device, and the output image (right) of the backside irradiation type imaging device in 1st Embodiment. It is a block block diagram of the imaging device in 2nd Embodiment of this invention. It is a plane schematic diagram of a conventional surface irradiation type pixel peripheral recording type imaging device. It is a cross-sectional schematic diagram of a conventional surface irradiation type pixel peripheral recording type imaging device. It is a drive waveform schematic diagram of a conventional surface irradiation type pixel peripheral recording type imaging device. It is a cross-sectional potential schematic diagram of a conventional surface irradiation type pixel peripheral recording type imaging device.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
FIG. 1 is a diagram schematically showing the configuration of the driving device 10 and the configuration of the front surface side of the backside illumination type imaging device 20 in the present embodiment. The driving device 10 includes the backside illumination type imaging device 20. To drive. As will be described below, the back-illuminated image sensor 20 is a back-illuminated pixel peripheral recording image sensor.

  The driving device 10 includes a back electrode voltage applying unit 11 that applies a driving voltage φBS, a gate electrode voltage applying unit 12 that applies a driving voltage φG1, and a gate electrode voltage that applies a driving voltage φG2 to the backside illuminating image sensor 20. The application unit 13 includes an accumulation transfer voltage application unit 14 that applies the drive voltage φM, a vertical transfer voltage application unit 15 that applies the drive voltage φV, and a horizontal transfer voltage application unit 16 that applies the drive voltage φH.

  Here, the back surface electrode voltage application unit 11 and the gate electrode voltage application unit 12 constitute first and second DC voltage application units according to the present invention, respectively. The gate electrode voltage application unit 13 and the accumulated transfer voltage application unit 14 constitute first and second clock application units according to the present invention, respectively.

  The back-illuminated imaging device 20 includes charge collection gates 21 and 22, an anti-blooming gate 23, a drain 24, a merging unit 25, an overwrite gate 26, a CCD memory 27, a VCCD 28, an HCCD 29, and an amplifier 30. An area of pixel width × pixel length indicated by a dotted line in the drawing is an area of one pixel.

  FIG. 1 shows the configuration of the front surface side of the backside illuminating type imaging device 20, so the photoelectric conversion unit on the back side is not shown, but the signal charge generated in the photoelectric conversion unit is the charge collection on the front side. They gather at the gate 21 and are sent to the charge collection gate 22. The exit of the charge collection gate 22 is branched, and is divided into a path connected to the drain 24 for each pixel through the anti-blooming gate 23 and a path connected to the oblique linear CCD memory 27 for each pixel.

  The CCD memory 27 is connected to a readout VCCD (vertical transfer CCD) 28 common to one column via the junction 25. The junction 25 is connected to the drain 24 via the overwrite gate 26. The VCCD 28 is connected to an HCCD (horizontal transfer CCD) 29 common to all columns. The HCCD 29 is connected to an amplifier 30 that amplifies the signal charge and outputs it as an external signal.

  The aforementioned charge collection gates 21 and 22 constitute a signal charge collection unit and a signal charge output unit according to the present invention, respectively. The CCD memory 27 constitutes a signal charge accumulation / transfer unit according to the present invention.

  FIG. 2 is a schematic cross-sectional view along the CCD memory 27 from the charge collection gate 21 of the back-illuminated image sensor 20. Here, the gate electrode of the charge collection gate 21 shown in FIG. 1 is indicated by G1, the gate electrode of the charge collection gate 22 is indicated by G2, and the back electrode is indicated by BS. The charge collection gate electrode G1 receives the drive voltage φG1 from the gate electrode voltage application unit 12, and the charge collection gate electrode G2 receives the drive voltage φG2 from the gate electrode voltage application unit 13.

  In the CCD memory 27, the first to fourth terminals connected to the charge collection gate electrode G2 are indicated by CCD memory electrodes M1 to M4, and other illustrations are omitted. The CCD memory 27 is driven by a drive voltage φM (φM1 to 4) of a four-phase clock output from the accumulated transfer voltage applying unit 14 and having different phases. For example, drive voltages φM1, φM2, φM3, and φM4 are applied to the CCD memory electrodes M1, M2, M3, and M4, respectively. By applying the four-phase clocks φM1 to φM4, the CCD memory 27 sequentially accumulates signal charges output from the charge collection gate 22 and sequentially transfers them to the VCCD 28.

  The backside illumination type image pickup device 20 has a front surface 41 of a semiconductor substrate that is a surface side on which a plurality of pixel portions (see FIG. 1) are arranged in a two-dimensional array, and a back surface 42 on which light is incident. Here, the front surface 41 constitutes one surface according to the present invention, and the back surface 42 constitutes another surface according to the present invention.

Further, the back side illumination type image pickup device 20 has p ⁺ semiconductor layer 51 (back surface electrode BS), p ⁻ semiconductor layer 52 (photoelectric conversion unit) and n ⁻ semiconductor layer 53 (charge collecting layer) from the back surface 42 side of the semiconductor substrate. Are sequentially formed. Each of these layers is formed by an epitaxial growth method. Note that the p ⁺ semiconductor layer 51 constitutes a back electrode according to the present invention.

Further, the back-illuminated image pickup device 20 includes a p ^- semiconductor layer p-well 54, an n ⁺ semiconductor layer 55 (memory), an oxide film 56, and a wiring layer 57 sequentially formed on the upper surface of the n ⁻ semiconductor layer 53. Yes.

  The method for manufacturing the backside illuminating type image pickup device 20 described above is described in, for example, the above-mentioned Patent Document 7, and is well known, and thus the description thereof is omitted.

  Next, the waveform of the drive voltage applied by the drive device 10 will be described with reference to FIG.

  In the schematic diagram of the drive voltage waveform shown in FIG. 3, the drive voltage of the back electrode BS of the back-illuminated imaging device 20 is φBS, the drive voltage of the charge collection gate 21 is φG1, the drive voltage of the charge collection gate 22 is φG2, and the CCD Of the memory electrodes, the drive voltages of the CCD memory electrodes M1 and M2 are φM1 and φM2.

The drive device 10 applies a DC voltage (first DC voltage) having a predetermined voltage amplitude as the drive voltage φBS to the back electrode BS, and a DC voltage (second DC) higher than the drive voltage φBS as the drive voltage φG1. Voltage) is applied to the charge collection gate electrode G1. As a result, a DC bias is applied between the back surface electrode BS and the charge collection gate electrode G1, and the depletion layer is expanded, and the signal charge generated in the p ⁻ semiconductor layer 52 which is the photoelectric conversion unit is the charge collection gate electrode. Gather in G1 at high speed. The clock input to the charge collection gate electrode G2 and the CCD memory electrodes M1 and M2 as drive voltages has a high level period of ½ of one cycle and a low level period of ½ of one cycle. The phases are different from each other. With this drive voltage, the signal charges collected by the charge collection gate 21 are sequentially transferred to the VCCD 28 via the charge collection gate 22 and the CCD memory 27.

  4 is a schematic diagram of a cross-sectional potential of the back-illuminated image sensor 20, and shows driving voltages φBS, φG1, φG2, φM1, and φM2 from the period T1 to T4 in FIG. 3 in the B1-B2 cross section shown in FIG. It is a cross-sectional potential schematic diagram when is applied.

The signal charges generated in the p ⁻ semiconductor layer 52 in the period T1 are collected on the charge collection gate electrode G2 via the charge collection gate electrode G1. The signal charges generated in the p ⁻ semiconductor layer 52 in the period T2 are collected on the CCD memory electrode M1 through the charge collection gate electrodes G1 and G2. The signal charges generated in the p ⁻ semiconductor layer 52 in the periods T3 and T4 are collected in the charge collecting gate electrode G1, and the signal charges are transferred from the CCD memory electrode M1 to the CCD memory electrode M2. Therefore, since the back-illuminated imaging element 20 can use signal charges generated during the entire period, the time aperture ratio of the photoelectric conversion unit is 100%.

  FIG. 5 is a diagram illustrating an example of the drive voltages φBS, φG1, φG2, φM1, and φM2. That is, the drive voltage φBS is a −5V DC voltage, and the drive voltage φG1 is a 4V DC voltage. The drive voltage φG2 is a clock with VL (low level) = − 3 V, VH (high level) = 8 V, and a duty ratio of 50%. The drive voltages φM1 and φM2 are clocks with VL = −3V, VH = 12V and a duty ratio of 50%. The phase of the drive voltage φM1 is delayed by a quarter cycle from the drive voltage φG2, and the phase of the drive voltage φM2 is delayed by a quarter cycle from the drive voltage φM1.

  In FIG. 5, a negative DC voltage is exemplified as the driving voltage φBS and a positive DC voltage is exemplified as the driving voltage φG1, but the present invention is not limited to this, and the driving voltage φBS <the driving voltage φG1 is satisfied. For example, both may be positive DC voltages. Although not shown in FIG. 5, the drive voltages φM3 and φM4 are the same drive voltages as the drive voltages φM1 and φM2, and the phase of the drive voltage φM3 is delayed by a quarter cycle from the drive voltage φM2, and the drive voltage The phase of φM4 is delayed by a quarter cycle from the drive voltage φM3.

  Next, the result of performing a three-dimensional charge transfer simulation of the pixel portion of the backside illumination type image pickup device 20 will be described with reference to FIG.

  FIG. 6 is a diagram showing a two-dimensional potential distribution in the vicinity of the surface of one pixel, based on the result of calculating the three-dimensional potential distribution of one pixel. The size of one pixel is 46.8 μm □. In the figure, white circles indicate signal charge generation positions, and black circles indicate signal charge destinations. There are six signal charge generation positions as shown in the figure. The signal charge was generated at a position of 29.5 μm thickness, and the signal charge was moved to a position of 0 μm thickness. The travel time was 10 nanoseconds or less.

According to the result of the three-dimensional charge transfer simulation, the back side illumination type imaging device 20 has a back surface side even if the size of one pixel is as large as 46.8 μm □ in the planar structure of the pixel portion as shown in FIG. The signal charges generated in step 1 can be collected on the charge collecting gate electrode G1 at high speed. When schematically represented by a cross-sectional view of the back-illuminated image sensor 20, the signal charge moves as shown in FIG. That is, light incident from the back surface 42 is photoelectrically converted by the p ⁻ semiconductor layer 52 to become signal charges, and the generated signal charges are collected at high speed under the charge collection gate electrode G1 through a path as shown.

  FIG. 8 shows the relationship between the image plane illuminance and the CCD output voltage in the conventional front-illuminated pixel peripheral recording image sensor and the back-illuminated image sensor 20 in the present embodiment. The image plane illuminance that can obtain the same CCD output voltage is 1/13 of that of the conventional back-illuminated image sensor 20 compared to the conventional front-illuminated type. That is, the sensitivity improvement of the back-illuminated image sensor 20 is 13 times that of the conventional front-illuminated type.

  FIG. 9 shows an output image (left) of a conventional front-illuminated pixel peripheral recording image sensor under the same imaging condition and an output image (right) of the back-illuminated image sensor 20 in the present embodiment. The output image of the conventional surface irradiation type pixel peripheral recording type imaging device has a spatial aperture ratio of 16% and a temporal aperture ratio of 50%. The output image of the back-illuminated image sensor 20 has a spatial aperture ratio of 100% and a temporal aperture ratio of 100%.

  As described above, the back-illuminated image sensor 20 driven by the driving device 10 has a spatial aperture ratio and a temporal aperture ratio that are higher than those of the conventional front-illuminated type. Since the sensitivity is not doubled, it can be said that in addition to the improvement of the spatial aperture ratio and the temporal aperture ratio, the utilization factor of light is also improved. That is, the back-illuminated imaging element 20 driven by the driving device 10 is improved in sensitivity by combining the three items of the spatial aperture ratio, the temporal aperture ratio, and the light utilization ratio. It is 13 times as large as the element, and it can be visually recognized that the image is brighter than before.

  As described above, the driving device 10 according to the present embodiment includes the gate electrode voltage application unit 12 that applies the drive voltage φG1 of the first DC voltage to the charge collection gate electrode G1, and the second voltage lower than the first DC voltage. The back electrode voltage application unit 11 that applies the DC drive voltage φBS to the back electrode BS and the gate electrode voltage application unit 13 that applies the first clock drive voltage φG2 to the charge collection gate electrode G2 are mutually in phase. The storage transfer voltage application unit 14 that applies the driving voltage φM of the second clocks of different multiple phases is provided. Therefore, the spatial aperture ratio, the temporal aperture ratio, and the light utilization ratio of the back side illumination type image pickup device 20 The sensitivity can be improved by combining the three items.

(Second Embodiment)
As shown in FIG. 10, the imaging device 60 in the present embodiment performs processing of the driving device 10 and the back-illuminated imaging device 20 shown in FIG. 1, a lens 61 that collects and collects subject light, and analog signals. An analog signal processing unit 62, an AD conversion unit 63 that converts an analog signal into a digital signal (hereinafter referred to as “AD conversion”), a digital signal processing unit 64 that processes a digital signal, and a video signal memory 65 that stores a video signal A video signal output unit 66 for outputting a video signal, and a display unit 67 for displaying a video.

  Note that the configurations of the driving device 10 and the back-illuminated image sensor 20 have been described in the first embodiment, and will be omitted. In addition, the analog signal processing unit 62 and the digital signal processing unit 64 constitute a signal processing circuit according to the present invention. Although not shown, the imaging device 60 includes a control unit including a CPU, a ROM, a RAM, and the like, and the control unit controls the entire device based on a program stored in the ROM. ing.

  As described in the first embodiment, the gate electrode voltage application unit 12 applies the first DC voltage drive voltage φG1 to the charge collection gate electrode G1, and the back electrode voltage application unit 11 A drive voltage φBS of a second DC voltage lower than the first DC voltage is applied to the back electrode BS, and the gate electrode voltage application unit 13 applies the drive voltage φG2 of the first clock to the charge collection gate electrode G2. The accumulation transfer voltage application unit 14 drives the backside illumination type imaging device 20 by applying the drive voltage φM of the four-phase second clock having different phases. As a result, the signal charge of the optical signal that has passed through the lens 61 and entered the charge collection gate 21 is sequentially accumulated in the CCD memory 27.

  Thereafter, the driving device 10 drives to read out the signal charges accumulated in the CCD memory 27. That is, the driving device 10 applies the driving voltage φM of the readout clock to the CCD memory 27, applies the driving voltage φV to the VCCD 28, and applies the driving voltage φH to the HCCD 29. As a result, the signal charge accumulated in the CCD memory 27 is output to the analog signal processing unit 62 via the amplifier 30.

  The analog signal processing unit 62 performs analog signal processing such as automatic gain adjustment and correlated double sampling processing on the analog signal output from the back-illuminated imaging device 20 and outputs the analog signal to the AD conversion unit 63.

  The AD conversion unit 63 converts the analog signal applied by the analog signal processing unit 62 into a digital signal and outputs the digital signal to the digital signal processing unit 64.

  The digital signal processing unit 64 performs digital signal processing such as rearrangement corresponding to frames at the time of shooting, interpolation processing, white balance correction, RGB / YC conversion processing, and the like on the video signal obtained from the AD conversion unit 63. To the video signal memory 65.

  The video signal memory 65 receives and stores a digital video signal from the digital signal processing unit 64. The video signal memory 65 can store a video signal of about several thousand frames, for example.

  The video signal output unit 66 converts the video signal from the video signal memory 65 into, for example, an HD-SDI (High Definition-Serial Digital Interface) standard video signal, and sends it to the display unit 67 and an external device (not shown) at a predetermined rate. To output. For example, in the case of a normal television rate, the video signal output unit 66 outputs a video signal at 30 frames / second.

  The display unit 67 is configured by a liquid crystal display, for example, and displays an image based on the video signal output from the video signal output unit 66.

  As described above, the imaging device 60 according to the present embodiment includes the driving device 10, so that the sensitivity of the three items of the spatial aperture ratio, the temporal aperture ratio, and the light utilization rate in the backside illumination type image sensor 20 is combined. Improvements can be made.

  As described above, the back-illuminated image sensor according to the present invention, the driving apparatus and the imaging device including the back-illuminated image sensor, and the driving method of the back-illuminated image sensor can improve the sensitivity compared to the conventional one. And a back-illuminated image pickup device used for high-speed imaging, a driving device and an image pickup apparatus including the same, and a driving method of the back-illuminated image pickup device.

DESCRIPTION OF SYMBOLS 10 Drive apparatus 11 Back surface electrode voltage application part (1st DC voltage application means)
12 Gate electrode voltage application section (second DC voltage application means)
13 Gate electrode voltage application section (first clock application means)
14 Accumulation transfer voltage application unit (second clock application means)
DESCRIPTION OF SYMBOLS 15 Vertical transfer voltage application part 16 Horizontal transfer voltage application part 20 Back surface irradiation type image pick-up element 21 Charge collection gate (signal charge collection part)
22 Charge collection gate (signal charge output part)
27 CCD memory (signal charge storage and transfer unit)
41 Surface (one surface)
42 Back side (other side)
51 p ⁺ semiconductor layer (back electrode)
52 p ^- semiconductor layer 53 n ^- semiconductor layer 54 p-well 55 n ⁺ semiconductor layer 56 oxide film 57 wiring layer 60 imaging device 61 lens 62 analog signal processing unit (signal processing circuit)
63 AD converter 64 Digital signal processor (signal processing circuit)
65 Video signal memory 66 Video signal output unit 67 Display unit

Claims (4)

A backside-illuminated imaging device that has a plurality of pixel portions arranged in a two-dimensional array on one surface side of a semiconductor substrate, and injects subject light from the other surface side of the semiconductor substrate,
A back electrode provided on the other surface side to which the first DC voltage is applied;
A signal charge collecting unit that collects signal charges generated by photoelectrically converting the subject light to which a second DC voltage higher than the first DC voltage is applied;
Is applied first clock, and a signal charge output unit for sequentially outputting before the signal charges relaxin No. charge collection unit collects,
Applied second and third clock phase that Do different from each other, respectively, and first and second signal charge storage transfer unit for transferring the signal charges by the signal charge output section outputs sequentially stored to the output side,
Equipped with a,
The first, second, and third clocks have high and low level voltages, respectively.
The high level of the first clock is lower than the high level of the second clock and higher than the second DC voltage;
In an exposure period including a first period, a second period, a third period, and a fourth period that are sequentially consecutive,
From the first period to the fourth period, the first and second DC voltages are applied,
In the first period, the high level voltage of the first clock, the low level voltage of the second and third clocks are applied,
In the second period, the high level voltage of the first and second clocks and the low level voltage of the third clock are applied,
In the third period, the low level voltage of the first clock, the high level voltage of the second and third clocks are applied,
In the fourth period, the low-level voltage of the first and second clocks and the high-level voltage of the third clock are applied . A drive device for driving the backside illuminated image sensor according to claim 1,
First DC voltage applying means for applying the first DC voltage to the back electrode;
Second DC voltage applying means for applying the second DC voltage to the signal charge collecting unit;
First clock applying means for applying the first clock to the signal charge output unit;
A second clock means for applying pre-Symbol second and the third clock to each said first and said second signal charge storage transfer unit,
A drive device comprising: A back-illuminated imaging device according to claim 1;
A drive device according to claim 2;
A signal processing circuit that processes a signal from a plurality of pixel portions of the back-side illuminated image sensor and outputs a video signal;
An imaging apparatus comprising: A driving method for driving a back-illuminated imaging device that has a plurality of pixel portions arranged in a two-dimensional array on one surface side of a semiconductor substrate and injects subject light from the other surface side of the semiconductor substrate. There,
The back-illuminated image sensor is
A back electrode provided on the other surface side to which the first DC voltage is applied;
A signal charge collecting unit that collects signal charges generated by photoelectrically converting the subject light to which a second DC voltage higher than the first DC voltage is applied;
Is applied first clock, and a signal charge output unit for sequentially outputting before the signal charges relaxin No. charge collection unit collects,
Applied second and third clock phase that Do different from each other, respectively, and first and second signal charge storage transfer unit for transferring the signal charges by the signal charge output section outputs sequentially stored to the output side,
With
The first, second, and third clocks have high and low level voltages, respectively.
The high level of the first clock is lower than the high level of the second clock and higher than the second DC voltage;
In an exposure period including a first period, a second period, a third period, and a fourth period that are sequentially consecutive,
From the first period to the fourth period, the first and second DC voltages are applied,
In the first period, the high level voltage of the first clock, the low level voltage of the second and third clocks are applied,
In the second period, the high level voltage of the first and second clocks and the low level voltage of the third clock are applied,
In the third period, the low level of the first clock, the high level voltage of the second and third clocks are applied,
In the fourth period, the low level voltages of the first and second clocks and the high level voltage of the third clock are applied .