JP5874481B2 - Formation method of through electrode - Google Patents

Description

  The present invention relates to a connection technique of a semiconductor device, and more particularly to a method of forming a through electrode for connecting between stacked semiconductor chips.

  Up to now, the degree of integration of semiconductor integrated circuits has been improved exponentially. In particular, the miniaturization of element dimensions proceeds according to the scaling rule, and the 65 nm process rule has been established and put into practical use until now, and development of a further miniaturized 32 nm process rule is now underway. However, these miniaturizations are almost approaching the limit, and two-dimensionally stacking a plurality of chips vertically to improve the in-plane integration of semiconductor chips (hereinafter simply referred to as chips) 3 Moving to dimension implementation. For example, system-in-package is the mainstream of chips used in mobile phones. Also, flash memory with stacked chips has been released from overseas. Thus, products to which the three-dimensional technology is applied tend to be further expanded.

  In the three-dimensional mounting, a stacking technique for stacking chips and a connection technique for electrically connecting the chips are required. One of the chip-to-chip connection technologies is to form through electrodes that penetrate from the surface of a semiconductor substrate (hereinafter simply referred to as a substrate) on which functional elements are formed, to the back of the substrate, and connect the chips via the through electrodes. How to do is known. As a method of forming the through electrode, first, a concave hole is formed in the thickness direction from the surface of the substrate, an insulating film is formed on the inner wall of the hole, and then an antioxidant film is formed, and a metal material is embedded therein to embed the substrate. A method of forming a through electrode therein is generally performed. After that, the substrate is scraped from the back surface of the substrate to expose the through electrode, and the exposed through electrode portion is, for example, solder connected to a connection pad formed on the connection partner substrate.

JP 2005-167093 A

    As described above, a method of forming a through electrode penetrating the front and back surfaces of a substrate and connecting chips via the through electrode is known as one of the techniques in three-dimensional mounting. In the formation of the through electrode, after forming the through electrode covered with an insulating film or the like in the thickness direction of the substrate, the substrate (for example, silicon) is exposed from the back surface of the substrate by dry etching, and then the electrical connection is made. For this purpose, the insulating film on the end surface of the through electrode is removed to expose the electrode material (for example, Cu). At this time, the metal of the electrode material may be scattered on the substrate, and the scattered metal may diffuse into the substrate and impair the performance of the element.

  This is because, in the exposure of the electrode material, an insulating resin solution serving as a protective film is applied to the entire back surface of the substrate including the protruding through electrodes, and dry etching is performed. This is because the protective film in the region (referred to as the electrode vicinity region) in the vicinity of the electrode dense region (referred to as the electrode vicinity region) is thin, so that the protective film is shaved during dry etching to expose the substrate. The reason why the protective film in the vicinity of the electrode is thin is that when the resin liquid of the protective film is applied to the substrate, the law of minimizing the surface energy of the resin liquid (that is, surface tension) and the mobility of the resin liquid (that is, This is because it is considered that the resin liquid in the electrode dense region aggregates and the film thickness increases, but the resin liquid in the electrode vicinity region is supplied thereto. When dry etching is performed in a state where the protective film in the vicinity of the electrode is thinned, the vicinity of the electrode is exposed together with the upper surface of the through electrode as the protective film is etched (the protective film on the upper surface of the through electrode is not penetrated). Since the electrode protrudes, it is thin to move downward along the side surface of the through electrode due to its own weight. That is, the insulating film is exposed on the upper surface of the through electrode, and the substrate material (for example, silicon) is exposed in the vicinity of the electrode. When the etching progresses further and the insulating film on the upper surface of the through electrode is scraped and the electrode material is exposed, the metal of the electrode material is scattered from the electrode material struck by ions onto the exposed substrate. To spread. For example, when the electrode material is Cu, Cu diffuses into the silicon of the substrate.

  In view of the above problems, an object of the present invention is to provide a through electrode forming method in which metal diffusion from an electrode material does not occur in a substrate by suppressing the thinning of a protective film in a region near the electrode. .

  According to one aspect of the invention, a through-electrode exposing step of etching a substrate from the back side of the substrate on which a semiconductor element is formed and exposing a part of the through-electrode covered with an insulating film formed in the substrate from the substrate; A first film forming step of forming a first film on the surface of the through electrode formed, a protective film forming step of forming a protective film on the surface of the substrate and the first film, and using the protective film as a mask It is possible to provide a method of forming a through electrode having an electrode material exposing step of performing etching so as to expose the end portion of the through electrode, removing the insulating film, and exposing the electrode material of the through electrode.

  According to the disclosed method for forming a through electrode, the thickness of the etching protective film on the substrate is made substantially the same in the region near the electrode and the region outside the region near the electrode, and the substrate is damaged during etching of the end of the through electrode. Can be prevented.

It is a figure which shows the example of spreading | diffusion of the electrode material in penetration electrode formation. It is a figure which shows the example (Example 1- 1) of the formation method of a penetration electrode. It is a figure which shows the example (Example 1- 2) of the formation method of a penetration electrode. It is a figure which shows the formation method example (Example 1-the 3) of a penetration electrode. It is a figure which shows the formation method example (Example 1-the 4) of a penetration electrode. It is a figure which shows the example (Example 2-1) of the formation method of a penetration electrode. It is a figure which shows the example (Example 2-2) of the formation method of a penetration electrode. It is a figure which shows the formation method example (Example 3-1) of a penetration electrode. It is a figure which shows the example (Example 3-2) of the formation method of a penetration electrode. It is a figure which shows the formation method example (Example 4-1) of a penetration electrode. It is a figure which shows the formation method example (Example 4-2) of a penetration electrode. It is a figure which shows the example of a contact angle with respect to the film A and the film B of a protective film.

  In order to facilitate understanding of the present invention, an example of diffusion of electrode material metal into a substrate in forming a through electrode will be described with reference to FIG.

FIG. 1 is a diagram showing a process flow from attaching a substrate to a support substrate and exposing an electrode material of the through electrode in the substrate on which the through electrode is formed. FIG. 1A shows a state in which a substrate 10 having a transistor layer 20 and a multilayer wiring layer 30 formed on the surface of a silicon substrate 10 is attached to a support substrate 60 with the back surface of the substrate 10 facing upward. Yes. The transistor layer 20 is a layer in which functional elements such as transistors are formed, and the multilayer wiring layer 30 is a layer in which wiring for connecting these functional elements is formed. Since the surface of the layer on which these are formed is attached to the support substrate 60, the upper surface in FIG. 1A is the back surface of the substrate 10. A through electrode 50 is formed on the substrate 10 in the thickness direction of the substrate from the surface. The through electrode 50 has a diffusion prevention film 52 formed on the surface of the electrode material 53, and further an insulating film 51 is formed thereon. Has been. (Conversely speaking, the insulating film 51 and the diffusion prevention film 52 are formed on the inner wall of the hole formed in the substrate 10, and the electrode material 53 is embedded therein). Here, the “front surface” of the substrate 10 refers to the surface on which the transistor layer 20 and the multilayer wiring layer 30 are formed, and the surface of the substrate 10 opposite to this surface is referred to as the “back surface”.
In the state of FIG. 1A, dry etching is performed from the upper side of the drawing, whereby the substrate 10 is selectively scraped to expose the through electrode 50 (see FIG. 1B), and then a resin liquid that becomes a protective film (Here, since the protective film is formed by applying a resin solution, the resin solution may also be referred to as a coating-type resin solution.) Apply with a spin coater or the like, and dry the applied coating-type resin solution. A protective film 80 is formed (see FIG. 1C). As shown in FIG. 1C, the thickness of the protective film 80 in the region D of the substrate on which the through electrode 50 is formed (the above-described electrode dense region) is thick due to the surface tension and viscosity of the coating resin liquid. The film thickness of the protective film 80 in the substrate region B near the region (the above-mentioned electrode vicinity region) and the region C on the upper end face of the through electrode 50 is thin. The film thickness of the protective film 80 in the region A on the substrate surface away from the region D is thinner than the region D and thicker than the region B. The reason why the protective film 80 in the area B is thin is considered to be that the resin liquid in the area B is attracted when the resin liquid aggregates due to surface tension in the area D.

  Dry etching is performed on the entire surface in a state where the protective film 80 of FIG. As the etching progresses, the protective film 80 is scraped, and the silicon in the region B on the substrate surface and the insulating film 51 in the region C above the through electrode 50 are exposed. By further progress of the dry etching, the insulating film 51 in the region C is removed, the diffusion preventing film 52 is subsequently removed, and the electrode material 53 (Cu here) is exposed. Here, Cu of the electrode material 53 is hit by dry etching ions, and Cu particles are scattered on the silicon exposed in the region B (see FIG. 1D). The scattered Cu diffuses into the silicon and adversely affects the characteristics of the functional element.

  In the present invention, in order to prevent diffusion of the electrode metal into the substrate, the thickness of the protective film 80 in the electrode vicinity region (region B) in FIG. That is, a uniform film thickness).

Embodiments of the present invention will be described below in detail with reference to the drawings. In the embodiment, MOS transistors are formed as functional elements, but they may be devices such as memory devices and MEMS (Micro Electro Mechanical Systems). Further, although a silicon substrate is used as the substrate, a compound semiconductor substrate such as GaAs, a printed circuit board, or the like may be used. In this example, the protective film is formed in a state where the surface of the substrate and the through electrode is applied. The film applied to the surface of the substrate is “film A”, and the film applied to the surface of the through electrode is “film B”. ".
Example 1
A through electrode forming method will be described with reference to FIGS. Here, silicon is used as the material of the substrate 10, and Cu is used as the electrode material of the through electrode.

  In FIG. 2A, first, the transistor layer 20 is formed on the substrate 10. Therefore, after forming an insulating film on the surface of the substrate 10, the gate insulating film 21 is formed using photolithography. Subsequently, a gate electrode 22 is similarly formed on the gate insulating film 21 using polycrystalline silicon or the like, and then a source / drain region 23 is formed by ion implantation of a conductive impurity in a predetermined region of the substrate 10. To do. Thus, a MOS transistor which is a functional element is formed. After the functional elements are formed, an interlayer insulating film 24 is formed on the substrate 10, and connection plugs 25 electrically connected to the source / drain regions 23 are formed in the interlayer insulating film 24 by electrolytic plating. Thus, the transistor layer 20 is formed.

  Next, as shown in FIG. 2B, holes for forming through electrodes are formed in the thickness direction of the substrate 10 from above the transistor layer 10. For this purpose, a resist is applied on the transistor layer 20 to form a resist film 70 having a thickness of about 10 μm, and an opening pattern 71 of, for example, 10 μm is formed at a position where the through electrode is formed. Using the resist film 70 as a mask, the interlayer insulating layer 24 exposed by the opening pattern 71 and the substrate 10 are dry-etched to form the holes 11. The dry etching conditions used here are a mixed gas of SF6 gas and C4F8 gas, a gas pressure of 0.1 Torr, and an applied power of 1000 W. Under this condition, the etching rate for silicon is 10 μm / min. Etching is stopped for time control, and a hole 11 having a depth of 100 μm is formed.

Subsequently, as shown in FIG. 2C, the hole 11 formed in the silicon substrate 10 is filled with the metal of the electrode material to form the through electrode 50. Specifically, first, the resist film 70 of FIG. 2B is exposed to an O ₂ plasma atmosphere, and the resist film 70 is removed. At this time, the O ₂ gas pressure is 1 Torr, the applied power is 500 W, and exposure is performed in plasma until the resist film 70 can be sufficiently removed. Subsequently, a TEOS (Tetraethyl Orthosilicate) film having a thickness of 1 μm is formed as an insulating film 51 on the surface of the transistor layer 10 and the inner wall of the hole 11 by a CVD (Chemical Vapor Deposition) method, and then a thickness of 100 nm is formed by a sputtering method. The Ti film is formed as the diffusion prevention film 52. The diffusion prevention film 52 is provided in order to suppress the diffusion of the metal of the electrode material 53 into the substrate and to improve the adhesion between the insulating film 51 and the electrode material 53. Further, a Cu film having a thickness of 100 nm for electrodeposition of the electrode material 53 is formed. Finally, the hole 11 is filled with Cu by the electrolytic plating method, and the electrode material 53 is formed. After the electrode material 53 is formed, excess Cu, Ti, and TEOS are removed by, for example, CMP (Chemical Mechanical Polishing), and the surface of the transistor layer 20 is exposed. Thus, the through electrode 50 is formed in the substrate 10.

  Next, as illustrated in FIG. 3D, the multilayer wiring layer 30 is formed on the transistor layer 20 including the through electrode 50. The wiring electrically connects between the functional elements or between the functional elements and the through electrode 50. The multilayer wiring layer 30 is formed by first forming an interlayer insulating film 31 on the transistor layer 20 exposed in FIG. A wiring 32 connected to the connection plug 25 drawn out from the functional element and a pad 33 connected to the through electrode 50 are formed on the interlayer insulating film 31 by dry etching and electrolytic plating using a resist mask. A layer 30 a composed of the interlayer insulating film 31, the wiring 32 and the pad 33 is formed. An interlayer insulating film 34 is formed again on the layer 30a, and a connection plug 26 is formed on the interlayer insulating film 34 by the same method to form the layer 30b. Further, an interlayer insulating film 35 is formed on the layer 30b, and wirings 36 and pads 37 are formed to form a layer 30c. That is, the multilayer wiring layer 30 includes three layers, that is, a layer 30a, a layer 30b, and a layer 30c. Although the multilayer wiring layer 30 has a three-layer structure here, the above process may be repeated as necessary to form four or more layers.

  Subsequently, as shown in FIG. 3E, bump balls are formed and attached to a support substrate in order to connect to another substrate (chip). The bump ball 38 is formed by applying a resist on the layer 30 c and performing dry etching and electrolytic plating using the resist film 41 having an opening pattern as a mask to form the bump ball 38 on the pad 37 connected to the through electrode 50. . Further, a temporary adhesive 42 is applied and attached to the support substrate 60 so as to cover the bump balls 38. Here, the resist film 41, the temporary adhesive 42 and the support substrate 60 are combined to form the support layer 40.

  From here, the process proceeds to a backside process in which the back surface of the substrate 10 is processed. FIG. 4F shows a state where the substrate 10 is scraped from above with the support layer 40 facing down and the back surface of the substrate 10 facing up to expose the through electrodes 50 (functional elements and multilayers in the transistor layer 20). The bump balls 38 in the wiring layer 30 are omitted from the drawing). The substrate 10 is thinned to about 150 μm by grinding and then thinned to about 90 μm by dry etching. Accordingly, the through electrode 50 protrudes from the back surface of the substrate 10 by about 10 μm. In this dry etching, for example, a mixed gas of SF6 gas and C4F8 gas is used, the gas pressure is 0.1 Torr, the applied power is 1000 W, and silicon is etched at an etching rate of about 10 um / min.

  Next, as shown in FIG. 4G, a coating B100 is formed only on the surface of the through electrode 50 protruding from the substrate 10. Specifically, a photosensitive polyimide resin to be the coating B100 is applied to the entire surface of the substrate 10 and temporarily cured at 120 ° C. Thereafter, only the surface of the penetrating electrode 50 protruding by photolithography is left, and the polyimide resin in other regions is removed to expose the surface of the substrate 10. Thereby, the coating B100 is formed on the surface of the through electrode 50.

After forming the coating B100, the protective film 110 is formed. In FIG. 5 (h), an aromatic hydrocarbon-based polymer resin to be the protective film 110 is applied by spin coating, heated at 120 ° C. for 5 minutes and temporarily cured, and then at 250 ° C. in N _2. A state in which the protective film 110 is formed by performing the main curing process for a time is shown. FIG. 5H shows regions A ′ to D ′ on the substrate 10 of the formed protective film 110. These regions A ′ to D ′ are shown corresponding to the regions A to D of the protective film 80 shown in FIG. 1C, and the protective film 80 in the region near the electrode in the region B of FIG. The thinning phenomenon that becomes thinner than the region A is slightly thinner than the region A ′ in the protective film 110 in the vicinity of the electrode in the region B ′ in FIG. That is, thinning of the protective film 120 in the electrode vicinity region (region B ′) in the vicinity of the electrode dense region (region D ′) of the through electrode 50 is suppressed, and the thickness of the other substrate region (region A ′) is reduced. The film thickness is slightly thinner.

  Here, the contact angle representing the wettability of the protective film 110 with respect to the substrate 10 is 68 ° in the state of the resin liquid, and the contact angle of the protective film 110 with respect to the coating B100 is 72 °. That is, the wettability of the protective film 110 is worse in the film B100 than in the substrate 10. A coating B100 is formed on the surface of the penetrating electrode 50, and the coating B100 repels the resin liquid in the electrode dense region and reduces the degree of aggregation. For this reason, the phenomenon of attracting the resin liquid in the vicinity of the electrode is suppressed. As shown in region B ′ of FIG. 5 (i) and region B of FIG. 1 (c), the wettability of the protective film to the substrate surface and the wettability of the protective film to the surface of the through electrode are appropriately controlled. By doing so, it was confirmed that thinning of the protective film in the region near the electrode was suppressed.

With the protective film 110 formed, Cu that is the electrode material 53 of the through electrode 50 is exposed by dry etching (see FIG. 5I). Conditions of the dry etching at this time, using a mixed gas of CF4 and _{O 2,} 0.1 Torr gas pressure, the applied power and 1000W, Cu electrode material 53 is etched to expose. That is, the protective film 110, the coating B100, the TEOS insulating film 51, and the Ti diffusion preventing film 52 formed on the upper surface of the through electrode 50 are sequentially removed by etching. At this time, even if Cu of the through electrode 50 is exposed, the state in which the protective film 110 is formed on the surface of the substrate 10 is maintained. Is not diffused. For this reason, the influence of Cu diffusion on the functional elements was not observed, and it was confirmed that a highly reliable semiconductor device could be produced.
(Example 2)
In Example 1, the coating B was formed on the surface of the through electrode, and the protective film was formed on the substrate surface without forming the coating. Example 2 is an example in which a protective film is formed after a film is formed on the substrate surface in addition to the through electrode. Since FIG. 2A to FIG. 3E of the first embodiment are the same, the subsequent processes will be described. That is, the backside process for the back surface of the substrate 10 will be described.

  FIG. 6A shows a process of exposing the through electrode 50 from the back surface of the substrate 10 in the first backside process. That is, silicon is thinned from the back surface of the substrate 10 by grinding and dry etching, and the through electrode 50 is exposed. This state is the same as in FIG.

Subsequently, as shown in FIG. 6B, a film A120 is formed. Specifically, 1,3-diphenyl-1,1,3,3-tetramethyldisilazane is applied on the thinly-cut substrate 10 with a spin coater, and heated at 110 ° C. for 1 minute to form a film. A120 is formed. At this time, before the formation of the coating A120, in order to improve the adhesion between the coating A120 and silicon, a chemical treatment such as hydrofluoric acid or a plasma treatment such as O ₂ may be performed on the surface of the substrate 10.

  Next, as illustrated in FIG. 6C, a coating B <b> 130 is formed only on the surface of the through electrode 50 protruding from the substrate 10. For this purpose, first, a photosensitive polyimide resin to be the coating B130 is applied to the entire surface of the substrate 10 on which the coating A120 is formed, and is temporarily cured at 120 ° C. Thereafter, only the surface of the through electrode 50 protruding by photolithography is left, and the polyimide resin in other regions is removed to expose the coating A120. Thus, the coating B130 is formed on the surface of the through electrode 50.

After forming the coating A120 and the coating B130, the protective film 140 is formed. In FIG. 7D, an aromatic hydrocarbon-based polymer resin to be the protective film 140 is applied by spin coating, heated at 120 ° C. for 5 minutes and temporarily cured, and then at 250 ° C. in N _2. A state in which the protective film 140 is formed by performing the main curing process for a time is shown. FIG. 7D shows regions A ″ to D ″ on the substrate 10 of the formed protective film 140. These areas A ″ to D ″ are shown corresponding to the respective areas shown in FIG. 1C or FIG. In the second embodiment, the protective film 140 in the electrode vicinity region B ″ has the same thickness as the region A ″, which indicates that the thinning is further suppressed as compared with the first embodiment.

The contact angle at which the protective film 140 used in Example 2 represents wettability with respect to the coating A120 is 43 ° in the state of the resin liquid, and the contact angle of the protective film 140 with respect to the coating B130 is 86 °. That is, in Example 2, the wettability of the coating B130 is worse than the wettability of the protective film 140 with respect to the coating A120, and the resin liquid of the protective film 140 in the electrode dense region is not on the surface of the through electrode. It is repelled by the coating B130 and is less likely to agglomerate. For this reason, the phenomenon of attracting the resin liquid in the protective film 140 in the electrode vicinity region is suppressed, and the thinning of the protective film 140 in the electrode vicinity region is further suppressed.
(Example 3)
In Example 2, in the formation of the coating A, 1,3-diphenyl-1,1,3,3-tetramethyldisilazane was applied with a spin coater and heated to form an organic insulating coating. In Example 3, the coating A is an inorganic insulating coating. Here, the backside process for the back surface of the substrate 10 will be described.

  FIG. 8A is the same as FIG. 4F or FIG.

  Subsequently, as shown in FIG. 8B, an SiOC film is formed on the thinned silicon substrate 10 by the CVD method. This SiOC film is a film A150 as an inorganic insulating film. Here, the thickness of the SiOC film is about 100 nm.

  Next, as shown in FIG. 8C, a photosensitive epoxy resin as a coating B160 is applied over the entire surface of the substrate from the top of the SiOC film, as in Example 2, and pre-cured at 120.degree. Thereafter, the epoxy resin in a region other than the protruding through electrode 50 protruding by photolithography is removed, and the coating A150 that is a SiOC film is exposed.

Thereafter, as shown in FIG. 9D, a protective film 170 is formed. Here, an organic silicone-based polymer resin is applied as a protective film 170 by a spin coater, heated at 120 ° C. for 5 minutes to be temporarily cured, and then fully cured at 250 ° C. for 1 hour in an N ₂ atmosphere. The protective film 170 is formed.

  The exposure of Cu as the electrode material of the through electrode 50 after the formation of the protective film 170 is the same as that described with reference to FIG. 5I (FIG. 9E).

Also in Example 3, the influence of Cu diffusion on the functional element was not observed, and a highly reliable semiconductor device was confirmed.
Example 4
In Example 2 and Example 3, the film B was formed after the film A was formed, and then the protective film was formed. On the other hand, in Example 4, the coating film B is formed first, then the coating film A is formed, and then the protective film is formed. The coating B is an organic insulating coating as in Example 2. Here again, the backside process for the back surface of the substrate 10 will be described.

  FIG. 10A shows a state in which the through electrode 50 is exposed from the back surface of the substrate 10 in the first process of the backside process as in the third embodiment.

  Subsequently, as shown in FIG. 10B, a photosensitive phenol resin to be a coating B180 is applied to the entire surface of the thinned silicon substrate 10 and temporarily cured at 120 ° C. Thereafter, the photosensitive phenol resin in the region other than the protruding through electrode 50 protruding by photolithography is removed, and the silicon substrate 10 is exposed. This phenol resin film is the coating B180.

  Next, as shown in FIG. 10C, a coating A190 is formed. Therefore, hexyltriethoxysilane is applied from above the substrate 10 using a spin coater, and heated at 110 ° C. for 1 minute to form a coating A190. The coating A190 with hexyltriethoxysilane has a feature of preferentially bonding to the silicon surface, and is not formed on the coating B180, but can be selectively formed only on the surface of the exposed silicon substrate 10. It is.

Thereafter, as shown in FIG. 11D, a protective film 200 is formed. Here, an aliphatic hydrocarbon-based polymer resin is applied as a protective film 200 by a spin coater, and is temporarily cured by heating at 120 ° C. for 5 minutes. Thereafter, a main curing process is performed at 250 ° C. for 1 hour in an N ₂ atmosphere.

  The exposure of Cu, which is the electrode material 53 of the through electrode 50 after the formation of the protective film 200, is the same as that described in FIG. 6I (FIG. 11E).

  Also in Example 4, the influence of Cu diffusion on the functional element was not observed, and a highly reliable semiconductor device was confirmed.

  As described above, in any of Examples 1 to 4, it was confirmed that thinning of the protective film in the vicinity of the electrode was suppressed and the influence of Cu diffusion was not observed. Here, examples of contact angles of the protective films A and B of the protective film shown in each example are collectively shown in FIG. 12 (in Example 1, since the coating A is not formed, the contact angle with respect to the substrate surface) Becomes). The contact angle shown in FIG. 12 is the measurement result, and the values in the figure indicate the contact angles in the state of the resin liquid containing the solvent that is the precursor of each film, and the values in parentheses in the figure are the precursors. It shows the value for a resin liquid which is cured after being applied and then liquefied due to a decrease in viscosity by heating and melting. In either case, the contact angle with respect to the coating A is smaller than the contact angle with respect to the coating B (that is, the wettability of the coating B is worse).

  The present invention aims to suppress the aggregation of the insulating resin in the region where the protrusion shape is dense by controlling the wettability of the insulating resin as a protective film against the surface of the protrusion shape portion and the surface of the substrate flat portion. Thus, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit of the invention.

DESCRIPTION OF SYMBOLS 10 Substrate 11 Hole 20 Transistor layer 21 Gate insulating film 22 Gate electrode 23 Source / drain region 23
24 Interlayer Insulating Film 25 Connection Plug 26 Connection Plug 30 Multilayer Wiring Layer 30a Layer 30b Layer 30c Layer 31 Interlayer Insulating Film 32 Wiring 33 Pad 34 Interlayer Insulating Film 35 Interlayer Insulating Film 36 Wiring 37 Pad 38 Bump Ball 40 Support Layer 41 Resist Film 42 Temporary adhesive 50 Penetration electrode 51 Insulating film 52 Diffusion prevention film 53 Electrode material 60 Support substrate 70 Resist film 71 Opening pattern 80 Protective film 100 Coating B
110 Protective film 120 Film A
130 Coating B
140 Protective film 150 Film A
160 Coating B
170 Protective film 180 Film B
190 Coating A
200 Protective film

Claims (4)

Etching the substrate from the back side of the substrate on which the semiconductor element is formed, and the through electrode exposing step that exposes a portion of the through electrode formed insulating film coated in the substrate from the substrate,
A first film forming step of forming a first film on the exposed surface of the through electrode;
A protective film forming step of forming a protective film on the surface of the substrate and the first coating;
Wherein the protective film is entirely etched, and an electrode material exposed step the said first coating of the upper end face the insulating film is removed to expose the electrode material of the through electrode of the through electrode,
The protective film is formed by applying a resin whose wettability with respect to the first coating is worse than the wettability with respect to the surface of the substrate.
Method of forming a through electrode, wherein the this. A through electrode exposing step of etching the substrate from the back side of the substrate on which the semiconductor element is formed, and exposing a part of the through electrode covered with the insulating film formed in the substrate from the substrate;
A second film forming step of forming a second film on the substrate including the exposed through electrode;
A third film forming step of forming a third film on the second film formed on the surface of the through electrode;
A protective film forming step of forming a protective film on the second film and the third film;
Etching the entire surface of the protective film, and removing the second and third films and the insulating film on the upper end surface of the through electrode to expose the electrode material of the through electrode,
The protective layer forming method of the third film penetrations wettability you being formed by coating a bad resin than the wettability to the second coating to the electrode. The second film is a film made of an inorganic material.
Method of forming a through electrode as claimed in claim 2, wherein the this. The method for forming a through electrode according to claim 2 , wherein the third coating is a coating made of an organic material .

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