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JP5532147B1 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
JP5532147B1
JP5532147B1 JP2012550242A JP2012550242A JP5532147B1 JP 5532147 B1 JP5532147 B1 JP 5532147B1 JP 2012550242 A JP2012550242 A JP 2012550242A JP 2012550242 A JP2012550242 A JP 2012550242A JP 5532147 B1 JP5532147 B1 JP 5532147B1
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Japan
Prior art keywords
solder
conductive plate
frame
electrode
semiconductor element
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JP2012550242A
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JPWO2014006682A1 (ja
Inventor
達也 川瀬
三紀夫 石原
太志 佐々木
剛 高山
肇 加藤
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00—Soldering, e.g. brazing, or unsoldering
    • B23K1/0008—Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
    • B23K1/0016—Brazing of electronic components
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
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Abstract

まず、導電板（４）の上面から下面に向かって複数の貫通孔（５）を形成する。次に、半導体素子（１）の電極（２）と金属フレーム（３）との間に、半田（６）で包んだ導電板（４）を挿入する。次に、半田（６）及び導電板（４）を介して電極（２）と金属フレーム（３）を加熱接合させる。このように半導体素子（１）の電極（２）と金属フレーム（３）との間に導電板（４）を挿入することで最低限の半田（６）の厚みを確保できるため、半田（６）の厚みの寸法公差を低減できる。また、導電板（４）を包む半田（６）の量を調整することで半田（６）が過剰供給されず、小さい半導体素子（１）にも適当量の半田を供給できる。

Description

本発明は、半導体素子の電極とフレームを半田接合させる半導体装置及びその製造方法に関する。
従来は、貫通孔を有するフレームを半導体素子上に配置し、上方から貫通孔に半田を供給することで両者を半田接合させていた（例えば、特許文献１参照）。
特開２０１１−２０４８８６号公報
部材や製造工程のばらつきによって、半田の厚み（半導体素子の電極と金属フレームとの間のクリアランス）の寸法公差を広くとる必要があった。また、次世代のＳｉＣ素子はＳｉ素子と比較して素子サイズが小さいため、適当量の半田の供給が困難であった。
本発明は、上述のような課題を解決するためになされたもので、その目的は半田の厚みの寸法公差を低減でき、かつ小さい半導体素子にも適当量の半田を供給できる半導体装置及びその製造方法を得るものである。
本発明に係る半導体装置の製造方法は、導電板の上面から下面に向かって複数の貫通孔を形成する工程と、半導体素子の電極とフレームとの間に、半田で包んだ前記導電板を挿入する工程と、前記半田及び前記導電板を介して前記電極と前記フレームを加熱接合させる工程とを備える。
本発明により、半田の厚みの寸法公差を低減でき、かつ小さい半導体素子にも適当量の半田を供給できる。
本発明の実施の形態１に係る半導体装置を示す断面図である。 本発明の実施の形態１に係る導電板を示す平面図である。 本発明の実施の形態１に係る半導体装置の製造工程を示す断面図である。 本発明の実施の形態２に係る半導体装置の製造工程を示す断面図である。 本発明の実施の形態３に係る半導体装置の製造工程を示す断面図である。 本発明の実施の形態３に係る半導体装置の製造工程の変形例１を示す断面図である。 本発明の実施の形態３に係る半導体装置の製造工程の変形例２を示す断面図である。 本発明の実施の形態３に係る半導体装置の製造工程の変形例３を示す断面図である。 本発明の実施の形態４に係る半導体装置の製造工程を示す断面図である。 本発明の実施の形態４に係る半導体装置の製造工程の変形例を示す断面図である。 本発明の実施の形態５に係る半導体装置の製造工程を示す断面図である。 本発明の実施の形態５に係る半導体装置の製造工程の変形例１を示す断面図である。 本発明の実施の形態５に係る半導体装置の製造工程の変形例２を示す断面図である。 本発明の実施の形態５に係る半導体装置の製造工程の変形例３を示す断面図である。 本発明の実施の形態６に係る半導体装置を示す断面図である。 本発明の実施の形態６に係る半導体装置の製造工程を示す断面図である。
本発明の実施の形態に係る半導体装置及びその製造方法について図面を参照して説明する。同じ又は対応する構成要素には同じ符号を付し、説明の繰り返しを省略する場合がある。
実施の形態１．
図１は、本発明の実施の形態１に係る半導体装置を示す断面図である。半導体素子１の上面に電極２が設けられている。電極２はＴｉ／Ｎｉ／Ａｕの積層フロントメタルである。半導体素子１の電極２と金属フレーム３との間に導電板４が挿入されている。導電板４の上面から下面に向かって複数の貫通孔５が設けられている。導電板４を包む半田６により電極２と金属フレーム３が接合されている。これらの構成が樹脂（不図示）により覆われてパッケージが構成されている。金属フレーム３により半導体素子１の電極２がパッケージ外部に引き出される。
図２は、本発明の実施の形態１に係る導電板を示す平面図である。導電板４の外形は１０ｍｍ×１０ｍｍである。貫通孔５の直径は１〜２ｍｍであり、貫通孔５同士の間隔は２〜３ｍｍである。導電板４の材質はＣｕである。
続いて、本実施の形態に係る半導体装置の製造方法を説明する。図３は、本発明の実施の形態１に係る半導体装置の製造工程を示す断面図である。まず、導電板４の上面から下面に向かって複数の貫通孔５を打ち抜きやエッチングなどにより形成する。次に、半導体素子１の電極２と金属フレーム３との間に、半田６で包んだ導電板４を挿入する。次に、半田６及び導電板４を介して電極２と金属フレーム３を加熱接合させる。
続いて、本実施の形態の効果を説明する。半導体素子１の電極２と金属フレーム３との間に導電板４を挿入することで最低限の半田６の厚みを確保できるため、半田６の厚みの寸法公差を低減できる。そして、導電板４を包む半田６の量を調整することで半田６が過剰供給されず、小さい半導体素子１にも適当量の半田を供給できる。特に、次世代のＳｉＣ素子はＳｉ素子と比較して素子サイズが小さいため、本実施の形態が有効である。
また、導電板４の複数の貫通孔５に半田６が入り、半導体素子１と金属フレーム３との間を架橋することで両者の接合強度が増大する。ここで、半田６が入り込む構造として導電板４の代わりに金網を用いることも考えられるが、金網は剛性が低いという問題がある。これに対して、複数の貫通孔５を形成した導電板４は金網よりも剛性が高いため、半導体素子１と金属フレーム３の接合強度を確保することができる。
また、電極２や金属フレーム３の一般的な材料であるＣｕやＮｉの線膨張係数は１６．８ｐｐｍ／℃であり、半田６の主成分であるＳｎの線膨張係数は２６．９ｐｐｍ／℃よりもかなり小さい。この線膨張係数の差により温度上昇時に熱応力が発生して、電極２や金属フレーム３が変形する。そこで、半田６と金属フレーム３の中間の線膨張係数を持つ導電板４を半田６内に挿入する。これにより、線膨張係数の差を縮小できるため、熱による電極２や金属フレーム３の変形などを緩和することができる。
また、導電板４の材料は、電極２中のＮｉが半田６へ拡散するのを防ぐようなＣｕなどの材料であることが好ましい。これにより、電極２中のＮｉの拡散を防止できるため、接合後もＮｉが減少せず、時間が経過しても電極２の厚みを確保できる。この結果、半導体装置の信頼性が向上する。
実施の形態２．
図４は、本発明の実施の形態２に係る半導体装置の製造工程を示す断面図である。半田６の厚みが電極２の面内で均一の場合、半田６の外周部で応力が集中し、半導体素子１が変形する恐れがある。そこで、本実施の形態では導電板４を凸レンズ型にしている。これにより、導電板４を包む半田６は電極２の中心で薄く、外周部で厚くなる。従って、加熱・冷却により発生する半田６の外周部での応力集中が緩和され、半導体素子１の変形を防ぐことができる。
実施の形態３．
図５は、本発明の実施の形態３に係る半導体装置の製造工程を示す断面図である。本実施の形態では、半田６に凸部７を形成し、金属フレーム３に穴８を形成する。そして、半導体素子１の電極２と金属フレーム３との間に導電板４を挿入した際に、半田６の凸部７を金属フレーム３の穴８に挿入する。これにより、金属フレーム３に対する半田６の位置決めが可能になり、半田６の位置のばらつきが低減される。
図６〜８は、それぞれ本発明の実施の形態３に係る半導体装置の製造工程の変形例１〜３を示す断面図である。変形例１では凸部７がテーパ形状であり、変形例２では穴８がテーパ形状であり、変形例３では両方がテーパ形状である。このように凸部７と穴８の少なくとも一方がテーパ形状であれば、穴８への凸部７の挿入が容易になり、歩留まりが向上する。
実施の形態４．
図９は、本発明の実施の形態４に係る半導体装置の製造工程を示す断面図である。本実施の形態では凸部７を穴８に引っ掛ける。この状態で半導体素子１へ近づけて加熱し、金属フレーム３と半導体素子１を半田接合させる。金属フレーム３に半田６が固定されているため、半田６の位置のばらつきが低減される。
図１０は、本発明の実施の形態４に係る半導体装置の製造工程の変形例を示す断面図である。金属フレーム３を下面から上面に向かって打ち抜くことによって穴８を形成することで、金属フレーム３の上面において穴８の周囲に上向きの返り面９が形成される。そして、金属フレーム３の下面を半導体素子１側に向け、凸部７を返り面９に引っ掛ける。これにより、半田６の凸部７が引っかかりやすくなるので、移送中での落下が減少し、歩留まりが向上する。
実施の形態５．
図１１は、本発明の実施の形態５に係る半導体装置の製造工程を示す断面図である。本実施の形態では、導電板４及び半田６に凹部１０を形成し、金属フレーム３に凸部１１を形成する。そして、半導体素子１の電極２と金属フレーム３との間に導電板４を挿入した際に、凸部１１を凹部１０に挿入する。これにより、金属フレーム３に対する半田６の位置決めが可能になり、半田６の位置のばらつきが低減される。
図１２〜１４は、それぞれ本発明の実施の形態５に係る半導体装置の製造工程の変形例１〜３を示す断面図である。変形例１では凸部１１がテーパ形状であり、変形例２では凹部１０がテーパ形状であり、変形例３では両方がテーパ形状である。このように凸部１１と凹部１０の少なくとも一方がテーパ形状であれば、凹部１０への凸部１１の挿入が容易になり、歩留まりが向上する。
実施の形態６．
図１５は、本発明の実施の形態６に係る半導体装置を示す断面図である。本実施の形態では半導体素子１の下面に板半田１２によりヒートシンク１３が接合されている。その他の構成は実施の形態１と同様である。
続いて、本実施の形態に係る半導体装置の製造方法を説明する。図１６は、本発明の実施の形態６に係る半導体装置の製造工程を示す断面図である。実施の形態１と同様に半導体素子１の電極２と金属フレーム３との間に、半田６で包んだ導電板４を挿入する。そして、半導体素子１の下面とヒートシンク１３の間に板半田１２を挟む。次に、電極２と金属フレーム３を加熱接合させる際に、板半田１２により半導体素子１の下面とヒートシンク１３も同時に加熱接合させる。このように半導体素子１の上下の半田接合を同時に行うことにより、工程数を削減することができる。
なお、半導体素子１は、Ｓｉによって形成されたものに限らず、Ｓｉに比べてバンドギャップが大きいワイドバンドギャップ半導体によって形成されたものでもよい。ワイドバンドギャップ半導体は、例えば、ＳｉＣ、ＧａＮ系材料、又はダイヤモンドである。このようなワイドバンドギャップ半導体によって形成された半導体素子１は、耐電圧性や許容電流密度が高いため、小型化できる。この小型化された素子を用いることで、この素子を組み込んだ半導体装置も小型化できる。また、素子の耐熱性が高いため、ヒートシンク１３の放熱フィンを小型化でき、水冷部を空冷化できるので、半導体装置を更に小型化できる。また、素子の電力損失が低く高効率であるため、半導体装置を高効率化できる。
１ 半導体素子
２ 電極
３ 金属フレーム（フレーム）
４ 導電板
５ 貫通孔
６ 半田
７ 凸部
８ 穴
９ 返り面
１０ 凹部
１１ 凸部
１２ 板半田
１３ ヒートシンク

Claims (4)

  1. 導電板の上面から下面に向かって複数の貫通孔を形成する工程と、
    半導体素子の電極とフレームとの間に、半田で包んだ前記導電板を挿入する工程と、
    前記半田及び前記導電板を介して前記電極と前記フレームを加熱接合させる工程と、
    前記半田に凸部を形成し、前記フレームに穴を形成する工程と、
    前記半導体素子の前記電極と前記フレームとの間に前記導電板を挿入した際に、前記半田の前記凸部を前記フレームの前記穴に挿入する工程とを備え、
    前記凸部と前記穴の少なくとも一方はテーパ形状であり、
    前記凸部を前記穴に引っ掛け、
    前記フレームを下面から上面に向かって打ち抜くことによって前記穴を形成して返り面を上向きにし、
    前記フレームの前記下面を前記半導体素子側に向け、
    前記凸部を前記返り面に引っ掛けることを特徴とする半導体装置の製造方法。
  2. 導電板の上面から下面に向かって複数の貫通孔を形成する工程と、
    半導体素子の電極とフレームとの間に、半田で包んだ前記導電板を挿入する工程と、
    前記半田及び前記導電板を介して前記電極と前記フレームを加熱接合させる工程とを備え、
    前記導電板は凸レンズ型であることを特徴とする半導体装置の製造方法。
  3. 電極を有する半導体素子と、
    フレームと、
    前記半導体素子の前記電極と前記フレームとの間に挿入され、上面から下面に向かって複数の貫通孔を有する導電板と、
    前記導電板を包み、前記電極と前記フレームを接合させる半田とを備え、
    前記半田は凸部を有し、
    前記フレームは穴を有し、
    前記半田の前記凸部は前記フレームの前記穴に挿入され、
    前記凸部と前記穴の少なくとも一方はテーパ形状であり、
    前記凸部を前記穴に引っ掛け、
    前記フレームの上面に前記穴の周囲に上向きの返り面が存在し、
    前記フレームの下面は前記半導体素子側に向き、
    前記凸部は前記返り面に引っ掛かっていることを特徴とする半導体装置。
  4. 電極を有する半導体素子と、
    フレームと、
    前記半導体素子の前記電極と前記フレームとの間に挿入され、上面から下面に向かって複数の貫通孔を有する導電板と、
    前記導電板を包み、前記電極と前記フレームを接合させる半田とを備え、
    前記導電板は凸レンズ型であることを特徴とする半導体装置。
JP2012550242A 2012-07-02 2012-07-02 半導体装置及びその製造方法 Active JP5532147B1 (ja)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03218031A (ja) * 1990-01-23 1991-09-25 Hitachi Ltd 半導体集積回路装置およびそれに用いられるプリフォーム接合材
JPH05251827A (ja) * 1992-03-05 1993-09-28 Sumitomo Electric Ind Ltd 光半導体素子の実装方法
JPH06152094A (ja) * 1992-11-09 1994-05-31 Hitachi Ltd 半導体装置
JP2004047663A (ja) * 2002-07-11 2004-02-12 Denso Corp 半導体装置
JP2009267054A (ja) * 2008-04-24 2009-11-12 Sanyo Electric Co Ltd 半導体装置およびその製造方法
JP2012054328A (ja) * 2010-08-31 2012-03-15 Toyota Motor Corp ダイボンド方法及びダイボンド用治具

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03218031A (ja) * 1990-01-23 1991-09-25 Hitachi Ltd 半導体集積回路装置およびそれに用いられるプリフォーム接合材
JPH05251827A (ja) * 1992-03-05 1993-09-28 Sumitomo Electric Ind Ltd 光半導体素子の実装方法
JPH06152094A (ja) * 1992-11-09 1994-05-31 Hitachi Ltd 半導体装置
JP2004047663A (ja) * 2002-07-11 2004-02-12 Denso Corp 半導体装置
JP2009267054A (ja) * 2008-04-24 2009-11-12 Sanyo Electric Co Ltd 半導体装置およびその製造方法
JP2012054328A (ja) * 2010-08-31 2012-03-15 Toyota Motor Corp ダイボンド方法及びダイボンド用治具

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