JP5512788B2 - Display inspection method for liquid crystal display device - Google Patents

Description

  The present invention relates to a display inspection method in an AC drive type liquid crystal display device.

  In a liquid crystal display device, when a DC voltage is applied for a long time, an afterimage phenomenon called “burn-in” is caused. Therefore, burn-in is prevented by AC driving in which the polarity of the voltage applied to the pixel electrode is reversed with respect to the counter electrode voltage Vcom.

  For example, in a liquid crystal display device that employs a frame inversion driving method in which the polarity of a video signal is inverted every frame period, the value of the counter electrode voltage Vcom (hereinafter abbreviated as voltage Vcom) is a DC component for each pixel. It is set not to occur. More specifically, the voltage Vcom is optimal so that the potential difference V (+) between the positive signal of the video signal and the voltage Vcom is equal to the potential difference V (−) between the negative signal of the video signal and the voltage Vcom. Is set to a value.

  However, if the voltage Vcom deviates from the optimum value, the potential difference V (+) and the potential difference V (−) are not equal, and a DC component is applied to the liquid crystal layer. Since the DC component is a voltage difference applied to the liquid crystal layer between the positive electrode and the negative electrode, it appears as a difference in light transmittance. This difference in light transmittance is visually recognized by the human eye as flickering having a cycle that is an integral multiple of the frame time, that is, flicker. Needless to say, since the flicker deteriorates display quality, a display inspection process is required to check the occurrence of flicker and to correct it when the voltage Vcom deviates from the optimum value.

  In Patent Document 1 listed below, in each frame, a display pattern in which a pixel to which a positive or negative voltage of the same polarity is applied is displayed in white is displayed and displayed based on this display pattern. Discloses a method of inspecting the potential of the counter electrode.

  More specifically, as shown in FIG. 15A, in a normally white liquid crystal display device having a high luminance when no drive signal is applied, in the current frame, an intermediate between a black pixel column and white. Tone (that is, gray) pixel columns are alternately displayed. A pixel having a large negative polarity is applied to the pixel indicated by a black circle, while a pixel having a positive polarity sufficient to display a white halftone is applied to the pixel indicated by a white circle.

  Next, as shown in FIG. 15B, in the next frame after 1/60 seconds, the polarity of the display voltage applied to each pixel is inverted by the polarity inversion method. Therefore, a positive display voltage is applied to the pixel indicated by the black circle, while a negative display voltage is applied to the pixel indicated by the white circle to such an extent that a white halftone is displayed. Such polarity inversion is repeated in subsequent frames.

  In this manner, since the display pattern is configured so that the white pixel row that can be visually recognized by one person in one frame has the same polarity in the entire frame, when flicker occurs, the flicker occurs. Is disclosed in Japanese Patent Application Laid-Open No. 2004-228688.

  Patent Document 2 listed below discloses a method and apparatus for automatically calculating the optimum voltage Vcom using the flicker value measured by a color analyzer while changing the voltage Vcom of the liquid crystal display device. .

Japanese Patent Publication “JP 2002-258232 (published on September 11, 2002)” Japanese Patent Publication “Japanese Patent Laid-Open No. 2006-215500 (published August 17, 2006)”

  However, the techniques disclosed in Patent Documents 1 and 2 have a problem that it is not possible to easily confirm whether or not the voltage Vcom is an optimum value without using a special configuration.

  FIG. 16 shows a general flow relating to a process for setting the voltage Vcom to an optimum value. First, in step (abbreviated as S) 1, the voltage Vcom is determined so that flicker does not occur while checking the display screen. As the display screen, for example, as shown in FIG. 17, a confirmation screen I displaying a horizontal stripe still image in which black and gray are alternately arranged for each line, or a display screen as shown in FIG. A confirmation screen II displaying a still image of horizontal stripes in which a gradation image changing in 10 steps from black to white and black are alternately arranged for each line from the left end to the right end is suitable.

  Next, in S2, the value of the voltage Vcom determined in S1 is written in the memory of the driver that drives the counter electrode.

  Thereafter, in S3, it is reconfirmed whether the set value of the voltage Vcom written in the memory is optimum. Specifically, when the driver has a Read function, no flicker occurs on the confirmation screen I or the confirmation screen II while checking the setting value written in the memory using the Read function. Make sure. When the driver does not have a Read function, the confirmation screen I or the confirmation screen II is observed to check whether flicker has occurred.

  However, in the above-described flicker confirmation method, even if the display pattern described in Patent Document 1 is used, the flicker level is determined by judging the flicker level by looking at the state of one screen. Is very difficult to determine. This is because whether or not the flicker is at the minimum level can be determined only by comparing with different screen states in which the value of the voltage Vcom is changed.

  Further, even if it can be determined that the flicker is smaller on either screen by alternately displaying different screens with different values of the voltage Vcom, one of the two voltages Vcom is set to the optimum value. Not necessarily. Therefore, the optimum value of the voltage Vcom must be obtained by changing the value of the voltage Vcom in various ways and trial and error.

  Moreover, although the method and apparatus disclosed in Patent Document 2 can automatically calculate the voltage Vcom, there is a problem that a special configuration that enables this is required.

  In view of the above problems, an object of the present invention is to provide a display inspection method capable of easily confirming whether or not the voltage Vcom is an optimum value without using a special configuration.

In order to solve the above problems, a display inspection method according to the present invention provides:
(1) While performing inversion driving to invert the polarity of the video signal for each vertical scanning period with respect to the pixel electrode in which the liquid crystal layer is arranged between the counter electrodes, When holding the potential,
(2) The counter electrode voltage applied to the counter electrode is a constant voltage, or the center voltage when the polarity of the counter electrode voltage is inverted every vertical scanning period is a constant voltage,
(3) The potential difference between the first display area for performing display based on the first video signal in which the center voltage is made equal to the constant voltage of the counter electrode voltage and the adjacent vertical scanning periods is the same as that of the first video signal. On the other hand, at least two display areas including a second display area for performing display based on a second video signal in which the center voltage is different from the constant voltage of the counter electrode voltage are simultaneously displayed on one screen. Features.

  According to the above configuration, in the first display region that performs display based on the first video signal, the amplitude of one of the positive and negative polarities (referred to as the first polarity) with reference to the constant voltage of the counter electrode voltage, In a state where the amplitude of the polarity opposite to one polarity (referred to as the second polarity) is equal, display for holding the potential of the video signal is performed during each one vertical scanning period.

  If the counter electrode voltage in the first display region is the optimum value, there is no difference in light transmittance in the pixels in each vertical scanning period, so that each pixel displays the same gradation in each vertical scanning period. As a result, no flicker occurs.

  However, since the adjustment of the counter electrode voltage is performed by a person using an inspection device, the counter electrode voltage deviates from the optimal value due to human error (optimum value confirmation error) and device error (malfunction) during writing. There is a case. In this case, flicker occurs in the first display area.

  Therefore, in the present invention, the potential difference between adjacent vertical scanning periods is the same as that of the first video signal, while display based on the second video signal in which the center voltage is different from the constant voltage of the counter electrode voltage. The second display area to be performed is displayed in one screen simultaneously with the first display area.

  For example, if the amplitude of the first polarity of the first video signal is increased by ΔV and the amplitude of the second polarity is decreased by ΔV, the second video in which the center voltage of the first video signal is shifted to the first polarity side by ΔV. A signal can be created. Conversely, if the amplitude of the first polarity of the first video signal is reduced by ΔV and the amplitude of the second polarity is increased by ΔV, the center voltage of the first video signal is shifted to the second polarity side by ΔV. A second video signal can be created.

  Note that the counter electrode voltage is commonly applied to all pixels in one screen.

  As described above, in the present invention, by creating the second video signal in which the center voltage of the video signal is different from the constant voltage of the counter electrode voltage, the first display area and the second display area are pseudo-opposed. A state in which the above-mentioned constant voltage of the electrode voltage is changed is created so that two display states can be simultaneously compared on one screen.

  As a result, it is possible to determine at a glance which flicker is less in the first display area and the second display area, and it is possible to easily determine whether the counter electrode voltage in the first display area may be the optimum value. it can. In particular, the first video signal in the first display region is set so that the center voltage can be regarded as matching the constant voltage of the counter electrode voltage. By simultaneously viewing the display states of the display area and the second display area, it can be determined immediately.

  In addition, since it is only necessary to change the amplitude of the video signal as described above, it is possible to easily confirm whether or not the counter electrode voltage has an optimum value without requiring a special configuration.

  A combination of a configuration described in a certain claim and a configuration described in another claim is limited to a combination of the configuration described in the claim cited in the claim. However, as long as the object of the present invention can be achieved, combinations with configurations described in the claims not cited in the focused claims are possible.

  In the display inspection method according to the present invention, as described above, while performing inversion driving to invert the polarity of the video signal for each vertical scanning period with respect to the pixel electrode in which the liquid crystal layer is disposed between the counter electrode, During display for holding the potential of the video signal during each vertical scanning period, the counter electrode voltage applied to the counter electrode is set to a constant voltage, or the polarity of the counter electrode voltage is changed every vertical scanning period. The potential difference between the first display area that performs display based on the first video signal in which the center voltage when inverted is a constant voltage and the center voltage is matched with the constant voltage of the counter electrode voltage, and the adjacent unit periods is And at least two display areas, which are the same as the first video signal, and a second display area that performs display based on a second video signal in which the center voltage is different from the constant voltage of the counter electrode voltage. Simultaneous on screen It is adapted to display.

  Therefore, it can be determined at a glance which flicker is less in the first display area and the second display area, and it is easily determined whether the counter electrode voltage in the first display area can be regarded as the optimum value. be able to. In addition, since it is only necessary to change the amplitude of the video signal, there is an effect that it is possible to easily confirm whether or not the counter electrode voltage is the optimum value without requiring a special configuration.

It is a wave form diagram which shows the waveform of the source output given to each pixel of three display areas in one screen, (a) shows the case where the center voltage of source output and the center voltage of voltage Vcom correspond, (B) and (c) show a case where the center voltage of the source output deviates from the center voltage of the voltage Vcom. It is a wave form diagram which shows the waveform of the video signal (source output) applied to a source bus line, and the voltage Vcom. It is a front view which shows the display state of a display screen, when performing the display test | inspection whether the flicker has generate | occur | produced on the display screen. It is a wave form diagram which shows notionally the waveform of the source output at the time of n field (n frame) with respect to the pixel of m line. It is a wave form diagram which shows notionally the waveform of the source output at the time of the (n + 1) field with respect to the same pixel of m line. It is a front view which shows the display state of area AC at the time of n field. It is a front view which shows the display state of area AC at the time of (n + 1) field. It is explanatory drawing which shows the setting method of the input data signal of each area in the case of managing the tolerance | permissible_range of the optimal setting value of the voltage Vcom used as the minimum flicker as +/- 1bit. It is explanatory drawing which shows the setting method of the input data signal of each area in the case of managing the tolerance | permissible_range of the optimal setting value of the voltage Vcom used as the minimum flicker as +/- 2bit. FIG. 11 is a front view showing a display state in which flicker in area A is minimized in a display inspection process for determining whether or not flicker occurs on the display screen. FIG. 11 is a front view showing a display state in which flicker in area B is minimized in a display inspection process for determining whether or not flicker occurs on the display screen. FIG. 10 is a front view showing a display state in which flicker in area C is minimized in a display inspection process for determining whether or not flicker occurs on the display screen. It is a block diagram which shows the structural example of the liquid crystal display device which concerns on this invention. It is explanatory drawing which shows the definition of a flicker rate. It is explanatory drawing which shows the display pattern in the conventional display test | inspection. It is a flowchart which shows the general process sequence regarding the process which sets the voltage Vcom to an optimal value. It is explanatory drawing which shows an example of the general display screen at the time of a display test | inspection. It is explanatory drawing which shows the other example of the general display screen at the time of a display test | inspection.

  Hereinafter, embodiments of the present invention will be described in detail.

(Configuration of liquid crystal display device related to counter electrode voltage)
FIG. 13 is a block diagram showing a configuration of the liquid crystal display device 1, and an equivalent circuit of one pixel 3 is shown in the display unit (liquid crystal panel) 2. Here, a configuration related to the counter electrode voltage Vcom (hereinafter abbreviated as voltage Vcom) will be described, and other configurations will be described later.

  The pixel 3 is provided corresponding to the intersection of the gate bus line GL and the source bus line SL. In addition to the TFT 4, the liquid crystal capacitor CL, and the auxiliary capacitor Cs, the pixel 3 normally includes a parasitic capacitor such as a capacitor Cgd formed between the pixel electrode 5 and the gate bus line GL.

  The gate of the TFT 4 is connected to the gate bus line GL, the source of the TFT 4 is connected to the source bus line SL, and the drain of the TFT 4 is connected to the pixel electrode 5.

  The liquid crystal capacitor CL is formed by disposing a liquid crystal layer between the pixel electrode 5 and the counter electrode 6 to which the voltage Vcom is applied. The auxiliary capacitor Cs is formed by disposing an insulating film between the pixel electrode 5 or an electrode connected to the pixel electrode 5 and the auxiliary capacitor bus line to which the voltage Vcs is applied. The voltage Vcs may be equal to the voltage Vcom, for example, or may be another value.

  The voltage Vcom is manually adjusted, for example, by changing the setting of a register constituting the counter electrode driver 7, and a voltage Vcom corresponding to the set value is generated and applied to the counter electrode 6.

(Reverse drive and flicker)
FIG. 2 is a waveform diagram showing the waveforms of the video signal (source output) applied to the source bus line SL and the voltage Vcom. The polarity of the video signal is inverted every frame period (one vertical scanning period) in accordance with the frame inversion driving method.

  Further, the polarity of the voltage Vcom is inverted so as to be opposite to the polarity of the video signal in accordance with the common inversion driving method. As a result, the amplitude of the video signal can be reduced compared to the case where the voltage Vcom is maintained at a constant value. However, the present invention is also applied to the case where the voltage Vcom is maintained at a constant value without adopting the common inversion driving method.

  In FIG. 2A, the center voltage, which is the median value of the positive voltage and the negative voltage of the video signal, coincides with the center voltage of the voltage Vcom (constant voltage described in the claims). It shows the optimum state. That is, the potential difference between the video signal and the voltage Vcom is constant even if the frame changes.

  2B shows a state where the center voltage of the voltage Vcom is larger than the center voltage of the video signal, and FIG. 2C shows a state where the center voltage of the voltage Vcom is smaller than the center voltage of the video signal. Show.

  In both cases (b) and (c) of FIG. 2, the potential difference between the video signal and the voltage Vcom repeatedly increases and decreases in the frame period, and therefore flickers that increase or decrease the light transmittance of the pixels occur.

  Note that the voltage Vcom is applied to all the pixels constituting the display unit 2 with the same value. Therefore, when performing a display inspection to determine whether or not the voltage Vcom is set to an optimum value, conventionally, the entire display screen of the display unit 2 is viewed to check whether flicker has occurred.

  In this method, when the setting value of the voltage Vcom is changed and the occurrence of flicker is inspected, the display screen before changing the voltage Vcom cannot be simultaneously viewed and compared. It becomes difficult to judge.

(Display driving method in display inspection of the present invention)
Therefore, in the display inspection method of the present invention, a display region (area shown in FIG. 3) in which the setting of the voltage Vcom is changed in a pseudo manner in a state where the same voltage Vcom is applied to all the pixels constituting the display unit 2. A, B, and C) are partially created so that display states before and after the change of the voltage Vcom can be simultaneously confirmed and compared in one screen.

  FIG. 3 is a front view showing a display state of the display screen 2a when performing a display inspection as to whether or not flicker has occurred on the display screen 2a. The basic video on the display screen 2a is a horizontal stripe still image in which black and gray are alternately arranged for each line.

  First, a video signal (first video signal) for displaying this basic video will be described. FIG. 1 is a waveform diagram showing the waveform of the source output given to each pixel in areas A to C (corresponding to the first display area, the second display area, and the third display area in this order). FIG. 1A shows the waveform of the first video signal applied to the source bus line SL in area A. FIG. In the first video signal, the positive voltage corresponding to the gray gradation X is maintained for one frame period, that is, one vertical scanning period, and after the display without gradation change, that is, the still image display, The frame is inverted to a negative voltage by a frame inversion driving method. Even after voltage inversion, display without temporal gradation change is continued. The center voltage A (center voltage), which is the median value between the positive voltage and the negative voltage, is considered to be equal to the center voltage of the voltage Vcom as an initial setting.

  Display based on the first video signal is performed in the background area D (background area) of the display screen 2a shown in FIG. 3 and the area A displayed as a partial area therein.

  FIG. 1B shows the waveform of the second video signal obtained by correcting the first video signal so as to be applied to the source bus line SL in the area B. In the second video signal, the center voltage B is increased by + α with respect to the center voltage A while the difference between the positive voltage and the negative voltage of the first video signal is kept constant. That is, the second video signal has a DC component of + α with respect to the center voltage of the voltage Vcom.

  In area B, which is a partial area of the display screen 2a, display based on the second video signal is performed. Accordingly, the display state of the area A and the display state of the area B can be checked at the same time, and the flicker occurrence state can be compared. Therefore, it is determined whether or not the DC setting of the voltage Vcom is appropriate in the area A. It can be easily determined by comparison with the area B.

  FIG. 1C shows the waveform of the third video signal obtained by correcting the first video signal so that the center voltage is shifted in the opposite direction to the second video signal. In the third video signal, the center voltage C is decreased by −α with respect to the center voltage A while the difference between the positive voltage and the negative voltage of the first video signal is kept constant. That is, the third video signal has a DC component of −α with respect to the center voltage of the voltage Vcom.

  Since the third video signal is applied to the source bus line SL in area C, which is a partial area of the display screen 2a, display based on the third video signal is performed in area C. Thereby, in addition to the display states of area A and area B, the display state of area C can be checked simultaneously, and the flicker occurrence state can be compared. In particular, in areas B and C, the polarity of the DC component for correcting the first video signal is reversed. Therefore, by comparing the flickers in the three types of display, the flicker in area A is changed to areas B and C. If it can be confirmed that the flicker is smaller than the flicker, it is possible to make a reliable determination that the flicker in the area A is the smallest.

  In addition, if the liquid crystal display device includes a source driver having a specification capable of controlling whether the source output is positive or negative with respect to a specific line in a specific field, the flicker of the area A When the voltage Vcom is not the optimum value and the voltage Vcom is not the optimum value, it can be easily determined whether the DC setting of the voltage Vcom should be changed to + or-.

  In addition, since each of the areas A to C is displayed so as to be surrounded by the background area D that performs display based on the first video signal, it is possible to check the flicker variation in one screen.

  This is because by displaying the same gradation as the area A in the background area D, it is possible to check the portion where the flicker occurs and the portion where the flicker does not occur in the large background area D. Because.

  Note that the flicker variation in one screen is caused by the parasitic capacitance variation of the thin film transistor or the like in the screen, the cell thickness variation, the cause of contamination of the periphery of the screen (surrounding material periphery), and the like.

  The counter electrode driver 7 includes a type in which the set value of the voltage Vcom can be written only once, and a type in which the set value can be written twice or more depending on specifications. If the comparison of the areas A to C confirms that the flicker in the area A is not minimum, the counter electrode driver 7 of the type that can write the setting value twice or more rewrites the setting value, The display inspection process can be repeated to find the optimum value of the voltage Vcom.

(Details of second video signal and third video signal)
Hereinafter, the voltage setting of the second video signal and the third video signal will be described in more detail.

  The positive voltage (positive source output) and negative voltage (negative source output) of the output video signal corresponding to each gradation of the input data signal that is the basis of the video signal ) Is decided. That is, if the gradation is different, the source output is also different.

  FIG. 4 is a waveform diagram conceptually showing the waveform of the source output in the n field (n frame) for the pixels of the m line, and FIG. 5 is the waveform of the source output in the (n + 1) field for the same pixel of the m line. It is a wave form diagram which shows a waveform notionally.

  FIGS. 6 and 7 are front views showing the display states of areas A to C in the n field and (n + 1) field, respectively.

  As shown in FIGS. 4 and 5, in the present embodiment, the display of the areas A to C is created by using three combinations of gradations X, Y, and Z with different source outputs.

  The positive polarity source outputs (V) of the gradations X, Y, and Z are Xp, Yp, and Zp, respectively, and the negative polarity source outputs (V) are Xn, Yn, and Zn, respectively.

  The gradation Y is a gradation in which the positive polarity source output Yp is (Xp + α) V and the negative polarity source output Yn is (Xn−α) V.

  The gradation Z is a gradation in which the positive polarity source output Zp is (Xp−α) V and the negative polarity source output Zn is (Xn + α) V.

  As shown in FIGS. 6 and 7, the display screen 2 a when performing the display inspection has an arbitrary gradation other than black and black (for example, 128 gradations in the case of an 8-bit input data signal). An image in which flicker is easy to check is displayed, such as a horizontal stripe still image alternately arranged for each line. Further, as in the confirmation screen II described with reference to FIG. 17, a gradation image that changes from black to white in 10 steps may be displayed from the left end to the right end of the display screen.

  The slower the frame frequency is, the easier it is to check flicker, but it is preferable to check flicker at a frame frequency of 60 Hz or 50 Hz, which is the actual driving condition.

  As shown in FIG. 6 and FIG. 7, in area A, the arbitrary gradation is X gradation in the n field, and X gradation is also in the (n + 1) field, and the source output is the positive source output Xp in the n field. The negative polarity source output Xn is used in the (n + 1) field. That is, the waveform of the source output (first video signal) for the pixels in area A is the waveform Wa shown in FIGS.

  On the other hand, in area B, the above-mentioned arbitrary gradation is Y gradation in the n field, Z gradation in the (n + 1) field, and the source output is positive source output Yp in the n field and negative polarity in the (n + 1) field. The source output is Zn. That is, the waveform of the source output (second video signal) for the pixels in area B is the waveform Wb shown in FIGS.

  On the other hand, in area C, the arbitrary gradation is Z gradation in the n field, Y gradation in the (n + 1) field, the source output is the positive source output Zp in the n field, and the negative source output in the (n + 1) field. Let Yn. That is, the waveform of the source output (third video signal) for the pixels in area C is the waveform Wc shown in FIGS.

  Note that the above-described gradation settings in area B and area C may be interchanged.

  As a result, the potential difference (source amplitude) between adjacent fields (vertical scanning periods) is the same for all three waveforms Wa, Wb, and Wc as shown in the following equations 1 to 3.

Area A: Xp-Xn = Vpp Formula 1
Area B: Yp−Zn = ((Xp + α) − (Xn + α)) = Xp−Xn = Vpp Equation 2
Area C: Zp−Yn = ((Xp−α) − (Xn−α)) = Xp−Xn = Vpp Equation 3
If the center voltage A of the source output in area A is Va, the center voltage in area B is Va + α, and the center voltage in area C is Va−α. It becomes possible to shift the center voltage of C by + α or −α.

  As described above, the second video signal and the third video signal are created by correcting the input gradation data supplied to the source driver SD (FIG. 13) that outputs the first video signal.

  In addition, the second video signal and the third video signal are the input gradation data corresponding to the positive voltage of the first video signal and the input corresponding to the negative voltage of the first video signal, respectively. It is created by correcting gradation data. Then, the input gradation data is corrected so that the positive voltage and the negative voltage of the first video signal are shifted to the same polarity side with the same correction amount (α). As a result, the shift amounts of the center voltages of the second video signal and the third video signal are also equal to the correction amount (α), so that the display in which the DC setting of the voltage Vcom is changed in a pseudo manner can be easily performed. Can do.

  Depending on the specifications of the source driver, there is a case where it is not possible to control whether the source output is positive or negative for a specific line in a specific field. In this case, it is difficult to intentionally control the polarity of the source output of area B (or area C) to the plus side (or minus side).

  Controls whether the source output is positive or negative for a specific line in a specific field, even for liquid crystal modules that have a source driver that can control the polarity. In this case, it is necessary to fully consider the polarity when creating a signal to be input to the source driver.

  On the other hand, in the present invention, in the adjacent field, the input gradation is changed from gradation Y to gradation Z in area B, while the input gradation is changed from gradation Z to gradation Y in area C. In this way, it is easy to switch the input gradation between the area B and the area C. Therefore, even if the polarity of the source output of area B and area C is not intentionally controlled to the plus side (or minus side), the flicker of area A can be reduced by simply switching the input gradation between area B and area C. If it is minimum, it can be determined that it is optimal. Furthermore, by simply switching the input gradations in area B and area C, the center voltage of area B is shifted to either + α or −α, regardless of the specifications of the source driver, and the center voltage of area C is + α or −α. It is possible to shift to the other of the two.

(Gradation setting of input data signal)
Next, the gradation setting of the input data signal for realizing the display of the areas A to C will be described with reference to FIGS.

  FIG. 8 is an explanatory diagram showing how to set the input data signal in each area when the allowable range of the optimum setting value of the voltage Vcom at which flicker is minimized is managed as ± 1 bit, and FIG. 9 is a diagram in which flicker is minimized. It is explanatory drawing which shows the setting method of the input data signal of each area in the case of managing the tolerance | permissible_range of the optimal setting value of voltage Vcom used as ± 2 bits.

  Since the DC adjustment of the voltage Vcom is often adjusted by the serial setting of the driver, this embodiment will be described using the bit that is the adjustment target of the serial setting.

  As shown in FIGS. 8 and 9, after the optimum setting value of the voltage Vcom is written in the counter electrode driver 7, for the area A, the n field and the (n + 1) field have predetermined gradations (for example, 128 gradations). The data corresponding to the halftone) is input to the source driver SD (FIG. 13).

  Subsequently, when the allowable range is managed as ± 1 bit as shown in FIG. 8, for example, for either one of the area B and the area C, −α (α is a value corresponding to −3 bits as a DC adjustment of the voltage Vcom. The gradation of the input data signal is determined so that the above-described deviation in the source output center voltage increase / decrease amount occurs in either the center voltage B or the center voltage C of the source output.

  For the other of the area B or the area C, the polarity of the input data signal is reversed, and a deviation of + α corresponding to +3 bits as the DC adjustment of the voltage Vcom becomes the center voltage B or the center voltage C of the source output. The gradation of the input data signal is determined so as to occur.

  The determination of the gradation of the input data signal as described above is based on the use of a source driver that cannot control the polarity of the input data signal.

  As a result, if the DC setting of the voltage Vcom written to the counter electrode driver 7 is correct, the flicker in the area A is minimized.

  On the other hand, if the correct DC setting of the voltage Vcom written to the counter electrode driver 7 is in the minus direction of -2 bits or more as shown in FIG. 8, the flicker in either area B or area C is minimum. become.

  Further, if the correct DC setting of the voltage Vcom written to the counter electrode driver 7 is in the plus direction of +2 bits or more as shown in FIG. 8, the other flicker of the area B or the area C is minimized.

  In addition, when managing the allowable range as ± 2 bits as shown in FIG. 9, for example, for either one of the area B and the area C, a shift of −α corresponding to −5 bits as a DC adjustment of the voltage Vcom is The gradation of the input data signal is determined so as to occur at either the center voltage B or the center voltage C of the source output.

  Further, with respect to the other of the area B or the area C, the polarity of the input data signal is reversed, and a deviation of + α corresponding to +5 bits as the DC adjustment amount of the voltage Vcom is changed to the center voltage B or the center voltage C of the source output. The gradation of the input data signal is determined so as to occur.

  As a result, if the correct DC setting of the voltage Vcom written to the counter electrode driver 7 is in the minus direction of −3 bits or more as shown in FIG. 9, the flicker in either area B or area C is If it is minimum and the direction is +3 bits or more in the plus direction, the other flicker of area B or area C is minimum.

(Display inspection process)
Based on the above settings, display is performed in areas A to C and the flicker occurrence state is inspected. FIG. 10 is a front view showing a display state in which the flicker in area A is minimized in the display inspection process for checking whether or not flicker has occurred, and FIG. 11 is a display state in which the flicker in area B is minimized. FIG. 12 is a front view showing a display state in which the flicker in area C is minimized.

  For example, FIG. 10 shows a state in which the flicker in area A is minimized as a result of the correct DC setting of the voltage Vcom written to the counter electrode driver 7.

  Further, FIG. 11 shows that, for example, a shift of −α corresponding to −3 bits or a shift of + α corresponding to +3 bits occurs in the center voltage B of the source output, so that the flicker in the area B is minimized. Represents a state.

  Further, FIG. 12 shows that, for example, a shift of −α corresponding to −3 bits or a shift of + α corresponding to +3 bits occurs in the center voltage C of the source output, so that the flicker in the area C is minimized. Represents a state.

  As shown in FIGS. 10 to 12, the normal input display area in which the center voltage of the voltage Vcom and the center voltage of the source output are matched with each other and the center voltage are intentionally shifted in one display screen 2 a. Since the display area is displayed, it can be easily confirmed visually whether or not the DC setting value of the voltage Vcom written to the counter electrode driver 7 is optimal.

  Moreover, since the center voltage of the source output is shifted to the opposite polarities in areas B and C, it is confirmed that the flicker in area A is smaller than the flicker in areas B and C as shown in FIG. If possible, a reliable determination can be made that the flicker in area A is minimal.

  Further, each of the areas A to C is displayed so as to be surrounded by the background area D on one screen, and the background area D is displayed based on the same source output as the area A. Thereby, it is possible to check the flicker variation in one screen.

  Note that a source in which the center voltage is made different from the center voltage of the voltage Vcom according to the shift amount that is expected to occur in the voltage Vcom due to the influence of a factor including at least one of temperature change, change with time, and light irradiation. An input data signal corresponding to the output may be generated. By performing display in area B or area C based on such an input data signal, it is also possible to determine whether or not the flicker generated in the area exceeds an allowable level.

  Thereby, before the voltage Vcom is actually shifted due to the various factors described above, it is possible to detect a defective product in which abnormal flicker exceeding an allowable level occurs.

  To determine whether the generated flicker exceeds the allowable level, measure the flicker rate using a measuring device, or compare it with a limit sample arranged so that the flicker rate is the maximum allowable level. There is a way.

  As shown in FIG. 14, the flicker rate is a ratio of the luminance fluctuation width AC of the display screen and the average value DC of the luminance expressed as a percentage, that is, (AC / DC) × 100.

(Supplement of configuration and operation of liquid crystal display device)
Finally, returning to FIG. 13, other configurations and operations of the liquid crystal display device 1 will be described.

  As shown in FIG. 13, the liquid crystal display device 1 includes a source driver SD, a gate driver GD, and a display control circuit 8 in addition to the display unit 2. The source driver SD drives the source bus line SL, the gate driver GD drives the gate bus line GL, and the display control circuit 8 controls the source driver SD and the gate driver GD. Note that a storage capacitor wiring driving circuit for driving the storage capacitor wiring (Cs wiring) may be provided as necessary.

  The display control circuit 8 performs a display operation from an external signal source (for example, a tuner), a digital video signal Dv representing an image to be displayed, a horizontal synchronization signal HSY and a vertical synchronization signal VSY corresponding to the digital video signal Dv. A control signal Dc for controlling is received.

  Further, the display control circuit 8 uses the data start pulse signal SSP and the data as signals for causing the display unit to display an image represented by the digital video signal Dv based on the received signals Dv, HSY, VSY, and Dc. A clock signal SCK, a digital image signal DA representing an image to be displayed (a signal corresponding to the digital video signal Dv), a gate start pulse signal GSP, a gate clock signal GCK, and a gate driver output control signal (scanning signal output control) Signal) GOE and output them.

  More specifically, the digital video signal Dv is output from the display control circuit 8 as a digital image signal DA after timing adjustment or the like is performed as necessary in an internal memory. The data clock signal SCK is generated as a signal composed of pulses corresponding to each pixel of the image represented by the digital image signal DA. Further, the data start pulse signal SSP is generated as a signal that becomes high level (H level) for a predetermined period every horizontal scanning period based on the horizontal synchronization signal HSY. Further, the gate start pulse signal GSP is generated as a signal that becomes H level for a predetermined period every frame period (one vertical scanning period) based on the vertical synchronization signal VSY. The gate clock signal GCK is generated based on the horizontal synchronization signal HSY. The gate driver output control signal GOE is generated based on the horizontal synchronization signal HSY and the control signal Dc.

  Of the signals generated in the display control circuit 8 as described above, the polarity inversion signal POL, the data start pulse signal SSP, and the data clock signal SCK for controlling the polarity of the digital image signal DA are input to the source driver SD. The On the other hand, the gate start pulse signal GSP, the gate clock signal GCK, and the gate driver output control signal GOE are input to the gate driver GD.

  The source driver SD is based on the digital image signal DA, the data clock signal SCK, the data start pulse signal SSP, and the polarity inversion signal POL, and an analog potential (corresponding to the pixel value in each scanning signal line of the image represented by the digital image signal DA). Data signals) are sequentially generated every horizontal scanning period, and these data signals are output to the source bus line SL.

  The gate driver GD generates a gate-on pulse signal based on the gate start pulse signal GSP, the gate clock signal GCK, and the gate driver output control signal GOE, and outputs them to the gate bus line GL. GL is selectively driven.

  As described above, the gate bus line GL and the source bus line SL of the display unit 2 are driven by the source driver SD and the gate driver GD, so that the source is connected via the TFT 4 connected to the selected gate bus line GL. A data signal is written from the bus line SL to the pixel electrode 5. As a result, a voltage is applied to the liquid crystal layer of each pixel 3, whereby the transmittance of light from the backlight is controlled, and an image indicated by the digital video signal Dv is displayed.

  The display inspection method of the present invention will be supplemented below.

  The display inspection method according to the present invention further includes a display based on a third video signal in which the center voltage is different from the center voltage of the second video signal on the opposite polarity side with respect to the constant voltage of the counter electrode voltage. The third display area to be performed is simultaneously displayed on the one screen.

  As a result, the three states in which the constant voltage of the counter electrode voltage is pseudo-shifted to both positive and negative polarities on the basis of the constant voltage of the counter electrode voltage in the first display area are simultaneously confirmed on one screen. can do. As a result, if it can be confirmed that the flicker in the first display area is smaller than the flicker in the second display area and the third display area, a reliable determination can be made that the flicker in the first display area is minimum.

  If the liquid crystal display device includes a source driver having a specification capable of controlling whether the source output is positive or negative with respect to a specific line in a specific field, the first display region When the flicker is not the minimum and the counter electrode voltage is not the optimum value, it can be easily determined whether the counter electrode voltage should be increased or decreased.

  The display inspection method according to the present invention further displays each of the display areas so as to be surrounded by the background area on the one screen, and performs display based on the first video signal in the background area. It is characterized by.

  As described above, by making the display state of the background area, which is an area other than the plurality of display areas such as the first to third display areas, the same as the display state of the first display area, the flicker of one screen is reduced. Variations can be confirmed.

  This is because by displaying the same gradation in the background area as in the first display area, it is possible to confirm the flickering part and the non-occurring part in the large area background area. Because.

  Note that the flicker variation in one screen is caused by the parasitic capacitance variation of the thin film transistor or the like in the screen, the cell thickness variation, the cause of contamination of the periphery of the screen (surrounding material periphery), and the like.

  In the display inspection method according to the present invention, the center voltage is set according to the shift amount predicted to be generated in the counter electrode voltage under the influence of a factor including at least one of temperature change, change with time, and light irradiation. Based on the second video signal or the third video signal that is different from the constant voltage of the counter electrode voltage, the display is performed in the second display region or the third display region, and is generated in the second display region or the third display region. It is characterized in that it is determined whether or not the flicker exceeds an allowable level.

  Accordingly, it is possible to detect a defective product in which abnormal flicker exceeding an allowable level occurs before the counter electrode voltage is actually shifted due to various factors.

  Note that the determination of whether or not the flicker occurring in the second display area exceeds the allowable level is performed by measuring the flicker rate using a measuring device, or the limit arranged so that the flicker rate becomes the maximum value of the allowable level. There are methods such as comparison with samples.

  The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

  The present invention can be used for a display inspection method in an AC drive type liquid crystal display device.

2a Display screen 6 Counter electrode 5 Pixel electrode Wa Waveform (first video signal)
Wb waveform (second video signal)
Wc waveform (3rd video signal)

Claims (8)

The potential of the video signal is maintained during each vertical scanning period while performing inversion driving to invert the polarity of the video signal every vertical scanning period with respect to the pixel electrode in which the liquid crystal layer is disposed between the counter electrodes. When
The counter electrode voltage applied to the counter electrode is a constant voltage, or the center voltage when the polarity of the counter electrode voltage is inverted every vertical scanning period is a constant voltage,
The potential difference between the first display region that performs display based on the first video signal in which the center voltage matches the constant voltage of the counter electrode voltage and the adjacent vertical scanning period is the same as that of the first video signal. Displaying at least two display areas simultaneously with a second display area for performing display based on a second video signal in which the center voltage is different from the constant voltage of the counter electrode voltage ;
A display inspection method for a liquid crystal display device, wherein it is determined which of the first display area and the second display area has less flicker . A third display area for performing display based on a third video signal in which a center voltage is made to be opposite to the center voltage of the second video signal with respect to the constant voltage of the counter electrode voltage on the one screen. The display inspection method for a liquid crystal display device according to claim 1, wherein the display is simultaneously displayed. Each of the display areas is displayed so as to be surrounded by the background area on the one screen,
3. The display inspection method for a liquid crystal display device according to claim 1, wherein display based on the first video signal is performed in the background area. The center voltage is different from the constant voltage of the counter electrode voltage according to the amount of shift expected to occur in the counter electrode voltage due to the influence of factors including at least one of temperature change, temporal change, and light irradiation. Based on the second video signal or the third video signal, the display is performed in the second display area or the third display area,
3. The display inspection method for a liquid crystal display device according to claim 2, wherein it is determined whether or not the flicker generated in the second display area or the third display area exceeds an allowable level. 2. The display inspection method for a liquid crystal display device according to claim 1, wherein the second video signal is created by correcting data of an input gradation given to a source driver that outputs the first video signal. . The second video signal corrects the input gradation data corresponding to the positive voltage of the first video signal and the input gradation data corresponding to the negative voltage of the first video signal, respectively. The display inspection method for a liquid crystal display device according to claim 5, wherein the display inspection method is created by performing the steps described above. 3. The display inspection method for a liquid crystal display device according to claim 2, wherein the third video signal is created by correcting data of an input gradation given to a source driver that outputs the first video signal. . The third video signal corrects the input gradation data corresponding to the positive voltage of the first video signal and the input gradation data corresponding to the negative voltage of the first video signal, respectively. The display inspection method for a liquid crystal display device according to claim 7, wherein the display inspection method is created by performing the steps described above.

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