JP5542710B2 - Array substrate for display device and display device - Google Patents

Description

  Embodiments described herein relate generally to a display device array substrate and a display device.

  In recent years, various flat display devices such as liquid crystal display devices and organic electroluminescence display devices have been developed. As an array substrate applied to such a display device, for example, an array substrate applied to an active matrix display device includes a signal wiring formed in a substantially lattice shape, a switching element connected to the signal wiring, and a switching element. And a voltage is applied to the pixel electrode via the switching element based on a signal from the signal wiring.

  As a display device, for example, in a liquid crystal display device including a backlight and a transmissive liquid crystal panel, unintentional light leakage may occur in the vicinity of the signal wiring. There are various factors, but one reason is that the backlight light reflected on the back surface of the signal wiring is re-reflected on the surface of the insulating substrate and incident on the liquid crystal. When reflected from the backside of the signal wiring or the surface of the insulating substrate, the polarized light of the reflected light is disturbed and becomes unintentional polarized light, and some light is transmitted even if the backlight light is made non-transmissive and displayed black. Sometimes. For this reason, the counter substrate of the liquid crystal display device needs to be provided with a black matrix wider than the width of the signal wiring in the vicinity immediately above the signal wiring of the array substrate to shield undesired transmitted light near the signal wiring. In this case, the area (aperture ratio) of the transmissive part surrounded by the black matrix decreases.

  In an organic EL display device including a bottom emission type organic EL element as a display device, external light is reflected on the back surface of the signal wiring, and there is a risk of causing a decrease in contrast.

JP 2002-116439 A

  An object of the present embodiment is to provide a display device and an array substrate for a display device that can improve display quality.

According to this embodiment,
An insulating substrate, a base layer disposed on the insulating substrate and having a transmittance in the visible light region of 0.5 or more, a transparent material having a film thickness thicker than the base layer and laminated on the base layer And a signal wiring formed by a laminate of main wiring layers made of a main wiring material laminated on the transparent layer, and the film thickness of the transparent layer is d (nm), An array substrate for a display device is provided in which a product n × d is smaller than 400, where n is a refractive index of the transparent layer.

According to this embodiment,
An insulating substrate, a base layer disposed on the insulating substrate and having a transmittance in the visible light region of 0.5 or more, a transparent material having a film thickness thicker than the base layer and laminated on the base layer A transparent layer, a signal wiring formed by a laminate of main wiring layers made of a main wiring material laminated on the transparent layer, a switching element electrically connected to the signal wiring, and the switching An array substrate including a pixel electrode electrically connected to the element; a counter substrate disposed opposite to the array substrate; a liquid crystal layer held between the array substrate and the counter substrate; A backlight disposed on the back side of the array substrate, and in the signal wiring of the array substrate, when the film thickness of the transparent layer is d (nm) and the refractive index of the transparent layer is n, Product n × d is 40 Display apparatus is provided, wherein the smaller.

According to this embodiment,
An insulating substrate, a base layer disposed on the insulating substrate and having a transmittance in the visible light region of 0.5 or more, a transparent material having a film thickness thicker than the base layer and laminated on the base layer A transparent layer, a signal wiring formed by a laminate of main wiring layers made of a main wiring material laminated on the transparent layer, a switching element electrically connected to the signal wiring, and the switching An organic EL element that is electrically connected to the element and emits light toward the back side of the insulating substrate, and an opposing substrate disposed opposite to the array substrate, In the signal wiring of the array substrate, a display device is provided in which a product n × d is smaller than 400, where d (nm) is a thickness of the transparent layer and n is a refractive index of the transparent layer. Is done.

FIG. 1 is a diagram schematically showing a configuration of a display device according to the present embodiment. FIG. 2 is a diagram schematically showing a configuration of an array substrate and an equivalent circuit applicable to the liquid crystal display device of the present embodiment. FIG. 3 is a cross-sectional view schematically showing a configuration of a liquid crystal display device to which the array substrate shown in FIG. 2 is applied. FIG. 4 is a diagram for explaining a reflection reduction effect in the signal wiring in the present embodiment. FIG. 5 is a cross-sectional view schematically showing the configuration of the organic EL display device of the present embodiment. FIG. 6 is a diagram showing simulation results of the reflectance of light incident on various types of signal wirings.

  Hereinafter, the present embodiment will be described in detail with reference to the drawings. In each figure, the same reference numerals are given to components that exhibit the same or similar functions, and duplicate descriptions are omitted.

  FIG. 1 is a diagram schematically showing a configuration of a display device 1 in the present embodiment.

  The display device 1 in the present embodiment is a so-called flat panel display, for example, a liquid crystal display device, an organic EL (electroluminescence) display device, or the like. That is, the display device 1 includes a display panel PNL, a driving IC chip 2 connected to the display panel PNL, a flexible wiring board 3, and the like.

  The display panel PNL includes an array substrate AR that is a first substrate, and a counter substrate CT that is a second substrate disposed to face the array substrate AR. Such a display panel PNL includes an active area ACT for displaying an image. This active area ACT is composed of a plurality of pixels PX arranged in an m × n matrix (where m and n are positive integers).

  Next, a liquid crystal display device will be described as an example of the display device 1.

  FIG. 2 is a diagram schematically showing a configuration and an equivalent circuit of the array substrate AR applicable to the liquid crystal display device of the present embodiment.

  The array substrate AR includes n gate wirings G (G1 to Gn), m source wirings S (S1 to Sm), and the like as signal wirings in the active area ACT. Further, although not shown, the array substrate AR includes various wirings such as auxiliary capacitance lines as other signal wirings.

  In the illustrated example, each of the gate lines G extends substantially along the first direction X. Each of the source lines S extends substantially along the second direction Y. These gate lines G and source lines S are formed in a lattice pattern in the active area ACT.

  Each gate line G is drawn outside the active area ACT and connected to the gate driver GD. Each source line S is drawn outside the active area ACT and connected to the source driver SD. At least a part of the gate driver GD and the source driver SD is formed on, for example, the array substrate AR, and is connected to the driving IC chip 2 with a built-in controller.

  The switching element SW is constituted by, for example, an n-channel thin film transistor (TFT). The switching element SW is electrically connected to the gate line G and the source line S. Such a switching element SW is disposed in each pixel PX. In the active area ACT, m × n switching elements SW are formed.

  The pixel electrode PE is electrically connected to the switching element SW. Such a pixel electrode PE is arranged in each pixel PX. In the active area ACT, m × n pixel electrodes PE are formed.

  Note that the counter electrode CE indicated by a broken line in the drawing may be formed on the array substrate AR or may be formed on a counter substrate (not shown).

  FIG. 3 is a cross-sectional view schematically showing a configuration of a liquid crystal display device to which the array substrate AR shown in FIG. 2 is applied. Here, only main parts necessary for the description are shown.

  That is, the liquid crystal display device includes a transmissive display panel PNL and a backlight BL. The array substrate AR is formed using a first insulating substrate 10 having optical transparency such as a glass plate or a plastic substrate. The array substrate AR includes a switching element SW, a pixel electrode PE, and the like on the side of the first insulating substrate 10 facing the counter substrate CT. The surface of the array substrate AR facing the counter substrate CT is covered with an alignment film (not shown).

  The switching element SW shown here is a top-gate thin film transistor. The semiconductor layer SC of the switching element SW is disposed on the first insulating substrate 10. The semiconductor layer SC is made of, for example, polysilicon. Such a semiconductor layer SC is covered with the first insulating film 11. The first insulating film 11 is also disposed on the first insulating substrate 10. Note that an undercoat layer may be disposed as an insulating film between the first insulating substrate 10 and the semiconductor layer SC.

  The gate electrode WG of the switching element SW is disposed on the first insulating film 11 and is located immediately above the semiconductor layer SC. The gate electrode WG is electrically connected to a gate wiring not shown. Such a gate electrode WG is covered with the second insulating film 12. The second insulating film 12 is also disposed on the first insulating film 11.

  The source electrode WS and the drain electrode WD of the switching element SW are disposed on the second insulating film 12. The source electrode WS and the drain electrode WD are in contact with the semiconductor layer SC through contact holes that penetrate the first insulating film 11 and the second insulating film 12, respectively. The source electrode WS is electrically connected to the source line S. These source electrode WS and drain electrode WD are covered with a third insulating film 13. The third insulating film 13 is also disposed on the second insulating film 12.

  The pixel electrode PE is disposed on the third insulating film 13. The pixel electrode PE is electrically connected to the drain electrode WD through a contact hole that penetrates the third insulating film 13. The pixel electrode PE is formed of an oxide conductive material having optical transparency such as indium tin oxide (ITO) or indium zinc oxide (IZO). Such a pixel electrode PE is covered with an alignment film (not shown).

  On the other hand, the counter substrate CT is formed using a second insulating substrate 30 having optical transparency such as a glass plate or a plastic substrate. The counter substrate CT includes a black matrix 31 and the like on the side of the second insulating substrate 30 facing the array substrate AR. The surface of the counter substrate CT facing the array substrate AR is covered with an alignment film (not shown).

  The black matrix 31 is disposed on the second insulating substrate 30 so as to be located immediately above the wiring portions such as the gate wiring, the source wiring, and the switching element SW. Such a black matrix 31 is made of, for example, a resin material colored in black or a light-shielding metal material such as chromium (Cr).

  The array substrate AR and the counter substrate CT as described above are arranged so that the alignment films face each other. At this time, a predetermined cell gap is formed between the array substrate AR and the counter substrate CT by a columnar spacer (not shown). The array substrate AR and the counter substrate CT are bonded together with a sealing material (not shown) in a state where a predetermined cell gap is formed. The liquid crystal layer LQ is held in a cell gap formed between the array substrate AR and the counter substrate CT.

  A first optical element OD1 including a polarizing plate is attached to the outer surface of the array substrate AR, that is, the outer surface of the first insulating substrate 10 constituting the array substrate AR with an adhesive or the like. A second optical element OD2 including a polarizing plate is attached to the outer surface of the counter substrate CT, that is, the outer surface of the second insulating substrate 30 constituting the counter substrate CT with an adhesive or the like.

  The backlight BL is disposed on the back side of the array substrate AR. As such a backlight BL, various forms can be applied, and any of those using a light emitting diode (LED) or a cold cathode tube (CCFL) as a light source can be applied. Description of the detailed structure is omitted.

  In FIG. 3, a source wiring S is illustrated as a signal wiring formed on the array substrate AR. Similar to the source electrode WS and the drain electrode WD, the source line S is disposed on the second insulating film 12 and covered with the third insulating film 13.

  Such a source wiring S includes at least a base layer M1, a transparent layer M2, and a main wiring layer M3. In the illustrated example, the source wiring S is formed of a three-layered laminate, but may be a laminate of four or more layers. For example, an adhesive layer having good adhesion between the transparent layer M2 and the main wiring layer M3 may be interposed.

  The foundation layer M1 is formed on the second insulating film 12. The foundation layer M1 is formed so that the transmittance in the visible light region (for example, a wavelength range from 400 nm to 800 nm) is 0.5 or more. That is, the foundation layer M1 is a semi-transmissive layer that allows more than half of the light passing therethrough to pass.

  Such a base layer M1 is preferably a conductive layer in order to form part of the signal wiring, but may be an insulating layer. For example, the base layer M1 is formed of, for example, tungsten (W), molybdenum (Mo), titanium (Ti), or an alloy or silicide containing any of these as a main component.

  The underlayer M1 formed of such a material is a very thin thin film. The film thickness T1 is set so that the base layer M1 functions as a semi-transmissive layer even if the material forming the base layer M1 has light absorptivity. As an example, the base layer M1 is formed of molybdenum having a film thickness T1 of 8 nm. The underlayer M1 is different from a thin film such as the second insulating film 12 formed on substantially the entire surface of the substrate, and is formed in a shape corresponding to the signal wiring pattern.

  Further, when the signal wiring is formed on the second insulating film 12, the base layer M <b> 1 is formed of a material having good compatibility with the second insulating film 12, and is in close contact with the second insulating film 12. Acts as a layer.

  The transparent layer M2 is laminated on the base layer M1. The transparent layer M2 can transmit light in the visible light region. Such a transparent layer M2 is preferably a conductive layer in order to form a part of the signal wiring, but may be an insulating layer. For example, the transparent layer M2 is formed of a transparent material, for example, an oxide conductive material having optical transparency such as indium tin oxide (ITO) or indium zinc oxide (IZO).

  Such a transparent layer M2 has a film thickness d thicker than the film thickness T1 of the underlayer M1. As an example, the transparent layer M2 is formed of ITO having a film thickness d of 40 nm. The film thickness d of the transparent layer M2 varies depending on the refractive index of the material forming the transparent layer M2. In the present embodiment, when the film thickness of the transparent layer M2 is d (nm) and the refractive index of the transparent layer M2 is n, the product n × d is smaller than 400.

  The main wiring layer M3 is laminated on the transparent layer M2. Such a main wiring layer M3 is a conductive layer made of a main wiring material having a lower resistance than the material of the base layer M1 and the transparent layer M2 in order to form the main part of the signal wiring. That is, the main wiring layer M3 includes, for example, aluminum (Al), silver (Ag), copper (Cu), tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta), chromium (Cr) or , And an alloy containing any of these as a main component.

  Such a main wiring layer M3 has a film thickness T3 that is thicker than the film thickness d of the transparent layer M2, for example. The film thickness of the main wiring layer M3 is set in consideration of wiring resistance and the like. As an example, the main wiring layer M3 is formed of silver (Ag) having a film thickness T3 of 500 nm.

  Although not shown in FIG. 3, other signal wirings formed on the array substrate AR, such as gate wirings and auxiliary capacitance lines, are also provided with at least the base layer M1, A configuration including the transparent layer M2 and the main wiring layer M3 can be applied.

  On the other hand, the source electrode WS and the drain electrode WD that can be formed in the same process as the source wiring S are mainly formed of the same material as that of the main wiring layer M3. Since the source electrode WS and the drain electrode WD are in contact with the semiconductor layer SC, depending on the material forming them, mutual diffusion of components may occur between the semiconductor layer SC and the performance of the switching element SW may be deteriorated. is there. For this reason, a diffusion prevention layer formed of the same material as that of the base layer M1 may be interposed between the source electrode WS and drain electrode WD and the semiconductor layer SC.

  FIG. 4 is a diagram for explaining a reflection reduction effect in the signal wiring in the present embodiment. The left side of the figure shows a signal wiring A constituted by a two-layer laminate of a base layer M1 which is an adhesion layer and a main wiring layer M3 made of a main wiring material stacked on the base layer M1. Yes. The right side in the figure is a base layer M1 which is an adhesion layer and a semi-transmissive layer, a transparent layer M2 made of a transparent material stacked on the base layer M1, and a main wiring stacked on the transparent layer M2. The signal wiring B comprised by the 3 layer laminated body with the main wiring layer M3 which consists of material is shown.

  When the signal wiring A is irradiated with light such as backlight light, most of the light is reflected to the back surface side at the bottom surface of the underlayer M1 (or the interface between the second insulating film 12 and the underlayer M1). , A part of the light enters the base layer M1 and attenuates. The light reflected on the back surface side by the signal wiring A can cause a display defect (light leakage at the time of black display).

  On the other hand, in the signal wiring B corresponding to the present embodiment, since the film thickness T1 of the base layer M1 is as thin as about 10 nm, the light irradiated toward the signal wiring B passes through the base layer M1, Further, the light enters the transparent layer M2. The light incident on the inside of the transparent layer M2 is reflected on the bottom surface of the main wiring layer M3 (or the interface between the transparent layer M2 and the main wiring layer M3). The base layer M1 and the main wiring layer M3 facing each other with the transparent layer M2 interposed therebetween form an optical cavity.

  For this reason, most of the light once incident on the transparent layer M2 is confined inside the signal wiring B. That is, light other than the wavelength satisfying the relationship of λ = 2 · n · d (where n is the refractive index of the material forming the transparent layer M2 and d is the film thickness of the transparent layer M2) It is not emitted outside B.

  In the present embodiment, as described above, the film thickness d and the refractive index n of the transparent layer M2 are set so as to satisfy the relationship of 2 · n · d <800 (nm), that is, the relationship where n · d is smaller than 400. Has been. For this reason, visible light having a wavelength smaller than 800 nm cannot enter the signal wiring B again after entering the signal wiring B. Therefore, it is possible to reduce the reflected light from the signal wiring B, and it is possible to suppress display defects caused by such reflected light. As a result, the display quality of the display device can be improved.

  Further, since it is possible to reduce the reflected light at the signal wiring B, it is possible to suppress undesired light leakage near the signal wiring B, and to narrow the width of the black matrix 31. It is possible to improve the area (aperture ratio) of the transmission part surrounded by the black matrix 31.

  Next, an organic EL display device will be described as another example of the display device 1.

  FIG. 5 is a cross-sectional view schematically showing the configuration of the organic EL display device of the present embodiment. Here, only main parts necessary for the description are shown. The organic EL display device shown here is configured by applying the array substrate AR shown in FIG. However, the array substrate AR is different from the example shown in FIG. 3 in that it includes a bottom emission type organic EL element OLED. In addition, about the same structure as the example shown in FIG. 3, the same referential mark is attached | subjected and detailed description is abbreviate | omitted.

  That is, the organic EL element OLED includes a pixel electrode PE, an organic light emitting layer ORG disposed on the pixel electrode PE, and a counter electrode CE disposed on the organic light emitting layer ORG. The bottom emission type organic EL element OLED emits light generated in the organic light emitting layer ORG toward the back side of the first insulating substrate 10.

  Also in such an organic EL display device, the array substrate AR includes various signal lines such as a gate line and a power line in addition to the illustrated source line S. At least a part of such signal wiring includes the base layer M1, the transparent layer M2, and the main wiring layer M3 as described above. In the case of the configuration including the bottom emission type organic EL element OLED, the back surface of the array substrate AR, that is, the back surface of the first insulating substrate 10 is the display surface.

  External light is incident on such a display surface. When the signal wiring formed on the first insulating substrate 10 has a configuration as shown in FIG. 4A, external light incident on the display surface is reflected by the signal wiring A and may cause a reduction in contrast ratio. There is. On the other hand, when the signal wiring B of the present embodiment is applied, external light incident on the display surface is confined inside the signal wiring B, and unwanted reflection can be reduced. In general, a circularly polarizing plate is added to the display surface in order to prevent reflection of external light. However, according to the configuration of the present embodiment, an external material such as a circularly polarizing plate is not required. Light reflection can be reduced.

  FIG. 6 is a diagram showing simulation results of the reflectance of light incident on various types of signal wirings. Here, the reflectance of the light in the visible light region (400 nm to 800 nm) incident from the vertically lower side of the signal wiring toward the base layer M1 is shown by calculation.

  In (A) corresponding to Comparative Example 1, molybdenum (Mo) is formed as a base layer M1 with a film thickness T1 of 50 nm, and silver (Ag) is formed as a main wiring layer M3 laminated on the base layer M1 with a thickness of 500 nm. The film was formed with a film thickness T3. The light incident toward the base layer M1 is substantially reflected only by the base layer M1, and has a reflectance of molybdenum (Mo) forming the base layer M1.

  In (B) corresponding to Comparative Example 2, molybdenum (Mo) is formed as a base layer M1 with a film thickness T1 of 8 nm, and silver (Ag) is formed as a main wiring layer M3 stacked on the base layer M1 with a thickness of 500 nm. The film was formed with a film thickness T3. The comparative example 2 is different from the comparative example 1 in that the base layer M1 functions as a semi-transmissive layer. For this reason, part of the light passes through the base layer M1 and reaches the interface with the main wiring layer M3, so that the reflectance changes.

  In (C) corresponding to the present embodiment, molybdenum (Mo) is formed as a base layer M1 with a film thickness T1 of 8 nm, and ITO is formed as a transparent layer M2 stacked on the base layer M1 with a film thickness d of 40 nm. Then, silver (Ag) was formed with a film thickness T3 of 500 nm as the main wiring layer M3 laminated on the transparent layer M2.

  This embodiment is different from Comparative Example 2 in that a transparent layer M2 is disposed between the base layer M1 and the main wiring layer M3. According to such a configuration, the light transmitted through the base layer M1 reaches the transparent layer M2, and interference occurs, so that the reflectance in the visible light region is 1 / compared to the configuration of the comparative example 1 shown in FIG. It was confirmed that it was reduced to 2 or less.

From the viewpoint of reflectance, the transparent layer M2 is preferably formed of a material having a low refractive index. For example, SiO ₂ has a lower refractive index than ITO. However, when an insulating material such as SiO ₂ is used, a capacitance is formed in the signal wiring. For this reason, in order to prevent the impedance of the signal wiring from increasing, in the present embodiment, ITO is used as a transparent film. In applications where the capacitance is not a problem for DC or low frequency, an insulating film such as silicon oxide (SiO ₂ ) can be used as the transparent layer M2.

  As described above, according to the present embodiment, it is possible to provide a display device and a display device array substrate that can improve display quality.

  In addition, although some embodiment of this invention was described, these embodiment is shown as an example and is not intending limiting the range of invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

DESCRIPTION OF SYMBOLS 1 ... Display apparatus PNL ... Display panel AR ... Array substrate CT ... Counter substrate G ... Gate wiring S ... Source wiring SW ... Switching element PE ... Pixel electrode CE ... Counter electrode BL ... Backlight M1 ... Base layer M2 ... Transparent layer M3 ... Main wiring layer OLED ... Organic EL element ORG ... Organic light emitting layer

Claims (5)

An insulating substrate;
An indium tin oxide (ITO) disposed on the insulating substrate and having a transmittance of 0.5 or more in the visible light region, having a thickness greater than that of the underlayer and stacked on the underlayer Or a transparent layer formed of indium zinc oxide (IZO) , and a signal wiring formed by a laminate of a main wiring layer made of a main wiring material laminated on the transparent layer,
An array substrate for a display device, wherein a product n × d is smaller than 400, where d is a thickness of the transparent layer and n is a refractive index of the transparent layer.   2. The display according to claim 1, wherein the underlayer is formed of tungsten (W), molybdenum (Mo), titanium (Ti), or an alloy or silicide containing any one of them as a main component. Array substrate for equipment.   The main wiring layer is made of aluminum (Al), silver (Ag), copper (Cu), tungsten (W), molybdenum (Mo), titanium (Ti), tantalum (Ta), chromium (Cr), or any of these 2. The array substrate for a display device according to claim 1, wherein the array substrate is formed of an alloy containing such as a main component. An insulating substrate, and a base layer disposed on the insulating substrate and having a transmittance in the visible light region of 0.5 or more, having a film thickness thicker than the base layer and being laminated on the base layer, indium tin A signal wiring formed by a laminate of a main wiring layer comprising a transparent layer formed of oxide (ITO) or indium zinc oxide (IZO) , and a main wiring material laminated on the transparent layer; An array substrate comprising: a switching element electrically connected to the signal wiring; and a pixel electrode electrically connected to the switching element;
A counter substrate disposed opposite to the array substrate;
A liquid crystal layer held between the array substrate and the counter substrate;
A backlight disposed on the back side of the array substrate,
In the signal wiring of the array substrate, the product n × d is smaller than 400, where d (nm) is the film thickness of the transparent layer and n is the refractive index of the transparent layer. An insulating substrate, and a base layer disposed on the insulating substrate and having a transmittance in the visible light region of 0.5 or more, having a film thickness thicker than the base layer and being laminated on the base layer, indium tin A signal wiring formed by a laminate of a main wiring layer comprising a transparent layer formed of oxide (ITO) or indium zinc oxide (IZO) , and a main wiring material laminated on the transparent layer; An array substrate comprising: a switching element electrically connected to the signal wiring; and an organic EL element that is electrically connected to the switching element and emits light toward a back side of the insulating substrate;
A counter substrate disposed opposite to the array substrate,
In the signal wiring of the array substrate, the product n × d is smaller than 400, where d (nm) is the film thickness of the transparent layer and n is the refractive index of the transparent layer.

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