JP5234729B2 - Insulating material, wiring board, and semiconductor device - Google Patents

Description

  The present invention relates to an insulating material used for forming a wiring board, a wiring board using the same, and a semiconductor device.

  Recently, in order to reduce the size of a semiconductor device, a plurality of solder balls are arranged in a matrix on the surface of a wiring board, a semiconductor chip is placed on the solder balls, and the solder balls are melted. Thus, a technique for connecting a semiconductor chip to a wiring board has been developed. Examples of such semiconductor devices include FCBGA (Flip Chip Ball Grid Array) and WLCSP (Wafer Level Chip Size Package). In addition, the wiring board includes a multilayer wiring board in which a plurality of resin layers in which wirings are embedded are stacked, for example, a package board such as a build-up resin board or an MLTS (Multi Layer Thin Substrate) (trade name) structure. .

  However, this technique has the following problems. That is, the thermal expansion coefficient of silicon that is a material of the semiconductor chip and that of the resin that forms the wiring board are different from each other. For this reason, even if the semiconductor chip is mounted on the wiring board so that no force is applied to the solder balls at the time of mounting, when the semiconductor device is cooled to room temperature, the shrinkage amount of the semiconductor chip and the shrinkage amount of the wiring board are mutually Since they are different, the semiconductor device is warped, and a force is applied to the solder ball. In addition, when the semiconductor device is repeatedly loaded with heating and cooling cycles due to heat generated by the operation of the semiconductor chip and changes in the outside air temperature, the solder balls may be fatigued and disconnected.

  Conventionally, in order to avoid this problem and improve the connection reliability of the semiconductor device, it has been attempted to form the wiring board with a resin having the highest possible rigidity. This is intended to suppress warpage of the semiconductor device and deformation of the wiring board by increasing the rigidity of the wiring board. For example, Patent Document 1 discloses a technique in which an insulating material having a Young's modulus of 10 GPa or more is used as a wiring board material.

  On the other hand, Patent Document 2 discloses a technique that uses an insulating material having a Young's modulus of 1 GPa or less as a material for a wiring board.

  However, the above technique has the following problems. That is, the wiring board described in Patent Document 1 has insufficient connection reliability of the semiconductor device with respect to the temperature cycle even when the wiring board is formed of a material having a Young's modulus of 10 GPa or more. Moreover, the base material, which is the main component of the insulating material forming the wiring board, tends to have low adhesion with the copper wiring when the surface is plated with electroless copper to form a copper wiring. For this reason, an additive is added to such a base material in order to improve the adhesion to the copper wiring, but the effect of the additive varies depending on the type of the base material, and the effect of improving the plating adhesiveness is obtained. There may not be.

In addition, the insulating material described in Patent Document 2 has a relatively large linear expansion coefficient, and the connection reliability of the via may be lowered. At the same time, the insulating material has been placed at a high temperature such as 180 ° C. for a long time. In some cases, the heat resistance is insufficient.
JP 2002-198462 A JP 2007-056255 A

  The present invention has been made in view of such problems, and an object of the present invention is an insulation having excellent low thermal expansion, high heat resistance and low elasticity, and good adhesion of electroless plating. To provide materials. Another object of the present invention is to provide a wiring board capable of following the thermal expansion of an external element in a semiconductor device in which an external element such as a semiconductor chip is mounted on an insulating substrate, suppressing warping of the semiconductor device, and wiring. An object of the present invention is to provide a wiring board that can alleviate a force applied to a connection portion between a substrate and an external element, and can provide a semiconductor device having good via connection reliability. Furthermore, the connection reliability with respect to the temperature cycle is good, there is almost no deterioration of characteristics even when it is placed at a high temperature such as 180 ° C for a long period of time, and it shows high reliability and is intended to be used for on-board applications. An object of the present invention is to provide a semiconductor device capable of performing

（式（１）中のｎ、式（２）中のｍは、ｎ／（ｍ＋ｎ）が０．０５以上０．８以下を満たす整数を示す。）

（式（３）中、ｘは０以上５０以下の整数を示す。） The present invention relates to a polyamide elastomer (A) having an aromatic segment having a functional group capable of reacting with an epoxy resin, an aromatic segment not containing a functional group capable of reacting with an epoxy resin, and a saturated aliphatic chain segment, and a polar group. Containing a crosslinkable rubber (B), an epoxy resin (C), and a curing agent for epoxy resin (D) ,
The polyamide elastomer (A) has an aromatic polyamide segment represented by the formula (1), an aromatic polyamide segment represented by the formula (2), and a saturated aliphatic chain segment represented by the formula (3). Insulating material.

(N in the formula (1) and m in the formula (2) are integers satisfying n / (m + n) of 0.05 or more and 0.8 or less.)

(In formula (3), x represents an integer of 0 to 50.)

  The present invention also relates to a wiring board formed using the above insulating material, and a semiconductor device including the wiring board.

  The insulating material of the present invention has excellent low thermal expansion, high heat resistance, and low elasticity, and has good electroless plating adhesion. The wiring board of the present invention is a semiconductor device in which an external element such as a semiconductor chip is mounted on an insulating substrate, the wiring board can follow the thermal expansion of the external element, suppresses the warp of the semiconductor device, and the wiring board The force applied to the connection portion between the external element and the external element can be relaxed, and a semiconductor device with good via connection reliability can be provided. In addition, the semiconductor device of the present invention has good connection reliability with respect to the temperature cycle, shows almost no deterioration in characteristics even when placed at a high temperature such as 180 ° C. for a long period of time, and exhibits high reliability. Development to applications can be achieved.

（式（１）中のｎ、式（２）中のｍは、ｎ／（ｍ＋ｎ）が０．０５以上０．８以下を満たす整数を示す。）

（式（３）中、ｘは０以上５０以下の整数を示す。）
上記熱伝導性樹脂材料を用いて射出成形又は圧縮成形により成形された熱伝導性成形体に関する。本発明の絶縁材料は、架橋後、ポリアミドエラストマー（Ａ）、架橋型ゴム（Ｂ）、エポキシ樹脂（Ｃ）、エポキシ樹脂用硬化剤（Ｄ）の全体が架橋により一体的に結合した構造を有することにより、熱による体積変動を極めて顕著に抑制することができる。 The insulating material of the present invention includes an aromatic segment having a functional group capable of reacting with an epoxy resin, an aromatic segment not containing a functional group capable of reacting with an epoxy resin, and a polyamide elastomer (A) having a saturated aliphatic chain segment; Contains a crosslinkable rubber (B) having a polar group, an epoxy resin (C), and a curing agent for epoxy resin (D) ,
The polyamide elastomer (A) has an aromatic polyamide segment represented by the formula (1), an aromatic polyamide segment represented by the formula (2), and a saturated aliphatic chain segment represented by the formula (3). And

(N in the formula (1) and m in the formula (2) are integers satisfying n / (m + n) of 0.05 or more and 0.8 or less.)

(In formula (3), x represents an integer of 0 to 50.)
The present invention relates to a heat conductive molded body formed by injection molding or compression molding using the above heat conductive resin material. The insulating material of the present invention has a structure in which the polyamide elastomer (A), the crosslinked rubber (B), the epoxy resin (C), and the epoxy resin curing agent (D) are integrally bonded together after crosslinking after crosslinking. As a result, the volume fluctuation due to heat can be suppressed remarkably.

The polyamide elastomer (A) used for the insulating material of the present invention is capable of reacting with an aromatic segment having a functional group capable of reacting with the epoxy resin (C) (hereinafter referred to as aromatic segment (a1)) and the epoxy resin. It has an aromatic segment containing no functional group (hereinafter referred to as aromatic segment (a2)) and a saturated aliphatic chain segment. In the polyamide elastomer (A), the aromatic segment (a1) and the aromatic segment (a2) constitute a polyamide component as an aromatic polyamide segment (a1 ′) and an aromatic polyamide segment (a2 ′), respectively, and saturated aliphatic It constitutes a component - chain segment elastomer. Whereas the aromatic polyamide segment forms a crosslink with the epoxy resin and is cured, the saturated aliphatic chain segment does not form a crosslink with the epoxy resin and remains a soft segment even after curing, Rubber elasticity can be imparted to the insulating material. Moreover, adjustment of the amount of the aromatic segment (a1) which has a functional group which can react with an epoxy resin by having the aromatic segment (a2) which does not contain the functional group which can react with an epoxy resin in an aromatic segment The crosslink density formed between the epoxy resin and the epoxy resin can be easily adjusted. The functional group reactive with an epoxy resin having in the aromatic segment (a1), a hydroxy group.

The aromatic polyamide segment (a1 ′) is specifically an aromatic polyamide segment represented by the formula (1) , and the aromatic polyamide segment (a2 ′) is specifically represented by the formula (2) in an aromatic polyamide segment represented.

N in the above formula (1), m in the formula (2) is, n / (m + n) is 0.05 to 0.8. When n / (m + n) is 0.05 or more, the epoxy resin is crosslinked with a sufficient crosslinking density, and an insulating material having excellent heat resistance, solvent resistance, and film strength can be obtained. Moreover, if n / (m + n) is 0.8 or less, formation of excessive crosslinking is suppressed, and an insulating material excellent in flexibility and elongation can be obtained.

  Even if the aromatic polyamide segment (a1 ′) represented by the above formula (1) and the aromatic polyamide segment (a2 ′) represented by the formula (2) are arranged connected to each other, they are arranged separately. It may be.

Further, the saturated aliphatic chain segment in the polyamide elastomer (A) does not have an unsaturated bond, and therefore exhibits low thermal expansibility. Further, those having a branched structure increase the entanglement effect of the molecular chain and lower the heat. It shows an inflatable. The side chain, 1, those having a hydrogenation Poributashien chain or the like 4-butadiene and the like are preferable. Specifically, those represented by the formula (3). Wherein, x is 0 or more and 50 or less.

  The polyamide elastomer (A) is preferably a phenolic hydroxyl group-containing polyamide-hydrogenated polybutadiene copolymer (hereinafter referred to as a hydroxyl group-containing copolymer) represented by the formula (4). In the formula, m, n and x represent the same as m, n and x in the formulas (1) and (2).

In the hydroxyl group-containing copolymer represented by the formula (4), the aromatic polyamide segment represented by the formula (1), the aromatic polyamide segment represented by the formula (2), and the saturated fat represented by the formula (3) The mass ratio with the group chain segment is preferably 30:70 to 70:30.

  The polyamide elastomer (A) preferably has a weight average molecular weight (Mw) of 200,000 or less, and more preferably 100,000 or less. If the weight average molecular weight (Mw) of the polyamide elastomer (A) is 200,000 or less, the semi-cured material in the insulating material has sufficient fluidity in the temperature range of 100 ° C. or more and 180 ° C. or less and easily covers the wiring. Can be buried. Moreover, it is preferable that the weight average molecular weight (Mw) of a polyamide elastomer (A) is about 10,000 or more from the point which can exhibit the film formability and the characteristic of aromatic polyamide.

  The crosslinkable rubber (B) having a polar group used for the insulating material of the present invention is not particularly limited as long as it has a polar group, but the epoxy resin (C) or a curing agent for epoxy resin as the polar group. Those having a functional group that is easily bonded to (D) and capable of forming a crosslink are preferred. As the polar group of the cross-linked rubber (B), for example, a hydroxyl group, a carboxyl group, an epoxy group, and the like are preferable. Specifically, for example, XSK-500 (manufactured by JSR Corporation), Staphyloid IM-203, AC-4030 (manufactured by Ganz Kasei) or the like is used as the cross-linked rubber (B) having such a polar group. Can do. Such a cross-linked rubber (B) itself forms a cross-link to the epoxy resin (C) and the epoxy resin curing agent (D) to form a part of the cross-linked structure, and the low thermal expansion of the insulating material. Can be achieved.

  The epoxy resin (C) used for the insulating material of the present invention is generally one in which the epoxy resin is very small in volume reduction upon curing, but preferably has a small volume variation due to heat, and the polyamide elastomer (A) and Those that are easily bonded to the cross-linked rubber (B) are preferred. Specifically, for example, phenol biphenylene aralkyl type epoxy resin, phenol xylene aralkyl type epoxy resin, phenol diphenyl ether aralkyl type epoxy resin, bifunctional biphenyl type epoxy resin, anthracene containing novolac type epoxy resin, fluorene containing novolak type epoxy resin, Mention may be made of bisphenolfluorene-containing novolac type epoxy resins, phenol biphenylene triazine type epoxy resins, and phenol xylene triazine type epoxy resins. Also, naphthalenediol type epoxy resin, phenol novolac epoxy resin, cresol novolac epoxy resin, bisphenol F-containing novolac type epoxy resin, bisphenol A-containing novolac type epoxy resin, phenol triazine type epoxy resin, cresol triazine type epoxy resin, tetraphenylol ethane Type epoxy resin, trisphenylol ethane type epoxy resin, polyphenol type epoxy resin, aliphatic epoxy resin, aromatic ester type epoxy resin, cyclic aliphatic ester type epoxy resin, ether ester type epoxy resin and the like. In addition, glycidylated products of amine compounds such as diaminodiphenylmethane, diethylenetriamine and diaminodiphenylsulfone can also be used. In addition, a phenoxy resin having a bisphenol A type, a bisphenol F type, a bisphenol S type or a biphenyl skeleton-containing type and having both ends being epoxy groups can also be used. The phenoxy resin preferably has a polystyrene-equivalent weight average molecular weight of about 20,000 to 100,000. These epoxy resins can be used alone or in combination of two or more.

  As the curing agent (D) for epoxy resin used for the insulating material of the present invention, a generally used curing agent (D) can be used as long as it efficiently forms a crosslink in the epoxy resin (C). Specific examples of the epoxy resin curing agent (D) include bisphenol A type phenol resin, bisphenol F type phenol resin, bisphenol S type phenol resin, diphenyl ether of biphenyl isomer, naphthalene diol type resin, phenol novolac resin, Phenol novolak resin modified with allyl group, cresol novolak resin, phenol diphenyl ether aralkyl type resin, naphthalene-containing novolak type resin, anthracene-containing novolak type resin, fluorene-containing novolak type resin, bisphenol fluorene-containing novolak type resin, bisphenol F-containing novolak type phenol Resin, bisphenol A-containing novolac type phenol resin, phenol biphenyl triazine type resin, phenol xylene triazine type Fat, phenol triazine type resin, cresol novolac triazine type resin, tetraphenylol ethane type resin, trisphenylol ethane type resin, polyphenol type resin, aromatic ester type phenol resin, cyclic aliphatic ester-containing phenol resin, ether ester type phenol Examples thereof include resins. Along with these epoxy resin curing agents (D), amine compounds such as diaminodiphenylmethane, diethylenetriamine and diaminodiphenylsulfone, bisphenol A type, bisphenol F type, bisphenol S type or biphenyl skeleton containing type, one terminal Alternatively, a phenoxy resin in which both ends are hydroxyl groups can also be used. The phenoxy resin preferably has a polystyrene-equivalent weight average molecular weight of, for example, about 20,000 to 100,000. These can be used 1 type or in combination of 2 or more types in the epoxy resin curing agent (D).

  The content of these polyamide elastomers (A), the crosslinked rubber (B) having a polar group, the epoxy resin (C), and the epoxy resin curing agent (D) in the insulating material is determined by these resin components. When the masses occupied therein are A, B, C, and D, respectively, the polyamide elastomer (A) is 20% by mass to 80% by mass, that is, the value of (A × 100) / (A + B + C + D) is 20% to 80%. It is preferable that If the content of the polyamide elastomer (A) is 20% by mass or more, the insulating material is given toughness, and the insulating material has sufficient elongation at break. If it is 80% by mass or less, the insulating material is produced. The insulating material obtained by curing with sufficient fluidity and curability is excellent in chemical resistance.

  The content of the cross-linkable rubber (B) is preferably 3% by mass or more and 25% by mass or less, that is, the value of (B × 100) / (A + B + C + D) is preferably 3 or more and 25 or less, more preferably 5% by mass or more. It is 20 mass% or less. If the content of the cross-linkable rubber (B) is 3% by mass or more, the insulating material is given adhesion to electroless plating, and if it is 25% by mass or less, the insulating material has excellent chemical resistance and processability. It will be excellent.

  In addition to the above, the insulating material of the present invention can contain a filler as long as these functions are not impaired. When the inorganic filler is included, the inorganic filler accounts for the total amount of the elastomer (A), the cross-linked rubber (B), the epoxy resin (C), the epoxy resin curing agent (D), and the inorganic filler (E). The mass ratio, that is, the value of (E × 100) / (A + B + C + D + E) is preferably 50% by mass or less. If the mass ratio of the inorganic filler is 50% by mass or less, it is possible to suppress a decrease in elongation at break and an increase in Young's modulus in the insulating material, and to have sufficient stress relaxation properties.

  Specifically, for example, fused silica, crystalline silica, alumina, zircon, calcium silicate, calcium carbonate, silicon carbide, silicon nitride, boron nitride, beryllia, talc, mica (mica), oxidation Powders such as titanium and zirconia, or beads obtained by spheroidizing these materials, single crystal fibers such as calcium titanate, silicon carbide, silicon nitride, boron nitride and alumina, aluminum hydroxide, magnesium hydroxide and zinc borate The metal hydrate can be mentioned. Furthermore, the surface of these fillers can also be used which has been surface treated with various organic substances including silane coupling agents, epoxy resins and phenol resins. These fillers may be used alone or in combination of two or more.

  An epoxy resin curing acceleration catalyst can also be used as the filler. The curing accelerating catalyst may be one generally used for curing an epoxy resin, and examples thereof include imidazoles, diazabicycloalkenes and derivatives thereof, and tertiary amines. These curing accelerating catalysts may be used alone or in combination of two or more.

  As other fillers, flexibility imparting agents such as silicone rubber, silicone powder, acrylonitrile butadiene rubber (NBR), and indene may be added as necessary. Furthermore, organic silane compounds, organic titanate compounds, A coupling agent such as an organic aluminate compound may be appropriately blended. In particular, among silane coupling agents, an organic silane compound, for example, an alkoxysilane having a reactive functional group, is effective in improving the adhesion of the insulating material and the solder heat resistance. Examples of the alkoxysilane include aminosilane compounds such as γ-aminopropyltrimethoxysilane, N-phenyl-γ-aminopropyltriethoxysilane, γ-glycidoxypropyltrimethoxysilane, and γ-glycidoxypropylmethyldisilane. Epoxysilane compounds such as ethoxysilane, mercaptosilane compounds such as γ-mercaptopropyltrimethoxysilane, and ureidosilane compounds such as γ-ureidopropyltriethoxysilane can be used.

  Furthermore, as the filler, an improving agent that improves the adhesion to a conductive foil laminated on the insulating material, for example, a copper foil can be used. As an improving agent for improving adhesion, components used for a rust inhibitor capable of forming a bond with a copper surface, for example, a mercapto compound other than a triazole compound or a mercaptosilane compound, and a copper complex of imidazole may be added. Examples of triazole compounds include 1,2,3-benzotriazole and tolyltriazole. Examples of mercapto compounds include 2,4,6-trimercapto-s-triazine, 2-di-n-butylamino-4,6-dimercapto-s-triazine, 2-anilino-4,6-dimercapto-s-triazine. Etc. Examples of the copper complex of imidazole include 2-methylimidazole copper (II) complex. These can be used alone or in combination of two or more components.

  Furthermore, you may add a flame retardant as needed. As the flame retardant, a halogen flame retardant, a nitrogen flame retardant, a phosphorus flame retardant, and an inorganic flame retardant can be used. Examples of halogen-based flame retardants include brominated bisphenol A resins and epoxidized products thereof. Among nitrogen-based flame retardants, examples of the additive compound include melamine and isocyanuric acid compounds. Among the nitrogen-based flame retardants, examples of the reactive compound include a phenol triazine type curing agent and an epoxy resin, and a benzoxazine-based compound. Examples of phosphorus flame retardants include red phosphorus, phosphoric acid compounds, and organic phosphorus compounds. Examples of the inorganic flame retardant include compounds obtained by coating the surface of talc or silica with the metal hydrate, zinc molybdate, zinc stannate, zinc molybdate or zinc stannate. In addition, when a halogen flame retardant is used, extremely excellent flame retardancy can be obtained by using antimony oxide in combination.

  In addition, a filler that does not lower the reliability of the semiconductor device using an insulating material, for example, a pigment, an antioxidant, an organic solvent, or the like can be used.

  As a method for producing the insulating material, a polyamide elastomer (A) is prepared using a method described in Japanese Patent Application No. 2006-336193. Specifically, an aromatic diamine raw material, a phenolic hydroxyl group-containing aromatic dicarboxylic acid raw material, an aromatic dicarboxylic acid raw material not containing a phenolic hydroxyl group is condensed, and an aromatic polyamide having carboxyl groups at both ends, or An aromatic polyamide having amino groups at both ends is obtained. Then, the obtained aromatic polyamide is amide-bonded with a saturated aliphatic diamine having an amino group at both ends or a saturated aliphatic dicarboxylic acid having a carboxyl group at both ends to obtain a polyamide elastomer (A).

  Condensation reaction (amide bond) of aromatic diamine raw material with phenolic hydroxyl group-containing aromatic dicarboxylic acid raw material, aromatic dicarboxylic acid raw material not containing phenolic hydroxyl group, and aromatic polyamide and saturated aliphatic dicarboxylic acid or saturated aliphatic The condensation reaction (amide bond) with diamine can be reacted with a phosphorus condensing agent in the presence of a pyridine derivative, and other organic solvents can be used. At that time, when an inorganic salt such as lithium chloride or calcium chloride is added, the molecular weight is further increased. A phosphorous ester is preferred as the phosphorus condensing agent. According to this production method, the phenolic hydroxyl group is contained without protecting the phenolic hydroxyl group that is a functional group and without causing a reaction between the phenolic hydroxyl group and another reactive group such as a carboxyl group or an amino group. An aromatic polyamide resin can be easily produced. Further, there is an advantage that polycondensation is not required at the time of polycondensation, that is, polycondensation is possible at about 150 ° C. or less.

  The polyamide elastomer (A) thus obtained, the crosslinkable rubber (B) having a polar group, the epoxy resin (C), and the curing agent for epoxy resin (D) are mixed, if necessary. The insulating material can be obtained by adding the filler.

  The insulating material can be formed into an integrated insulator by forming a bridge over the entire insulating material by heating. As a molding method, extrusion molding or the like can be used.

  The insulator thus obtained preferably has a Young's modulus of 2 GPa or less at room temperature such as 10 to 30 ° C. and a breaking elongation of 10% or less from the viewpoint of the reliability of the obtained insulator.

  The wiring board of the present invention is formed using the above insulating material. Although there is no restriction | limiting in particular as a wiring board, The thing used for a semiconductor device can be mentioned.

  A semiconductor device according to the present invention includes the above wiring board. As an example, the one shown in the schematic sectional view of FIG. 1 and the partial side view of FIG.

  The semiconductor device shown in FIGS. 1 and 2 is an FCBGA type semiconductor device, and includes a package substrate 2 having a stacked structure in which a plurality of insulating layers each having a wiring formed thereon are stacked. For example, a copper wiring 3 and a via 4 connected to the wiring 3 and provided in the thickness direction are formed. The wiring substrate formed using the insulating material is applied to at least the insulating layer 16a provided on the surface among the plurality of insulating layers of the package substrate 2, and the wiring substrate is used as the insulating layer disposed inside. May be applied. The insulating layer 16a (see FIG. 2) is provided with a mounting pad 5 that is connected to a via and connected to an electrode of the semiconductor chip 9 via a solder bump 7. The wiring 3, the via 4, and the mounting pad 5 may be collectively referred to as wiring. A plurality of ball pads 6 connected to vias are formed on the lower surface of the package substrate 2 opposite to the surface on which the insulating layer 16a is provided, and a conductive state is formed between the ball pads and the mounting pad. It is like that. The shape of the mounting pad and the ball pad is not particularly limited, but is arranged in a matrix on the surface of the package substrate 2, the mounting pads are smaller than the ball pads, and the arrangement interval is formed shorter. The solder bumps and the BGA balls 8 are connected to each other.

  The semiconductor chip 9 has a multilayer structure in which a plurality of IC layers each provided with an integrated circuit (IC) and wiring connected thereto are stacked on a substrate made of silicon or the like, and faces the package substrate 2. A plurality of input / output pads are provided on the surface. Each input / output pad is connected to each solder bump 7 of the package substrate 2, is electrically connected to the BGA ball 8, and the semiconductor chip 9 is fixed to the package substrate 2 by an underfill resin 10 filled around the solder bump 7. . Further, when a frame-shaped stainless steel or copper stiffener 11 surrounding the semiconductor chip 9 is adhered to the package substrate 2 by the adhesive layer 15, and the semiconductor chip 9 is accommodated in the frame-shaped shape, The stiffener 11 is provided so that the upper surface thereof is substantially flush with the upper surface of the semiconductor chip 9.

  Further, a lid 12 made of, for example, ceramics and having a planar shape similar to that of the package substrate is provided on the semiconductor chip 9 and the stiffener 11 by being bonded to the semiconductor chip 9 and the stiffener 11 with adhesive layers 13 and 14. The semiconductor chip 9 is protected and also functions as a heat sink. Such a semiconductor device 1 is mounted and used on a mother board (not shown) or the like via BGA balls 8.

  A method for manufacturing the semiconductor device will be described below. First, two support substrates (not shown) made of a metal material such as copper are prepared, and the two support substrates are bonded together. Next, a Ni layer, an Au layer, a Ni layer, and a Cu layer are plated in this order on both surfaces of the bonded support substrate to form a multilayer film. Then, the multilayer film is patterned by leaving only the portion to be the mounting pad 5 and removing the remaining portion. Then, a semi-cured wiring board of the insulating material is stuck so as to embed the patterned multilayer film. The semi-cured wiring board is heated and cured to form an insulating layer made of an insulating material. Next, a hole is formed with a laser beam or the like so as to reach the multilayer film from the insulating layer, and then the inside of the hole is filled with a metal plating film to form the via 4. Thereby, the 1st insulating layer in which the multilayer film and the via | veer 4 were formed is formed in both surfaces of the sticking support substrate.

  Next, a wiring 3 is formed on the first insulating layer so as to be connected to the via 4, and is different from the semi-cured insulating material so as to embed the wiring 3, such as an epoxy resin. An insulating layer is formed by applying a film and thermosetting. Then, vias 4 are formed in the insulating layer in the same manner as described above, and a second insulating layer in which the wiring 3 and the vias 4 are embedded in the insulating layer is formed. Next, the third and subsequent insulating layers are sequentially formed in the same process as the second insulating layer. After all the insulating layers are formed, the ball pad 6 is formed on the finally formed insulating layer by chemical plating or etching. Thereby, the package substrate 2 in which a plurality of insulating layers are laminated on both surfaces of the bonded support substrates is formed.

  Next, the bonded support substrate is separated into two support substrates, and the support substrate is dissolved and removed using an alkaline solution. Next, the Ni layer of the multilayer film is dissolved and removed using an acidic solution, and the mounting pad 5 in which the Au layer, the Ni layer, and the Cu layer are laminated in this order is formed. Thereafter, a stiffener 11 is adhered to the surface of the package substrate 2 on the side where the mounting pad 5 is formed via an adhesive layer 15 to produce a “package substrate with a stiffener”. When removing the support substrate, by removing all but the stiffener-like remainder, it is possible to remove the support substrate and form the stiffener 11 at the same time, and the adhesive layer 15 becomes unnecessary.

  On the other hand, solder bumps 7 are joined to input / output pads (not shown) of the semiconductor chip 9 to produce a “semiconductor chip with solder bumps”. Next, the “semiconductor chip with solder bumps” is connected to the “substrate with stiffener” so that each solder bump 7 of the “semiconductor chip with solder bumps” is connected to each mounting pad 5 of the “package substrate with stiffener”. Thereafter, an underfill resin 10 is filled between the semiconductor chip 9 and the package substrate 2 so as to embed the solder bumps 7 and is cured by heating.

  Next, the lid 12 is bonded to the upper surfaces of the semiconductor chip 9 and the stiffener 11, that is, the surface opposite to the surface to which the package substrate 2 is bonded via the adhesives 13 and 14. Then, the BGA ball 8 is bonded to the ball pad 6 formed on the lower surface of the package substrate 2 to manufacture the semiconductor device 1. The obtained semiconductor device is connected to and mounted on a motherboard such as a glass epoxy substrate (FR-4 substrate, FR-5 substrate: manufactured by a company) in which a glass cloth is immersed in an epoxy resin through a BGA ball. Is done.

  Next, the operation of the semiconductor device will be described.

  A power supply potential and a signal are input to the semiconductor device 1 via the motherboard. At this time, the power supply potential and the signal are input to the semiconductor chip 9 through a current path including the BGA ball 8 → the ball pad 6 → the via 4 and the wiring 3 → the mounting pad 5 → the solder bump 7. The semiconductor chip 9 performs information processing such as signal storage and calculation based on the input power supply potential and signal, and outputs the result. The output signal is output to the mother board through a path opposite to the above, and is output to the outside through the mother board.

  At this time, heat is generated by the operation of the semiconductor chip 9. Although a part of this heat is absorbed by the lid 12, since the heat capacity of the lid 12 is limited, a part of the remaining heat is conducted to the package substrate 2 through the solder bump 7, and the rest is transferred to the semiconductor chip 9. Accumulated. As a result, the temperature of the semiconductor chip 9, the solder bump 7 and the package substrate 2 rises, and the semiconductor chip 9 and the package substrate 2 thermally expand. However, the thermal expansion coefficient of silicon forming the substrate of the semiconductor chip 9 and the package The thermal expansion coefficients of the insulating materials forming the substrate 2 are different from each other and expand with different thermal expansion coefficients. Nevertheless, since the insulating layer 16a on the surface of the package substrate 2 is formed of a relatively soft insulating material of the present invention having a Young's modulus of 2 GPa or less, the insulating layer 16a follows the thermal expansion of the semiconductor chip 9. And can be deformed. As a result, the shearing force acting between the semiconductor chip 9 and the package substrate 2 via the solder bumps 7 is alleviated, and it is possible to suppress a large force from being applied to the solder bumps 7. Similarly, when the semiconductor device 1 is heated or cooled due to an external temperature change, the thermal stress acting between the semiconductor chip 9 and the package substrate 2 is relieved by the deformation of the insulating layer 16a, and the solder bump 7 It is possible to prevent an excessive force from being applied to the load. As a result, warpage of the semiconductor device 1 and fatigue breakdown of the solder bumps 7 can be suppressed. For this reason, the semiconductor device 1 has high connection reliability with respect to the temperature cycle.

  In addition, since the material forming the insulating layer 16a has low thermal expansion, high heat resistance, low elasticity, and an elongation at break of 10% or more, the insulating layer 16a deforms following the thermal expansion of the semiconductor chip 9. However, defects such as cracks do not occur in the insulating layer 16a, and the reliability of the semiconductor device 1 is high.

  Furthermore, in this embodiment, since the insulating material forming the insulating layer 16a contains a cross-linked rubber having a polar group in its structure, the electroless plating property is good, and the insulating material is formed on the insulating layer 16a. When a Cu layer is formed by electroless plating, the adhesion between the Cu layer and the insulating layer 16a is high. Moreover, an insulating material can show low thermal expansibility by containing the above-mentioned crosslinkable rubber in an insulating material.

  In the above description, the example in which only the insulating layer 16a on the surface of the package substrate 2 is formed of the insulating material has been described, but the present invention is not limited to this, and two or more insulating layers including the insulating layer on the surface are described. The layers may be formed of the insulating material, and all the insulating layers of the package substrate 2 may be formed of the insulating material. As a result, the entire package substrate 2 is deformed following the deformation of the semiconductor chip, thereby further increasing the effect of relieving thermal stress.

  In particular, by forming the insulating layers on the front and back surfaces of the package substrate 2 using the above insulating material, the insulating layer on the surface of the package substrate 2 can be deformed following the thermal expansion of the motherboard, and the BGA balls 8 can be deformed. The applied thermal stress can be relaxed. As a result, warpage of the semiconductor device 1 and fatigue failure of the BGA ball 8 can be prevented, and connection reliability with respect to a temperature cycle can be improved. More preferably, the insulating layer on the surface of the package substrate 2 on the mother board side is formed using the above insulating material having a Young's modulus of 1 GPa or less and a breaking elongation of 20% or more. Further, solder paste may be provided instead of the solder bumps.

  Hereinafter, the insulating material and the semiconductor device of the present invention will be described more specifically. The technical scope of the present invention is not limited to these examples.

  As the polyamide elastomer (A), an aromatic polyamide segment represented by the formula (1) and an aromatic polyamide segment represented by the formula (2) (wherein n / (m + n) represents 0.13) a; A1 to A5 having a saturated aliphatic chain segment represented by the formula (3) (wherein x represents 36) b and a mass ratio a: b of 60:40 and having a molecular weight shown in Table 1. Was prepared. The active hydrogen equivalent of the polyamide elastomer was 4000 g / eq.

  Here, the active hydrogen equivalent indicates the equivalent of the phenolic hydroxyl group in the aromatic polyamide segment combined with the terminal functional group of the polyamide elastomer. Specifically, it is obtained by subtracting the amount of water dehydrated by polymerization from the weight of all raw materials constituting the polyamide elastomer and dividing the weight by the total number of moles of phenolic hydroxyl groups and terminal functional groups. Value.

  As the crosslinkable rubber (B) having a polar group, crosslinkable rubbers B1 to B3 shown in Table 2 were selected and used. The crosslinkable rubber B1 was used by adjusting the solid content concentration to 20 mass% and viscosity of 460 mPas by MEK, and the crosslinkable rubbers B2 and B3 were used without solvent.

  As the epoxy resin C1, the epoxy resin curing agent D1, the filler, the curing acceleration catalyst, and the solvent, those shown in Tables 2 and 3 were used. The values of the curing accelerating catalyst shown in Tables 4 to 7 indicate parts by mass when the total mass of the polyamide elastomer, the crosslinked rubber, the epoxy resin, and the epoxy resin curing agent is 100 parts.

[Example 1]
[Preparation of insulating layer]
Polyamide elastomer A2, crosslinkable rubber B1, epoxy resin C1, curing agent D1 and curing accelerator catalyst are dissolved and dispersed in organic solvent cyclopentanone so that these are 30% by mass in the proportions shown in Table 4. A varnish was prepared. The obtained varnish is uniformly coated on a polyethylene terephthalate (PET) film coated with a release agent with a coating machine so as to obtain the desired thickness, and dried at a temperature of 100 ° C. for 5 minutes to remove the solvent. After a certain amount of volatilization, a resin film was coated with a PET film with a release agent, and a laminate film having a three-layer structure in which an uncured resin layer was sandwiched between PET films was produced.

  The laminate film was press-molded by applying a pressure of 3 MPa at a temperature of 170 ° C. for 2 hours, and the resin layer was cured to produce an insulating layer having a thickness of 50 μm. About the obtained insulating layer, the tensile elasticity modulus, the breaking strength, elongation, the maximum expansion amount, and the linear expansion coefficient were measured by the method based on JISK7127. The results are shown in Table 4.

[Toughness]
Tensile modulus, breaking strength, and elongation were measured as follows.

  The insulating layer was cut into a strip shape having a width of 10 mm and a length of 80 mm to prepare a sample. The distance between the supports that support both ends of the test object of the tensile tester (INSTRON 5567: manufactured by Instron) was set to 60 mm, and the tensile speed was set to 5 mm / min. The sample was supported on a support, and the breaking strength, tensile elastic modulus, and breaking elongation were calculated. These serve as indexes for evaluating the toughness of the insulating film.

[Heat resistance and thermal expansion]
The insulating layer was cut into a strip shape having a width of 4 mm and a length of 15 mm to prepare a sample. The distance between the supports supporting both ends of the TMA tester (TMA / SS6100: manufactured by Seiko Instruments Inc.) was 10 mm, a constant load of 10 mN was applied, and the temperature was raised from room temperature to 300 ° C. at 5 ° C./min. The linear expansion coefficients (α1 and α2) around the temperature at which the shrinkage starts (maximum point of expansion) and the inflection point (= Tg: glass transition temperature) were measured. Each of these becomes an index for evaluating heat resistance and thermal expansion.

[Production of wiring board (via connection reliability evaluation)]
The surface of the copper foil of the double-sided copper-clad FR-4 material is roughened (unevenness 1-2 μm) with multi-bond (manufactured by Nihon McDermid Co., Ltd.), and the resin layer of the laminate film is in close contact, The resin layer was cured for 30 minutes under a pressure of 1.5 MPa and then at a temperature of 170 ° C. for 120 minutes under a pressure of 3 MPa to form an insulating layer. Next, after half-etching the copper foil to a thickness of about 6 μm, holes are drilled from the top surface with a carbon dioxide laser so that a via shape with a top of 75 μmφ and a bottom of 50 μmφ can be obtained, and filled plating is performed. To obtain a substrate with vias. The connection reliability of this via was evaluated as follows.

  The obtained substrate was immersed in a solder bath at 260 ° C. for 20 seconds and then immediately removed and left at 20 ° C. for 20 seconds as one cycle. This was repeated for 50 cycles, and the state of the via was polished and observed. did. The case where the connection of the via was good was marked with ◎, the case where no breakage occurred, the mark ◯, and the case where breakage occurred, the mark x. The results are shown in Table 4.

[Fabrication of wiring board (wiring embedding evaluation)]
A line and space pattern with a width of 100 μm simulating a copper wiring circuit on the copper foil surface of a three-layer CCL having a three-layer structure of PEN layer-resin layer (ABF-GX3: Ajinomoto Fine Techno Co.)-Copper foil Formed. The resin layer exposed by peeling the PET layer on one side of the laminate film is overlaid on the copper foil surface on which the three-layer CCL line-and-space pattern is formed, and a mirror wafer is laminated on the PEN layer of the three-layer CCL. A laminate was prepared in the order of release PET layer-resin layer-copper foil-resin layer (ABF-GX3) -PEN layer-mirror wafer. Using a vacuum laminator, the laminate was loaded with a pressure of 1 MPa at a temperature of 150 ° C. for 30 minutes to cure the resin layer and adhere the patterned copper foil to obtain a substrate.

  The obtained board | substrate was observed with the microscope, the grade by which the pattern of copper foil was embedded in the insulating layer was observed, and the quality of the circuit embeddability was evaluated with the following references | standards. When the circuit embedding property is particularly excellent, ◎ is given, when the circuit embedding property is good, ○, when the circuit embedding property is obtained, Δ, and when it is insufficient, ×. The results are shown in Table 4.

[Production of wiring board (electroless plating property evaluation)]
The resin layer of the laminate film is laminated on the copper foil of a double-sided copper-clad laminate in which copper foil is laminated on both sides of the resin substrate, and the temperature is 120 ° C. under a pressure of 1.5 MPa for 30 minutes, and then 170 The resin layer was cured for 120 minutes at a temperature of 3 ° C. under a pressure of 3 MPa to form an insulating layer, and a substrate on which the insulating layer was laminated was produced. Next, desmear processing was performed on the substrate. This desmear treatment was performed by a dipping method in which a series of operations of immersing the substrate in desmear liquid for 1 minute, neutralizing, and washing with water was repeated three times. Although the processing time is slightly different, this method is a method generally performed by a substrate manufacturer. Thereafter, electroless copper plating was applied to the substrate to form a copper plating layer on the insulating layer. The adhesion of this copper plating layer was evaluated by a peel test using an external appearance observation and an adhesive tape, and observing the adhesion of the copper plating layer to the adhesive tape.

  “◎” when the copper plating layer was not peeled off, a slight peeling was observed, but “○” when there was no practical problem, and “p” was seen when there was a practical problem. × ”. The results are shown in Table 4.

[Production of wiring board (insulation reliability evaluation)]
Using the varnish, an evaluation wiring board having the following structure was produced for evaluation of insulation reliability. The evaluation wiring board is shown in the schematic diagram of FIG. 3, the plan view of FIG. 4, the partially enlarged sectional view of FIG.

  As shown in FIG. 4, the evaluation wiring board 43 includes a pair of rectangular electrodes 42 on the surface of the FR-4 substrate 44 serving as a core, and a pair of comb-like wirings 41 respectively connected thereto. Is provided. The comb-shaped wiring 41 is arranged between the teeth of one comb-shaped wiring 41 in a nested manner so that the teeth of the other comb-shaped wiring 41 are located and the teeth do not contact each other. The FR-4 substrate 44 has a length of 8.0 mm, a width of 24.4 mm, and a thickness of 0.8 mm. The length of one side of the rectangular electrode 42 is 5.2 mm. Each comb-shaped wiring 41 is provided with ten wirings 45 serving as teeth, and the length of each wiring 45 is 8.7 mm. Further, 30 vias 46 are formed in each wiring 45. The total number of vias 46 provided on the evaluation substrate 43 is 2 × 10 × 30 = 600. The 600 vias 46 are arranged in a (20 × 30) matrix. The via pitch is 300 μm in both directions.

  Each wiring 45 is configured as follows. As shown in FIG. 5, a Cu pattern 47 made of Cu is intermittently provided along the extending direction of the wiring 45 on the surface of the substrate 44, and the thickness laminated to cover the Cu pattern 47 has a thickness. Cu patterns 49 are intermittently provided along the extending direction of the wiring 45 through the 50 μm build-up resin layer 48. The Cu patterns 47 and 49 have a dumbbell shape having two circular portions having a diameter of 150 μm and one rectangular portion connecting between the circular portions as viewed from above, and the thickness thereof is 18 μm. The Cu pattern 49 is provided so that the circular part is laminated on the circular part of the Cu pattern 47 via the build-up resin layer, and the rectangular part is located on an area where the Cu pattern 47 is not provided. . A via 46 is provided in the build-up resin layer so as to connect the circular portions of the Cu pattern 47 and the circular portions of the Cu pattern 49 to each other. The vias 46 connect the Cu pattern 47 and the Cu pattern 49 to form a wiring 45. The shape of the via 46 is a truncated cone, the diameter of the upper end is 100 μm, and the diameter of the lower end is 75 μm. The distance between vias connecting the Cu patterns 47 or 49 is 300 μm as described above. The buildup resin layer 48 is formed of the insulating layer, and a solder resist 50 having a thickness of 35 μm is provided on the buildup resin layer 48 so as to cover the Cu pattern 49. A Cu pattern 51 having a thickness of 18 μm is provided on the entire back surface of the substrate 44.

HAST (Highly Accelerated temperature humidity Stress Test) was performed using the evaluation substrate 43. The test conditions were a temperature of 130 ° C., a humidity of 85 RH%, and a voltage applied between the electrodes of 5V. And the time until the resistance value between the electrodes 42 became 1 × 10 ⁹ Ω or less was measured. The test was conducted for a maximum of 500 hours. The test results are shown in Table 4. In Table 4, “over 500” indicates that the resistance value between the electrodes did not become 1 × 10 ⁹ Ω or less even when the test was continued up to 500 hours. The time when the resistance value is 1 × 10 ⁹ Ω or less is an index of insulation reliability, and it can be said that the longer this time, the better the insulation reliability.

[Semiconductor device]
The varnish was uniformly applied to the roughened surface (matte surface) of the copper foil with a coating machine so that the desired thickness was obtained. Then, after drying for 5 minutes at a temperature of 100 ° C. to volatilize a certain amount of solvent, the resin surface is covered with a PET film with a release agent, and a single-layer copper-clad prepreg material having a three-layer structure having an uncured resin layer (Release PET-resin content-copper foil) was prepared.

  A copper foil of this single-sided copper-clad prepreg material was formed on a wiring to produce a wiring board, and a plurality of wiring boards were produced and laminated by a build-up method to produce a package substrate. A semiconductor chip was mounted on the package substrate, a frame-shaped stiffener was provided around the semiconductor chip, and a lid (heat sink) was bonded onto the semiconductor chip and the reinforcing plate, thereby producing the FCBGA type semiconductor device shown in FIG.

[Connection reliability evaluation]
38 FCBGA type semiconductor devices were prepared, and a temperature cycle test was performed on these semiconductor devices. The temperature cycle test started from room temperature, cooled to −40 ° C., heated to −40 ° C. for 15 minutes, heated to 125 ° C., and made 15 cycles at 125 ° C. for 15 minutes. The heating and cooling time was 15 minutes. 1000 cycles were performed, and cracks in the joints (solder bumps) between the semiconductor chip and the package substrate were observed. Table 4 shows the number of cracks (number of defects). It can be said that the smaller the number of defects, the better the connection reliability of the FCBGA type semiconductor device.

[High temperature storage stability evaluation]
Ten FCBGA type semiconductor devices were prepared and stored in a constant temperature bath at 150 ° C. or 180 ° C. for a predetermined time (200 hours, 1000 hours). Thereafter, the resistance value between each solder ball of this apparatus was arbitrarily selected and measured, and an average value thereof was obtained, and the high temperature storage property was evaluated according to the following criteria. The results are shown in Table 4.

  The difference between the average value of the resistance values obtained and the resistance value (blank) of the device not stored at high temperature was 20% or less with respect to the blank, and the case of exceeding 20% was rejected. .

[Examples 2 to 10]
Except for using the substances and amounts used shown in Tables 5 to 7, an insulating layer was prepared in the same manner as in Example 1, evaluated for toughness, heat resistance, and thermal expansion, a wiring board was prepared, and its via connection reliability The wiring embedding property, electroless plating property, and insulation reliability were evaluated. Further, in the same manner as in Example 1, a semiconductor device was manufactured, and its connection reliability and high-temperature storage property were evaluated. The results are shown in Tables 5-7.

[Comparative Example 1]
A polyamide elastomer a1 represented by the following chemical formula having an unsaturated aliphatic chain segment (wherein p / (p + q) represents 0.13) was used.

The polyamide elastomer a1 has an aromatic polyamide segment c and an unsaturated aliphatic chain segment d at a mass ratio c: d of 60:40 and has the molecular weight shown in Table 1. An insulating layer was prepared in the same manner as in Example 1 except that the polyamide elastomer a1 was used instead of the polyamide elastomer A2, the toughness, heat resistance and thermal expansion were evaluated, a wiring board was prepared, and its via connection reliability was Wiring embedding, electroless plating, and insulation reliability were evaluated. Further, in the same manner as in Example 1, a semiconductor device was manufactured, and its connection reliability and high-temperature storage property were evaluated. The results are shown in Table 4.

[Comparative Example 2]
An insulating layer was prepared in the same manner as in Example 1 except that the material shown in Table 6 was used without using the cross-linkable rubber B1, the toughness, heat resistance, and thermal expansion were evaluated, and a wiring board was prepared. Connection reliability, wiring embedding, electroless plating, and insulation reliability were evaluated. Further, in the same manner as in Example 1, a semiconductor device was manufactured, and its connection reliability and high-temperature storage property were evaluated. The results are shown in Table 6.

[Comparative Example 3]
An insulating layer was produced in the same manner as in Example 1 except that the crosslinked rubber b1 having no polar group was used instead of the crosslinked rubber B1, and the toughness, heat resistance and thermal expansion were evaluated, and a wiring board was produced. The via connection reliability, wiring embedding property, electroless plating property, and insulation reliability were evaluated. Further, in the same manner as in Example 1, a semiconductor device was manufactured, and its connection reliability and high-temperature storage property were evaluated. The results are shown in Table 6.

  In Examples 1 to 10, an aromatic segment having a functional group capable of reacting with an epoxy resin, an aromatic segment not containing a functional group capable of reacting with an epoxy resin, and a polyamide elastomer (A) having a saturated aliphatic chain segment; Insulating materials containing a crosslinkable rubber (B) having a polar group, an epoxy resin (C), and a curing agent for epoxy resin (D) can achieve low thermal expansion, high heat resistance and low elasticity at the same time. The electroplating property is excellent, and the semiconductor device using the electroplating property is excellent in reliability. On the other hand, since Comparative Example 1 contains the polyamide elastomer (a) having an unsaturated aliphatic chain segment instead of the saturated aliphatic chain segment, the linear expansion coefficient is large and the high-temperature storage characteristics are inferior. Yes. Moreover, since Comparative Examples 2 and 3 contain a cross-linked rubber having no polar group, the linear expansion coefficient is large and the electroless plating property is inferior, so that the connection reliability is insufficient.

It is sectional drawing which shows an example of the semiconductor device of this invention. It is a side view which shows a part of example of the semiconductor device of this invention shown in FIG. It is the schematic which shows an example of the wiring board of this invention. It is a top view which shows an example of the wiring board of this invention shown in FIG. It is a fragmentary sectional view which shows an example of the wiring board of this invention shown in FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Package substrate 3, 45 Wiring 4, 46 Via 5 Mounting pad 6 Ball pad 7 Solder bump 8 BGA ball 9 Semiconductor chip 10 Underfill resin 11 Stiffener 12 Lids 13, 14, 15 Adhesive layer 16a Insulating layer (wiring substrate )
41 Comb wiring 42 Electrode 43 Evaluation substrate 44 FR-4 substrates 47, 49, 51 Cu pattern 48 Built-up resin layer (wiring substrate)
50 Solder resist

Claims (4)

Polyamide elastomer (A) having an aromatic segment having a functional group capable of reacting with an epoxy resin, an aromatic segment not containing a functional group capable of reacting with an epoxy resin, and a saturated aliphatic chain segment, and a crosslinked rubber having a polar group (B), an epoxy resin (C), and a curing agent for epoxy resin (D) ,
The polyamide elastomer (A) has an aromatic polyamide segment represented by the formula (1), an aromatic polyamide segment represented by the formula (2), and a saturated aliphatic chain segment represented by the formula (3). Insulating material.

(N in the formula (1) and m in the formula (2) are integers satisfying n / (m + n) of 0.05 or more and 0.8 or less.)

(In formula (3), x represents an integer of 0 to 50.) The mass ratio of the aromatic polyamide segment represented by the formula (1) and the aromatic polyamide segment represented by the formula (2) to the saturated aliphatic chain segment represented by the formula (3) is 30:70 to 70:30. insulating material according to claim 1, wherein the certain. A wiring board formed using the insulating material according to claim 1. A semiconductor device comprising the wiring board according to claim 3.

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