JP5293469B2 - 半導体装置用複合配線部材および樹脂封止型半導体装置 - Google Patents
半導体装置用複合配線部材および樹脂封止型半導体装置 Download PDFInfo
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- JP5293469B2 JP5293469B2 JP2009164910A JP2009164910A JP5293469B2 JP 5293469 B2 JP5293469 B2 JP 5293469B2 JP 2009164910 A JP2009164910 A JP 2009164910A JP 2009164910 A JP2009164910 A JP 2009164910A JP 5293469 B2 JP5293469 B2 JP 5293469B2
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- semiconductor device
- wiring member
- semiconductor chip
- die pad
- lead frame
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Description
図1乃至図11は、第1の参考例を示す図である。ここで、図1は、第1の参考例を示す概略断面図であり、図2は、第1の参考例を示す概略平面図である。また図3は、第1の参考例の変形例1を示す概略断面図であり、図4は、図1に示す半導体装置用配線部材を含む半導体装置を示す概略断面図である。また図5は、図3に示す半導体装置用配線部材を含む半導体装置を示す概略断面図であり、図6(a)−(d)は、半導体装置用配線部材の製造方法を示す図である。また図7(a)−(f)は、図4に示す半導体装置の製造方法を示す図であり、図8(a)−(f)は、図5に示す半導体装置の製造方法を示す図である。また図9は、第1の参考例による半導体装置用配線部材の変形例2を示す概略平面図であり、図10は、第1の参考例による半導体装置用配線部材の変形例3を示す概略平面図である。また図11(a)は、第1の参考例による半導体装置用配線部材の変形例4を示す概略平面図であり、図11(b)は、図11(a)のA−A線断面図である。図14(a)−(f)は、図4に示す半導体装置の製造方法の変形例を示す図であり、図15(a)−(f)は、図5に示す半導体装置の製造方法の変形例を示す図である。
図3において、図1および図2に示す半導体装置用配線部材10と同一部分には、同一符号を付して詳細な説明は省略する。
しかしながら、この場合、金製のボンディングワイヤの長さが相対的に長くなるため、製造コストが上昇する。一方、本参考例によれば、第1接続部16と第2接続部18、19との間に銅配線層13を介在させているので、半導体チップ15の電極15Aとリードフレーム20のインナーリード部21とを直接金製のボンディングワイヤで接続する場合(上述した比較例)と比較して半導体装置30の製造コストを低減することができる。
次に、第2の参考例について図12および図13(a)−(e)を参照して説明する。ここで、図12は、第2の参考例を示す概略断面図であり、図13(a)−(e)は、パッケージタイプの半導体装置の製造方法を示す図である。図12および図13(a)−(e)に示す第2の参考例は、第2接続部が封止樹脂部から外方に露出している点が異なるものであり、他の構成は上述した第1の参考例と略同一である。図12および図13(a)−(e)において、図1乃至図11に示す第1の参考例と同一部分には同一の符号を付して詳細な説明は省略する。
次に、第3の参考例について図16乃至図21を参照して説明する。ここで、図16は、第3の参考例による半導体装置用配線部材を示す概略断面図であり、図17は、第3の参考例による半導体装置用複合配線部材を示す概略断面図である。図18は、第3の参考例による半導体装置用配線部材の変形例を示す概略断面図であり、図19は、第3の参考例による半導体装置を示す概略断面図である。また図20(a)−(d)は、第3の参考例による半導体装置用配線部材の製造方法を示す図であり、図21(a)−(f)は、第3の参考例による半導体装置の製造方法を示す図である。図16乃至図21において、図1乃至図11に示す第1の参考例と同一部分には同一の符号を付してある。
次に、第4の参考例について図22乃至図25を参照して説明する。ここで、図22は、第4の参考例による半導体装置を示す概略断面図であり、図23は、第4の参考例による半導体装置に用いられる半導体装置用配線部材を示す平面図である。図24(a)−(e)は、第4の参考例による半導体装置の製造方法を示す図であり、図25は、第4の参考例による半導体装置の変形例を示す概略断面図である。図22乃至図25に示す第4の参考例は、第2接続部27A、27B、銅配線層13、および半導体チップ載置部31の構成が異なるものであり、他の構成は上述した第2の参考例と略同一である。図22乃至図25において、図12および図13(a)−(e)に示す第2の参考例と同一部分には同一の符号を付して詳細な説明は省略する。
次に、本発明の一実施の形態について図26乃至図30を参照して説明する。ここで、図26は、半導体装置用配線部材を示す概略断面図であり、図27は、本実施の形態による半導体装置用複合配線部材を示す概略断面図であり、図28は、本実施の形態による半導体装置用複合配線部材および半導体装置を示す平面図である。また、図29は、本実施の形態による半導体装置を示す概略断面図であり、図30(a)−(f)は、本実施の形態による半導体装置の製造方法を示す図である。図26乃至図30に示す一実施の形態において、図1乃至図11に示す第1の参考例、および図16乃至図21に示す第3の参考例と同一部分には同一の符号を付して、詳細な説明を一部省略している。
10A 半導体装置用複合配線部材
11 絶縁層
11A、31 半導体チップ載置部
12 金属基板
13 銅配線層
14 接着層
15 半導体チップ
16 第1接続部
18、19、24、27A、27B 第2接続部
20 リードフレーム
21 インナーリード部
22 ダイパッド
23 封止樹脂部
25 リード部
26 スリット孔
28 放熱板接着層
29 放熱板
30、40 半導体装置
Claims (8)
- 半導体チップ上の電極と配線基板とを電気的に接続するための半導体装置用複合配線部材において、
配線部材と、
この配線部材に電気的に接続されるとともに配線部材を載置するリードフレームとを備え、
配線部材は、絶縁層と、絶縁層の一の側に配置された金属基板と、絶縁層の他の側に配置された銅配線層とを有し、
銅配線層上に半導体チップ載置部が形成され、
銅配線層は、半導体チップ上の電極と接続される第1端子部と、リードフレームと接続される第2端子部と、第1端子部と第2端子部とを接続する配線部とを含み、
銅配線層の第2端子部とリードフレームとは第2接続部を介して電気的に接続され、
リードフレームは、配線部材を載置するダイパッドと、ダイパッド外方に設けられたリード部とを有し、
ダイパッドは、半導体チップに対応する中央エリアと、中央エリア外周に位置するとともに中央エリアに連結され、中央エリアとの間に封止樹脂流入空間を形成する周縁エリアとを有し、
配線部材は、ダイパッドの中央エリアから周縁エリアまでの領域に配置され、
配線部材は、少なくともダイパッドの中央エリアおよび周縁エリアに樹脂ペーストを用いて接着されていることを特徴とする半導体装置用複合配線部材。 - 金属基板は、ステンレスからなることを特徴とする請求項1記載の半導体装置用複合配線部材。
- 樹脂ペーストは、多点状または直線状に塗布されていることを特徴とする請求項1または2記載の半導体装置用複合配線部材。
- ダイパッドのうち、少なくとも中央エリアおよび周縁エリアに、めっき処理が施されていることを特徴とする請求項1乃至3のいずれか一項記載の半導体装置用複合配線部材。
- 樹脂封止型半導体装置において、
絶縁層と、絶縁層の一の側に配置された金属基板と、絶縁層の他の側に配置された銅配線層とを有し、銅配線層上に半導体チップ載置部が形成され、銅配線層は、半導体チップ上の電極と接続される第1端子部と、外部配線部材と接続される第2端子部と、第1端子部と第2端子部とを接続する配線部とを含む配線部材と、
この配線部材に電気的に接続されるとともに配線部材を載置するリードフレームと、
配線部材の半導体チップ載置部に載置され、電極を有する半導体チップとを備え、
半導体チップ上の電極と第1端子部とは第1接続部により電気的に接続され、
第2端子部とリードフレームとは第2接続部により電気的に接続され、
リードフレームの一部を露出した状態で半導体チップ、銅配線層、リードフレーム、第1接続部、および第2接続部が封止樹脂部により樹脂封止され、
リードフレームは、配線部材を載置するダイパッドと、ダイパッド外方に設けられたリード部とを有し、
ダイパッドは、半導体チップに対応する中央エリアと、中央エリア外周に位置するとともに中央エリアに連結され、中央エリアとの間に封止樹脂流入空間を形成する周縁エリアとを有し、
配線部材は、ダイパッドの中央エリアから周縁エリアまでの領域に配置され、
配線部材は、少なくともダイパッドの中央エリアおよび周縁エリアに樹脂ペーストを用いて接着されていることを特徴とする樹脂封止型半導体装置。 - 金属基板は、ステンレスからなることを特徴とする請求項5記載の樹脂封止型半導体装置。
- 樹脂ペーストは、多点状または直線状に塗布されていることを特徴とする請求項5または6記載の樹脂封止型半導体装置。
- ダイパッドのうち、少なくとも中央エリアおよび周縁エリアに、めっき処理が施されていることを特徴とする請求項5乃至7のいずれか一項記載の樹脂封止型半導体装置。
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JP2009164910A JP5293469B2 (ja) | 2009-07-13 | 2009-07-13 | 半導体装置用複合配線部材および樹脂封止型半導体装置 |
US12/701,053 US8471371B2 (en) | 2009-07-13 | 2010-02-05 | Semiconductor wiring assembly, semiconductor composite wiring assembly, and resin-sealed semiconductor device |
KR1020100017573A KR101145509B1 (ko) | 2009-07-13 | 2010-02-26 | 반도체 장치용 배선 부재, 반도체 장치용 복합 배선 부재, 및 수지 밀봉형 반도체 장치 |
CN2010101571882A CN101958293B (zh) | 2009-07-13 | 2010-03-17 | 半导体装置用布线构件、半导体装置用复合布线构件及树脂密封型半导体装置 |
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JP2012212417A (ja) * | 2011-03-24 | 2012-11-01 | Toshiba Corp | 半導体メモリカード |
JP2015111623A (ja) * | 2013-12-06 | 2015-06-18 | 株式会社東海理化電機製作所 | 実装ユニット |
US20150268261A1 (en) * | 2014-03-18 | 2015-09-24 | Trw Automotive U.S. Llc | Circuit mounting apparatus and method using a segmented lead-frame |
US11462501B2 (en) * | 2019-10-25 | 2022-10-04 | Shinko Electric Industries Co., Ltd. | Interconnect substrate and method of making the same |
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JP2688099B2 (ja) | 1989-07-01 | 1997-12-08 | イビデン株式会社 | 半導体搭載用基板とその製造方法 |
US5018005A (en) * | 1989-12-27 | 1991-05-21 | Motorola Inc. | Thin, molded, surface mount electronic device |
JPH04280462A (ja) * | 1991-03-08 | 1992-10-06 | Mitsubishi Electric Corp | リードフレームおよびこのリードフレームを使用した半導体装置 |
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JPH05218268A (ja) * | 1992-02-03 | 1993-08-27 | Toppan Printing Co Ltd | 半導体装置 |
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US5569956A (en) * | 1995-08-31 | 1996-10-29 | National Semiconductor Corporation | Interposer connecting leadframe and integrated circuit |
JP2817717B2 (ja) * | 1996-07-25 | 1998-10-30 | 日本電気株式会社 | 半導体装置およびその製造方法 |
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CN101958293A (zh) | 2011-01-26 |
US20110006410A1 (en) | 2011-01-13 |
KR101145509B1 (ko) | 2012-05-15 |
US8471371B2 (en) | 2013-06-25 |
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