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JP5292779B2 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
JP5292779B2
JP5292779B2 JP2007304092A JP2007304092A JP5292779B2 JP 5292779 B2 JP5292779 B2 JP 5292779B2 JP 2007304092 A JP2007304092 A JP 2007304092A JP 2007304092 A JP2007304092 A JP 2007304092A JP 5292779 B2 JP5292779 B2 JP 5292779B2
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terminal
wiring
semiconductor device
external connection
screwing
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JP2009130163A (en
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伸 征矢野
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Description

本発明は半導体装置に関し、特に複数の半導体素子を樹脂ケースにより包容した半導体装置に関する。   The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which a plurality of semiconductor elements are enclosed by a resin case.

インバータ装置、無停電電源装置、工作機械、産業用ロボット等では、その本体装置とは独立して、パワー半導体素子を搭載した半導体装置(汎用モジュール)が使用されている。そして、このような半導体装置は、複数のパワー半導体素子を樹脂ケース内に封止(パッケージ)させた構造をしている(例えば、特許文献1,2参照)。   Inverter devices, uninterruptible power supply devices, machine tools, industrial robots, and the like, semiconductor devices (general-purpose modules) equipped with power semiconductor elements are used independently of the main body devices. Such a semiconductor device has a structure in which a plurality of power semiconductor elements are sealed (packaged) in a resin case (see, for example, Patent Documents 1 and 2).

このような半導体装置の内部配線は、配線用端子(リードフレーム)で行うのが一般的である(例えば、特許文献3参照)。
例えば、図11に、パワー半導体素子を樹脂ケース内に封止させた半導体装置の要部模式図を示す。この図では、配線用端子で内部配線を行った半導体装置の一例が示されている。
Such internal wiring of a semiconductor device is generally performed by wiring terminals (lead frames) (see, for example, Patent Document 3).
For example, FIG. 11 shows a schematic diagram of a main part of a semiconductor device in which a power semiconductor element is sealed in a resin case. This figure shows an example of a semiconductor device in which internal wiring is performed with wiring terminals.

図示するように、半導体装置は、樹脂ケース400内に、IGBT(Insulated Gate Bipolar Transistor)素子100を配置している。ここで、IGBT素子100は、縦型のパワー半導体素子であり、その上面にエミッタ電極、下面にコレクタ電極を配設している。そして、IGBT素子100のエミッタ電極と配線基板200とは、配線用端子600を通じて導通している。また、IGBT素子100のコレクタ電極は、配線基板200の回路に直接的に導通している。   As shown in the figure, an IGBT (Insulated Gate Bipolar Transistor) element 100 is disposed in a resin case 400 in the semiconductor device. Here, the IGBT element 100 is a vertical power semiconductor element, and an emitter electrode is disposed on the upper surface and a collector electrode is disposed on the lower surface. The emitter electrode of the IGBT element 100 and the wiring substrate 200 are electrically connected through the wiring terminal 600. Further, the collector electrode of the IGBT element 100 is directly conducted to the circuit of the wiring board 200.

そして、配線用端子600の上記エミッタ電極、配線基板200との接合は、例えば、半田付け、超音波接合、レーザー溶接にて行うのが一般的である。
特開平6−045518号公報 特開2002−368192号公報 特開2005−64441号公報
In general, the wiring terminal 600 is bonded to the emitter electrode and the wiring substrate 200 by, for example, soldering, ultrasonic bonding, or laser welding.
JP-A-6-045518 JP 2002-368192 A JP 2005-64441 A

しかし、上述した半田付けの場合には、半田付け中に接合部分に与えられる熱が配線用端子600内を伝導し、樹脂ケース400自体を変形させてしまうことがある。
また、超音波接合においては、接合部分を樹脂ケース400内で中空状態で行う場合があり、その接合が確実でない場合が生じる。
However, in the case of the above-described soldering, heat given to the joint portion during the soldering may be conducted in the wiring terminal 600, and the resin case 400 itself may be deformed.
Further, in ultrasonic bonding, the bonded portion may be hollow in the resin case 400, and the bonding may not be reliable.

また、レーザー溶接の場合は、接合部分から飛散する溶融物(例えば、金属片)が半導体素子の電極に付着したりすると、半導体素子の特性劣化を引き起こす場合がある。このため、レーザー溶接の場合は、配線用端子材に制約を課すこともある。   In the case of laser welding, if a melt (for example, a metal piece) scattered from the joint portion adheres to the electrode of the semiconductor element, the characteristics of the semiconductor element may be deteriorated. For this reason, in the case of laser welding, restrictions may be imposed on the wiring terminal material.

また、配線用端子600を一旦、被接合部分に接合させてしまうと、その後において、配線用端子600の配置変更が自由にできないという問題があった。
本発明はこのような点に鑑みてなされたものであり、歩留まりが高く、複数の半導体素子を樹脂ケースにより包容した半導体装置の配線用端子の配置構造を、簡便に変更し得る半導体装置を提供することを目的とする。
Further, once the wiring terminal 600 is bonded to the part to be bonded, there is a problem in that the layout of the wiring terminal 600 cannot be freely changed thereafter.
The present invention has been made in view of the above points, and provides a semiconductor device that has a high yield and can easily change the arrangement structure of wiring terminals of a semiconductor device in which a plurality of semiconductor elements are enclosed in a resin case. The purpose is to do.

上記課題を解決するために、本発明の一態様では、樹脂ケースに固定支持された複数の外部接続用端子と、前記樹脂ケース内に包容された、少なくとも一つの半導体素子と、前記半導体素子に配設された電極に導通する端子台と、前記端子台と前記外部接続用端子との電気的接続をする配線用端子と、前記樹脂ケース内に充填された、少なくとも前記半導体素子を封止し、前記配線用端子が表出している樹脂と、を備え、前記外部接続用端子と前記配線用端子、または、前記端子台と前記配線用端子との少なくとも何れかががねじ止めにより接合されていることを特徴とする半導体装置が提供される。 In order to solve the above problems, in one aspect of the present invention, a plurality of external connection terminals fixedly supported in a resin case, at least one semiconductor element enclosed in the resin case, and the semiconductor element Sealing at least the semiconductor element filled in the resin case, a terminal block electrically connected to the arranged electrode, a wiring terminal for electrical connection between the terminal block and the external connection terminal; A resin exposed by the wiring terminal, and at least one of the external connection terminal and the wiring terminal, or the terminal block and the wiring terminal is joined by screwing. A semiconductor device is provided.

また、本発明の別の一態様では、樹脂ケースに固定支持された複数の外部接続用端子と、前記樹脂ケース内に包容された、少なくとも一つの半導体素子と、前記半導体素子に配設された電極に導通する端子台と、前記端子台と前記外部接続用端子との電気的接続をする配線用端子と、前記樹脂ケース内に充填された、少なくとも前記半導体素子を封止し、前記配線用端子が表出している樹脂と、を備え、前記外部接続用端子と前記配線用端子、または、前記端子台と前記配線用端子とがねじ止めにより接合されている、複数の半導体モジュール間の前記配線用端子を連結したことを特徴とする半導体装置が提供される。
In another aspect of the present invention, a plurality of external connection terminals fixedly supported by a resin case, at least one semiconductor element enclosed in the resin case, and disposed in the semiconductor element A terminal block electrically connected to an electrode; a wiring terminal for electrical connection between the terminal block and the external connection terminal; and at least the semiconductor element filled in the resin case, wherein the semiconductor element is sealed. A resin that a terminal is exposed to, and the external connection terminal and the wiring terminal, or the terminal block and the wiring terminal are joined by screwing. A semiconductor device is provided in which wiring terminals are connected.

本発明によれば、歩留まりが高く、複数の半導体素子を樹脂ケースにより包容した半導体装置の配線用端子の配置構造を、簡便に変更し得る半導体装置が実現する。   According to the present invention, it is possible to realize a semiconductor device that has a high yield and can easily change the arrangement structure of wiring terminals of a semiconductor device in which a plurality of semiconductor elements are enclosed in a resin case.

以下、本実施の形態に係る半導体装置を、図面を参照して詳細に説明する。
<第1の実施の形態>
図1は第1の実施の形態に係る半導体装置の要部模式図である。ここで、図(a)には、半導体装置の平面模式図が例示され、図(b)には図(a)の破線X−Xの位置における断面を矢印の方向に矢視する図が表示されている。尚、図1では、インバータ回路一相分の半導体モジュール(パワーモジュール)の一例が例示されている。
Hereinafter, a semiconductor device according to the present embodiment will be described in detail with reference to the drawings.
<First Embodiment>
FIG. 1 is a schematic diagram of a main part of the semiconductor device according to the first embodiment. Here, FIG. (A) illustrates a schematic plan view of the semiconductor device, and FIG. (B) displays a view of the cross section at the position of the broken line XX in FIG. (A) in the direction of the arrow. Has been. In FIG. 1, an example of a semiconductor module (power module) for one phase of the inverter circuit is illustrated.

図示する半導体装置1は、板厚が数ミリの金属ベース板10を基体とし、当該金属ベース板10上に、錫(Sn)−銀(Ag)系の鉛フリー半田層(図示しない)を介して絶縁基板20が接合・搭載されている。そして、絶縁基板20上層には、パワー半導体素子であるIGBT素子30a,30b、並びにFWD素子31a,31bを、夫々複数個、実装している。更に、半導体装置1は、上記半導体素子等を樹脂ケース40によりパッケージングし、所謂、汎用IGBTモジュールとして機能する。   The illustrated semiconductor device 1 uses a metal base plate 10 having a thickness of several millimeters as a base, and a tin (Sn) -silver (Ag) based lead-free solder layer (not shown) on the metal base plate 10. Thus, the insulating substrate 20 is bonded and mounted. A plurality of IGBT elements 30a and 30b and FWD elements 31a and 31b, which are power semiconductor elements, are mounted on the upper layer of the insulating substrate 20. Furthermore, the semiconductor device 1 functions as a so-called general-purpose IGBT module by packaging the semiconductor element and the like with a resin case 40.

絶縁基板20は、絶縁板20aと、絶縁板20aの下面にDCB(Direct Copper Bonding)法で形成された金属箔20bと、絶縁板20aの上面に同じくDCB法で形成された金属箔20cを備えている。   The insulating substrate 20 includes an insulating plate 20a, a metal foil 20b formed by a DCB (Direct Copper Bonding) method on the lower surface of the insulating plate 20a, and a metal foil 20c also formed by the DCB method on the upper surface of the insulating plate 20a. ing.

更に、夫々の絶縁基板20の金属箔20c上には、半田層(図示しない)を介して、少なくとも一つのIGBT素子30a,30bがその裏面側(例えば、コレクタ電極側)を接合させた状態にて、金属箔20c上に搭載されている。   Further, on the metal foil 20c of each insulating substrate 20, at least one IGBT element 30a, 30b is bonded to the back surface side (for example, collector electrode side) via a solder layer (not shown). And mounted on the metal foil 20c.

また、IGBT素子30a,30bのコレクタ電極とは反対側の主面、即ち、IGBT素子30a,30bの上面側には、エミッタ電極が配設されている。更に、IGBT素子30a,30bの上面の一部には、制御電極30gが配設されている。そして、制御電極30gは、金属ワイヤ21を通じて、樹脂ケース40にインサート成形(封止)されたピン端子(制御用端子)22の一端に導通している。また、ピン端子22のもう一方の端は、半導体装置1の上方へ延出され、樹脂ケース40の上面より高い位置にまで設定されている。   An emitter electrode is disposed on the main surface opposite to the collector electrodes of IGBT elements 30a and 30b, that is, on the upper surface side of IGBT elements 30a and 30b. Further, a control electrode 30g is disposed on a part of the upper surface of the IGBT elements 30a and 30b. The control electrode 30g is electrically connected to one end of a pin terminal (control terminal) 22 insert-molded (sealed) in the resin case 40 through the metal wire 21. The other end of the pin terminal 22 extends upward from the semiconductor device 1 and is set to a position higher than the upper surface of the resin case 40.

また、FWD素子31a,31bにおいては、半田層(図示しない)を介して、カソード側を金属箔20cに接合させた状態にて、金属箔20c上に搭載されている。そして、FWD素子31a,31bの当該カソード側とは反対側の主面、即ち、上面には、アノード側を配置している。   The FWD elements 31a and 31b are mounted on the metal foil 20c with the cathode side bonded to the metal foil 20c via a solder layer (not shown). And the anode side is arrange | positioned at the main surface on the opposite side to the said cathode side of FWD element 31a, 31b, ie, an upper surface.

また、IGBT素子30a,30bのエミッタ電極(IGBT素子30a,30bの上面側)とFWD素子31a,31bのアノード側(FWD素子31a,31bの上面側)には、屈曲構造を備えた端子台23a,23bが半田付けによって架設されている。例えば、端子台23a,23bの断面は、矩形であり、凸形状としている。これにより、IGBT素子30a,30bのエミッタ電極とFWD素子31a,31bのアノード側との導通が端子台23a,23bを通じて確保されている。   A terminal block 23a having a bent structure is provided on the emitter electrodes of the IGBT elements 30a and 30b (upper surface side of the IGBT elements 30a and 30b) and the anode side of the FWD elements 31a and 31b (upper surface side of the FWD elements 31a and 31b). , 23b are installed by soldering. For example, the terminal blocks 23a and 23b have a rectangular cross section and a convex shape. Thereby, conduction between the emitter electrodes of the IGBT elements 30a and 30b and the anode side of the FWD elements 31a and 31b is ensured through the terminal blocks 23a and 23b.

また、IGBT素子30a,30bのコレクタ電極とFWD素子31a,31bのカソード側は、IGBT素子30a,30b並びにFWD素子31a,31bの下地である金属箔20cを通じて互いに導通している。   Further, the collector electrodes of the IGBT elements 30a and 30b and the cathode side of the FWD elements 31a and 31b are electrically connected to each other through a metal foil 20c which is a base of the IGBT elements 30a and 30b and the FWD elements 31a and 31b.

ここで、絶縁板20aは、例えば、アルミナ(Al23)焼結体のセラミックで構成され、金属箔20b,20cは、銅(Cu)を主成分とする金属で構成されている。また、端子台23a,23bは、例えば、銅(Cu)またはアルミニウム(Al)またはこれらの合金を主成分とした材質により構成されている。 Here, the insulating plate 20a is made of, for example, an alumina (Al 2 O 3 ) sintered ceramic, and the metal foils 20b and 20c are made of metal having copper (Cu) as a main component. The terminal blocks 23a and 23b are made of, for example, a material mainly composed of copper (Cu), aluminum (Al), or an alloy thereof.

また、金属箔20cに搭載する半導体素子においては、上述したIGBT素子30a,30bに限らず、パワーMOSFET(Metal Oxide Semiconductor Field Effect Transistor)を用いてもよい。   The semiconductor element mounted on the metal foil 20c is not limited to the IGBT elements 30a and 30b described above, and a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) may be used.

また、半導体装置1にあっては、金属ベース板10の上端縁に、例えば、PPS(ポリ・フェニレン・サルファイド)製の樹脂ケース40が固設されている。そして、樹脂ケース40の一部には、例えば、IGBT素子30a,30bの主電極に導通する外部接続用端子50a,51a,52a,53aがインサート成形されている。   In the semiconductor device 1, a resin case 40 made of, for example, PPS (polyphenylene sulfide) is fixed to the upper end edge of the metal base plate 10. For example, external connection terminals 50a, 51a, 52a, and 53a that are electrically connected to the main electrodes of the IGBT elements 30a and 30b are insert-molded in a part of the resin case 40.

ここで、外部接続用端子50aは、例えば、インバータ回路の正極入力端子(P端子)となり、外部接続用端子51aは、例えば、インバータ回路の負極入力端子(N端子)となる。これらの外部接続用端子50a,51aは、半導体装置1の外部に設置された直流電源の正極、負極に夫々電気的に接続される。また、外部接続用端子52aは、例えば、インバータ回路の交流出力端子(U,V,W相)となる。尚、外部接続用端子53aは、予備端子である。   Here, the external connection terminal 50a is, for example, a positive input terminal (P terminal) of the inverter circuit, and the external connection terminal 51a is, for example, a negative input terminal (N terminal) of the inverter circuit. These external connection terminals 50a and 51a are electrically connected to a positive electrode and a negative electrode of a DC power supply installed outside the semiconductor device 1, respectively. The external connection terminal 52a is, for example, an AC output terminal (U, V, W phase) of the inverter circuit. The external connection terminal 53a is a spare terminal.

そして、外部接続用端子50aには、L字形状の配線用端子(リードフレーム)50bの一端が金属製のねじ60によるねじ止めにより接合されている。更に、当該配線用端子50bは、別の端を2股に分岐する構成とし、当該2つの端は、ねじ60によるねじ止めにより、断面が「コ」の字型をした屈曲構造の端子台24bの上面に接合されている。   One end of an L-shaped wiring terminal (lead frame) 50b is joined to the external connection terminal 50a by screwing with a metal screw 60. Further, the wiring terminal 50b has a configuration in which another end is branched into two branches, and the two ends are bent by a screw 60 so that the cross-section of the terminal block 24b has a “U” shape. It is joined to the upper surface of.

尚、端子台24bの下面は、金属箔20cの主面に半田付けまたはレーザー溶接によって接合されている。
即ち、半導体装置1においては、樹脂ケース40に固設された外部接続用端子50aに配線用端子50bの一端が電気的に接続され、当該配線用端子50bのもう一方の端は、端子台24bを通じて、IGBT素子30bのコレクタ電極並びにFWD素子31bのカソード側に電気的に接続されている。
The lower surface of the terminal block 24b is joined to the main surface of the metal foil 20c by soldering or laser welding.
That is, in the semiconductor device 1, one end of the wiring terminal 50b is electrically connected to the external connection terminal 50a fixed to the resin case 40, and the other end of the wiring terminal 50b is connected to the terminal block 24b. And are electrically connected to the collector electrode of the IGBT element 30b and the cathode side of the FWD element 31b.

また、外部接続用端子51aには、L字形状の配線用端子51bの一端がねじ60によるねじ止めにより接合されている。そして、配線用端子51bのもう一方の端は、ねじ60によるねじ止めにより、端子台23aの上面に接合されている。   One end of an L-shaped wiring terminal 51 b is joined to the external connection terminal 51 a by screwing with a screw 60. The other end of the wiring terminal 51 b is joined to the upper surface of the terminal block 23 a by screwing with a screw 60.

即ち、半導体装置1においては、樹脂ケース40に固設された外部接続用端子51aに配線用端子51bの一端が電気的に接続され、当該配線用端子51bのもう一方の端は、端子台23aを通じて、IGBT素子30aのエミッタ電極並びにFWD素子31aのアノード側に電気的に接続されている。   That is, in the semiconductor device 1, one end of the wiring terminal 51b is electrically connected to the external connection terminal 51a fixed to the resin case 40, and the other end of the wiring terminal 51b is connected to the terminal block 23a. Through the emitter electrode of the IGBT element 30a and the anode side of the FWD element 31a.

また、外部接続用端子52aには、配線用端子52bの一端がねじ60によるねじ止めにより接合されている。また、配線用端子52bは、配線用端子52bの中部において、ねじ60によるねじ止めにより、端子台23bの上面に接合している。そして、外部接続用端子52aは配線用端子50bの下方へ潜るように配置され、2股に分岐された別の端をねじ60によるねじ止めにより、断面が「コ」の字型をした屈曲構造の端子台24aの上面に接合している。   One end of the wiring terminal 52b is joined to the external connection terminal 52a by screwing with a screw 60. The wiring terminal 52b is joined to the upper surface of the terminal block 23b by screwing with a screw 60 in the middle of the wiring terminal 52b. The external connection terminal 52a is arranged so as to be diverged below the wiring terminal 50b, and the other end of the bifurcated branch is fastened with a screw 60 so that the cross section has a U-shaped cross section. Are joined to the upper surface of the terminal block 24a.

尚、端子台24aの下面は、金属箔20cの主面に半田付けまたはレーザー溶接によって接合されている。
即ち、半導体装置1においては、樹脂ケース40に固設された外部接続用端子52aに配線用端子52bの一端が電気的に接続され、当該配線用端子52bの中部が端子台23bを通じて、IGBT素子30bのエミッタ電極並びにFWD素子31bのアノード側に電気的に接続されている。更に、当該配線用端子52bのもう一方の端は、端子台24aを通じて、IGBT素子30aのコレクタ電極並びにFWD素子31aのカソード側に電気的に接続されている。
The lower surface of the terminal block 24a is joined to the main surface of the metal foil 20c by soldering or laser welding.
That is, in the semiconductor device 1, one end of the wiring terminal 52 b is electrically connected to the external connection terminal 52 a fixed to the resin case 40, and the middle part of the wiring terminal 52 b passes through the terminal block 23 b and passes through the IGBT element. The emitter electrode 30b and the anode side of the FWD element 31b are electrically connected. Furthermore, the other end of the wiring terminal 52b is electrically connected to the collector electrode of the IGBT element 30a and the cathode side of the FWD element 31a through the terminal block 24a.

そして、樹脂ケース40及び金属ベース板10で取り囲まれた空間には、半導体素子、金属ワイヤ21等の保護を目的として、配線用端子50b,51b,52bの真下にまで、封止用樹脂41が充填されている。即ち、半導体装置1においては、配線用端子50b,51b,52bを封止用樹脂41から表出させた構造をなしている。   In the space surrounded by the resin case 40 and the metal base plate 10, the sealing resin 41 is provided just below the wiring terminals 50 b, 51 b, 52 b for the purpose of protecting the semiconductor elements, the metal wires 21, and the like. Filled. That is, the semiconductor device 1 has a structure in which the wiring terminals 50 b, 51 b, 52 b are exposed from the sealing resin 41.

ここで、封止用樹脂41の材質は、例えば、ゲルまたはエポキシ樹脂を主成分とする樹脂により構成されている。
特に、封止用樹脂41として、エポキシ樹脂を用いた場合は、端子台23a,23b,24a,24bの外周が当該エポキシ樹脂により封止される。
Here, the material of the sealing resin 41 is made of, for example, a resin mainly composed of gel or epoxy resin.
In particular, when an epoxy resin is used as the sealing resin 41, the outer periphery of the terminal blocks 23a, 23b, 24a, 24b is sealed with the epoxy resin.

これにより、ねじ止めのトルクにより端子台23a,23b,24a,24bにかかる負荷が抑制され、ねじ60の脱着を繰り返し行っても、端子台23a,23b,24a,24bが金属箔20cから剥離することはない。   Thereby, the load applied to the terminal blocks 23a, 23b, 24a, and 24b is suppressed by the screwing torque, and the terminal blocks 23a, 23b, 24a, and 24b are peeled off from the metal foil 20c even when the screw 60 is repeatedly attached and detached. There is nothing.

尚、図(a)では、半導体装置1の内部の構造を表示するために、封止用樹脂41が表示されていない。
また、外部接続用端子50a,51a,52a,53a、配線用端子50b,51b,52b、並びに端子台24a,24bは、例えば、銅(Cu)またはアルミニウム(Al)またはこれらの合金を主成分とした材質により構成されている。
In FIG. 1A, the sealing resin 41 is not displayed in order to display the internal structure of the semiconductor device 1.
The external connection terminals 50a, 51a, 52a, 53a, the wiring terminals 50b, 51b, 52b, and the terminal blocks 24a, 24b are mainly composed of, for example, copper (Cu), aluminum (Al), or an alloy thereof. It is comprised with the material which did.

このように、半導体装置1では、樹脂ケース40に固定支持された複数の外部接続用端子50a,51a,52a,53aと、樹脂ケース40内に包容された、少なくとも一つの半導体素子(例えば、IGBT素子30a,30b、またはFWD素子31a,31b)と、半導体素子に配設された電極(例えば、前記エミッタ電極、前記コレクタ電極、前記アノード、前記カソード)に導通する端子台23a,23b,24a,24bと、端子台23a,23b,24a,24bと外部接続用端子50a,51a,52a,53aとの電気的接続をする配線用端子50b,51b,52bと、を備えている。そして、半導体装置1では、外部接続用端子50a,51a,52aと配線用端子50b,51b,52b、または、端子台23a,23b,24a,24bと外部接続用端子50a,51a,52aとが、ねじ60によるねじ止めにより接合されている。   As described above, in the semiconductor device 1, the plurality of external connection terminals 50 a, 51 a, 52 a, 53 a fixedly supported by the resin case 40 and at least one semiconductor element (for example, IGBT) enclosed in the resin case 40. Element 30a, 30b or FWD element 31a, 31b) and terminal blocks 23a, 23b, 24a connected to electrodes (for example, the emitter electrode, the collector electrode, the anode, and the cathode) disposed in the semiconductor element. 24b, and wiring terminals 50b, 51b, 52b for electrical connection between the terminal blocks 23a, 23b, 24a, 24b and the external connection terminals 50a, 51a, 52a, 53a. In the semiconductor device 1, the external connection terminals 50a, 51a, 52a and the wiring terminals 50b, 51b, 52b, or the terminal blocks 23a, 23b, 24a, 24b and the external connection terminals 50a, 51a, 52a, They are joined by screwing with screws 60.

次に、このような配線用端子構造を有する半導体装置1にもたらされる有利な効果について説明する。尚、以下に示す全ての図では、図1と同一の部材には同一の符号を付し、一度説明した部材の説明の詳細については省略する。   Next, advantageous effects brought about by the semiconductor device 1 having such a wiring terminal structure will be described. In all the drawings shown below, the same members as those in FIG. 1 are denoted by the same reference numerals, and detailed description of the members once described will be omitted.

先ず、半導体装置1においては、樹脂ケース40内での配線用端子50b,51b,52bの引き回しを、半田付け、超音波接合或いはレーザー溶接ではなく、ねじ60によるねじ止めにより行っている。   First, in the semiconductor device 1, the wiring terminals 50 b, 51 b, 52 b in the resin case 40 are routed by screwing with screws 60 instead of soldering, ultrasonic bonding or laser welding.

これにより、半田付けの場合に起きた樹脂ケース40自体の変形、レーザー溶接で生じた溶解物(金属片)の発生が抑制される。
また、ねじ60によるねじ止め部分が樹脂ケース40内で中空状態であっても、当該ねじ止めにより、確実かつ簡便に各部材同士を接合することができる。
Thereby, generation | occurrence | production of the deformation | transformation of the resin case 40 itself which occurred in the case of soldering, and the melted material (metal piece) which arose by laser welding is suppressed.
Moreover, even if the screwing part by the screw 60 is a hollow state in the resin case 40, each member can be reliably and simply joined by the screwing.

例えば、図2及び図3は配線用端子の脱着の方法を説明するための要部模式図である。ここで、図2には、半導体装置1から配線用端子50b,51b,52bを取り除いた状態が例示され、図3には、取り除いた配線用端子50b,51b,52bの状態が例示されている。尚、図3には、ねじ60が配線用端子50b,51b,52bに取り付けられた状態が示されている。   For example, FIG.2 and FIG.3 is a principal part schematic diagram for demonstrating the removal method of the terminal for wiring. 2 illustrates the state where the wiring terminals 50b, 51b, and 52b are removed from the semiconductor device 1, and FIG. 3 illustrates the state of the removed wiring terminals 50b, 51b, and 52b. . FIG. 3 shows a state in which the screw 60 is attached to the wiring terminals 50b, 51b, and 52b.

図2に示すように、外部接続用端子50a,51a,52a,53a並びに端子台23a,23b,24a,24bには、ねじ山を備えた孔部60aが設けられている。そして、夫々の孔部60aに、図3に示す配線用端子50b,51b,52bに取り付けられた、ねじ60を合わせ込み、夫々のねじ60を孔部60aにねじ止めすることで、配線用端子50b,51b,52bを外部接続用端子50a,51a,52a並びに端子台23a,23b,24a,24bに確実かつ簡便に接合することができる。   As shown in FIG. 2, the external connection terminals 50a, 51a, 52a, 53a and the terminal blocks 23a, 23b, 24a, 24b are provided with holes 60a having threads. Then, the screws 60 attached to the wiring terminals 50b, 51b, and 52b shown in FIG. 3 are fitted into the respective hole portions 60a, and the respective screw 60 is screwed to the hole portion 60a, whereby the wiring terminals are arranged. 50b, 51b and 52b can be reliably and simply joined to the external connection terminals 50a, 51a and 52a and the terminal blocks 23a, 23b, 24a and 24b.

これにより、樹脂ケース40内の配線用端子の配置、引き回しが簡便になる。また、樹脂ケース40の変形、レーザー溶接で生じる溶解物が発生せず、半導体装置の生産性が向上する。   Thereby, arrangement | positioning and routing of the wiring terminal in the resin case 40 become easy. Further, the resin case 40 is not deformed, and no melt is generated by laser welding, so that the productivity of the semiconductor device is improved.

また、外部接続用端子50a,51a,52aがインサート成形により、樹脂ケース40内に固定されたとしても、半導体装置1では、外部接続用端子50a,51a,52aから引き回す配線用端子50b,51b,52bの配置を自由に変更することができる。   Further, even if the external connection terminals 50a, 51a, 52a are fixed in the resin case 40 by insert molding, in the semiconductor device 1, wiring terminals 50b, 51b, which are routed from the external connection terminals 50a, 51a, 52a, The arrangement of 52b can be freely changed.

例えば、図1では、上述したように、外部接続用端子50aが正極入力端子であり、外部接続用端子51aが負極入力端子である。
しかし、配線用端子50b,51b,52bの配置を変更することにより、外部接続用端子50aを負極入力端子、外部接続用端子51aを正極入力端子とすることができる。即ち、配線用端子50b,51b,52bの配置を変更することにより、外部接続用端子50a,51aの極を入れ替えることができる。
For example, in FIG. 1, as described above, the external connection terminal 50a is a positive input terminal, and the external connection terminal 51a is a negative input terminal.
However, by changing the arrangement of the wiring terminals 50b, 51b, 52b, the external connection terminal 50a can be used as a negative input terminal and the external connection terminal 51a can be used as a positive input terminal. That is, the poles of the external connection terminals 50a and 51a can be switched by changing the arrangement of the wiring terminals 50b, 51b and 52b.

例えば、図4は配線用端子の配置の変形例を説明するための要部模式図である。
図4に示す配置では、外部接続用端子50aには、配線用端子51bの一端がねじ60によるねじ止めにより接合され、配線用端子51bのもう一方の端は、ねじ60によるねじ止めにより、端子台23aの上面に接合されている。
For example, FIG. 4 is a schematic diagram of a main part for explaining a modification of the arrangement of wiring terminals.
In the arrangement shown in FIG. 4, one end of a wiring terminal 51 b is joined to the external connection terminal 50 a by screwing with a screw 60, and the other end of the wiring terminal 51 b is screwed with a screw 60. It is joined to the upper surface of the base 23a.

即ち、この配置においては、樹脂ケース40に固設された外部接続用端子50aに配線用端子51bの一端が電気的に接続され、当該配線用端子51bのもう一方の端は、端子台23aを通じて、IGBT素子30aのエミッタ電極並びにFWD素子31aのアノード側に電気的に接続されている。   That is, in this arrangement, one end of the wiring terminal 51b is electrically connected to the external connection terminal 50a fixed to the resin case 40, and the other end of the wiring terminal 51b passes through the terminal block 23a. Are electrically connected to the emitter electrode of the IGBT element 30a and the anode side of the FWD element 31a.

また、外部接続用端子51aには、配線用端子50bの一端がねじ60によるねじ止めにより接合され、2股に分かれた配線用端子50bの別の端は、ねじ60によるねじ止めにより、端子台24bの上面に接合されている。   Further, one end of the wiring terminal 50 b is joined to the external connection terminal 51 a by screwing with a screw 60, and the other end of the bifurcated wiring terminal 50 b is screwed with the screw 60 to fix the terminal block. It is joined to the upper surface of 24b.

即ち、半導体装置1においては、樹脂ケース40に固設された外部接続用端子51aに配線用端子50bの一端が電気的に接続され、当該配線用端子50bのもう一方の端は、端子台24bを通じて、IGBT素子30bのコレクタ電極並びにFWD素子31bのカソード側に電気的に接続されている。   That is, in the semiconductor device 1, one end of the wiring terminal 50b is electrically connected to the external connection terminal 51a fixed to the resin case 40, and the other end of the wiring terminal 50b is connected to the terminal block 24b. And are electrically connected to the collector electrode of the IGBT element 30b and the cathode side of the FWD element 31b.

従って、外部接続用端子50aを負極入力端子とし、外部接続用端子51aを正極入力端子とすることにより、図1に例示する半導体装置1と同様の回路構造を得ることができる。   Therefore, by using the external connection terminal 50a as a negative input terminal and the external connection terminal 51a as a positive input terminal, a circuit structure similar to that of the semiconductor device 1 illustrated in FIG. 1 can be obtained.

更に、図1に例示する半導体装置1においては、配線用端子50bの配置を、別の形態に変更することにより、配線用端子50bの一端を、ねじ止めにて外部接続用端子52aに接合することができる。そして、配線用端子52bについても、別の形態に変更することにより、配線用端子52bの一端をねじ止めにて外部接続用端子50aに接合することができる。   Further, in the semiconductor device 1 illustrated in FIG. 1, by changing the arrangement of the wiring terminal 50 b to another form, one end of the wiring terminal 50 b is joined to the external connection terminal 52 a by screwing. be able to. Further, by changing the wiring terminal 52b to another form, one end of the wiring terminal 52b can be joined to the external connection terminal 50a by screwing.

これにより、外部接続用端子52aを正極入力端子とすることもでき、外部接続用端子50aを交流出力端子とすることもできる。
また、同じ要領にて、配線用端子51bの一端をねじ止めにて外部接続用端子52aに接合し、配線用端子52bの一端をねじ止めにて外部接続用端子51aに接合することができる。
Thus, the external connection terminal 52a can be a positive input terminal, and the external connection terminal 50a can be an AC output terminal.
Further, in the same manner, one end of the wiring terminal 51b can be joined to the external connection terminal 52a by screwing, and one end of the wiring terminal 52b can be joined to the external connection terminal 51a by screwing.

これにより、外部接続用端子52aを負極入力端子とすることもでき、外部接続用端子51aを交流出力端子とすることもできる。
また、予備端子である外部接続用端子53aを、正極入力端子、負極入力端子、交流出力端子の何れかにすることも可能である。
Accordingly, the external connection terminal 52a can be a negative input terminal, and the external connection terminal 51a can be an AC output terminal.
Further, the external connection terminal 53a, which is a spare terminal, can be any of a positive input terminal, a negative input terminal, and an AC output terminal.

このように、図1に例示する半導体装置1は、外部接続用端子50a,51a,52a,53a、または半導体素子の主電極に導通させる配線用端子50b,51b,52bの配置をねじ止めにより簡便に変更することができる。また、当該配線用端子50b,51b,52bの配置が変更可能になることにより、外部接続用端子50a,51a,52a,53aに接続する外部配線の引き回しの自由度が大きく向上する。   As described above, in the semiconductor device 1 illustrated in FIG. 1, the arrangement of the external connection terminals 50a, 51a, 52a, and 53a or the wiring terminals 50b, 51b, and 52b that conduct to the main electrode of the semiconductor element is simplified by screwing. Can be changed. Further, since the arrangement of the wiring terminals 50b, 51b, and 52b can be changed, the degree of freedom in routing the external wiring connected to the external connection terminals 50a, 51a, 52a, and 53a is greatly improved.

即ち、図2に例示した半導体装置の形態までは、半導体モジュールの構成を共通化することができ、使用者側の要望に応じて、配線用端子50b,51b,52bの配置を自由に選択することができる。また、外部接続用端子50a,51a,52a,53aに接続する外部配線の配置においても、使用者側の要望に応じて自由に選択することもできる。   In other words, the configuration of the semiconductor module can be shared up to the form of the semiconductor device illustrated in FIG. 2, and the arrangement of the wiring terminals 50b, 51b, 52b can be freely selected according to the user's request. be able to. Further, the arrangement of the external wirings connected to the external connection terminals 50a, 51a, 52a, 53a can be freely selected according to the user's request.

また、半導体装置が所定の形態に共通化されていることから、半導体モジュールに費やされる設計時間を短縮させ、更に、開発費用を低減させることができる。
また、配線用端子50b,51b,52bの長さ、幅、厚みを調整することにより、配線抵抗、リアクタンス、放熱量等を回路の性能に応じて自由に調整することができる。
Further, since the semiconductor device is shared in a predetermined form, it is possible to shorten the design time spent on the semiconductor module and further reduce the development cost.
Further, by adjusting the length, width, and thickness of the wiring terminals 50b, 51b, and 52b, the wiring resistance, reactance, heat radiation amount, and the like can be freely adjusted according to the performance of the circuit.

尚、半導体装置1にあっては、半導体装置の更なる小型化、軽量化を図るために、金属ベース板10を取り除き、絶縁基板20を半導体装置1の基体とした、所謂金属ベースレス構造であってもよい。   The semiconductor device 1 has a so-called metal baseless structure in which the metal base plate 10 is removed and the insulating substrate 20 is used as the base of the semiconductor device 1 in order to further reduce the size and weight of the semiconductor device. There may be.

<第2の実施の形態>
次に、半導体装置1の形態を変形させた半導体装置2について説明する。
図5は第2の実施の形態に係る半導体装置の要部断面模式図である。
<Second Embodiment>
Next, a semiconductor device 2 in which the form of the semiconductor device 1 is modified will be described.
FIG. 5 is a schematic cross-sectional view of an essential part of a semiconductor device according to the second embodiment.

図示するように、半導体装置2では、半導体素子、金属ワイヤ21等の保護を目的として、封止用樹脂41を樹脂ケース40内に充填すると共に、当該封止用樹脂41によりねじ60を被覆・封止する形態をなしている。   As shown in the figure, in the semiconductor device 2, for the purpose of protecting the semiconductor element, the metal wire 21, etc., the sealing resin 41 is filled in the resin case 40 and the screw 60 is covered with the sealing resin 41. It is in the form of sealing.

このような構造であれば、配線用端子50b,51b,52b同士の絶縁性が確保される。また、ねじ60が封止用樹脂41により被覆・封止されていることから、ねじ止めした後のねじ60に緩みが生じることがない。   With such a structure, the insulation between the wiring terminals 50b, 51b, 52b is secured. Further, since the screw 60 is covered and sealed with the sealing resin 41, the screw 60 after being screwed does not loosen.

<第3の実施の形態>
次に、半導体装置1の形態を変形させた別の半導体装置3について説明する。
図6は第3の実施の形態に係る半導体装置の要部模式図である。ここで、図(a)には、半導体装置の平面模式図が例示され、図(b)には図(a)の破線X−Xの位置における断面を矢印の方向に矢視する図が表示されている。
<Third Embodiment>
Next, another semiconductor device 3 in which the form of the semiconductor device 1 is modified will be described.
FIG. 6 is a schematic diagram of a main part of a semiconductor device according to the third embodiment. Here, FIG. (A) illustrates a schematic plan view of the semiconductor device, and FIG. (B) displays a view of the cross section at the position of the broken line XX in FIG. (A) in the direction of the arrow. Has been.

図示するように、半導体装置3では、樹脂、セラミック材等を基材とする、少なくとも1枚のプリント基板(配線基板)70が樹脂ケース40の内側面から延在された支持台40a上に載置されている。また、プリント基板70は、絶縁体であるスペーサ61を介して、ねじ60によるねじ止めにより、外部接続用端子50a,51a,52a,53aに固定されている。そして、ピン端子22がプリント基板70内を貫通し、ピン端子22がプリント基板70の主面に配設された複数の回路パターン(図示しない)に、半田付けにより電気的に接続されている。   As shown in the figure, in the semiconductor device 3, at least one printed circuit board (wiring board) 70 made of resin, ceramic material or the like as a base material is mounted on a support base 40 a extending from the inner surface of the resin case 40. Is placed. The printed circuit board 70 is fixed to the external connection terminals 50a, 51a, 52a, and 53a by screwing with screws 60 through spacers 61 that are insulators. The pin terminals 22 penetrate through the printed circuit board 70, and the pin terminals 22 are electrically connected to a plurality of circuit patterns (not shown) disposed on the main surface of the printed circuit board 70 by soldering.

このようなプリント基板70には、上記回路パターンに導通するIC回路部、コンデンサ部、抵抗部等が配置されている(図示しない)。このようなIC回路部、コンデンサ部、抵抗部をプリント基板70の主面に配置することにより、半導体装置3は、温度センサー回路や過電圧・過電流保護回路等を組み込む形態をなしている。即ち、半導体装置3は、IPM(Intelligent Power Module)として機能する。   Such a printed circuit board 70 is provided with an IC circuit portion, a capacitor portion, a resistance portion, and the like (not shown) that are electrically connected to the circuit pattern. By disposing such an IC circuit portion, a capacitor portion, and a resistance portion on the main surface of the printed circuit board 70, the semiconductor device 3 is configured to incorporate a temperature sensor circuit, an overvoltage / overcurrent protection circuit, and the like. That is, the semiconductor device 3 functions as an IPM (Intelligent Power Module).

このように半導体装置3では、外部接続用端子50a,51a,52a,53aに、ねじ止めにより、プリント基板70を固定している。このような構造であれば、回路パターンを備えたプリント基板70を簡便に半導体装置3に脱着することが可能になる。   Thus, in the semiconductor device 3, the printed circuit board 70 is fixed to the external connection terminals 50a, 51a, 52a, and 53a by screwing. With such a structure, the printed circuit board 70 having the circuit pattern can be easily attached to and detached from the semiconductor device 3.

また、ねじ60は金属製であることから、当該ねじ60を通じて、配線用端子50b,51b,52bに導通する配線パターンをプリント基板70の主面に引き回してもよい。このような配線パターンをプリント基板70に配置することにより、正極入力端子、負極入力端子或いは交流出力端子の電位のモニタリング等がプリント基板70に配設された回路によって実施し得る。   Further, since the screw 60 is made of metal, the wiring pattern that is electrically connected to the wiring terminals 50 b, 51 b, 52 b may be routed to the main surface of the printed board 70 through the screw 60. By arranging such a wiring pattern on the printed circuit board 70, the potential of the positive input terminal, the negative input terminal, or the AC output terminal can be monitored by a circuit disposed on the printed circuit board 70.

<第4の実施の形態>
次に、半導体装置1の形態を変形させた、更に別の半導体装置4について説明する。
図7は第4の実施の形態に係る半導体装置の要部模式図である。ここで、図(a)には、半導体装置の平面模式図が例示され、図(b)には図(a)の破線X−Xの位置における断面を矢印の方向に矢視する図が表示されている。
<Fourth embodiment>
Next, still another semiconductor device 4 in which the form of the semiconductor device 1 is modified will be described.
FIG. 7 is a schematic diagram of a main part of a semiconductor device according to the fourth embodiment. Here, FIG. (A) illustrates a schematic plan view of the semiconductor device, and FIG. (B) displays a view of the cross section at the position of the broken line XX in FIG. (A) in the direction of the arrow. Has been.

図示するように、半導体装置4では、少なくとも1枚の金属板71が樹脂ケース40の内側面から延在された支持台40a上に載置されている。また、プリント基板70は、絶縁体であるスペーサ61を通じて、ねじ60によるねじ止めにより、外部接続用端子51a,53aに固定されている。また、金属板71は、ねじ60を通じて、負極入力端子である外部接続用端子51aに導通している。   As shown in the figure, in the semiconductor device 4, at least one metal plate 71 is placed on a support base 40 a extending from the inner surface of the resin case 40. The printed circuit board 70 is fixed to the external connection terminals 51a and 53a by screwing with a screw 60 through a spacer 61 which is an insulator. Further, the metal plate 71 is electrically connected to the external connection terminal 51a which is a negative electrode input terminal through the screw 60.

このような構造であれば、金属板71は、半導体素子等から発せられる電磁波のシールド板として機能し、例えば、半導体装置4外に取り付ける制御回路等を安定して作動させることができる。   With such a structure, the metal plate 71 functions as a shield plate for electromagnetic waves emitted from a semiconductor element or the like, and can stably operate, for example, a control circuit attached outside the semiconductor device 4.

尚、電磁波のシールド板においては、金属板71を取り付ける代わりに、外部接続用端子51aに導通する金属層(シールド層)を、上述したプリント基板70の主面に選択的に配置してもよい。   In the electromagnetic wave shield plate, instead of attaching the metal plate 71, a metal layer (shield layer) conducting to the external connection terminal 51a may be selectively disposed on the main surface of the printed circuit board 70 described above. .

<第5の実施の形態>
次に、半導体装置1の形態を変形させた、更に別の半導体装置5について説明する。
図8は第5の実施の形態に係る半導体装置の要部模式図である。ここで、図(a)には、半導体装置の平面模式図が例示され、図(b)には図(a)の破線X−Xの位置における断面を矢印の方向に矢視する図が表示されている。
<Fifth embodiment>
Next, still another semiconductor device 5 in which the form of the semiconductor device 1 is modified will be described.
FIG. 8 is a schematic diagram of a main part of a semiconductor device according to the fifth embodiment. Here, FIG. (A) illustrates a schematic plan view of the semiconductor device, and FIG. (B) displays a view of the cross section at the position of the broken line XX in FIG. (A) in the direction of the arrow. Has been.

図示するように、半導体装置5では、例えば、樹脂またはセラミック材を主成分とする絶縁板72の主面に配線用端子50b,51b,52bを接着部材(図示しない)を介して固着させている。   As shown in the figure, in the semiconductor device 5, for example, wiring terminals 50b, 51b, and 52b are fixed to the main surface of an insulating plate 72 mainly composed of a resin or a ceramic material via an adhesive member (not shown). .

このような構造であれば、絶縁板72に固着された配線用端子50b,51b,52bのユニットを一括して、外部接続用端子50a,51a,52a並びに端子台23a,23b,24a,24bに、ねじ止めすることができる。即ち、配線用端子50b,51b,52bの脱着がより簡便になる。   With such a structure, the wiring terminals 50b, 51b and 52b fixed to the insulating plate 72 are collectively connected to the external connection terminals 50a, 51a and 52a and the terminal blocks 23a, 23b, 24a and 24b. Can be screwed. That is, the attachment / detachment of the wiring terminals 50b, 51b, 52b becomes easier.

<第6の実施の形態>
次に、半導体装置1の形態を変形させた、更に別の半導体装置6について説明する。
図9は第6の実施の形態に係る半導体装置の要部平面模式図である。
<Sixth Embodiment>
Next, still another semiconductor device 6 in which the form of the semiconductor device 1 is modified will be described.
FIG. 9 is a schematic plan view of an essential part of a semiconductor device according to the sixth embodiment.

半導体装置6では、例えば、半導体装置1と同じ構成の半導体装置1a,1b,1cが複数個、並べられ、夫々の配線用端子50b,51bが連結された構造をなしている。
例えば、夫々の配線用端子50bは、Pバスバー50bbにて連結され、夫々の配線用端子50bの一端がねじ止めにより外部接続用端子50aに接合されている。更に、夫々の配線用端子50bのもう一方の端は、ねじ止めにより、端子台24bの上面に接合されている。
In the semiconductor device 6, for example, a plurality of semiconductor devices 1 a, 1 b, 1 c having the same configuration as the semiconductor device 1 are arranged and the wiring terminals 50 b, 51 b are connected to each other.
For example, each wiring terminal 50b is connected by a P bus bar 50bb, and one end of each wiring terminal 50b is joined to the external connection terminal 50a by screwing. Furthermore, the other end of each wiring terminal 50b is joined to the upper surface of the terminal block 24b by screwing.

また、夫々の配線用端子51bは、Nバスバー51bbにて連結され、夫々の配線用端子51bの一端がねじ止めにより外部接続用端子51a接合されている。更に、夫々の配線用端子51bのもう一方の端は、ねじ止めにより、端子台23aの上面に接合されている。   Each wiring terminal 51b is connected by an N bus bar 51bb, and one end of each wiring terminal 51b is joined to the external connection terminal 51a by screwing. Furthermore, the other end of each wiring terminal 51b is joined to the upper surface of the terminal block 23a by screwing.

そして、半導体装置6の外部に設置された直流電源の正極を半導体装置1a,1b,1cに配設された何れかの外部接続用端子50aに接続する。また、直流電源の負極を半導体装置1a,1b,1cに配設された何れかの外部接続用端子51aに接続する。   Then, the positive electrode of the DC power supply installed outside the semiconductor device 6 is connected to one of the external connection terminals 50a provided in the semiconductor devices 1a, 1b, and 1c. Further, the negative electrode of the DC power source is connected to any one of the external connection terminals 51a provided in the semiconductor devices 1a, 1b, and 1c.

このような構成により、半導体装置6は、交流出力端子(外部接続用端子52a)を3個備えた3相インバータ回路として機能する。
尚、図9では、Pバスバー50bbと配線用端子50b、Nバスバー51bbと配線用端子51bとが一体となった構成を例示しているが、当該Pバスバー50bb、Nバスバー51bbは必要に応じて所定の長さに分断し、継ぎ手部分をねじ60によるねじ止めにより接続してもよい。また、半導体装置1を配置する数については、3個に限ることはない。使用者側の要望に応じて、半導体装置1を2個配置してもよく、4個以上配置してもよい。
With such a configuration, the semiconductor device 6 functions as a three-phase inverter circuit including three AC output terminals (external connection terminals 52a).
9 illustrates a configuration in which the P bus bar 50bb and the wiring terminal 50b, and the N bus bar 51bb and the wiring terminal 51b are integrated, the P bus bar 50bb and the N bus bar 51bb may be used as necessary. It may be divided into a predetermined length, and the joint portion may be connected by screwing with a screw 60. Further, the number of semiconductor devices 1 arranged is not limited to three. Two semiconductor devices 1 may be arranged, or four or more may be arranged according to the user's request.

また、半導体装置6においては、配線用端子50b,51b,52b、Pバスバー50bb、並びにNバスバー51bbの配置を変更することにより、外部接続用端子51a,52a,53aの何れかを正極入力端子とすることもできる。また、外部接続用端子50a,52a,53aの何れかを負極入力端子とすることもできる。更に、外部接続用端子50a,51a,53aの何れかを交流出力端子とすることもできる。   In the semiconductor device 6, any of the external connection terminals 51a, 52a, and 53a is changed to a positive input terminal by changing the arrangement of the wiring terminals 50b, 51b, and 52b, the P bus bar 50bb, and the N bus bar 51bb. You can also Also, any of the external connection terminals 50a, 52a, 53a can be used as a negative input terminal. Furthermore, any of the external connection terminals 50a, 51a, 53a can be used as an AC output terminal.

<第7の実施の形態>
次に、半導体装置1の形態を変形させた、更に別の半導体装置7について説明する。
図10は第7の実施の形態に係る半導体装置の模式図である。
<Seventh embodiment>
Next, still another semiconductor device 7 in which the form of the semiconductor device 1 is modified will be described.
FIG. 10 is a schematic diagram of a semiconductor device according to the seventh embodiment.

半導体装置7では、例えば、図1に示す端子台23a,23bの代わりに、ヒートスプレッダ25を用いた構造をなしている。このようなヒートスプレッダ25は、例えば、IGBT素子30aのエミッタ電極(上面側)に接合された放熱部材、伝導体として機能する。   For example, the semiconductor device 7 has a structure using a heat spreader 25 instead of the terminal blocks 23a and 23b shown in FIG. Such a heat spreader 25 functions as, for example, a heat radiating member and a conductor bonded to the emitter electrode (upper surface side) of the IGBT element 30a.

図示するように、ヒートスプレッダ25には、予めねじ穴25aを形成させておく。また、ねじ穴25aの内部には、ねじ60と螺合するねじ山が形成されている。そして、配線用端子51bのねじ穴51bhの位置を合わせ、当該ねじ60によるねじ止めにより、配線用端子51bとヒートスプレッダ25との電気的・熱的な接続を行う。   As shown in the figure, a screw hole 25a is formed in the heat spreader 25 in advance. A screw thread that is screwed into the screw 60 is formed inside the screw hole 25a. Then, the position of the screw hole 51 bh of the wiring terminal 51 b is aligned, and the wiring terminal 51 b and the heat spreader 25 are electrically and thermally connected by screwing with the screw 60.

このような構造によっても、配線用端子51bとIGBT素子30aとの電気的・熱的な接続を簡便に行うことができる。
尚、このようなヒートスプレッダ25を備えた素子は、IGBT素子30aに限るものではない。上述したIGBT素子30b、FWD素子31a,31bにおいても、ヒートスプレッダ25を備え、対応する配線用端子を接合させてもよい。
Even with such a structure, the electrical and thermal connection between the wiring terminal 51b and the IGBT element 30a can be easily performed.
The element provided with such a heat spreader 25 is not limited to the IGBT element 30a. Also in the IGBT element 30b and the FWD elements 31a and 31b described above, the heat spreader 25 may be provided and the corresponding wiring terminals may be joined.

また更に、複数の半導体素子に跨って、1つのヒートスプレッダを接合し、当該複数の半導体素子の直上部分を避けた位置にねじ穴を形成し、当該部分に配線用端子を接合させてもよい。   Furthermore, one heat spreader may be joined across a plurality of semiconductor elements, a screw hole may be formed at a position avoiding a portion directly above the plurality of semiconductor elements, and a wiring terminal may be joined to the part.

尚、上述した第1乃至第7の実施の形態は、独立した形態ではなく、少なくとも2つ以上の実施の形態を複合させてもよい。   Note that the first to seventh embodiments described above are not independent, and at least two or more embodiments may be combined.

第1の実施の形態に係る半導体装置の要部模式図である。It is a principal part schematic diagram of the semiconductor device which concerns on 1st Embodiment. 配線用端子の脱着の方法を説明するための要部模式図である(その1)。It is a principal part schematic diagram for demonstrating the removal method of the terminal for wiring (the 1). 配線用端子の脱着の方法を説明するための要部模式図である(その2)。It is a principal part schematic diagram for demonstrating the removal method of the terminal for wiring (the 2). 配線用端子の配置の変形例を説明するための要部模式図である。It is a principal part schematic diagram for demonstrating the modification of arrangement | positioning of the terminal for wiring. 第2の実施の形態に係る半導体装置の要部断面模式図である。It is a principal part cross-sectional schematic diagram of the semiconductor device which concerns on 2nd Embodiment. 第3の実施の形態に係る半導体装置の要部模式図である。It is a principal part schematic diagram of the semiconductor device which concerns on 3rd Embodiment. 第4の実施の形態に係る半導体装置の要部模式図である。It is a principal part schematic diagram of the semiconductor device which concerns on 4th Embodiment. 第5の実施の形態に係る半導体装置の要部模式図である。It is a principal part schematic diagram of the semiconductor device which concerns on 5th Embodiment. 第6の実施の形態に係る半導体装置の要部平面模式図である。It is a principal part schematic plan view of the semiconductor device which concerns on 6th Embodiment. 第7の実施の形態に係る半導体装置の要部模式図である。It is a principal part schematic diagram of the semiconductor device which concerns on 7th Embodiment. パワー半導体素子を樹脂ケース内に封止させた半導体装置の要部模式図である。It is a principal part schematic diagram of the semiconductor device which sealed the power semiconductor element in the resin case.

符号の説明Explanation of symbols

1,1a,1b,1c,2,3,4,5,6 半導体装置
10 金属ベース板
20 絶縁基板
20b,20c 金属箔
20a,72 絶縁板
21 金属ワイヤ
22 ピン端子
23a,23b,24a,24b 端子台
25 ヒートスプレッダ
25a,51bh ねじ穴
30a,30b IGBT素子
31a,31b FWD素子
30g 制御電極
40a 支持台
40 樹脂ケース
41 封止用樹脂
50a,51a,52a,53a 外部接続用端子
50bb,51bb バスバー
50b,51b,52b 配線用端子
60 ねじ
60a 孔部
61 スペーサ
70 プリント基板
71 金属板
1, 1a, 1b, 1c, 2, 3, 4, 5, 6 Semiconductor device 10 Metal base plate 20 Insulating substrate 20b, 20c Metal foil 20a, 72 Insulating plate 21 Metal wire 22 Pin terminal 23a, 23b, 24a, 24b Terminal Base 25 Heat spreader 25a, 51bh Screw hole 30a, 30b IGBT element 31a, 31b FWD element 30g Control electrode 40a Support base 40 Resin case 41 Sealing resin 50a, 51a, 52a, 53a External connection terminal 50bb, 51bb Bus bar 50b, 51b , 52b Wiring terminal 60 Screw 60a Hole 61 Spacer 70 Printed circuit board 71 Metal plate

Claims (10)

樹脂ケースに固定支持された複数の外部接続用端子と、
前記樹脂ケース内に包容された、少なくとも一つの半導体素子と、
前記半導体素子に配設された電極に導通する端子台と、
前記端子台と前記外部接続用端子との電気的接続をする配線用端子と、
前記樹脂ケース内に充填された、少なくとも前記半導体素子を封止し、前記配線用端子が表出している樹脂と、
を備え、
前記外部接続用端子と前記配線用端子、または、前記端子台と前記配線用端子との少なくとも何れかがねじ止めにより接合されていることを特徴とする半導体装置。
A plurality of external connection terminals fixedly supported by the resin case;
At least one semiconductor element enclosed in the resin case;
A terminal block electrically connected to an electrode disposed in the semiconductor element;
A wiring terminal for electrical connection between the terminal block and the external connection terminal;
Resin filled in the resin case, sealing at least the semiconductor element, and exposing the wiring terminals;
With
At least one of the external connection terminal and the wiring terminal or the terminal block and the wiring terminal is joined by screwing.
前記電極が前記半導体素子の主電極であることを特徴とする請求項1記載の半導体装置。   The semiconductor device according to claim 1, wherein the electrode is a main electrode of the semiconductor element. 前記端子台は、前記半導体素子の電極に接合された放熱部材であることを特徴とする請求項1記載の半導体装置。   The semiconductor device according to claim 1, wherein the terminal block is a heat radiating member bonded to an electrode of the semiconductor element. 前記端子台が屈曲構造を備えていることを特徴とする請求項1記載の半導体装置。   The semiconductor device according to claim 1, wherein the terminal block has a bent structure. 前記樹脂ケース内に少なくとも前記半導体素子を封止する樹脂が充填されていると共に、前記樹脂がねじ止めに用いるねじを封止していることを特徴とする請求項1記載の半導体装置。  2. The semiconductor device according to claim 1, wherein the resin case is filled with at least a resin for sealing the semiconductor element, and the resin seals a screw used for screwing. 複数の前記配線用端子が絶縁板に固着されていることを特徴とする請求項1記載の半導体装置。  2. The semiconductor device according to claim 1, wherein the plurality of wiring terminals are fixed to an insulating plate. 前記外部接続用端子と前記配線用端子、または、前記端子台と前記配線用端子とがねじ止めにより接合されていると共に、前記外部接続用端子に、少なくとも温度センサー回路、過電圧保護回路、過電流保護回路、シールド層の何れかを配置した、少なくとも一枚のプリント基板がねじ止めにより固定されていることを特徴とする請求項1記載の半導体装置。  The external connection terminal and the wiring terminal, or the terminal block and the wiring terminal are joined by screwing, and the external connection terminal includes at least a temperature sensor circuit, an overvoltage protection circuit, an overcurrent. 2. The semiconductor device according to claim 1, wherein at least one printed circuit board on which either the protection circuit or the shield layer is disposed is fixed by screwing. 前記プリント基板に、ねじ止めに用いるねじを通じて、前記半導体素子の前記電極に導通する配線パターンが配置されていることを特徴とする請求項7記載の半導体装置。  8. The semiconductor device according to claim 7, wherein a wiring pattern that is electrically connected to the electrode of the semiconductor element is disposed on the printed board through a screw used for screwing. 前記外部接続用端子と前記配線用端子、または、前記端子台と前記配線用端子とがねじ止めにより接合されていると共に、前記外部接続用端子に、少なくとも一枚のシールド板がねじ止めにより固定されていることを特徴とする請求項1記載の半導体装置。  The external connection terminal and the wiring terminal, or the terminal block and the wiring terminal are joined by screwing, and at least one shield plate is fixed to the external connection terminal by screwing. The semiconductor device according to claim 1, wherein: 樹脂ケースに固定支持された複数の外部接続用端子と、  A plurality of external connection terminals fixedly supported by the resin case;
前記樹脂ケース内に包容された、少なくとも一つの半導体素子と、  At least one semiconductor element enclosed in the resin case;
前記半導体素子に配設された電極に導通する端子台と、  A terminal block electrically connected to an electrode disposed in the semiconductor element;
前記端子台と前記外部接続用端子との電気的接続をする配線用端子と、  A wiring terminal for electrical connection between the terminal block and the external connection terminal;
前記樹脂ケース内に充填された、少なくとも前記半導体素子を封止し、前記配線用端子が表出している樹脂と、  Resin filled in the resin case, sealing at least the semiconductor element, and exposing the wiring terminals;
を備え、  With
前記外部接続用端子と前記配線用端子、または、前記端子台と前記配線用端子とがねじ止めにより接合されている、複数の半導体モジュール間の前記配線用端子を連結したことを特徴とする半導体装置。  A semiconductor characterized in that the external connection terminal and the wiring terminal, or the terminal block and the wiring terminal are joined by screwing, and the wiring terminal is connected between a plurality of semiconductor modules. apparatus.
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