JP5291865B2 - Display device, display module, and electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a system with combined analog gray scale and digital gray scale systems. <P>SOLUTION: There is provided a display device, having a means capable of display in a plurality of display mode. A generating circuit for video signals by the display modes outputs an input video signal with an analog value, as it is, with a binary digital value, or with a multi-level digital value. Consequently, display gray scales of pixels change at proper times. Consequently, a beautiful image can be displayed. Namely, analog signal and digital signal are switched and input to a source driver. Then, the display device has a means of switching and outputting the analog signal and digital signal. The advantages of both the analog gray scale system and the digital gray scale system can be obtained by using such a means. <P>COPYRIGHT: (C)2007,JPO&amp;INPIT

Description

  The present invention relates to a display device driving method.

  In recent years, so-called self-luminous display devices in which pixels are formed by light-emitting elements such as light-emitting diodes (LEDs) have attracted attention. As a light-emitting element used in such a self-luminous display device, an organic light-emitting diode (also referred to as an OLED (Organic Light Emitting Diode), an organic EL element, or an electroluminescence (EL) element) attracts attention. It has been used for EL displays (for example, organic EL displays). Since light-emitting elements such as OLEDs are self-luminous, there are advantages such as higher pixel visibility than a liquid crystal display, no need for a backlight, and high response speed. The luminance of the light emitting element is controlled by the value of current flowing therethrough.

There are a digital gradation method and an analog gradation method as driving methods for controlling the light emission gradation of such a display device. In the digital gradation method, gradation is expressed by turning on and off the light emitting element by digital control. On the other hand, the analog gray scale method includes a method in which the light emission intensity of the light emitting element is controlled in analog and a method in which the light emission time of the light emitting element is controlled in analog.

  In the digital gradation method, since there are only two states of light emission and non-light emission, only two gradations can be expressed as it is. In view of this, multi-gradation is being achieved by combining different methods. In many cases, a time gray scale method is used as a technique for multi-gradation (see Patent Documents 1 and 2).

  In addition to the organic EL display using the digital gradation method, there are several displays that display gradation by combining the time gradation by controlling the display state of the pixel by digital control. An example is a plasma display.

The time gradation method is a method of expressing gradation by controlling the length of a light emitting period and the number of times of light emission. In other words, one frame period is divided into a plurality of subframe periods, and each subframe is weighted such as the number of times of light emission and the time of light emission, and the total amount of weighting (total number of times of light emission and total time of light emission) is assigned for each gradation. The gradation is expressed by adding a difference to.
Patent Publication No. 2001-324958 Patent Publication No. 2001-343933

As described above, there are an analog gradation method and a digital gradation method, but both have advantages and disadvantages, and there is no method that has both advantages and disadvantages. For this reason, it was inevitably limited to either method.

For example, in the case of the analog gradation method, gradation is displayed smoothly, but noise is also displayed together, or contrast is lowered.

  SUMMARY OF THE INVENTION In view of such problems, the present invention has an object of providing a display device that has the advantages of both an analog gray scale method and a digital gray scale method, and has a high contrast and a clear display.

  The present invention provides a display device having means capable of displaying in a plurality of display modes. That is, an analog signal and a digital signal are switched and input to the source driver. And it has a means to switch and output an analog signal and a digital signal. By using such means, the above object can be achieved by having the advantages of both the analog gradation method and the digital gradation method.

  The display device of the present invention is a display device in which a plurality of pixels are arranged in a matrix, and the display device has at least two display modes, a source driver and a gate driver, in the first display mode. In the second display mode, an analog signal is supplied to the source driver, and a digital signal is supplied to the source driver.

  The present invention is a display device in which a plurality of pixels are arranged in a matrix, and the display device has at least two display modes of a source driver and a gate driver, and in the first display mode, An analog signal is supplied to the source driver, an analog signal is supplied from the source driver to the pixel, a digital signal is supplied to the source driver in the second display mode, and a digital signal is supplied from the source driver to the pixel. It is characterized by being supplied.

  According to the present invention, the display device having the above configuration includes a video signal generation circuit for each display mode, and an analog signal and a digital signal supplied to the source driver are output from the video signal generation circuit for each display mode. It is characterized by that.

  According to the present invention, the display device having the above configuration includes a video signal generation circuit for each display mode including a binarization circuit, and the video signal input to the video signal generation circuit for each display mode is an analog signal. And a signal used in the second display mode of the video signal is converted into a digital signal using the binarization circuit. The display device includes a video signal generation circuit for each display mode including a multi-value circuit, and a video signal input to the video signal generation circuit for each display mode is an analog signal, and the video signal Of these, a signal used in the second display mode may be converted into a digital signal using the multi-value conversion circuit. The display device includes a video signal generation circuit for each display mode including a digital-analog conversion circuit, and the video signal input to the video signal generation circuit for each display mode is a digital signal, Of these, a signal used in the first display mode may be converted into an analog signal using a digital-analog conversion circuit.

  In the present invention, the display mode is distinguished by the number of gradations. For example, the number of gradations is different between the first display mode and the second display mode.

  In the present invention, one pixel represents one element whose brightness can be controlled. Therefore, as an example, one pixel represents one color element, and brightness is expressed by one color element. Therefore, at that time, in the case of a color display device composed of R (red), G (green), and B (blue) color elements, the minimum unit of an image is an R pixel, a G pixel, and a B pixel. It is assumed to be composed of three pixels. The color elements are not limited to three colors and may be more than that, for example, RGBW (W is white).

  Note that in this specification, the pixels are arranged in a matrix, not only in the case of a so-called grid pattern in which vertical stripes and horizontal stripes are combined, but also in full-color display with three color elements (for example, RGB). When performing the above, the case where pixels of three color elements representing the minimum element of one image are arranged in a so-called delta arrangement is also included. Moreover, the case where a Bayer arrangement is also included. Further, the color light emitting region may be different for each color element.

  In the present invention, there are no limitations on the types of transistors that can be used, and the transistor is formed using a thin film transistor (TFT) using a non-single-crystal semiconductor film typified by amorphous silicon or polycrystalline silicon, a semiconductor substrate, or an SOI substrate. A MOS transistor, a junction transistor, a bipolar transistor, a transistor using an organic semiconductor or a carbon nanotube, and other transistors can be used. Note that the non-single-crystal semiconductor film may contain hydrogen or halogen. There is no limitation on the kind of the substrate over which the transistor is disposed, and the transistor can be disposed on a single crystal substrate, an SOI substrate, a glass substrate, a plastic substrate, a paper substrate, a cellophane substrate, a stone substrate, or the like. Alternatively, a transistor may be formed using a certain substrate, and then the transistor may be moved to another substrate and placed on another substrate.

  As described above, the transistor in the present invention may be any type of transistor and may be formed on any substrate. Therefore, the entire circuit may be formed on a glass substrate, may be formed on a plastic substrate or a single crystal substrate, may be formed on an SOI substrate, or on any substrate. It may be formed. Since all the circuits are formed, the number of parts can be reduced to reduce the cost, and the number of connections with circuit parts can be reduced to improve the reliability. Alternatively, a part of the circuit may be formed on a certain substrate and another part of the circuit may be formed on another substrate. That is, all of the circuits may not be formed on the same substrate. For example, part of a circuit is formed using a transistor over a glass substrate, and another part of the circuit is formed by connecting an IC chip formed over a single crystal substrate or the like with COG (Chip On Glass). You may arrange | position on a board | substrate. Alternatively, the IC chip may be connected to the glass substrate using TAB (Tape Auto Bonding) or a printed board. As described above, since a part of the circuit is formed on the same substrate, the number of components can be reduced to reduce the cost, and the reliability can be improved by reducing the number of connection points with the circuit components. . In addition, since power consumption is high in a portion where the drive voltage is high or a portion where the drive frequency is high, improvement in power consumption can be prevented if such a portion is not formed on the same substrate.

  Note that a variety of switches can be used as a switch described in the specification, and examples thereof include an electrical switch and a mechanical switch. That is, it is not particularly limited as long as the current flow can be controlled. For example, a transistor, a diode (a PN diode, a PIN diode, a Schottky diode, a diode-connected transistor, or the like), or a logic circuit that is a combination thereof may be used. In the case of using a transistor as a switch, the transistor operates as a mere switch, and thus the polarity (conductivity type) of the transistor is not particularly limited. However, it is desirable to use a transistor having a polarity with a smaller off-state current. As a transistor with low off-state current, there are a transistor provided with an LDD region and a transistor having a multi-gate structure. In addition, when the transistor operates as a switch with the source electrode potential close to the low potential side power supply (Vss, GND, 0 V, etc.), the N channel type is used. When operating in a state close to a power source (Vdd or the like), it is desirable to use a P-channel type. This is because the absolute value of the gate-source voltage can be increased, so that it can easily operate as a switch. Note that both N-channel and P-channel switches may be used as CMOS switches. When a CMOS type switch is used, the output voltage can be easily controlled with respect to various input voltages, so that an appropriate operation can be performed.

  In the present invention, being connected is synonymous with being electrically connected. Therefore, in the configuration disclosed by the present invention, in addition to a predetermined connection relationship, other elements (for example, a switch, a transistor, a capacitor, an inductor, a resistor, a diode, etc.) that can be electrically connected are arranged. May be. Of course, it may be arranged without interposing other elements in between, and being electrically connected includes the case of being directly connected.

  In addition, in this invention, it is formed on a certain thing, or is formed on the top. It is not limited to being in direct contact. This includes cases where they are not in direct contact, that is, when another object is sandwiched between them. Therefore, for example, when the layer B is formed on the layer A (or on the layer A), the case where the layer B is formed in direct contact with the layer A is different from the case where the layer B is formed on the layer A. And the case where the layer B is formed on the layer (for example, the layer C or the layer D). The same applies to the description of “above”, and it is not limited to being in direct contact with a certain object, and includes a case where another object is sandwiched therebetween. Therefore, for example, when the layer B is formed above the layer A, when the layer B is formed directly on the layer A, another layer (for example, the layer C) is formed on the layer A. And the layer D) are formed, and the layer B is formed thereon. In addition, the case where it is below or below-also includes the case where it is in direct contact and the case where it is not in contact.

  In the present invention, the display can be switched between the analog gradation method and the digital gradation method. Therefore, display quality such as contrast is improved, and power consumption can be reduced.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode.

(Embodiment 1)
FIG. 1 shows an overall configuration diagram. In order to drive the pixel array 101, a source driver 102 and a gate driver 103 are arranged. A video signal is input to the source driver 102. Note that a plurality of source drivers 102 and gate drivers 103 may be provided.

  Note that the source driver and a part of the source driver do not exist on the same substrate as the pixel array 101 and may be configured using, for example, an external IC chip.

  Note that as described above, the transistor in the present invention may be any type of transistor, and may be formed on any substrate. Accordingly, the circuit as shown in FIG. 1 may be entirely formed on a glass substrate, may be formed on a plastic substrate, may be formed on a single crystal substrate, or may be an SOI substrate. It may be formed on any substrate, and may be formed on any substrate. Alternatively, a part of the circuit in FIG. 1 or the like may be formed on a certain substrate, and another part of the circuit in FIG. 1 or the like may be formed on another substrate. That is, all the circuits in FIG. 1 and the like may not be formed on the same substrate. For example, in FIG. 1 and the like, the pixel array 101 and the gate driver 103 are formed using a TFT on a glass substrate, and the source driver 102 (or part thereof) is formed on a single crystal substrate, and the IC chip. May be connected on a glass substrate by COG (Chip On Glass). Alternatively, the IC chip may be connected to the glass substrate using TAB (Tape Auto Bonding) or a printed board.

  The video signal input to the source driver 102 is generated in accordance with each display mode in the video signal generation circuit 106 for each display mode. The video signal generation circuit 106 for each display mode is controlled using a controller (control circuit) 107. An original video signal is input to the video signal generation circuit 106 for each display mode. Then, using the original video signal, the video signal generation circuit 106 for each display mode generates a video signal corresponding to each display mode, and outputs the video signal to the source driver 102.

  The display modes are roughly classified into an analog mode and a digital mode. In the analog mode, the video signal input to the pixel has an analog value. On the other hand, in the digital mode, the video signal input to the pixel has a digital value.

Next, details of the circuit will be described. FIG. 2 shows the configuration of the source driver 102 and the like. The shift register 231 is a circuit that outputs a signal (so-called sampling pulse) that is sequentially selected. Thus, the circuit is not limited to a shift register as long as it has a similar function. For example, a decoder circuit may be used.

A sampling pulse output from the shift register is input to the analog switches 201 to 203. Then, the video signals are sequentially input to the video signal line 221, the analog switches 201 to 203 are sequentially turned on according to the sampling pulse, and the video signals are input to the pixel array 101. The pixel array 101 has pixels 211 arranged in a matrix.

Although FIG. 2 shows the case where the pixels 211 are arranged in two rows and three columns, the present invention is not limited to this. Arbitrary numbers can be arranged.

An example of the pixel 220 for one pixel is shown in FIG. The selection transistor 404 is controlled using the gate signal line 401. When the selection transistor 404 is turned on, a video signal is input from the source signal line 402 to the storage capacitor 405. Then, the driving transistor 406 is turned on / off according to the video signal, and a current flows from the power supply line 403 through the light emitting element 407 to the counter electrode 408.

Note that the pixel configuration is not limited to FIG. For example, a configuration that corrects variations in driving transistors may be used.

The pixel configuration for correcting variation is roughly divided into a type for correcting variation in threshold voltage and a type for inputting current as a video signal.

FIG. 31 shows a pixel configuration for correcting variations in threshold voltage. By controlling the switch 3107 using the gate signal line 3115, the threshold voltage of the driving transistor 3101 is stored in the capacitor 3104. The switch 3103 controlled by the gate signal line 3114 functions to initialize the gate potential of the driving transistor 3101. Then, a video signal is input from the source signal line 3111 through the switch 3102. Note that the selection transistor 404 in FIG. 15 corresponds to the switch 3102 in FIG. 31, the storage capacitor 405 corresponds to the capacitor 3105, and the drive transistor 406 corresponds to the drive transistor 3101. The gate signal line 401 corresponds to the gate signal line 3113, the source signal line 402 corresponds to the source signal line 3111, and the power supply line 403 corresponds to the power supply line 3116.

In FIG. 31, the wiring 3112 for initializing the gate potential of the driving transistor 3101 is necessary. FIG. The gate of the driving transistor 3101 is connected to the drain of the driving transistor 3101 through the switch 3203.

There are various pixel configurations for correcting variations in threshold voltage, and the present invention is not limited to the configurations shown in FIGS. As described above, when a pixel configuration that corrects variation in threshold voltage is used, variation in current flowing in the light-emitting element can be reduced. In particular, the luminance can be made uniform in the analog mode. Therefore, it is more preferable.

Next, FIG. 33 shows a pixel configuration in which a current is input as a video signal. A current corresponding to the video signal is supplied to the source signal line 3330. Then, the current flows to the drain of the driving transistor 3301 via the selection switch 3302 and to the gate of the driving transistor 3301 via the switch 3304, and accordingly, a gate-source voltage is generated. The gate-source voltage is stored in the capacitor 3305, and then a current is supplied to the light-emitting element through the switch 3306. Note that each of the selection switch 3302, the switch 3304, and the switch 3306 is controlled by a gate signal line 3333, a gate signal line 3334, and a gate signal line 3335. Reference numeral 3336 denotes a power supply line. Note that in FIG. 33, the transistor supplied with the signal current and the transistor supplying the current to the light-emitting element are the same, but may be different. Such a case is shown in FIG. A transistor 3401 to which a signal current is supplied is different from a transistor 3421 that supplies a current to the light-emitting element. In FIG. 34, 3411 is a source line, 3413 and 3414 are gate signal lines, 3402 is a selection switch, 3404 is a switch, 3405 is a capacitor element, and 3416 is a power supply line.

There are various pixel configurations for correcting variations by inputting current, and the present invention is not limited to the configurations of FIGS. As described above, when a pixel configuration in which variation is corrected by inputting a current, variation in current flowing in the light-emitting element can be reduced. In particular, the luminance can be made uniform in the analog mode. Therefore, it is more preferable.

Note that the pixel is not limited to a specific light-emitting element. As an example of a display element placed in a pixel, an EL element (Electro Luminescence: EL); an organic light emitting diode (OLED), an organic EL element, or the like, an inorganic EL element, or An EL element including an organic substance and an inorganic substance), an electron-emitting element, a liquid crystal element, electronic ink, or the like can be used as a display medium whose contrast is changed by an electromagnetic action. In addition, carbon nanotubes can be used for the electron-emitting device. Note that examples of a display device using an electron-emitting device include a field emission display (FED), and a SED (Surface-Conduction Electron-Emitter Display) which is a kind of FED. In addition, any display element used for a liquid crystal display (LCD), a plasma display (PDP), an electronic paper display, a digital micromirror device (DMD), a piezoelectric ceramic display, or the like may be used.

  Note that the storage capacitor 405 in FIG. 15 serves to hold the gate potential of the driving transistor 406. Therefore, although connected between the gate of the driving transistor 406 and the power supply line 403, the present invention is not limited to this. It is only necessary that the gate potential of the driving transistor 406 be held. In the case where the gate potential of the driving transistor 406 can be held using the gate capacitance of the driving transistor 406 or the like, the holding capacitor 405 may be omitted.

1 may be on the same substrate as the pixel array 101, may be on the same substrate as the source driver 102, or may be an FPC (flexible printed circuit). Or on a PCB (printed circuit board).

Further, the video signal generation circuit 106 for each display mode may be formed using the same transistors as the transistors constituting the pixel array 101. Alternatively, it may be formed of another transistor. For example, the pixel array 101 includes thin film transistors, and the video signal generation circuit 106 for each display mode may be a MOS transistor or a bipolar transistor formed on a bulk substrate or an SOI substrate.

  Next, FIG. 3 shows details of the video signal generation circuit 106 for each display mode. Based on the signal input from the controller 107, the display mode control circuit 301 performs control so that display according to the display mode can be performed. For example, in the digital mode, the switches 303 and 304 are turned on. Then, the input video signal is processed by the binarization circuit 302 and output to the source driver 102. In that case, the switch 305 is off. On the other hand, in the analog mode, the switch 305 is turned on, and the incoming video signal is output to the source driver 102 as it is. When the video signal input to the video signal generation circuit 106 for each display mode is an analog value, the video signal is output as it is, so that it is also output to the source driver 102 with an analog value.

  Note that although FIG. 3 illustrates the case where the display mode is the analog mode and the digital mode, the present invention is not limited to this. A display mode that is discrete but not binary will be referred to as a multi-value mode. An example of the relationship between the video signal and the luminance is shown in FIG.

FIG. 4A shows the case of the analog mode. The video signal changes in an analog manner, and the luminance changes in an analog manner accordingly.

FIG. 4B shows the case of the digital mode. The video signal is binary and emits light in one case and does not emit light in the other case.

FIG. 4C shows the case of the multi-value mode. The video signal takes discrete values but is not binary. The multi-value mode is displayed using a multi-value digital signal output from the video signal generation circuit 106 for each display mode.

Therefore, FIG. 5 shows details of the video signal generation circuit 106 for each display mode corresponding to the case of the multi-value mode. Based on the signal input from the controller 107, the display mode control circuit 501 controls the display according to the display mode. For example, in the digital mode, the switches 303 and 304 are turned on. Then, the input video signal is processed by the binarization circuit 302 and output to the source driver 102. In that case, the switches 313, 404, and 305 are off. On the other hand, in the analog mode, the switch 305 is turned on, and the incoming video signal is output to the source driver 102 as it is. When the video signal input to the video signal generation circuit 106 for each display mode is an analog value, the video signal is output as it is, so that it is also output to the source driver 102 with an analog value. In the multi-value mode, the switches 313 and 404 are turned on. Then, the input video signal is processed by the multi-value circuit 312 and output to the source driver 102. In that case, the switches 303, 304, and 305 are off.

Next, details of the binarization circuit 302 are shown in FIG. As shown in the circuit diagram of FIG. 6A, an operational amplifier 601 is used to form a comparator (comparison) circuit. Depending on whether the input voltage is larger or smaller than the reference potential Vref, either H or L signal is output and binarization is performed. In addition, although the comparator (comparison) circuit was comprised using the operational amplifier, it is not limited to this. A chopper inverter comparator circuit may be used, or a comparator (comparison) circuit may be configured using other circuits.

  FIG. 6B shows a circuit for generating the reference potential Vref. The magnitude of the reference potential Vref is a voltage between the voltages V1 and V2, and is a value divided by the resistors R1 and R2. Only when the binarization circuit is operated, the switches 602 and 603 may be turned on. As a result, since the period during which current flows through the resistors R1 and R2 can be shortened, power consumption can be reduced.

When the reference potential Vref is to be changed according to the situation, as shown in FIG. 7, it is only necessary to connect many resistors and switch from which contact the output is made.

Next, details of the multi-value quantization circuit 312 are shown in FIG. The input signal is input to the determination circuit 811. In addition, two voltages corresponding to the reference potential are input to the determination circuit 811. The determination circuit 811 outputs an H signal when the potential of the input signal is between two reference potentials. As a result, any one of the switches 821 to 824 is turned on and outputs a multi-valued voltage. Note that the switches 801 to 804 may be turned on only when the multi-value quantization circuit 312 is operated. As a result, since the period during which current flows between Va and Vb can be shortened, power consumption can be reduced.

  FIG. 9 shows details of the determination circuit 811. The operational amplifiers 901 and 902 constitute a comparator (comparison) circuit. The operational amplifiers 901 and 902 each output an H signal when the potential Vin of the input signal is not less than the reference potential Vx and not more than the reference potential Vy. Then, the signal is input to the AND circuit 903. When both input signals to the AND circuit 903 are H signals, the H signal is output.

Although FIG. 9 is configured using an AND circuit, the present invention is not limited to this. Even if an OR circuit, a NAND circuit, or a NOR circuit is used, the same function can be achieved.

As described above, when display is performed in the digital mode or the multi-value mode, threshold processing is performed, and sampling of image information is performed. As a result, even if there is noise in the image data, it can be displayed with the noise removed when it is actually displayed. Further, since the luminance change for one gradation is increased, the image can be clearly seen and the contrast is improved.

  2, 3, 5, etc., for example, the analog switch 201 or the like may be any electrical or mechanical switch. Anything that can control the current flow is acceptable. It may be a transistor, a diode, or a logic circuit combining them. Therefore, when a transistor is used as a switch, the transistor operates as a mere switch, and thus the polarity (conductivity type) of the transistor is not particularly limited. However, when it is desirable that the off-state current is small, it is desirable to use a transistor having a polarity with a small off-state current. As a transistor with low off-state current, there are a transistor provided with an LDD region, a transistor with a multi-gate structure, and the like. In addition, when the transistor operated as a switch operates at a source terminal potential close to a low potential power source (Vss, Vgnd, 0 V, etc.), the n-channel type is used. When operating in a state close to a side power supply (Vdd or the like), it is desirable to use a p-channel type. This is because the absolute value of the voltage between the gate and the source can be increased, so that it can easily operate as a switch. Note that a CMOS switch may be formed using both an n-channel type and a p-channel type.

An example of the switch is shown in FIG. FIG. 14A is a switch schematically described. FIG. 14B illustrates a switch using an AND circuit. A control line 1502 is used to control whether the signal of the input 1501 is transmitted to the output 1503. In the case of FIG. 14B, control such that the output 1503 is an L signal regardless of the input signal is possible. However, the output 1503 never enters a floating state. Therefore, when the output 1503 is connected to the input of a digital circuit, it is preferable to use the switch in FIG. In the case of a digital circuit, even if the input is in a floating state, the output is not in a floating state. If the input is in a floating state, the output becomes unstable, which is undesirable. Therefore, when connected to the input of the digital circuit, the switch in FIG. 14B is preferably used.

Note that although FIG. 14B is configured using an AND circuit, the present invention is not limited to this. Even if an OR circuit, a NAND circuit, or a NOR circuit is used, the same function can be achieved.

On the other hand, when the input is desired to be in a floating state, the switches in FIGS. 14C and 14D may be used. FIG. 14C illustrates a circuit called a transmission gate or an analog switch. In FIG. 14C, the potential of the input 1511 is transmitted to the output 1513 almost as it is. Therefore, it is suitable for transmitting analog signals. FIG. 14D illustrates a circuit called a clocked inverter or the like. In FIG. 14D, the signal of the input 1521 is inverted and transmitted to the output 1523. Therefore, it is suitable for transmission of digital signals. Note that control lines 1512 and 1522 control whether the signals of the inputs 1511 and 1521 are transmitted to the outputs 1513 and 1523, respectively.

From the above, it is preferable to use the switches in FIG. 14C for the analog switch 201, the switch 305, the switch 602, the switch 801, and the like. Since the switch 304 and the like need to have an output in a floating state, FIGS. 14C and 14D are preferable. However, since the input to the switch 304 is a digital signal, FIG. 14D is more preferable.

(Embodiment 2)
In Embodiment 1, the case where the video signal input to the video signal generation circuit 106 for each display mode is an analog value has been described. Next, a case where a digital value is input will be described.

FIG. 24 shows an overall configuration diagram. A video signal input to the source driver 102 is generated in accordance with each display mode in a video signal generation circuit 2306 for each display mode. The video signal generation circuit 2306 for each display mode is controlled using the controller 2307. An original digital video signal is input to the video signal generation circuit 2306 for each display mode. Then, in the video signal generation circuit 2306 for each display mode using the original video signal, a video signal corresponding to each display mode is generated and output to the source driver 102.

  The display modes are roughly classified into an analog mode and a digital mode. In the analog mode, the video signal input to the pixel has an analog value. On the other hand, in the digital mode, the video signal input to the pixel has a digital value.

  Next, FIG. 25 shows details of the video signal generation circuit 2306 for each display mode. Based on a signal input from the controller 2307, the display mode control circuit 2401 performs control so that display according to the display mode can be performed. For example, in the digital mode, the switches 2513 and 2514 are turned on, and only the most significant bit video signal is output to the source driver 102. However, the potential level may not match. In that case, it is necessary to convert the potential level to a required magnitude. Therefore, when such a necessity is required, a level conversion circuit 2504 is provided. On the other hand, in the analog mode, the signal enters the DA conversion circuit (digital analog conversion circuit) 2502 and outputs an appropriate analog value to the source driver 102 via the switch 2511.

  In FIG. 25, the case where the display mode is the analog mode and the digital mode has been described, but the display mode is not limited thereto.

Therefore, FIG. 26 shows details of the video signal generation circuit 2306 for each display mode corresponding to the multi-value mode. Based on a signal input from the controller 2307, the display mode control circuit 2501 performs control so that display according to the display mode can be performed. The analog mode and the digital mode are the same as those in FIG. In the multi-value mode, the switch 2512 is turned on and only the upper bit video signal is input to the DA conversion circuit 2503. The lower bit is not input. Therefore, it is not a smooth display but a sampled display.

In the multi-value mode, sampling is performed without using the lower bits, and therefore, the configuration is not limited to the configuration in FIG. For example, as shown in FIG. 27, the lower-order bit data removal circuit 2702 may be arranged at the input section of the DA conversion circuit 2502. As a result, the value of the lower bit is forcibly set to 0 (or L signal) according to the signal of the display mode control circuit. Therefore, it is not a smooth display but a sampled display.

An example of the lower bit data removal circuit 2702 is shown in FIG. By using an AND circuit, the data for the lower 3 bits can be forced to 0 (or L signal).

In FIG. 28, an AND circuit is used, but the present invention is not limited to this. Even if an OR circuit, a NAND circuit, or a NOR circuit is used, the same function can be achieved. In FIG. 28, a 6-bit video signal is input and the lower 3 bits of data can be forcibly set to 0 (or L signal). However, the present invention is not limited to this. You may change suitably.

Therefore, how many bits of data are forcibly set to 0 (or L signal) may be changed while actually operating. A circuit diagram 2902 in that case is shown in FIG. Since signals input to the AND circuit are separated, they can be individually controlled.

Next, FIG. 30 shows details of the DA converter circuit described in FIGS. The decoder circuit 3021 decodes how many digital signals are input, and according to this, any one of the switches 3011 to 3016 is turned on to output an analog voltage. The switches 3001 and 3002 need only be turned on only when the DA converter circuit is operated. As a result, since the period during which current flows through the resistor can be shortened, power consumption can be reduced.

As described above, when display is performed in the digital mode or the multi-value mode, threshold processing is performed, and sampling of image information is performed. As a result, even if there is noise in the image data, it can be displayed with the noise removed when it is actually displayed. Further, since the luminance change for one gradation is increased, the image can be clearly seen and the contrast is improved.

The contents described in this embodiment can be freely combined with the contents described in Embodiment 1.

(Embodiment 3)
In this embodiment, a case where display is performed using each display mode will be described.

First, the entire screen is displayed in the same display mode. That is, the whole screen is in the analog mode. In this case, normal display can be performed. Since smooth gradation can be displayed, it is suitable for displaying a photograph or the like.

Next, there is a case where the entire screen is in the digital mode. In this case, when characters are mainly displayed, for example, when reading an e-mail or reading an electronic book, the contrast is improved and the visibility becomes excellent.

Next, there is a case where the entire screen is in the multi-value mode. In this case, when it is desired to express gradation such as illustrations, animations, and manga, but it is not necessary to express as finely as a photograph, it is preferable because the contrast is improved and the visibility is improved.

Next, there is a case where the entire screen is divided into a plurality of areas and each area is displayed in a display mode corresponding to the area. As can be seen from FIG. 1, this is possible because the video signal generation circuit 106 for each display mode can generate a video signal suitable for the display mode for each pixel.

For example, as shown in FIG. 10, the screen is divided into three areas. Then, the upper region 1001 is displayed in a digital mode, and for example, time, battery information, radio wave information, and the like are displayed to improve visibility. The middle area 1002 is displayed normally in the analog mode. Images such as photographs can be displayed neatly with smooth gradation. The lower area 1003 is displayed in the multi-value mode and displays simple animation and the like.

In FIG. 11, the upper area 1101 is displayed in the multi-value mode, and a simple animation or the like is displayed. The middle area 1102 is displayed in a digital mode so that it is suitable for e-mails and electronic books. The lower region 1103 is also displayed in the multi-value mode, and a simple animation or the like is displayed. By doing this, the main screen is not a crusty screen as in the case of digital mode, but the main is displayed in digital mode, making it suitable for e-mails and e-books, etc. Since it can be displayed at the same time, it is possible to display a cute and nice-looking image.

In FIG. 12, in the center area 1201, the image is displayed in the analog mode, and an image such as a photograph can be clearly displayed with smooth gradation. The peripheral area 1202 is displayed in a digital mode, and time, battery information, radio wave information, and the like can be displayed as icons.

In FIG. 13, the peripheral area 1302 is displayed in an analog mode, and an image such as a photograph can be clearly displayed with smooth gradation. In the center region 1301, the display is performed in the multi-value mode. In the portion displayed in the multi-value mode, the smooth gradation is converted into a stepped gradation. Therefore, for example, when displaying in the multi-value mode of the human face portion, the portion is displayed as a portrait or manga. By using this function, a display like a simple photo sticker can be performed.

Note that the number, location, and shape of dividing the screen are not limited to this. In addition, the display mode in which area is displayed is not limited to this.

In addition, this Embodiment described in detail about Embodiment 1,2. Therefore, the contents described in this embodiment can be freely combined with the contents described in Embodiments 1 and 2.

(Embodiment 4)
In this embodiment, a method for driving a pixel in an analog mode is described.

FIG. 16 shows a relationship between voltage and current applied to the driving transistor and the light emitting element. FIG. 16A shows a circuit of the driving transistor 631 and the light-emitting element 632. A driving transistor 631 and a light-emitting element 632 are connected in series between the wiring 633 and the wiring 634. Since the potential of the wiring 633 is higher than that of the wiring 634, a current flows from the driving transistor 631 to the light emitting element 632.

The driver transistor 406 in FIG. 15 corresponds to the driver transistor 631 in FIG. 16A, and the light-emitting element 407 in FIG. 15 corresponds to the light-emitting element 632 in FIG.

FIG. 16B shows the relationship between the gate-source voltage (the absolute value thereof) of the driving transistor 631 and the current flowing through the driving transistor 631 and the light-emitting element 632. As the gate-source voltage (absolute value) increases, the current value also increases accordingly. This is because the drive transistor 631 operates in the saturation region. In the saturation region, the current value increases in proportion to the square of the gate-source voltage of the transistor. As the gate-source voltage (absolute value) is further increased, the voltage applied to the light-emitting element 632 increases, so that the drain-source voltage decreases and the drive transistor 631 operates in the linear region. Then, as the drain-source voltage decreases, the rate of increase in current value also decreases. And current exceeding a certain current value stops flowing.

In the analog mode, gradation is expressed using an analog gradation method. Therefore, by changing the gate-source voltage (absolute value) of the driving transistor 631 in an analog manner, the current flowing through the driving transistor 631 and the light emitting element 632 can be operated in an analog manner. desirable. Therefore, the gate-source voltage (absolute value) of the driving transistor 631 may be changed from the threshold voltage to the gate-source voltage at which the driving transistor 631 operates as a saturation region. The upper limit to be changed may be changed not only in the saturation region but also in the linear region. In other words, the gate-source voltage (absolute value) of the drive transistor 631 may be in a region where the current value I _EL changes with respect to the gate-source voltage (absolute value). Further, the lower limit value to be changed may be a gate-source voltage (an absolute value thereof) at which the driving transistor 631 is turned off.

For example, the gate-source voltage (absolute value) of the drive transistor 631 may be controlled in a state where the current hardly flows as in the voltage range 620 and operates in the saturation region. . The state where almost no current flows corresponds to the case where the gate-source voltage of the drive transistor 631 is substantially equal to the threshold voltage of the drive transistor 631.

Alternatively, the gate-source voltage (absolute value) is increased from a state in which the gate-source voltage of the drive transistor 631 is surely lower than the threshold voltage of the drive transistor 631 as in the voltage range 621. Thus, the gate-source voltage (absolute value) of the driving transistor 631 may be controlled in such a state that it operates in the saturation region. As described above, when the voltage between the gate and the source of the driving transistor 631 is certainly lower than the threshold voltage of the driving transistor 631 in the black state, the black state can be surely obtained. For example, when the current characteristics of the drive transistor 631 vary, the threshold voltage also varies. Therefore, even if a certain pixel is in a black state, another pixel may emit light slightly. As a result, the contrast is lowered. Therefore, in order to prevent this, it is preferable to operate in a voltage range such as 621.

Note that although the voltage range 620 and the voltage range 621 operate in the saturation region even when the gate-source voltage (the absolute value thereof) of the driving transistor 631 is increased, the invention is not limited to this. As in the voltage range 622 and the voltage range 623, the operation may be performed using not only the saturation region but also the linear region. As long as the current flowing through the drive transistor 631 and the light emitting element 632 is changed in an analog manner by changing the gate-source voltage (the absolute value thereof) of the drive transistor 631 in an analog manner, even in a linear region. It may be operated.

  Note that in the case where the driving transistor 631 is operated in the saturation region, a constant amount of current can be supplied to the light-emitting element even if the light-emitting element 632 is deteriorated. In the case of a linear region, the transistor can be driven without being affected by variations in transistor characteristics.

Next, a case where optimization is performed according to the color of light from the light emitting element 632 will be described. The light emitting element 632 has a different luminance or a required current value depending on the color. Therefore, it is necessary to adjust the color balance. For this purpose, it is desirable that the gate-source voltage (absolute value) of the driving transistor 631 be different for each color. Alternatively, it is desirable that the current supply capability of the driving transistor 631 (for example, the channel width of the transistor) be different for each color. Alternatively, the light emitting area of the light emitting element 632 is desirably different for each color. Alternatively, it is desirable to combine some of these. Thereby, the color balance can be adjusted.

Note that the potential of the wiring 633 can be changed for each color. However, there is a drawback that the voltage when the drive transistor 631 is turned off also changes for each color. Therefore, the potential of the wiring 633 may be the same for all colors.

Note that although the drive transistor 631 is a P-channel type, it is not limited to this. A person skilled in the art can easily realize the N-channel type and reverse the direction of current flow. Further, in the case of the P-channel type and the N-channel type, it is possible for those skilled in the art to easily reverse the direction in which the current flows in each case. In that case, the magnitude of the gate-source voltage is affected by the voltage-current characteristics of the light-emitting element 632.

In the present embodiment, the case of the analog mode has been described, but the same applies to the case of the multi-value mode.

Note that this embodiment mode describes the pixel of Embodiment Mode 1 in detail. Therefore, the contents described in this embodiment can be freely combined with the contents described in Embodiments 1 to 3.
(Embodiment 5)
In this embodiment, a method for driving a pixel in a digital mode is described.

Reference is made to the relationship between the gate-source voltage (the absolute value thereof) of the driving transistor 631 and the current flowing through the driving transistor 631 and the light-emitting element 632 in FIG. In the digital mode, binary control is performed such as on and off and H and L. That is, it is controlled whether or not a current flows through the light emitting element 632. First, consider the case where no current flows. In that case, the gate-source voltage (the absolute value thereof) of the drive transistor 631 is 0 V or more and no current flows, as shown by the voltage 624, the voltage 625, and the voltage 626, that is, the drive transistor 631. Or less than the threshold voltage.

Next, consider the case where current flows. In that case, the gate-source voltage (the absolute value thereof) of the driving transistor 631 is within the saturation region, the linear region, or the voltage is increased as shown in the voltage 627, the voltage 628, and the voltage 629. The operation may be performed in an area where the value does not increase. In the figure, the voltage 627 is located at the boundary between the linear region and the saturation region, but may be within the saturation region as described above. As described above, there is no particular limitation as long as the voltage can supply current from the driving transistor 631 to the light emitting element 632.

For example, when operating in the saturation region, there is an advantage that even if the voltage-current characteristics of the light emitting element 632 deteriorate, the value of the current flowing therethrough does not change. Therefore, it is not easily affected by image sticking. However, if the current characteristic of the drive transistor 631 varies, the current flowing therethrough also varies. Therefore, display unevenness may occur.

On the other hand, when operating in the linear region, even if the current characteristics of the drive transistor 631 vary, the value of the current flowing therethrough is hardly affected. For this reason, display unevenness is unlikely to occur. In addition, since the gate-source voltage (absolute value) of the driving transistor 631 does not increase excessively and it is not necessary to increase the voltage between the wiring 633 and the wiring 634, power consumption can be reduced.

Further, when the gate-source voltage (absolute value) of the drive transistor 631 is increased, even if the current characteristics of the drive transistor 631 vary, the value of the current flowing therethrough is hardly affected. However, when the voltage-current characteristics of the light-emitting element 632 deteriorate, the value of current flowing therethrough may change. Therefore, it becomes easy to be affected by image sticking.

As described above, when the driving transistor 631 is operated in the saturation region, the current value does not change even if the characteristics of the light emitting element 632 change. Therefore, in that case, the driving transistor 631 can be regarded as operating as a current source. Therefore, such driving is called constant current driving.

Further, when the driving transistor 631 is operated in a linear region, the current value does not change even if the current characteristics of the driving transistor 631 vary. Therefore, in that case, the driving transistor 631 can be regarded as operating as a switch. Therefore, it can be considered that the voltage of the wiring 633 is applied to the light emitting element 632 as it is. Therefore, such driving is called constant voltage driving.

  In the digital mode, constant voltage driving or constant current driving may be used. However, it is preferable to use constant voltage driving because it is not affected by transistor variation and power consumption is reduced.

Next, a case where the light emitting element 632 is optimized according to the light emission color will be described. In the case of constant current driving, it is the same as in the analog mode.

In the case of constant voltage driving, even if the gate-source voltage (the absolute value thereof) of the driving transistor 631 and the current supply capability (for example, transistor width) of the driving transistor 631 are different for each color, the current flows therethrough. The current value does not change much. This is because it operates as a switch.

Therefore, it is preferable that the light emitting area of the light emitting element 632 be different for each color. Alternatively, the potential of the wiring 633 can be changed for each color. Or it is desirable to combine these. Thereby, the color balance can be adjusted.

  In addition, when performing color display in the digital mode, since it is displayed in binary for each RGB, a total of 8 colors can be displayed.

Note that the present embodiment describes the pixel and the like of Embodiment 1 in detail. Therefore, the contents described in this embodiment can be freely combined with the contents described in Embodiments 1 to 4.
(Embodiment 6)
Next, a pixel layout in the display device of the present invention will be described. As an example, FIG. 17 shows a layout diagram of the circuit diagram shown in FIG. Note that the circuit diagrams and layout diagrams are not limited to FIGS. 15 and 17.

  The electrodes of the selection transistor 404, the drive transistor 406, and the light emitting element 407 are arranged. The source and drain of the selection transistor 404 are connected to the source signal line 402 and the gate of the driving transistor 406, respectively. The gate of the selection transistor 404 is connected to the gate signal line 401. The source and drain of the driving transistor 406 are connected to the power supply line 403 and the electrode of the light emitting element 407, respectively. The storage capacitor 405 is connected between the gate of the driving transistor 406 and the power supply line 403.

  The source signal line 402 and the power supply line 403 are formed by the second wiring, and the gate signal line 401 is formed by the first wiring.

  In the case of the top gate structure, the film is formed in the order of the substrate, the semiconductor layer, the gate insulating film, the first wiring, the interlayer insulating film, and the second wiring. In the case of the bottom gate structure, the film is formed in the order of the substrate, the first wiring, the gate insulating film, the semiconductor layer, the interlayer insulating film, and the second wiring.

Note that the contents described in this embodiment mode can be implemented by being freely combined with the contents described in Embodiment Modes 1 to 5.

(Embodiment 7)
In this embodiment, hardware for controlling the display device described in Embodiments 1 to 6 will be described.

  A rough block diagram is shown in FIG. A pixel array 2704 is arranged on the substrate 2701. In many cases, a source driver 2706 and a gate driver 2705 are arranged. In addition, a power supply circuit, a precharge circuit, a timing generation circuit, and the like may be arranged. In some cases, the source driver 2706 and the gate driver 2705 are not arranged. In that case, what is not arranged on the substrate 2701 is often formed in an IC. In many cases, the IC is disposed on the substrate 2701 by COG (Chip On Glass). Alternatively, an IC may be arranged on a connection board 2707 that connects the peripheral circuit board 2712 and the board 2701.

  A signal 2703 is input to the peripheral circuit board 2712. Then, the controller 2708 controls and the signal is stored in the memory 2709, the memory 2710, or the like. In the case where the signal 2703 is an analog signal, it is often stored in the memory 2709 or the memory 2710 after analog-digital conversion. Then, the controller 2708 outputs a signal to the substrate 2701 using a signal stored in the memory 2709, the memory 2710, or the like.

In order to realize the driving method described in Embodiment Modes 1 to 5, the controller 2708 controls various pulse signals and outputs signals to the substrate 2701.

Note that the contents described in this embodiment can be implemented by being freely combined with the contents described in Embodiments 1 to 6.

(Embodiment 8)
An example of a structure of a mobile phone having a display portion using the display device of the present invention and a display device using the driving method thereof will be described with reference to FIG.

  The display panel 5410 is incorporated in a housing 5400 so as to be detachable. The shape and dimensions of the housing 5400 can be changed as appropriate in accordance with the size of the display panel 5410. A housing 5400 to which the display panel 5410 is fixed is fitted into a printed board 5401 and assembled as a module.

  The display panel 5410 is connected to the printed board 5401 through the FPC 5411. A signal processing circuit 5405 including a speaker 5402, a microphone 5403, a transmission / reception circuit 5404, a CPU, a controller, and the like is formed over the printed board 5401. Such a module is combined with the input means 5406 and the battery 5407 and stored using the housing 5409 and the housing 5412. Note that the pixel portion of the display panel 5410 is arranged so as to be visible from an opening window formed in the housing 5412.

  In the display panel 5410, a pixel portion and some peripheral driver circuits (a driver circuit having a low operating frequency among a plurality of driver circuits) are formed over a substrate using TFTs, and some peripheral driver circuits (a plurality of driver circuits) are formed. A driving circuit having a high operating frequency among the circuits) may be formed over the IC chip, and the IC chip may be mounted on the display panel 5410 by COG (Chip On Glass). Alternatively, the IC chip may be connected to the glass substrate using TAB (Tape Auto Bonding) or a printed board. 20A and 20B show a structure of a display panel in which some peripheral drive circuits are formed integrally with a pixel portion on a substrate and an IC chip on which other peripheral drive circuits are formed is mounted by COG or the like. An example is shown.

  In FIG. 20A, a pixel portion 5302 and its peripheral driver circuits (a first scan line driver circuit 5303 and a second scan line driver circuit 5304) are integrally formed on a substrate 5300 of a display panel, and a signal line driver circuit 5301 is formed. May be formed on an IC chip and mounted on a display panel by COG or the like. Note that the pixel portion 5302 and its peripheral driver circuit which are integrally formed over the substrate are sealed by bonding the sealing substrate 5308 and the substrate 5300 with a sealant 5309. In addition, IC chips (semiconductor chips on which a memory circuit, a buffer circuit, and the like are formed) 5306 and 5307 may be mounted on a connection portion between the FPC 5305 and the display panel using COG (Chip On Glass) or the like. Although only the FPC is shown here, a printed wiring board (PWB) may be attached to the FPC.

  In this way, only the signal line driver circuit that requires high-speed operation of the driver circuit is formed on the IC chip using a CMOS or the like to reduce power consumption. Further, by using a semiconductor chip such as a silicon wafer as the IC chip, it is possible to achieve higher speed operation and lower power consumption. Further, by forming the first scan line driver circuit 5303 and the second scan line driver circuit 5304 integrally with the pixel portion 5302, cost can be reduced. Further, by mounting an IC chip on which a functional circuit (memory or buffer) is formed at a connection portion between the FPC 5305 and the substrate 5300, the substrate area can be effectively used.

Further, in order to reduce power consumption, all peripheral drive circuits may be formed on an IC chip, and the IC chip may be mounted on the display panel by COG or the like. For example, as shown in FIG. 20B, a pixel portion 5312 is formed on a substrate 5310, and the signal line driver circuit 5311, the first scan line driver circuit 5313, and the second scan line driver circuit 5314 are arranged on an IC chip. And may be mounted on the display panel by COG or the like. Note that the FPC 5315, IC chip 5316, IC chip 5317, sealing substrate 5318, and sealing material 5319 in FIG. 20B are the FPC 5305, IC chip 5306, IC chip 5307, sealing substrate 5308, and seal in FIG. It corresponds to the material 5309.

  With such a structure, low power consumption of the display device can be achieved, and the use time by one charge of the mobile phone can be extended. In addition, the cost of the mobile phone can be reduced.

In addition, by performing impedance conversion of a signal set to the scanning line or the signal line using a buffer, the pixel writing time for each row can be shortened. Therefore, a high-definition display device can be provided.

By using the display device of the present invention, a clear image with high contrast can be seen.

Further, the configuration shown in this embodiment is an example of a mobile phone, and the display device of the present invention can be applied to mobile phones having various configurations limited to the mobile phone having such a configuration.

(Embodiment 9)
FIG. 21 shows an EL module in which a display panel 5701 and a circuit board 5702 are combined. A display panel 5701 includes a pixel portion 5703, a scan line driver circuit 5704, and a signal line driver circuit 5705. On the circuit board 5702, for example, a control circuit 5706, a signal dividing circuit 5707, and the like are formed. The display panel 5701 and the circuit board 5702 are connected to each other through a connection wiring 5708. An FPC or the like can be used for the connection wiring.

  The control circuit 5706 corresponds to the controller 2708, the memory 2709, the memory 2710, and the like in the seventh embodiment. The control circuit 5706 mainly controls the appearance order of subframes.

In the display panel 5701, a pixel portion and some peripheral driver circuits (a driver circuit having a low operating frequency among the plurality of driver circuits) are formed over the substrate using TFTs, and some peripheral driver circuits (a plurality of driver circuits) are formed. A driver circuit having a high operating frequency among the circuits) is formed over the IC chip, and the IC chip is preferably mounted on the display panel 5701 by COG (Chip On Glass) or the like. Alternatively, the IC chip may be mounted on the display panel 5701 using TAB (Tape Auto Bonding) or a printed board. Note that FIG. 20A shows an example of a configuration in which some peripheral drive circuits are formed integrally with a pixel portion on a substrate and an IC chip on which other peripheral drive circuits are formed is mounted by COG or the like. With such a configuration, low power consumption of the display device can be achieved, and for example, in a mobile phone, the use time by one charge can be extended. In addition, the cost of the mobile phone can be reduced.

In addition, by performing impedance conversion of a signal set to the scanning line or the signal line using a buffer, the pixel writing time for each row can be shortened. Therefore, a high-definition display device can be provided.

In order to further reduce power consumption, a pixel portion is formed using a TFT on a glass substrate, all signal line driver circuits are formed on an IC chip, and the IC chip is displayed on a COG (Chip On Glass) display. It may be mounted on a panel.

Note that a pixel portion is formed using a TFT over a substrate, all peripheral driver circuits are formed over an IC chip, and the IC chip is mounted on a display panel by COG (Chip On Glass). Note that FIG. 20B shows an example of a configuration in which an IC chip in which a pixel portion is formed over a substrate and a signal line driver circuit is formed over the substrate is mounted by COG or the like.

  With this EL module, an EL television receiver can be completed. FIG. 22 is a block diagram illustrating a main configuration of an EL television receiver. A tuner 5801 receives video signals and audio signals. The video signal includes a video signal amplifying circuit 5802, a video signal processing circuit 5803 that converts a signal output from the video signal into a color signal corresponding to each color of red, green, and blue, and uses the video signal as input specifications of the drive circuit. Processing is performed by a control circuit 5706 for conversion. The control circuit 5706 outputs a signal to each of the scan line side and the signal line side. In the case of digital driving, a signal dividing circuit 5707 may be provided on the signal line side, and an input digital signal may be divided into m pieces and supplied.

  Of the signals received by the tuner 5801, the audio signal is sent to the audio signal amplifier circuit 5804, and the output is supplied to the speaker 5806 via the audio signal processing circuit 5805. The control circuit 5807 receives control information on the receiving station (reception frequency) and volume from the input unit 5808 and sends a signal to the tuner 5801 and the audio signal processing circuit 5805.

  A television receiver can be completed by incorporating an EL module into a housing. A display portion is formed by the EL module. In addition, speakers, video input terminals, and the like are provided as appropriate.

  Of course, the present invention is not limited to a television receiver, and is applied to various uses as a display medium of a particularly large area such as a monitor of a personal computer, an information display board in a railway station or airport, an advertisement display board in a street, etc. can do.

  Thus, by using the display device of the present invention, a clear image with high contrast can be seen.

(Embodiment 10)
The present invention can be applied to various electronic devices. Specifically, it can be applied to a display portion of an electronic device. Such electronic devices include video cameras, digital cameras, goggles-type displays, navigation systems, sound playback devices (car audio, audio components, etc.), computers, game devices, portable information terminals (mobile computers, mobile phones, portable games) And an image reproducing device (specifically, a device having a light emitting device capable of reproducing a recording medium such as a digital versatile disc (DVD) and displaying the image). It is done.

FIG. 23A illustrates a light-emitting device, which includes a housing 35001, a support base 35002, a display portion 35003, a speaker portion 35004, a video input terminal 35005, and the like. The display device of the present invention can be used for the display portion 35003. The light emitting devices include all information display light emitting devices such as for personal computers, for receiving television broadcasts, and for displaying advertisements. A light-emitting device using the present invention for the display portion 35003 can be viewed as a clear image with high contrast.

FIG. 23B illustrates a camera, which includes a main body 35101, a display portion 35102, an image receiving portion 35103, operation keys 35104, an external connection port 35105, a shutter 35106, and the like.

A camera using the present invention for the display portion 35102 can display a clear image with high contrast.

  FIG. 23C illustrates a computer, which includes a main body 35201, a housing 35202, a display portion 35203, a keyboard 35204, an external connection port 35205, a pointing mouse 35206, and the like. A computer using the present invention for the display portion 35203 can display a clear image with high contrast.

  FIG. 23D illustrates a mobile computer, which includes a main body 35301, a display portion 35302, a switch 35303, operation keys 35304, an infrared port 35305, and the like. A mobile computer using the present invention for the display portion 35302 can display clear images with high contrast.

FIG. 23E illustrates a portable image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 35401, a housing 35402, a display portion A35403, a display portion B35404, and a recording medium (such as a DVD). A reading unit 35405, an operation key 35406, a speaker unit 35407, and the like are included. The display portion A 35403 can mainly display image information, and the display portion B 35404 can mainly display character information. An image reproducing device using the present invention for the display portion A 35403 and the display portion B 35404 can display a clear image with high contrast.

  FIG. 23F illustrates a goggle type display which includes a main body 35501, a display portion 35502, and an arm portion 35503. A goggle type display using the present invention for the display portion 35502 can be seen as a beautiful image with high contrast.

  FIG. 23G illustrates a video camera, which includes a main body 35601, a display portion 35602, a housing 35603, an external connection port 35604, a remote control receiving portion 35605, an image receiving portion 35606, a battery 35607, an audio input portion 35608, operation keys 35609, an eyepiece, and the like. Part 35610 and the like. A video camera using the present invention for the display portion 35602 can display a clear image with high contrast.

  FIG. 23H illustrates a cellular phone, which includes a main body 35701, a housing 35702, a display portion 35703, an audio input portion 35704, an audio output portion 35705, operation keys 35706, an external connection port 35707, an antenna 35708, and the like. A mobile phone using the present invention for the display portion 35703 can display a clear image with high contrast.

  As described above, the applicable range of the present invention is so wide that it can be used for electronic devices in various fields. In addition, the electronic device of this embodiment may use the display device having any structure described in Embodiments 1 to 9.

FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. 8A and 8B illustrate a driving method of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 14 illustrates a display state of a display device of the present invention. FIG. 14 illustrates a display state of a display device of the present invention. FIG. 14 illustrates a display state of a display device of the present invention. FIG. 14 illustrates a display state of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 14 illustrates an electronic device to which the present invention is applied. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 14 illustrates an electronic device to which the present invention is applied. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention. FIG. 6 illustrates a structure of a display device of the present invention.

Explanation of symbols

101 pixel array 102 source driver 103 gate driver 106 video signal generation circuit 107 for each display mode 107 controller 201 analog switch 211 pixel 220 pixel 221 video signal line 231 shift register 301 display mode control circuit 302 binarization circuit 303 switch 304 switch 305 Switch 312 Multi-value circuit 313 Switch 401 Gate signal line 402 Source signal line 403 Power supply line 404 Selection transistor 405 Holding capacitor 406 Drive transistor 407 Light emitting element 408 Counter electrode 417 Electrode 501 Display mode control circuit 601 Operational amplifier 602 Switches 620 to 623 Voltage range 624 to 629 Voltage 631 Driving transistor 632 Light emitting element 633 Wiring 634 Wiring 801 Switch 811 Judgment circuit 821 Switch H 901 Operational amplifier 903 AND circuit 2306 Video signal generation circuit 2307 for each display mode Controller 2401 Display mode control circuit 2501 Display mode control circuit 2502 DA conversion circuit 2503 DA conversion circuit 2504 Level conversion circuit 2511 Switch 2513 Switch 2701 Substrate 2702 Lower bit data removal Circuit 2703 Signal 2704 Pixel array 2705 Gate driver 2706 Source driver 2707 Connection board 2708 Controller 2709 Memory 2710 Memory 2712 Peripheral circuit board 2902 Circuit diagram 3001 Switch 3011-3016 Switch 3021 Decoder circuit 3101 Drive transistor 3102 Switch 3103 Switch 3104 Capacitance element 3105 Capacitance element 3107 Switch 3111 Source signal line 31 12 wiring 3113 gate signal line 3114 gate signal line 3115 gate signal line 3116 power supply line 3203 switch 3301 driving transistor 3302 selection switch 3304 switch 3305 capacitive element 3306 switch 3330 source signal line 3333 gate signal line 3334 gate signal line 3335 gate signal line 3401 Transistor 3421 transistor

Claims (6)

A display device comprising a glass substrate, a display region, a gate driver, a source driver, and a first circuit ,
The display area, the gate driver, and the source driver are provided on the glass substrate,
The display area has a first area and a second area,
A gate driver electrically connected to the first region;
The gate driver is electrically connected to the second region;
A source driver is electrically connected to the first region;
The source driver is electrically connected to the second region;
The gradation method of the first region is only a digital gradation method,
The gradation method of the second region is only an analog gradation method,
The first region and the second region are simultaneously displayed,
The first region has a first pixel;
The second region includes a second pixel;
The first pixel includes a first TFT and a first display element,
The second pixel includes a second TFT and a second display element,
The first circuit has a function of supplying an analog video signal and a digital video signal to the source driver;
The first circuit has a second circuit;
The display device, wherein the second circuit has a function of converting the analog video signal into the digital video signal . In claim 1,
The display device, wherein the second pixel includes a capacitor. In claim 2,
The display device, wherein the capacitor element includes a semiconductor layer, an insulating layer, and a conductive layer. In any one of Claims 1 thru | or 3 ,
The first display element includes a first light emitting element;
The display device, wherein the second display element includes a second light emitting element. A display module comprising the display device according to any one of claims 1 to 4 , and a housing or an FPC. An electronic device comprising the display module according to claim 5 and a housing, a battery, or a speaker.

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