JP5285204B2 - Semiconductor device and substrate for manufacturing semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device and a substrate for manufacturing a semiconductor device.

In recent years, as a technology for mounting a semiconductor device on a printed wiring board or the like, surface mounting technology for directly soldering the semiconductor device to the printed wiring board or the like has been widely used. The improvement etc. are aimed at.

As semiconductor devices used for surface mounting technology, semiconductor devices such as QFP (Quad Flat Package), BGA (Ball Grid Array), and LGA (Land Grid Array) are adopted. Among them, BGA type semiconductor devices and According to the LGA type semiconductor device, since a large number of external terminals (solder bumps, etc.) can be arranged on the surface of the semiconductor device, it is possible to further reduce the size of the semiconductor device, the printed wiring board, etc., and improve the mounting density. Become.

However, BGA type semiconductor devices, LGA type semiconductor devices, etc. have excellent thermal conductivity because the semiconductor chip is bonded to an insulating substrate made of resin, ceramic or the like having low thermal conductivity and sealed with resin. Compared to a QFP type semiconductor device or the like in which a lead frame is used, there is a problem that the semiconductor chip cannot sufficiently dissipate heat and it is difficult to keep the temperature of the semiconductor chip below an allowable temperature. In particular, in recent years, the amount of heat generated by a semiconductor chip has increased along with the increase in functionality of the semiconductor chip, so that a semiconductor device having an excellent heat dissipation function has been required.

As a conventional semiconductor device, for example, a pad connected to an electrode on the upper surface of a semiconductor chip by a wire and a heat radiation electrode (metal plate or the like) to which the semiconductor chip is bonded via an adhesive material are provided. There is a semiconductor device that is entirely sealed with a resin except for a part of electrodes (see, for example, Patent Document 1). The semiconductor device described in Patent Document 1 radiates heat from a semiconductor chip via a heat radiation electrode.

As the conventional semiconductor device, e.g., a lower surface and a plurality of connecting electrodes (mounting surface) is formed and Moni, peripheral reinforcing dummy electrode in a peripheral portion of the lower surface, dummy central reinforcement in the central portion of the lower surface A bottom electrode (face-down) type semiconductor chip with electrodes formed thereon, a connection land connected to the connection electrode, a peripheral reinforcing land connected to each reinforcing dummy electrode, and a central reinforcing land were formed on the surface. A semiconductor substrate having a via hole corresponding to the central reinforcing land, and a heat-dissipating conductor layer connected to the via hole formed on the back surface of the insulating substrate. There exists a device (see, for example, Patent Document 2). The semiconductor device described in Patent Document 2 radiates heat from a semiconductor chip through a heat conduction path including a central reinforcing dummy electrode, a central reinforcing land, a via hole, and a heat radiating conductor layer having high thermal conductivity. .

JP 2002-158315 A JP 2003-8186 A

However, the semiconductor device described in Patent Document 1 has a configuration in which the heat radiation electrode and the pad must be electrically insulated, and as an adhesive, an insulating adhesive or insulating sheet with low thermal conductivity is used. Therefore, there is a problem that heat is not easily transmitted from the semiconductor chip to the heat radiation electrode, and the semiconductor chip cannot be sufficiently radiated.

In the semiconductor device described in Patent Document 2, the electrode connected to the heat dissipation conductor layer among the electrodes provided on the semiconductor chip is only the central reinforcing dummy electrode and has few heat conduction paths. There was a problem that heat could not be sufficiently dissipated. In addition, since the central reinforcing dummy electrode is located at the center of the lower surface of the semiconductor chip, there is a problem that heat radiation from the entire semiconductor chip is difficult. In addition, since the semiconductor chip is a bottom electrode (face-down) type semiconductor chip, there is a problem that it is difficult to provide a sufficient number of central reinforcing dummy electrodes for heat dissipation on the bottom surface of the semiconductor chip.

The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a semiconductor device having an excellent heat dissipation function and a semiconductor device manufacturing substrate used for manufacturing the semiconductor device. .

In order to solve the above-described problems, the present invention provides the following.
(1) an insulating substrate having main via holes arranged in a matrix and having conductive islands on the surface;
And a semiconductor chip is die-bonded via a conductive layer before Symbol island,
The said insulating substrate in a region where the front Symbol island is provided, in addition to the main via holes are arranged in the matrix form, a plurality of heat radiating holes are provided, the plurality of heat radiating via hole, said matrix are respectively adjacent to open the four or we equidistantly placing of the main hole arranged see contains a plurality of first heat radiating holes provided in a matrix,
A metal terminal electrically connected to the main via hole is formed on the back surface of the insulating substrate in the region where the island is provided, and the metal terminal is formed at a position corresponding to the main via hole. However, it is not formed at a position corresponding to the heat radiating via hole .

According to the invention of (1), the conductive island to which the semiconductor chip is die-bonded is in contact with the substantially whole area of the lower surface of the semiconductor chip through the conductive layer, and the matrix is formed below the island. Heat dissipating via holes arranged in a matrix similar to the arranged main via holes are provided. Therefore, a wide heat conduction path for radiating heat from the semiconductor chip is ensured by the conductive layer having high heat conductivity, the island, the main via hole, and the heat radiating via hole, and has an excellent heat radiating function.
In addition, since a metal terminal (solder bump, etc.) with high thermal conductivity is electrically connected to the main via hole, the heat transferred from the semiconductor chip to the main via hole via the heat conduction path is further passed through the metal terminal. It can escape to the outside (printed wiring board etc.), and the heat dissipation function can be further enhanced. Further, by providing a ground electrode on the lower surface (mounting surface) of the semiconductor chip and connecting the metal terminal to an electrode such as a printed wiring board, the metal terminal can function as a ground electrode of the semiconductor device. .

In the present invention, “matrix shape” means a state in which main via holes form rows and columns by arranging main via holes on planar lattice points. However, the rows and the columns do not necessarily have to be orthogonal, and may form a predetermined angle (for example, 60 °).

Furthermore, the present invention provides the following.
(2) The semiconductor device according to (1), wherein a diameter of the first heat radiating via hole is the same as a diameter of the main via hole.
(3) the diameter of the first release heat via hole is larger than the diameter of the main hole, the semiconductor device of the above (1).
(4) the plurality of heat dissipating via hole further comprises a plurality of second heat radiating holes which two adjacent intermediate respectively disposed within the main hole arranged in the matrix shape, the semiconductor of (1) apparatus.
(5) The semiconductor device according to (4), wherein a diameter of the first heat radiating via hole is larger than a diameter of the main via hole, and a diameter of the second heat radiating via hole is smaller than a diameter of the main via hole.
(6) The semiconductor device according to (1) or (2), wherein the plurality of heat dissipation via holes include heat dissipation via holes having different diameters.
(7) The semiconductor according to any one of (1) to (6), wherein in the region where the island is provided, the heat radiating via hole is arranged between all the main via holes arranged in a matrix. apparatus.
(8) The semiconductor device according to any one of (1) to (7), wherein a conductor layer having substantially the same area as the island is formed on the back surface of the insulating substrate.
(9) The semiconductor device according to (8), wherein the main via hole and the heat radiating via hole are electrically connected to the conductor layer.

Furthermore, the present invention provides the following.
(10) The semiconductor device according to any one of (1) to (9) , wherein a solder resist layer is formed on the back surface of the insulating substrate to cover the entire region other than the metal terminal portion.
(11) The semiconductor device according to any one of (1) to (10) , wherein the main via hole and / or the heat radiating via hole is filled with a metal filler.

According to the invention of (11) , since the main via hole and / or the heat radiating via hole are filled with the metal filler having high thermal conductivity, a wider heat conduction path can be secured, and the heat radiating function is further improved. Can be increased.
(12) A bonding pad is formed on the surface of the insulating substrate, and a solder resist layer is formed on the surface of the insulating substrate to cover the entire area excluding the conductive layer and the bonding pad. The semiconductor device according to any one of (11 ) to (11) .

Furthermore, the present invention provides the following.
(13) An insulating substrate having main via holes arranged in a matrix and having a conductive island on the surface on which a semiconductor chip is die-bonded ,
The front Symbol insulating substrate in a region where the front Symbol island is provided, in addition to the main via holes are arranged in the matrix form, a plurality of heat radiating holes are provided, the plurality of heat radiating via hole, said matrix arranged in Jo is arranged to open the four or al equidistant adjacent of the main hole saw including a plurality of first heat radiating holes provided in a matrix,
A metal terminal electrically connected to the main via hole is formed on the back surface of the insulating substrate in the region where the island is provided, and the metal terminal is formed at a position corresponding to the main via hole. However, it is not formed at a position corresponding to the heat radiating via hole .

According to the invention of (13), the conductive island to which the semiconductor chip is die-bonded has substantially the same area as the lower surface of the semiconductor chip or an area larger than the lower surface, and a matrix is formed below the island. Heat dissipating via holes arranged in a matrix similar to the arranged main via holes are provided.
Therefore, by die bonding the semiconductor chip to the island via the conductive layer, a wide heat conduction path for radiating heat from the semiconductor chip by the conductive layer having high thermal conductivity, the island, the main via hole, and the heat radiating via hole. Is ensured, and a semiconductor device having an excellent heat dissipation function can be manufactured.
In addition, since a metal terminal (solder bump or the like) having high thermal conductivity is electrically connected to the main via hole, a semiconductor device is manufactured using this semiconductor device manufacturing substrate, so that a heat conduction path from the semiconductor chip. It is possible to manufacture a semiconductor device capable of releasing the heat transmitted to the main via hole through the metal and the outside (printed wiring board, etc.) through the metal terminal, and to further enhance the heat dissipation function of the semiconductor device. .

Furthermore, the present invention provides the following.
(14) The substrate for manufacturing a semiconductor device according to (13) , wherein a diameter of the first heat radiating via hole is the same as a diameter of the main via hole.
(15) The semiconductor device manufacturing substrate according to (13) or (14) , wherein the plurality of heat radiating via holes further include a plurality of second heat radiating via holes respectively disposed between two adjacent main via holes. .
(16) The substrate for manufacturing a semiconductor device according to any one of (13) to (15) , wherein a conductor layer having substantially the same area as the island is formed on the back surface of the insulating substrate.

Furthermore, the present invention provides the following.
(17) The substrate for manufacturing a semiconductor device according to any one of (13) to (16) , wherein a solder resist layer is formed on the back surface of the insulating substrate so as to cover the entire region other than the metal terminal portion. (18) The substrate for manufacturing a semiconductor device according to any one of (13) to (17) , wherein the main via hole and / or the heat radiating via hole is filled with a metal filler.

According to the invention of (18) , since the main via hole and / or the heat radiating via hole are filled with the metal filler having high thermal conductivity, the semiconductor device is manufactured by using the semiconductor device manufacturing substrate. Further, it is possible to manufacture a semiconductor device in which a wider heat conduction path is ensured, and it is possible to further enhance the heat dissipation function of the semiconductor device.
(19) the bonding pad on the surface of an insulating substrate is formed, a solder resist layer on the surface of the insulating substrate to cover the entire area except for the islands and the bonding pad is formed, the (13) The substrate for manufacturing a semiconductor device according to any one of (18) .

ADVANTAGE OF THE INVENTION According to this invention, the board | substrate for semiconductor device manufacture used for manufacture of the semiconductor device which has the outstanding heat dissipation function, and this semiconductor device can be provided.

First, an example of the semiconductor device of the present invention will be described.
FIG. 1 is a plan perspective view schematically showing an example of a semiconductor device according to the present invention.
2 is a vertical cross-sectional view (cross-sectional view taken along line AA) of the semiconductor device shown in FIG.

The insulating substrate 21 provided in the semiconductor device 10 is made of a bismaleimide-triazine resin (BT resin) impregnated with glass fibers. The insulating substrate 21 is not particularly limited as long as it has insulating properties, and is not limited to bismaleimide-triazine resin (BT resin), epoxy resin, polyester resin, polyimide resin, phenol resin, and the like. Examples thereof include a resin impregnated with a reinforcing material such as glass fiber, and a substrate made of ceramic.

An island 22 having substantially the same area as the lower surface (mounting surface) of the semiconductor chip 11 is formed in the central portion of the surface of the insulating substrate 21. The island 22 is made of a Cu layer. In addition, a Ni layer, an Au layer, or the like may be formed on the Cu layer. In the present invention, the island 22 is not particularly limited as long as it has conductivity.

A plurality of conductor circuits 23 made of a Cu layer are formed on the peripheral portion of the surface of the insulating substrate 21. The conductor circuit 23 has a pattern extending from the peripheral portion to the central portion of the semiconductor device 10 (see FIG. 1). Peripheral ends of each conductor circuit 23 are arranged at equal intervals along each side of the semiconductor device 10, and bonding pads 24 are formed on the upper surfaces of the ends. The bonding pad 24 is made of a Ni layer, an Au layer, or the like.
A solder resist layer 25 is formed on the surface of the insulating substrate 21 so as to cover the entire surface excluding the island 22 and the bonding pad 24.

The semiconductor chip 11 is die-bonded to the island 22 via the conductive layer 12. Various semiconductor chips 11 can be used, and specific functions and internal circuit configurations are not particularly limited.
A plurality of electrodes 11 a are provided on the upper surface of the semiconductor chip 11, and each electrode 11 a and the bonding pad 24 are electrically connected by wires 14. In FIG. 1, for convenience of explanation, the electrode 11a and the wire 14 are not shown.

The insulating substrate 21 is formed with 64 via holes 26 arranged in a matrix (8 vertical × 8 horizontal) including the inside and the outside of the formation region of the island 22 as a whole (8 vertical × 8 horizontal). (See FIG. 1). Among them, in the formation region of the island 22, 4 vertical × 4 horizontal via holes 26 are arranged. The diameter of the via hole 26 is about 120 to 150 μm. The via hole 26 is formed by forming a metal thin film on the wall surface of the through hole formed in the insulating substrate 21 by electroless plating or electrolytic plating, and further filling the through hole with a filler.

Further, in the insulating substrate 21 in the region where the island 22 is formed, nine heat dissipation via holes 27 are formed in a matrix form in addition to the via holes 26 arranged in the length 4 × width 4 (see FIG. 1). ). The heat radiating via holes 27 are arranged at equal intervals from the four adjacent via holes 26. The heat radiating via hole 27 is formed by forming a metal thin film on the wall surface of the through hole formed in the insulating substrate 21 by electroless plating or electrolytic plating and filling the through hole with a filler. 26 has the same shape and configuration. However, in the drawing, the heat dissipation via hole 27 is colored so that the via hole 26 and the heat dissipation via hole 27 can be easily distinguished. The via holes 26 and the heat dissipation via holes 27 arranged in the formation region of the island 22 are electrically connected to the island 22. In the present embodiment, the case where the via hole 26 and the heat dissipation via hole 27 and the island 22 are electrically connected has been described. However, the present invention is not limited to this example. For example, the via hole 26 and the heat dissipation via hole are used. 27 and the island 22 may be insulated.

A conductor layer 28 having substantially the same area as the island 22 is formed at the center of the back surface of the insulating substrate 21, and a via hole 26 and a heat dissipation via hole 27 are electrically connected to the conductor layer 28. . In addition, a conductor layer 28 electrically connected to each via hole 26 is formed in the peripheral portion of the back surface of the insulating substrate 21. These conductor layers 28 are made of a Cu layer. Also, a solder resist layer 30 is formed on the back surface of the insulating substrate 21 to cover the entire back surface except for a part of the conductor layer 28 (corresponding portion of the via hole 26).

A solder pad 29 made of a Ni layer, an Au layer, or the like is formed on the exposed portion of the conductor layer 28, and a solder bump (metal terminal) 31 is formed on the solder pad 29. In the present embodiment, the case where the solder bumps 31 are formed on the back surface of the insulating substrate 21 in advance will be described. However, the present invention is not limited to this example. For example, a solder ball or solder paste is used during mounting. It is good also as mounting directly on a printed wiring board.

In the semiconductor device 10, a resin package portion 19 that seals the semiconductor chip 11 is formed so as to cover the entire top surface of the insulating substrate 21. The resin package part 19 consists of a resin composition containing an epoxy resin etc., for example. In addition, in FIG. 1, the resin package part 19 is not illustrated.

In the semiconductor device 10, the island 22 to which the semiconductor chip 11 is die-bonded is in contact with substantially the entire area of the lower surface of the semiconductor chip 11 via the conductive layer 12. 26 and a heat dissipation via hole 27 are provided. Accordingly, as shown in FIG. 2, the conductive layer 12 with high thermal conductivity, the island 22, the via hole 26 and the heat radiating via hole 27 ensure a wide heat conduction path for radiating heat from the semiconductor chip 11. It has a heat dissipation function.

In the present invention, as in the semiconductor device 10 according to this embodiment, solder bumps (metal terminals) 31 electrically connected to the via holes 26 are formed on the back surface of the insulating substrate 21 in the formation region of the islands 22. It is desirable that Since the solder bumps 31 having high thermal conductivity are electrically connected to the via holes 26, the heat transferred from the semiconductor chip 11 to the via holes 26 is further released to the outside (printed wiring board or the like) via the solder bumps 31. This is because the heat dissipation function can be further enhanced.

In the present invention, it is desirable that the via hole 26 and / or the heat radiating via hole 27 be filled with a metal filler having high thermal conductivity. This is because a wider heat conduction path can be secured and the heat dissipation function can be further enhanced.

In the present embodiment, the case where the diameter of the heat dissipation via hole 27 is the same as the diameter of the via hole 26 and the heat dissipation via hole 27 is arranged at equal intervals from the adjacent four via holes 26 has been described. In the present invention, the shape and arrangement of the heat dissipation via hole 27 are not particularly limited, and for example, those shown in FIGS. 3A and 3B can be employed.

FIG. 3A is a plan view schematically showing an insulating substrate in an island formation region of a semiconductor device according to another embodiment.
In the insulating substrate 32 in the island formation region, 16 via holes 36 arranged in a matrix (4 vertical × 4 horizontal) are formed. Further, although the heat radiating via holes 37 are arranged between the respective via holes 36, that is, at equal intervals from the four adjacent via holes 36, the diameter of the heat radiating via holes 37 is larger than the diameter of the via holes 36.

Thus, by making the diameter of the heat radiating via hole larger than the diameter of the via hole, a wide heat conduction path can be secured and the heat radiating effect can be enhanced. If the opening area is the same, it is desirable to increase the diameter of the heat dissipation via hole and reduce the number of through holes from the viewpoint of suppressing an increase in cost.

FIG. 3B is a plan view schematically showing an insulating substrate in an island formation region of a semiconductor device according to another embodiment.
In the insulating substrate 42 in the island formation region, 16 via holes 46 arranged in a matrix (4 vertical × 4 horizontal) are formed. The heat dissipation via hole 47 includes a first heat dissipation via hole 47a having a diameter larger than the diameter of the via hole 46 and a second heat dissipation via hole 47b having a diameter smaller than the diameter of the via hole 46, and the first heat dissipation via hole 47a. Are arranged between the respective via holes 46, that is, at an equal interval from the four adjacent via holes 46, and arranged in a matrix . Further, the second heat radiating via hole 47 b is arranged in the middle of two adjacent via holes 46.

Thus, the diameter of the heat dissipation via hole is not necessarily one type, and there may be a heat dissipation via hole having a different diameter. In addition, by forming heat dissipation via holes having different diameters as described above, it is possible to increase the opening area of the heat dissipation via holes while ensuring the mechanical strength of the insulating substrate.

In the present invention, as shown in FIGS. 1 and 3, it is desirable that heat dissipation via holes are arranged between all the via holes arranged in a matrix in the island formation region. This is because heat can be uniformly dissipated from the entire semiconductor chip, so that the temperature of the semiconductor chip can be prevented from rising locally.

Next, the substrate for manufacturing a semiconductor device of the present invention will be described.
FIG. 4 is a cross-sectional view schematically showing an example of a semiconductor device manufacturing substrate according to the present invention.
The semiconductor device manufacturing substrate 20 shown in FIG. 4 has the same configuration as the semiconductor device 10 shown in FIG. 1 except that the semiconductor chip 11, the conductive layer 12, the wires 14, and the resin package part 19 are not provided. It is. By manufacturing a semiconductor device using the semiconductor device manufacturing substrate 20, a semiconductor device having an excellent heat dissipation function can be manufactured.

Next, a method for manufacturing a substrate for manufacturing a semiconductor device according to the present invention and a method for manufacturing a semiconductor device according to the present invention using the substrate for manufacturing a semiconductor device will be described.

(A) Using the insulating substrate 21 as a starting material, first, the island 22 and the conductor circuit 23 are formed on the surface of the insulating substrate 21, and the conductor layer 28 is formed on the back surface of the insulating substrate 21. The island 22, the conductor circuit 23, and the conductor layer 28 can be formed by forming a solid metal layer on both surfaces of the insulating substrate 21 by electroless plating or the like and then performing an etching process. Moreover, you may form by performing an etching process to a copper clad board | substrate.

(B) A through hole (hereinafter referred to as a first through hole) is formed in a matrix in the insulating substrate 21 by a drill, a laser, or the like. The first through hole becomes the via hole 26, and the diameter of the first through hole is, for example, about 120 to 150 μm.
Further, a through hole (hereinafter referred to as a second through hole) is drilled in the formation region of the island 23 by a drill, a laser or the like. The second through hole serves as the heat dissipation via hole 27, and the diameter of the second through hole is not particularly limited.

If the diameter of the second through hole is the same as the diameter of the first through hole, the setting of the device for forming the first through hole can be used as it is when forming the second through hole, An increase in labor related to the formation of the holes can be suppressed. On the other hand, when the diameter of the second through hole is different from the diameter of the first through hole (when different diameters are mixed), it is possible to form a large number of through holes while ensuring the interval between the through holes. Therefore, the heat dissipation effect can be enhanced. The second through holes do not necessarily have the same diameter, and a plurality of types having different diameters may be mixed. Further, if the opening area is the same, it is desirable to increase the diameter of the through hole and reduce the number of through holes from the viewpoint of suppressing an increase in cost.

Next, by applying electroless plating and further electrolytic plating, a metal thin film is formed on the wall surface of the through hole (first through hole and second through hole), and the through hole is filled with a filler. Thus, the via hole 26 and the heat radiating via hole 27 are formed. The filler is not particularly limited, and examples thereof include a resin filler and a metal filler. However, a metal filler is used in order to secure a wide heat conduction path and enhance a heat dissipation effect. It is desirable. Examples of the metal filler include a conductive paste containing metal particles. Further, the via hole 26 and the heat radiating via hole 27 may be formed by filling the through hole with plating. The via hole 26 and the heat radiating via hole 27 may be plated with a lid.

(C) Next, an uncured solder resist composition is applied to the surface of the insulating substrate 21 by a roll coater, a curtain coater, or the like, or a solder resist composition formed into a film shape is pressure-bonded and then cured. By performing the treatment, the solder resist layer 25 is formed. Similarly, the solder resist layer 30 is formed on the back surface of the insulating substrate 21.

Subsequently, an opening is formed in a predetermined portion of the solder resist layer 25 by laser processing or exposure and development processing, and the exposed portion is subjected to Ni plating or Au plating, thereby covering the island 22 with a Ni layer or an Au layer, A bonding pad 24 is formed. In addition, the solder pad 29 is formed by performing the same process on the solder resist layer 30. Next, solder bumps 31 are formed by applying solder paste or placing solder balls on the solder pads 29 and performing reflow.
Through the steps (A) to (C), the semiconductor device manufacturing substrate 20 can be manufactured (see FIG. 4).

(D) Next, a solder paste or an Ag paste is applied to the island 22 of the semiconductor device manufacturing substrate 20, and the semiconductor chip 11 is mounted on the applied solder paste and reflowed, whereby the conductive layer 12 is formed on the island 22. Then, the semiconductor chip 11 is die-bonded.
Subsequently, the electrode 11a provided on the upper surface of the semiconductor chip 11 and the bonding pad 24 are wire-bonded using a wire. And the semiconductor device 10 can be manufactured by forming the resin package part 19 with the resin composition containing an epoxy resin etc. so that the whole upper surface of the insulating substrate 21 may be covered.

Although the semiconductor device and the semiconductor device manufacturing substrate according to the embodiment of the present invention have been described above, the present invention is not limited to this example. In the present embodiment, the case where the insulating substrate is composed of one layer has been described, but in the present invention, the insulating substrate may be a laminate of a plurality of plate-like bodies. Further, the diameter of the via hole arranged in the island formation region may be different from the diameter of the via hole arranged outside the island formation region.

In this embodiment, the case where the island has a rectangular shape that is substantially the same size as the lower surface (mounting surface) of the semiconductor chip has been described. However, in the present invention, the shape of the island is not particularly limited. . Furthermore, although the case where the package system of the semiconductor device is BGA has been described in the present embodiment, the present invention is not limited to this example, and may be LGA, for example.

It is a plane perspective view showing typically an example of a semiconductor device concerning the present invention. It is a longitudinal cross-sectional view (AA sectional view taken on the line) of the semiconductor device shown in FIG. It is a top view which shows typically the insulating substrate in the island formation area of the semiconductor device which concerns on other embodiment. It is sectional drawing which shows typically an example of the board | substrate for semiconductor device manufacture which concerns on this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Semiconductor device 11 Semiconductor chip 11a Electrode 12 Conductive layer 14 Wire 19 Resin package part 20 Semiconductor device manufacturing substrate 21 Insulating substrate 22 Island 23 Conductor circuit 24 Bonding pad 25, 30 Solder resist layer 26 Via hole 27 Heat radiation via hole 28 Conductive layer 29 Solder pads 31 Solder bumps

Claims (19)

An insulating substrate having main via holes arranged in a matrix and having conductive islands on the surface;
A semiconductor chip die-bonded to the island via a conductive layer;
In addition to the main via holes arranged in a matrix, the insulating substrate in the region where the island is provided is provided with a plurality of heat dissipation via holes, and the plurality of heat dissipation via holes are in the matrix shape. Including a plurality of first heat dissipating via holes arranged in a matrix and arranged at equal intervals from adjacent four of the arranged main via holes,
A metal terminal electrically connected to the main via hole is formed on the back surface of the insulating substrate in the region where the island is provided, and the metal terminal is formed at a position corresponding to the main via hole. However, it is not formed at a position corresponding to the heat radiating via hole.   The semiconductor device according to claim 1, wherein a diameter of the first heat radiating via hole is the same as a diameter of the main via hole. The semiconductor device according to claim 1, wherein a diameter of the first heat radiating via hole is larger than a diameter of the main via hole. 2. The semiconductor device according to claim 1, wherein the plurality of heat radiating via holes further include a plurality of second heat radiating via holes respectively arranged in the middle of two adjacent ones of the main via holes arranged in a matrix.   The semiconductor device according to claim 4, wherein a diameter of the first heat radiating via hole is larger than a diameter of the main via hole, and a diameter of the second heat radiating via hole is smaller than a diameter of the main via hole.   The semiconductor device according to claim 1, wherein the plurality of heat dissipation via holes include heat dissipation via holes having different diameters.   The semiconductor device according to claim 1, wherein in the region where the island is provided, the heat dissipation via hole is arranged between all the main via holes arranged in a matrix.   The semiconductor device according to claim 1, wherein a conductor layer having substantially the same area as the island is formed on the back surface of the insulating substrate.   The semiconductor device according to claim 8, wherein the main via hole and the heat radiating via hole are electrically connected to the conductor layer.   The semiconductor device as described in any one of Claims 1-9 in which the soldering resist layer which covers the whole region other than the part of the said metal terminal is formed in the back surface of the said insulating substrate.   The semiconductor device according to claim 1, wherein the main via hole and / or the heat dissipation via hole is filled with a metal filler.   The bonding pad is formed in the surface of the said insulating substrate, The soldering resist layer which covers the whole area except the said conductive layer and the said bonding pad in the surface of the said insulating substrate is formed. The semiconductor device as described in any one. Including an insulating substrate having main via holes arranged in a matrix and a conductive island on which a semiconductor chip is die-bonded on the surface,
In addition to the main via holes arranged in a matrix, the insulating substrate in the region where the island is provided is provided with a plurality of heat dissipation via holes, and the plurality of heat dissipation via holes are in the matrix shape. Including a plurality of first heat dissipating via holes arranged in a matrix and arranged at equal intervals from adjacent four of the arranged main via holes,
A metal terminal electrically connected to the main via hole is formed on the back surface of the insulating substrate in the region where the island is provided, and the metal terminal is formed at a position corresponding to the main via hole. However, it is not formed at a position corresponding to the heat radiating via hole.   The substrate for manufacturing a semiconductor device according to claim 13, wherein a diameter of the first heat radiating via hole is the same as a diameter of the main via hole.   The substrate for manufacturing a semiconductor device according to claim 13, wherein the plurality of heat dissipation via holes further include a plurality of second heat dissipation via holes respectively disposed between two adjacent main via holes.   The substrate for manufacturing a semiconductor device according to claim 13, wherein a conductor layer having substantially the same area as the island is formed on a back surface of the insulating substrate.   The board | substrate for semiconductor device manufacture as described in any one of Claims 13-16 in which the soldering resist layer which covers the whole region other than the part of the said metal terminal is formed in the back surface of the said insulating substrate.   The semiconductor device manufacturing substrate according to claim 13, wherein the main via hole and / or the heat radiating via hole is filled with a metal filler.   The bonding pad is formed in the surface of the said insulating substrate, The soldering resist layer which covers the whole area except the said island and the said bonding pad in the surface of the said insulating substrate is formed in any one of Claims 13-18 A substrate for manufacturing a semiconductor device according to claim 1.

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